ADS1282 Example C Code
1.0.0
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ADS1282 Descriptor. More...
Go to the source code of this file.
Macros | |
#define | NUM_REGISTERS ((uint8_t) 11) |
Total number of device registers. More... | |
#define | HIGH ((bool) true) |
Alias for setting GPIOs pins to the logic "high" state. More... | |
#define | LOW ((bool) false) |
Alias for setting GPIOs pins to the logic "low" state. More... | |
#define | DELAY_T_DLY ((uint32_t) 6 * (4096000/FCLK_FREQ_HZ)) |
#define | OPCODE_NOP ((uint8_t) 0x00) |
#define | OPCODE_WAKEUP ((uint8_t) 0x00) |
#define | OPCODE_STANDBY ((uint8_t) 0x03) |
#define | OPCODE_SYNC ((uint8_t) 0x05) |
#define | OPCODE_RESET ((uint8_t) 0x07) |
#define | OPCODE_RDATAC ((uint8_t) 0x10) |
#define | OPCODE_SDATAC ((uint8_t) 0x11) |
#define | OPCODE_RDATA ((uint8_t) 0x12) |
#define | OPCODE_RREG ((uint8_t) 0x20) |
#define | OPCODE_WREG ((uint8_t) 0x40) |
#define | OPCODE_REG_ADDR_MASK ((uint8_t) 0x1F) |
#define | OPCODE_REG_COUNT_MASK ((uint8_t) 0x1F) |
#define | OPCODE_OFSCAL ((uint8_t) 0x60) |
#define | OPCODE_GANCAL ((uint8_t) 0x61) |
#define | FILTR_SETTING ((uint8_t) (getRegisterValue(CONFIG0_ADDRESS) & CONFIG0_FILTR_MASK)) |
#define | FILTR_BYPASSED ((bool) (FILTR_SETTING == CONFIG0_FILTR_MODMODE)) |
#define | FILTR_SINC_ONLY ((bool) (FILTR_SETTING == CONFIG0_FILTR_SINC)) |
#define | ID_ADDRESS ((uint8_t) 0x00) |
#define | ID_RESET_MASK ((uint8_t) 0x0F) |
#define | ID_DEFAULT ((uint8_t) 0x00) |
#define | ID_ID_MASK ((uint8_t) 0xF0) |
#define | CONFIG0_ADDRESS ((uint8_t) 0x01) |
#define | CONFIG0_DEFAULT ((uint8_t) 0x52) |
#define | CONFIG0_SYNC_MASK ((uint8_t) 0x80) |
#define | CONFIG0_SYNC_PULSE ((uint8_t) 0x00 << 7) |
#define | CONFIG0_SYNC_CONTINUOUS ((uint8_t) 0x01 << 7) |
#define | CONFIG0_DR_MASK ((uint8_t) 0x38) |
#define | CONFIG0_DR_250SPS ((uint8_t) 0x00 << 3) |
#define | CONFIG0_DR_500SPS ((uint8_t) 0x01 << 3) |
#define | CONFIG0_DR_1000SPS ((uint8_t) 0x02 << 3) |
#define | CONFIG0_DR_2000SPS ((uint8_t) 0x03 << 3) |
#define | CONFIG0_DR_4000SPS ((uint8_t) 0x04 << 3) |
#define | CONFIG0_PHASE_MASK ((uint8_t) 0x04) |
#define | CONFIG0_PHASE_LINEAR ((uint8_t) 0x00 << 2) |
#define | CONFIG0_PHASE_MINIMUM ((uint8_t) 0x01 << 2) |
#define | CONFIG0_FILTR_MASK ((uint8_t) 0x03) |
#define | CONFIG0_FILTR_MODMODE ((uint8_t) 0x00 << 0) |
#define | CONFIG0_FILTR_SINC ((uint8_t) 0x01 << 0) |
#define | CONFIG0_FILTR_SINC_LPF ((uint8_t) 0x02 << 0) |
#define | CONFIG0_FILTR_SINC_LPF_HPF ((uint8_t) 0x03 << 0) |
#define | CONFIG1_ADDRESS ((uint8_t) 0x02) |
#define | CONFIG1_DEFAULT ((uint8_t) 0x08) |
#define | CONFIG1_MUX_MASK ((uint8_t) 0x70) |
#define | CONFIG1_MUX_AINP1_AINN1 ((uint8_t) 0x00 << 4) |
#define | CONFIG1_MUX_AINP2_AINN2 ((uint8_t) 0x01 << 4) |
#define | CONFIG1_MUX_INT_400OHM_SHORT ((uint8_t) 0x02 << 4) |
#define | CONFIG1_MUX_AINX1_AINX2 ((uint8_t) 0x03 << 4) |
#define | CONFIG1_MUX_EXT_SHORT_AINN2 ((uint8_t) 0x04 << 4) |
#define | CONFIG1_CHOP_MASK ((uint8_t) 0x08) |
#define | CONFIG1_CHOP_DISABLED ((uint8_t) 0x00 << 3) |
#define | CONFIG1_CHOP_ENDABLED ((uint8_t) 0x01 << 3) |
#define | CONFIG1_PGA_MASK ((uint8_t) 0x07) |
#define | CONFIG1_PGA_1 ((uint8_t) 0x00 << 0) |
#define | CONFIG1_PGA_2 ((uint8_t) 0x01 << 0) |
#define | CONFIG1_PGA_4 ((uint8_t) 0x02 << 0) |
#define | CONFIG1_PGA_8 ((uint8_t) 0x03 << 0) |
#define | CONFIG1_PGA_16 ((uint8_t) 0x04 << 0) |
#define | CONFIG1_PGA_32 ((uint8_t) 0x05 << 0) |
#define | CONFIG1_PGA_64 ((uint8_t) 0x06 << 0) |
#define | HPF0_ADDRESS ((uint8_t) 0x03) |
#define | HPF0_DEFAULT ((uint8_t) 0x32) |
#define | HPF1_ADDRESS ((uint8_t) 0x04) |
#define | HPF1_DEFAULT ((uint8_t) 0x03) |
#define | OFC0_ADDRESS ((uint8_t) 0x05) |
#define | OFC0_DEFAULT ((uint8_t) 0x00) |
#define | OFC1_ADDRESS ((uint8_t) 0x06) |
#define | OFC1_DEFAULT ((uint8_t) 0x00) |
#define | OFC2_ADDRESS ((uint8_t) 0x07) |
#define | OFC2_DEFAULT ((uint8_t) 0x00) |
#define | FSC0_ADDRESS ((uint8_t) 0x08) |
#define | FSC0_DEFAULT ((uint8_t) 0x00) |
#define | FSC1_ADDRESS ((uint8_t) 0x09) |
#define | FSC1_DEFAULT ((uint8_t) 0x00) |
#define | FSC2_ADDRESS ((uint8_t) 0x0A) |
#define | FSC2_DEFAULT ((uint8_t) 0x40) |
Enumerations | |
enum | readMode { DIRECT, COMMAND } |
Functions | |
void | adcStartupRoutine (void) |
uint8_t | readSingleRegister (const uint8_t address) |
void | readMultipleRegisters (const uint8_t startAddress, const uint8_t count) |
void | writeSingleRegister (const uint8_t address, const uint8_t data) |
void | writeMultipleRegisters (const uint8_t startAddress, const uint8_t count, const uint8_t regData[]) |
int32_t | readData (void) |
void | sendCommand (const uint8_t op_code) |
uint8_t | getRegisterValue (const uint8_t address) |
void | _restoreRegisterDefaults (void) |
ADS1282 Descriptor.
Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:
Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
Neither the name of Texas Instruments Incorporated nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#define CONFIG0_ADDRESS ((uint8_t) 0x01) |
#define CONFIG0_DEFAULT ((uint8_t) 0x52) |
#define CONFIG0_DR_1000SPS ((uint8_t) 0x02 << 3) |
#define CONFIG0_DR_2000SPS ((uint8_t) 0x03 << 3) |
#define CONFIG0_DR_250SPS ((uint8_t) 0x00 << 3) |
#define CONFIG0_DR_4000SPS ((uint8_t) 0x04 << 3) |
#define CONFIG0_DR_500SPS ((uint8_t) 0x01 << 3) |
#define CONFIG0_DR_MASK ((uint8_t) 0x38) |
#define CONFIG0_FILTR_MASK ((uint8_t) 0x03) |
#define CONFIG0_FILTR_MODMODE ((uint8_t) 0x00 << 0) |
#define CONFIG0_FILTR_SINC ((uint8_t) 0x01 << 0) |
#define CONFIG0_FILTR_SINC_LPF ((uint8_t) 0x02 << 0) |
#define CONFIG0_FILTR_SINC_LPF_HPF ((uint8_t) 0x03 << 0) |
#define CONFIG0_PHASE_LINEAR ((uint8_t) 0x00 << 2) |
#define CONFIG0_PHASE_MASK ((uint8_t) 0x04) |
#define CONFIG0_PHASE_MINIMUM ((uint8_t) 0x01 << 2) |
#define CONFIG0_SYNC_CONTINUOUS ((uint8_t) 0x01 << 7) |
#define CONFIG0_SYNC_MASK ((uint8_t) 0x80) |
#define CONFIG0_SYNC_PULSE ((uint8_t) 0x00 << 7) |
#define CONFIG1_ADDRESS ((uint8_t) 0x02) |
#define CONFIG1_CHOP_DISABLED ((uint8_t) 0x00 << 3) |
#define CONFIG1_CHOP_ENDABLED ((uint8_t) 0x01 << 3) |
#define CONFIG1_CHOP_MASK ((uint8_t) 0x08) |
#define CONFIG1_DEFAULT ((uint8_t) 0x08) |
#define CONFIG1_MUX_AINP1_AINN1 ((uint8_t) 0x00 << 4) |
#define CONFIG1_MUX_AINP2_AINN2 ((uint8_t) 0x01 << 4) |
#define CONFIG1_MUX_AINX1_AINX2 ((uint8_t) 0x03 << 4) |
#define CONFIG1_MUX_EXT_SHORT_AINN2 ((uint8_t) 0x04 << 4) |
#define CONFIG1_MUX_INT_400OHM_SHORT ((uint8_t) 0x02 << 4) |
#define CONFIG1_MUX_MASK ((uint8_t) 0x70) |
#define CONFIG1_PGA_1 ((uint8_t) 0x00 << 0) |
#define CONFIG1_PGA_16 ((uint8_t) 0x04 << 0) |
#define CONFIG1_PGA_2 ((uint8_t) 0x01 << 0) |
#define CONFIG1_PGA_32 ((uint8_t) 0x05 << 0) |
#define CONFIG1_PGA_4 ((uint8_t) 0x02 << 0) |
#define CONFIG1_PGA_64 ((uint8_t) 0x06 << 0) |
#define CONFIG1_PGA_8 ((uint8_t) 0x03 << 0) |
#define CONFIG1_PGA_MASK ((uint8_t) 0x07) |
#define DELAY_T_DLY ((uint32_t) 6 * (4096000/FCLK_FREQ_HZ)) |
TIMING REQUIREMENT: "tDLY" (time for DOUT to update during RREG command) "tDLY" = 24/fCLK = 5.89 us @ 4.096 MHz NOTE: This delay value may need to be increased to account for rounding errors when using an external clock frequency other than 4.096 MHz. However, most micro-controllers will have inherent delays between functions calls that will add to this delay and in many cases more than account for the rounding error. If that is the case, this value may be reduced instead.
#define FILTR_BYPASSED ((bool) (FILTR_SETTING == CONFIG0_FILTR_MODMODE)) |
#define FILTR_SETTING ((uint8_t) (getRegisterValue(CONFIG0_ADDRESS) & CONFIG0_FILTR_MASK)) |
#define FILTR_SINC_ONLY ((bool) (FILTR_SETTING == CONFIG0_FILTR_SINC)) |
#define FSC0_ADDRESS ((uint8_t) 0x08) |
#define FSC0_DEFAULT ((uint8_t) 0x00) |
#define FSC1_ADDRESS ((uint8_t) 0x09) |
#define FSC1_DEFAULT ((uint8_t) 0x00) |
#define FSC2_ADDRESS ((uint8_t) 0x0A) |
#define FSC2_DEFAULT ((uint8_t) 0x40) |
#define HIGH ((bool) true) |
Alias for setting GPIOs pins to the logic "high" state.
#define HPF0_ADDRESS ((uint8_t) 0x03) |
#define HPF0_DEFAULT ((uint8_t) 0x32) |
#define HPF1_ADDRESS ((uint8_t) 0x04) |
#define HPF1_DEFAULT ((uint8_t) 0x03) |
#define ID_ADDRESS ((uint8_t) 0x00) |
#define ID_DEFAULT ((uint8_t) 0x00) |
#define ID_ID_MASK ((uint8_t) 0xF0) |
#define ID_RESET_MASK ((uint8_t) 0x0F) |
#define LOW ((bool) false) |
Alias for setting GPIOs pins to the logic "low" state.
#define NUM_REGISTERS ((uint8_t) 11) |
Total number of device registers.
#define OFC0_ADDRESS ((uint8_t) 0x05) |
#define OFC0_DEFAULT ((uint8_t) 0x00) |
#define OFC1_ADDRESS ((uint8_t) 0x06) |
#define OFC1_DEFAULT ((uint8_t) 0x00) |
#define OFC2_ADDRESS ((uint8_t) 0x07) |
#define OFC2_DEFAULT ((uint8_t) 0x00) |
#define OPCODE_GANCAL ((uint8_t) 0x61) |
#define OPCODE_NOP ((uint8_t) 0x00) |
#define OPCODE_OFSCAL ((uint8_t) 0x60) |
#define OPCODE_RDATA ((uint8_t) 0x12) |
#define OPCODE_RDATAC ((uint8_t) 0x10) |
#define OPCODE_REG_ADDR_MASK ((uint8_t) 0x1F) |
#define OPCODE_REG_COUNT_MASK ((uint8_t) 0x1F) |
#define OPCODE_RESET ((uint8_t) 0x07) |
#define OPCODE_RREG ((uint8_t) 0x20) |
#define OPCODE_SDATAC ((uint8_t) 0x11) |
#define OPCODE_STANDBY ((uint8_t) 0x03) |
#define OPCODE_SYNC ((uint8_t) 0x05) |
#define OPCODE_WAKEUP ((uint8_t) 0x00) |
#define OPCODE_WREG ((uint8_t) 0x40) |
enum readMode |
void _restoreRegisterDefaults | ( | void | ) |
Reverts internal variables to default state after a reset.
NOTES:
void adcStartupRoutine | ( | void | ) |
Example start up sequence.
Before calling this function, the device must be powered, the SPI/GPIO pins of the MCU must have already been configured, and the external clock source provided to CLKIN.
uint8_t getRegisterValue | ( | const uint8_t | address | ) |
Getter function to access registerMap array from outside of this module.
NOTE: The internal registerMap arrays stores the last know register value, since the last read or write operation to that register. This function does not communicate with the device to retrieve the current register value. For the most up-to-date register data or retrieving the value of a hardware controlled register use readSingleRegister().
int32_t readData | ( | void | ) |
Function for retrieving ADC conversion results
Example of reading data continuously:
Example of reading data by command:
void readMultipleRegisters | ( | const uint8_t | startAddress, |
const uint8_t | count | ||
) |
Reads the contents of multiple registers starting at the specified address.
startAddress | is the 8-bit starting address of the first register to read. |
count | total number of register to read |
uint8_t readSingleRegister | ( | const uint8_t | address | ) |
Reads the contents of a single register at the specified address.
address | is the 8-bit address of the register to read. |
void sendCommand | ( | const uint8_t | op_code | ) |
Function for sending single byte SPI commands to the ADC
op_code | the command byte/opcode. |
NOTE: Multi-byte SPI commands have their own dedicated functions.
void writeMultipleRegisters | ( | const uint8_t | startAddress, |
const uint8_t | count, | ||
const uint8_t | dataArray[] | ||
) |
Writes data to a multiple registers starting at the specified address.
startAddress | is the 8-bit starting address of the first register to begin writing. |
count | is the total number of registers to write. |
dataArray[] | is the data array containing the new register values, where dataArray[0] is the value to be written to the 'startAddress' register. |
void writeSingleRegister | ( | const uint8_t | address, |
const uint8_t | data | ||
) |
Writes data to a single register.
address | is the address of the register to write to. |
data | is the value to write. |