ADS131A04 Example C Code
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- a -
A_SYS_CFG_ADDRESS :
ads131a04.h
A_SYS_CFG_COMP_TH_HIGH_70_LOW_30 :
ads131a04.h
A_SYS_CFG_COMP_TH_HIGH_75_LOW_25 :
ads131a04.h
A_SYS_CFG_COMP_TH_HIGH_80_LOW_20 :
ads131a04.h
A_SYS_CFG_COMP_TH_HIGH_85_LOW_15 :
ads131a04.h
A_SYS_CFG_COMP_TH_HIGH_87p5_LOW_12p5 :
ads131a04.h
A_SYS_CFG_COMP_TH_HIGH_90_LOW_10 :
ads131a04.h
A_SYS_CFG_COMP_TH_HIGH_92p5_LOW_7p5 :
ads131a04.h
A_SYS_CFG_COMP_TH_HIGH_95_LOW_5 :
ads131a04.h
A_SYS_CFG_COMP_TH_MASK :
ads131a04.h
A_SYS_CFG_DEFAULT :
ads131a04.h
A_SYS_CFG_HRM_MASK :
ads131a04.h
A_SYS_CFG_INT_REFEN_MASK :
ads131a04.h
A_SYS_CFG_VNCPEN_MASK :
ads131a04.h
A_SYS_CFG_VREF_4V_MASK :
ads131a04.h
ADC1_ADDRESS :
ads131a04.h
ADC1_DEFAULT :
ads131a04.h
ADC1_GAIN1_1 :
ads131a04.h
ADC1_GAIN1_16 :
ads131a04.h
ADC1_GAIN1_2 :
ads131a04.h
ADC1_GAIN1_4 :
ads131a04.h
ADC1_GAIN1_8 :
ads131a04.h
ADC1_GAIN1_MASK :
ads131a04.h
ADC2_ADDRESS :
ads131a04.h
ADC2_DEFAULT :
ads131a04.h
ADC2_GAIN2_1 :
ads131a04.h
ADC2_GAIN2_16 :
ads131a04.h
ADC2_GAIN2_2 :
ads131a04.h
ADC2_GAIN2_4 :
ads131a04.h
ADC2_GAIN2_8 :
ads131a04.h
ADC2_GAIN2_MASK :
ads131a04.h
ADC3_ADDRESS :
ads131a04.h
ADC3_DEFAULT :
ads131a04.h
ADC3_GAIN3_1 :
ads131a04.h
ADC3_GAIN3_16 :
ads131a04.h
ADC3_GAIN3_2 :
ads131a04.h
ADC3_GAIN3_4 :
ads131a04.h
ADC3_GAIN3_8 :
ads131a04.h
ADC3_GAIN3_MASK :
ads131a04.h
ADC4_ADDRESS :
ads131a04.h
ADC4_DEFAULT :
ads131a04.h
ADC4_GAIN4_1 :
ads131a04.h
ADC4_GAIN4_16 :
ads131a04.h
ADC4_GAIN4_2 :
ads131a04.h
ADC4_GAIN4_4 :
ads131a04.h
ADC4_GAIN4_8 :
ads131a04.h
ADC4_GAIN4_MASK :
ads131a04.h
ADC_ENA_ADDRESS :
ads131a04.h
ADC_ENA_DEFAULT :
ads131a04.h
ADC_ENA_ENA_ALL_CH_PWDN :
ads131a04.h
ADC_ENA_ENA_ALL_CH_PWUP :
ads131a04.h
ADC_ENA_ENA_MASK :
ads131a04.h
ASYNC_SLAVE_MODE :
ads131a04.h
- c -
CLK1_ADDRESS :
ads131a04.h
CLK1_CLK_DIV_10 :
ads131a04.h
CLK1_CLK_DIV_12 :
ads131a04.h
CLK1_CLK_DIV_14 :
ads131a04.h
CLK1_CLK_DIV_2 :
ads131a04.h
CLK1_CLK_DIV_4 :
ads131a04.h
CLK1_CLK_DIV_6 :
ads131a04.h
CLK1_CLK_DIV_8 :
ads131a04.h
CLK1_CLK_DIV_MASK :
ads131a04.h
CLK1_CLKSRC_MASK :
ads131a04.h
CLK1_DEFAULT :
ads131a04.h
CLK2_ADDRESS :
ads131a04.h
CLK2_DEFAULT :
ads131a04.h
CLK2_ICLK_DIV_10 :
ads131a04.h
CLK2_ICLK_DIV_12 :
ads131a04.h
CLK2_ICLK_DIV_14 :
ads131a04.h
CLK2_ICLK_DIV_2 :
ads131a04.h
CLK2_ICLK_DIV_4 :
ads131a04.h
CLK2_ICLK_DIV_6 :
ads131a04.h
CLK2_ICLK_DIV_8 :
ads131a04.h
CLK2_ICLK_DIV_MASK :
ads131a04.h
CLK2_OSR_1024 :
ads131a04.h
CLK2_OSR_128 :
ads131a04.h
CLK2_OSR_192 :
ads131a04.h
CLK2_OSR_200 :
ads131a04.h
CLK2_OSR_2048 :
ads131a04.h
CLK2_OSR_256 :
ads131a04.h
CLK2_OSR_32 :
ads131a04.h
CLK2_OSR_384 :
ads131a04.h
CLK2_OSR_400 :
ads131a04.h
CLK2_OSR_4096 :
ads131a04.h
CLK2_OSR_48 :
ads131a04.h
CLK2_OSR_512 :
ads131a04.h
CLK2_OSR_64 :
ads131a04.h
CLK2_OSR_768 :
ads131a04.h
CLK2_OSR_800 :
ads131a04.h
CLK2_OSR_96 :
ads131a04.h
CLK2_OSR_MASK :
ads131a04.h
COMBINE_BYTES :
ads131a04.c
CRC_EN :
ads131a04.h
CRC_MODE :
ads131a04.h
- d -
D_SYS_CFG_ADDRESS :
ads131a04.h
D_SYS_CFG_CRC_EN_MASK :
ads131a04.h
D_SYS_CFG_CRC_MODE_MASK :
ads131a04.h
D_SYS_CFG_DEFAULT :
ads131a04.h
D_SYS_CFG_DNDLY_10ns :
ads131a04.h
D_SYS_CFG_DNDLY_12ns :
ads131a04.h
D_SYS_CFG_DNDLY_6ns :
ads131a04.h
D_SYS_CFG_DNDLY_8ns :
ads131a04.h
D_SYS_CFG_DNDLY_MASK :
ads131a04.h
D_SYS_CFG_FIXED_MASK :
ads131a04.h
D_SYS_CFG_HIZDLY_10ns :
ads131a04.h
D_SYS_CFG_HIZDLY_12ns :
ads131a04.h
D_SYS_CFG_HIZDLY_6ns :
ads131a04.h
D_SYS_CFG_HIZDLY_8ns :
ads131a04.h
D_SYS_CFG_HIZDLY_MASK :
ads131a04.h
D_SYS_CFG_WDT_EN_MASK :
ads131a04.h
- e -
ERROR_CNT_ADDRESS :
ads131a04.h
ERROR_CNT_DEFAULT :
ads131a04.h
ERROR_CNT_ER_MASK :
ads131a04.h
- f -
FIXED :
ads131a04.h
- h -
HIGH :
hal.h
- i -
ID_LSB_ADDRESS :
ads131a04.h
ID_LSB_REV_ID_MASK :
ads131a04.h
ID_MSB_ADDRESS :
ads131a04.h
ID_MSB_NU_CH_2 :
ads131a04.h
ID_MSB_NU_CH_4 :
ads131a04.h
ID_MSB_NU_CH_MASK :
ads131a04.h
- l -
LOW :
hal.h
LOWER_BYTE :
ads131a04.c
- n -
nCS_PIN :
hal.h
nCS_PORT :
hal.h
nDRDY_INT :
hal.h
nDRDY_PIN :
hal.h
nDRDY_PORT :
hal.h
nRESET_PIN :
hal.h
nRESET_PORT :
hal.h
NUM_REGISTERS :
ads131a04.h
- o -
OPCODE_LOCK :
ads131a04.h
OPCODE_NULL :
ads131a04.h
OPCODE_RESET :
ads131a04.h
OPCODE_RREG :
ads131a04.h
OPCODE_STANDBY :
ads131a04.h
OPCODE_UNLOCK :
ads131a04.h
OPCODE_WAKEUP :
ads131a04.h
OPCODE_WREG :
ads131a04.h
- s -
SET_FIXED :
ads131a04.h
SSI_BASE_ADDR :
hal.c
STAT_1_ADDRESS :
ads131a04.h
STAT_1_DEFAULT :
ads131a04.h
STAT_1_F_ADCIN_MASK :
ads131a04.h
STAT_1_F_CHECK_MASK :
ads131a04.h
STAT_1_F_DRDY_MASK :
ads131a04.h
STAT_1_F_OPC_MASK :
ads131a04.h
STAT_1_F_RESYNC_MASK :
ads131a04.h
STAT_1_F_SPI_MASK :
ads131a04.h
STAT_1_F_WDT_MASK :
ads131a04.h
STAT_M2_ADDRESS :
ads131a04.h
STAT_M2_DEFAULT :
ads131a04.h
STAT_M2_DEFAULT_MASK :
ads131a04.h
STAT_M2_M0PIN_M0_ASYNC_SLAVE :
ads131a04.h
STAT_M2_M0PIN_M0_SYNC_MASTER :
ads131a04.h
STAT_M2_M0PIN_M0_SYNC_SLAVE :
ads131a04.h
STAT_M2_M0PIN_MASK :
ads131a04.h
STAT_M2_M1PIN_M1_16BIT :
ads131a04.h
STAT_M2_M1PIN_M1_24BIT :
ads131a04.h
STAT_M2_M1PIN_M1_32BIT :
ads131a04.h
STAT_M2_M1PIN_MASK :
ads131a04.h
STAT_M2_M2PIN_M2_HAMMING_OFF :
ads131a04.h
STAT_M2_M2PIN_M2_HAMMING_ON :
ads131a04.h
STAT_M2_M2PIN_M2_NC :
ads131a04.h
STAT_M2_M2PIN_MASK :
ads131a04.h
STAT_N_ADDRESS :
ads131a04.h
STAT_N_DEFAULT :
ads131a04.h
STAT_N_F_IN1N_MASK :
ads131a04.h
STAT_N_F_IN2N_MASK :
ads131a04.h
STAT_N_F_IN3N_MASK :
ads131a04.h
STAT_N_F_IN4N_MASK :
ads131a04.h
STAT_P_ADDRESS :
ads131a04.h
STAT_P_DEFAULT :
ads131a04.h
STAT_P_F_IN1P_MASK :
ads131a04.h
STAT_P_F_IN2P_MASK :
ads131a04.h
STAT_P_F_IN3P_MASK :
ads131a04.h
STAT_P_F_IN4P_MASK :
ads131a04.h
STAT_S_ADDRESS :
ads131a04.h
STAT_S_DEFAULT :
ads131a04.h
STAT_S_F_CS_MASK :
ads131a04.h
STAT_S_F_FRAME_MASK :
ads131a04.h
STAT_S_F_STARTUP_MASK :
ads131a04.h
- u -
UPPER_BYTE :
ads131a04.c
- w -
WORD_LENGTH :
ads131a04.c
WORD_LENGTH_24BIT :
ads131a04.h
WORD_LENGTH_BITS :
ads131a04.h
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