PDK API Guide for AM64x
CSL_CPSW_PORT_CONTROL Struct Reference

Detailed Description

Holds CPSW Port Control contents.

Data Fields

Uint32 txLpiClkstopEnable
 
Uint32 dscpIpv6Enable
 
Uint32 dscpIpv4Enable
 

Field Documentation

◆ txLpiClkstopEnable

Uint32 CSL_CPSW_PORT_CONTROL::txLpiClkstopEnable

Eneregy Efficient Etherent (EEE) Transmit LPI clockstop enable for EMAC port only 1: The GMII or RGMII transmit clock is stopped in the EEE LPI state. 0: The GMII or RGMII transmit clock is not stopped in the EEE LPI state.

◆ dscpIpv6Enable

Uint32 CSL_CPSW_PORT_CONTROL::dscpIpv6Enable

IPv6 DSCP to priority mapping enable

◆ dscpIpv4Enable

Uint32 CSL_CPSW_PORT_CONTROL::dscpIpv4Enable

IPv4 DSCP to priority mapping enable