PDK API Guide for AM64x
udma_ch.h
Go to the documentation of this file.
1 /*
2  * Copyright (c) Texas Instruments Incorporated 2018-2020
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions
6  * are met:
7  *
8  * Redistributions of source code must retain the above copyright
9  * notice, this list of conditions and the following disclaimer.
10  *
11  * Redistributions in binary form must reproduce the above copyright
12  * notice, this list of conditions and the following disclaimer in the
13  * documentation and/or other materials provided with the
14  * distribution.
15  *
16  * Neither the name of Texas Instruments Incorporated nor the names of
17  * its contributors may be used to endorse or promote products derived
18  * from this software without specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  */
32 
48 #ifndef UDMA_CH_H_
49 #define UDMA_CH_H_
50 
51 /* ========================================================================== */
52 /* Include Files */
53 /* ========================================================================== */
54 
55 /* None */
56 
57 #ifdef __cplusplus
58 extern "C" {
59 #endif
60 
61 /* ========================================================================== */
62 /* Macros & Typedefs */
63 /* ========================================================================== */
64 
69 #define UDMA_DMA_CH_INVALID ((uint32_t) 0xFFFF0000U)
70 
74 #define UDMA_DMA_CH_ANY ((uint32_t) 0xFFFF0001U)
75 
79 #define UDMA_DMA_CH_NA ((uint32_t) 0xFFFF0002U)
80 
81 #define UDMA_UTC_ID_INVALID ((uint32_t) 0xFFFF0003U)
82 
83 #define UDMA_MAPPED_GROUP_INVALID ((uint32_t) 0xFFFF0004U)
84 
86 #define UDMA_DMSC_EXTENDED_CH_TYPE_BCDMA_BLK_CPY ((uint8_t) 1U)
87 
89 #define UDMA_DMSC_EXTENDED_CH_TYPE_BCDMA_SPLIT_TR_TX ((uint8_t) 0U)
90 
100 #define UDMA_CH_FLAG_TX ((uint32_t) 0x0001U)
101 
102 #define UDMA_CH_FLAG_RX ((uint32_t) 0x0002U)
103 
104 #define UDMA_CH_FLAG_BLK_COPY ((uint32_t) 0x0004U)
105 
106 #define UDMA_CH_FLAG_PDMA ((uint32_t) 0x0008U)
107 
108 #define UDMA_CH_FLAG_PSIL ((uint32_t) 0x0010U)
109 
110 #define UDMA_CH_FLAG_UTC ((uint32_t) 0x0020U)
111 
112 #define UDMA_CH_FLAG_HC ((uint32_t) 0x0040U)
113 
114 #define UDMA_CH_FLAG_UHC ((uint32_t) 0x0080U)
115 
116 #define UDMA_CH_FLAG_MAPPED ((uint32_t) 0x0100U)
117 /* @} */
118 
128 #define UDMA_CH_TYPE_TR_BLK_COPY (UDMA_CH_FLAG_BLK_COPY | \
129  UDMA_CH_FLAG_TX | \
130  UDMA_CH_FLAG_RX)
131 
132 #define UDMA_CH_TYPE_TR_BLK_COPY_HC (UDMA_CH_FLAG_BLK_COPY | \
133  UDMA_CH_FLAG_TX | \
134  UDMA_CH_FLAG_RX | \
135  UDMA_CH_FLAG_HC)
136 
137 #define UDMA_CH_TYPE_TR_BLK_COPY_UHC (UDMA_CH_FLAG_BLK_COPY | \
138  UDMA_CH_FLAG_TX | \
139  UDMA_CH_FLAG_RX | \
140  UDMA_CH_FLAG_UHC)
141 
142 #define UDMA_CH_TYPE_TX (UDMA_CH_FLAG_TX | UDMA_CH_FLAG_PSIL)
143 
144 #define UDMA_CH_TYPE_TX_HC (UDMA_CH_FLAG_TX | UDMA_CH_FLAG_PSIL | UDMA_CH_FLAG_HC)
145 
146 #define UDMA_CH_TYPE_TX_UHC (UDMA_CH_FLAG_TX | UDMA_CH_FLAG_PSIL | UDMA_CH_FLAG_UHC)
147 
149 #define UDMA_CH_TYPE_RX (UDMA_CH_FLAG_RX | UDMA_CH_FLAG_PSIL)
150 
151 #define UDMA_CH_TYPE_RX_HC (UDMA_CH_FLAG_RX | UDMA_CH_FLAG_PSIL | UDMA_CH_FLAG_HC)
152 
153 #define UDMA_CH_TYPE_RX_UHC (UDMA_CH_FLAG_RX | UDMA_CH_FLAG_PSIL | UDMA_CH_FLAG_UHC)
154 
156 #define UDMA_CH_TYPE_PDMA_TX (UDMA_CH_FLAG_TX | UDMA_CH_FLAG_PDMA)
157 
158 #define UDMA_CH_TYPE_PDMA_TX_HC (UDMA_CH_FLAG_TX | UDMA_CH_FLAG_PDMA | UDMA_CH_FLAG_HC)
159 
160 #define UDMA_CH_TYPE_PDMA_TX_UHC (UDMA_CH_FLAG_TX | UDMA_CH_FLAG_PDMA | UDMA_CH_FLAG_UHC)
161 
163 #define UDMA_CH_TYPE_PDMA_RX (UDMA_CH_FLAG_RX | UDMA_CH_FLAG_PDMA)
164 
165 #define UDMA_CH_TYPE_PDMA_RX_HC (UDMA_CH_FLAG_RX | UDMA_CH_FLAG_PDMA | UDMA_CH_FLAG_HC)
166 
167 #define UDMA_CH_TYPE_PDMA_RX_UHC (UDMA_CH_FLAG_RX | UDMA_CH_FLAG_PDMA | UDMA_CH_FLAG_UHC)
168 
174 #define UDMA_CH_TYPE_TX_MAPPED (UDMA_CH_FLAG_TX | UDMA_CH_FLAG_PSIL | UDMA_CH_FLAG_MAPPED)
175 
180 #define UDMA_CH_TYPE_RX_MAPPED (UDMA_CH_FLAG_RX | UDMA_CH_FLAG_PSIL | UDMA_CH_FLAG_MAPPED)
181 
188 #define UDMA_CH_TYPE_UTC (UDMA_CH_FLAG_UTC)
189 /* @} */
190 
198 #define UDMA_PDMA_ES_8BITS ((uint32_t) 0x00U)
199 
200 #define UDMA_PDMA_ES_16BITS ((uint32_t) 0x01U)
201 
202 #define UDMA_PDMA_ES_24BITS ((uint32_t) 0x02U)
203 
204 #define UDMA_PDMA_ES_32BITS ((uint32_t) 0x03U)
205 
206 #define UDMA_PDMA_ES_64BITS ((uint32_t) 0x04U)
207 
208 #define UDMA_PDMA_ES_DONTCARE ((uint32_t) 0x00U)
209 /* @} */
210 
211 /* ========================================================================== */
212 /* Structure Declarations */
213 /* ========================================================================== */
214 
218 typedef struct
219 {
220  uint32_t chNum;
230  uint32_t peerChNum;
248  uint32_t utcId;
254  uint32_t mappedChGrp;
262  void *appData;
281 } Udma_ChPrms;
282 
286 typedef struct
287 {
288  uint8_t pauseOnError;
290  uint8_t filterEinfo;
292  uint8_t filterPsWords;
294  uint8_t addrType;
297  uint8_t chanType;
299  uint16_t fetchWordSize;
301  uint8_t busPriority;
303  uint8_t busQos;
305  uint8_t busOrderId;
307  uint8_t dmaPriority;
311  uint8_t txCredit;
313  uint16_t fifoDepth;
328  uint8_t burstSize;
347  uint8_t supressTdCqPkt;
355 } Udma_ChTxPrms;
356 
360 typedef struct
361 {
362  uint8_t pauseOnError;
364  uint8_t addrType;
367  uint8_t chanType;
369  uint16_t fetchWordSize;
371  uint8_t busPriority;
373  uint8_t busQos;
375  uint8_t busOrderId;
377  uint8_t dmaPriority;
395  uint8_t flowSopOffset;
402  uint8_t ignoreLongPkts;
414  uint8_t burstSize;
433 } Udma_ChRxPrms;
434 
438 typedef struct
439 {
440  uint8_t pauseOnError;
442  uint8_t addrType;
445  uint8_t chanType;
447  uint16_t fetchWordSize;
449  uint8_t busPriority;
451  uint8_t busQos;
453  uint8_t busOrderId;
455  uint8_t dmaPriority;
459  uint8_t burstSize;
472  uint8_t supressTdCqPkt;
480 #if (UDMA_NUM_UTC_INSTANCE > 0)
481  /* Below fields are applicable only for DRU UTC */
482  uint64_t druOwner;
490  uint32_t druQueueId;
498 #endif
500 
504 typedef struct
505 {
506  uint32_t elemSize;
515  uint32_t elemCnt;
534  uint32_t fifoCnt;
552 
556 typedef struct
557 {
558  uint32_t packetCnt;
562  uint32_t startedByteCnt;
564 } Udma_ChStats;
565 
566 /* ========================================================================== */
567 /* Function Declarations */
568 /* ========================================================================== */
569 
592 int32_t Udma_chOpen(Udma_DrvHandle drvHandle,
593  Udma_ChHandle chHandle,
594  uint32_t chType,
595  const Udma_ChPrms *chPrms);
596 
609 int32_t Udma_chClose(Udma_ChHandle chHandle);
610 
628 int32_t Udma_chConfigTx(Udma_ChHandle chHandle, const Udma_ChTxPrms *txPrms);
629 
649 int32_t Udma_chConfigRx(Udma_ChHandle chHandle, const Udma_ChRxPrms *rxPrms);
650 
668 int32_t Udma_chConfigUtc(Udma_ChHandle chHandle, const Udma_ChUtcPrms *utcPrms);
669 
685 int32_t Udma_chConfigPdma(Udma_ChHandle chHandle,
686  const Udma_ChPdmaPrms *pdmaPrms);
687 
700 int32_t Udma_chEnable(Udma_ChHandle chHandle);
701 
723 int32_t Udma_chDisable(Udma_ChHandle chHandle, uint32_t timeout);
724 
738 int32_t Udma_chPause(Udma_ChHandle chHandle);
739 
753 int32_t Udma_chResume(Udma_ChHandle chHandle);
754 
769 uint32_t Udma_chGetNum(Udma_ChHandle chHandle);
770 
781 Udma_RingHandle Udma_chGetFqRingHandle(Udma_ChHandle chHandle);
782 
793 Udma_RingHandle Udma_chGetCqRingHandle(Udma_ChHandle chHandle);
794 
805 Udma_RingHandle Udma_chGetTdCqRingHandle(Udma_ChHandle chHandle);
806 
818 uint16_t Udma_chGetFqRingNum(Udma_ChHandle chHandle);
819 
831 uint16_t Udma_chGetCqRingNum(Udma_ChHandle chHandle);
832 
843 Udma_FlowHandle Udma_chGetDefaultFlowHandle(Udma_ChHandle chHandle);
844 
864 int32_t Udma_chDequeueTdResponse(Udma_ChHandle chHandle,
865  CSL_UdmapTdResponse *tdResponse);
866 
885 uint32_t Udma_chGetTriggerEvent(Udma_ChHandle chHandle, uint32_t trigger);
886 
906 void *Udma_chGetSwTriggerRegister(Udma_ChHandle chHandle);
907 
930 int32_t Udma_chSetSwTrigger(Udma_ChHandle chHandle, uint32_t trigger);
931 
956 int32_t Udma_chSetChaining(Udma_ChHandle triggerChHandle,
957  Udma_ChHandle chainedChHandle,
958  uint32_t trigger);
959 
974 int32_t Udma_chBreakChaining(Udma_ChHandle triggerChHandle,
975  Udma_ChHandle chainedChHandle);
976 
977 /*
978  * Structure Init functions
979  */
987 void UdmaChPrms_init(Udma_ChPrms *chPrms, uint32_t chType);
988 
996 void UdmaChTxPrms_init(Udma_ChTxPrms *txPrms, uint32_t chType);
997 
1005 void UdmaChRxPrms_init(Udma_ChRxPrms *rxPrms, uint32_t chType);
1006 
1013 void UdmaChUtcPrms_init(Udma_ChUtcPrms *utcPrms);
1014 
1021 void UdmaChPdmaPrms_init(Udma_ChPdmaPrms *pdmaPrms);
1022 
1035 int32_t Udma_chGetStats(Udma_ChHandle chHandle, Udma_ChStats *chStats);
1036 
1037 /* ========================================================================== */
1038 /* Static Function Definitions */
1039 /* ========================================================================== */
1040 
1041 /* None */
1042 
1043 /* ========================================================================== */
1044 /* Internal/Private Structure Declarations */
1045 /* ========================================================================== */
1046 
1047 #if (UDMA_NUM_UTC_INSTANCE > 0)
1048 
1054 typedef struct
1055 {
1056  uint32_t utcId;
1059  uint32_t utcType;
1062  uint32_t startCh;
1065  uint32_t numCh;
1067  uint32_t startThreadId;
1069  uint8_t txCredit;
1071  CSL_DRU_t *druRegs;
1074  uint32_t numQueue;
1076 } Udma_UtcInstInfo;
1077 #endif
1078 
1086 {
1087  uint32_t chType;
1091  Udma_DrvHandle drvHandle;
1093 #if (UDMA_NUM_UTC_INSTANCE > 0)
1094  const Udma_UtcInstInfo *utcInfo;
1096 #endif
1097 
1098  uint32_t txChNum;
1102  uint32_t rxChNum;
1106  uint32_t extChNum;
1110  uint32_t pdmaChNum;
1113  uint32_t peerThreadId;
1116  Udma_RingHandle fqRing;
1118  Udma_RingHandle cqRing;
1123  Udma_RingHandle tdCqRing;
1137  Udma_FlowHandle defaultFlow;
1153 #if (UDMA_SOC_CFG_UDMAP_PRESENT == 1)
1154  /* Below UDMAP register overlay pointers provided for debug purpose to
1155  * readily view the registers */
1156  volatile CSL_udmap_txccfgRegs_chan *pTxCfgRegs;
1158  volatile CSL_udmap_txcrtRegs_chan *pTxRtRegs;
1160  volatile CSL_udmap_rxccfgRegs_chan *pRxCfgRegs;
1162  volatile CSL_udmap_rxcrtRegs_chan *pRxRtRegs;
1164  volatile CSL_udmap_txccfgRegs_chan *pExtCfgRegs;
1166  volatile CSL_udmap_txcrtRegs_chan *pExtRtRegs;
1168 #endif
1169 #if (UDMA_SOC_CFG_LCDMA_PRESENT == 1)
1170  /* Below BCDMA register overlay pointers provided for debug purpose to
1171  * readily view the registers */
1172  volatile CSL_bcdma_bccfgRegs_chan *pBcdmaBcCfgRegs;
1174  volatile CSL_bcdma_bcrtRegs_chan *pBcdmaBcRtRegs;
1176  volatile CSL_bcdma_txccfgRegs_chan *pBcdmaTxCfgRegs;
1178  volatile CSL_bcdma_txcrtRegs_chan *pBcdmaTxRtRegs;
1180  volatile CSL_bcdma_rxccfgRegs_chan *pBcdmaRxCfgRegs;
1182  volatile CSL_bcdma_rxcrtRegs_chan *pBcdmaRxRtRegs;
1185  /* Below PKTDMA register overlay pointers provided for debug purpose to
1186  * readily view the registers */
1187  volatile CSL_pktdma_txccfgRegs_chan *pPktdmaTxCfgRegs;
1189  volatile CSL_pktdma_txcrtRegs_chan *pPktdmaTxRtRegs;
1191  volatile CSL_pktdma_rxccfgRegs_chan *pPktdmaRxCfgRegs;
1193  volatile CSL_pktdma_rxcrtRegs_chan *pPktdmaRxRtRegs;
1195  volatile CSL_pktdma_txccfgRegs_chan *pPktdmaExtCfgRegs;
1197  volatile CSL_pktdma_txcrtRegs_chan *pPktdmaExtRtRegs;
1199 #endif
1200 
1201 #if (UDMA_NUM_UTC_INSTANCE > 0)
1202  volatile CSL_DRU_CHNRTRegs_CHNRT *pDruNrtRegs;
1204  volatile CSL_DRU_CHRTRegs_CHRT *pDruRtRegs;
1206 #endif
1207 
1208  uint32_t chInitDone;
1210  uint32_t chOesAllocDone;
1215  uint32_t trigger;
1218 };
1219 
1220 #ifdef __cplusplus
1221 }
1222 #endif
1223 
1224 #endif /* #ifndef UDMA_CH_H_ */
1225 
1226 /* @} */
int32_t Udma_chSetChaining(Udma_ChHandle triggerChHandle, Udma_ChHandle chainedChHandle, uint32_t trigger)
Chains the trigger channel with the chained channel.
uint8_t busPriority
Definition: udma_ch.h:301
uint16_t fetchWordSize
Definition: udma_ch.h:447
uint8_t supressTdCqPkt
Definition: udma_ch.h:472
uint8_t busPriority
Definition: udma_ch.h:371
UDMA TX channel parameters.
Definition: udma_ch.h:286
uint32_t startedByteCnt
Definition: udma_ch.h:562
UDMA ring parameters.
Definition: udma_ring.h:133
uint16_t fetchWordSize
Definition: udma_ch.h:369
uint8_t busQos
Definition: udma_ch.h:373
uint8_t addrType
Definition: udma_ch.h:294
uint32_t packetCnt
Definition: udma_ch.h:558
UDMA flow object.
Definition: udma_flow.h:465
UDMA channel open parameters.
Definition: udma_ch.h:218
uint8_t busPriority
Definition: udma_ch.h:449
UDMA channel statistics.
Definition: udma_ch.h:556
uint32_t extChNum
Definition: udma_ch.h:1106
Udma_ChRxPrms rxPrms
Definition: udma_ch.h:1147
uint8_t chanType
Definition: udma_ch.h:445
UDMA PDMA channel Static TR parameters.
Definition: udma_ch.h:504
uint32_t txChNum
Definition: udma_ch.h:1098
int32_t Udma_chResume(Udma_ChHandle chHandle)
UDMA channel resume API.
uint8_t burstSize
Definition: udma_ch.h:328
Udma_FlowHandle Udma_chGetDefaultFlowHandle(Udma_ChHandle chHandle)
Returns the default flow handle of the RX channel.
uint8_t supressTdCqPkt
Definition: udma_ch.h:347
uint8_t busQos
Definition: udma_ch.h:303
uint32_t rxChNum
Definition: udma_ch.h:1102
UDMA RX channel parameters.
Definition: udma_ch.h:360
uint8_t burstSize
Definition: udma_ch.h:459
uint16_t fifoDepth
Definition: udma_ch.h:313
int32_t Udma_chEnable(Udma_ChHandle chHandle)
UDMA channel enable API.
uint16_t flowIdFwRangeStart
Definition: udma_ch.h:381
uint32_t Udma_chGetNum(Udma_ChHandle chHandle)
Returns the channel number offset with in a channel type - TX, RX and External (UTC) channel types.
int32_t Udma_chConfigPdma(Udma_ChHandle chHandle, const Udma_ChPdmaPrms *pdmaPrms)
UDMA configure PDMA channel (peerChNum as part of Udma_ChPrms) paired with the UDMAP channel.
int32_t Udma_chConfigRx(Udma_ChHandle chHandle, const Udma_ChRxPrms *rxPrms)
UDMA configure RX channel.
uint32_t elemCnt
Definition: udma_ch.h:515
Udma_DrvHandle drvHandle
Definition: udma_event.h:505
uint8_t busOrderId
Definition: udma_ch.h:453
uint8_t busQos
Definition: udma_ch.h:451
uint8_t ignoreShortPkts
Definition: udma_ch.h:398
Udma_RingHandle fqRing
Definition: udma_ch.h:1116
struct Udma_RingObj fqRingObj
Definition: udma_ch.h:1126
uint8_t dmaPriority
Definition: udma_ch.h:455
uint32_t peerThreadId
Definition: udma_ch.h:1113
uint8_t filterEinfo
Definition: udma_ch.h:290
struct Udma_RingObj tdCqRingObj
Definition: udma_ch.h:1132
uint8_t ignoreLongPkts
Definition: udma_ch.h:402
int32_t Udma_chBreakChaining(Udma_ChHandle triggerChHandle, Udma_ChHandle chainedChHandle)
Breaks the chaining by resetting the trigger channel's OES.
void UdmaChPdmaPrms_init(Udma_ChPdmaPrms *pdmaPrms)
Udma_ChPdmaPrms structure init function.
uint8_t busOrderId
Definition: udma_ch.h:305
Udma_RingHandle Udma_chGetTdCqRingHandle(Udma_ChHandle chHandle)
Returns the teardown completion ring handle of the channel.
uint8_t pauseOnError
Definition: udma_ch.h:440
Udma_RingHandle tdCqRing
Definition: udma_ch.h:1123
uint32_t pdmaChNum
Definition: udma_ch.h:1110
Udma_RingHandle Udma_chGetCqRingHandle(Udma_ChHandle chHandle)
Returns the default completion ring handle of the channel.
uint32_t chInitDone
Definition: udma_ch.h:1208
int32_t Udma_chPause(Udma_ChHandle chHandle)
UDMA channel pause API.
UDMA ring object.
Definition: udma_ring.h:775
int32_t Udma_chOpen(Udma_DrvHandle drvHandle, Udma_ChHandle chHandle, uint32_t chType, const Udma_ChPrms *chPrms)
UDMA open channel.
Udma_RingPrms cqRingPrms
Definition: udma_ch.h:269
uint8_t addrType
Definition: udma_ch.h:442
int32_t Udma_chSetSwTrigger(Udma_ChHandle chHandle, uint32_t trigger)
Sets the software trigger register based on the trigger mode provided.
uint32_t elemSize
Definition: udma_ch.h:506
uint32_t configDefaultFlow
Definition: udma_ch.h:406
void UdmaChPrms_init(Udma_ChPrms *chPrms, uint32_t chType)
Udma_ChPrms structure init function.
void UdmaChRxPrms_init(Udma_ChRxPrms *rxPrms, uint32_t chType)
Udma_ChRxPrms structure init function.
void * Udma_chGetSwTriggerRegister(Udma_ChHandle chHandle)
Returns the software trigger register address for the channel.
int32_t Udma_chGetStats(Udma_ChHandle chHandle, Udma_ChStats *chStats)
Get real-time channel statistics.
UDMA channel object.
Definition: udma_ch.h:1085
uint8_t chanType
Definition: udma_ch.h:297
uint32_t chNum
Definition: udma_ch.h:220
Udma_RingPrms fqRingPrms
Definition: udma_ch.h:267
uint16_t Udma_chGetCqRingNum(Udma_ChHandle chHandle)
Returns the default completion ring number to be programmed in descriptor.
uint32_t peerChNum
Definition: udma_ch.h:230
Udma_RingHandle Udma_chGetFqRingHandle(Udma_ChHandle chHandle)
Returns the default free ring handle of the channel.
void UdmaChUtcPrms_init(Udma_ChUtcPrms *utcPrms)
Udma_ChUtcPrms structure init function.
uint32_t Udma_chGetTriggerEvent(Udma_ChHandle chHandle, uint32_t trigger)
Returns the global trigger event for the channel.
uint8_t flowSopOffset
Definition: udma_ch.h:395
uint32_t fifoCnt
Definition: udma_ch.h:534
int32_t Udma_chConfigTx(Udma_ChHandle chHandle, const Udma_ChTxPrms *txPrms)
UDMA configure TX channel.
struct Udma_FlowObj defaultFlowObj
Definition: udma_ch.h:1139
struct Udma_RingObj cqRingObj
Definition: udma_ch.h:1128
uint8_t flowEInfoPresent
Definition: udma_ch.h:386
int32_t Udma_chClose(Udma_ChHandle chHandle)
UDMA close channel.
UDMA UTC channel parameters.
Definition: udma_ch.h:438
uint8_t flowPsInfoPresent
Definition: udma_ch.h:389
Udma_RingPrms tdCqRingPrms
Definition: udma_ch.h:274
Udma_FlowHandle defaultFlow
Definition: udma_ch.h:1137
uint8_t chanType
Definition: udma_ch.h:367
uint8_t flowErrorHandling
Definition: udma_ch.h:392
void UdmaChTxPrms_init(Udma_ChTxPrms *txPrms, uint32_t chType)
Udma_ChTxPrms structure init function.
uint8_t busOrderId
Definition: udma_ch.h:375
uint32_t trigger
Definition: udma_ch.h:1215
Udma_ChTxPrms txPrms
Definition: udma_ch.h:1145
uint32_t chOesAllocDone
Definition: udma_ch.h:1210
uint8_t dmaPriority
Definition: udma_ch.h:377
uint8_t dmaPriority
Definition: udma_ch.h:307
uint8_t pauseOnError
Definition: udma_ch.h:288
Udma_ChUtcPrms utcPrms
Definition: udma_ch.h:1149
Udma_ChPrms chPrms
Definition: udma_ch.h:1089
uint8_t filterPsWords
Definition: udma_ch.h:292
uint32_t completedByteCnt
Definition: udma_ch.h:560
uint16_t fetchWordSize
Definition: udma_ch.h:299
uint8_t txCredit
Definition: udma_ch.h:311
Udma_RingHandle cqRing
Definition: udma_ch.h:1118
uint32_t chType
Definition: udma_ch.h:1087
Udma_DrvHandle drvHandle
Definition: udma_ch.h:1091
uint8_t addrType
Definition: udma_ch.h:364
uint16_t Udma_chGetFqRingNum(Udma_ChHandle chHandle)
Returns the default free ring number to be programmed in descriptor.
int32_t Udma_chDequeueTdResponse(Udma_ChHandle chHandle, CSL_UdmapTdResponse *tdResponse)
UDMA dequeue response from teardown completion ring.
uint8_t burstSize
Definition: udma_ch.h:414
void * appData
Definition: udma_ch.h:262
uint32_t utcId
Definition: udma_ch.h:248
uint32_t mappedChGrp
Definition: udma_ch.h:254
int32_t Udma_chDisable(Udma_ChHandle chHandle, uint32_t timeout)
UDMA channel teardown and disable API.
int32_t Udma_chConfigUtc(Udma_ChHandle chHandle, const Udma_ChUtcPrms *utcPrms)
UDMA configure UTC channel.
uint16_t flowIdFwRangeCnt
Definition: udma_ch.h:383
uint8_t pauseOnError
Definition: udma_ch.h:362