PDK API Guide for AM64x
CSL_CPSW_CPPI_P0_CONTROL Struct Reference

Detailed Description

Holds CPPI P0 Control register contents.

Data Fields

Uint32 p0RxRemapDscpIpv6
 
Uint32 p0RxRemapDscpIpv4
 
Uint32 p0RxRemapVlan
 
Uint32 p0RxEccErrEn
 
Uint32 p0TxEccErrEn
 
Uint32 p0DscpIpv6En
 
Uint32 p0DscpIpv4En
 
Uint32 p0RxChksumEn
 

Field Documentation

◆ p0RxRemapDscpIpv6

Uint32 CSL_CPSW_CPPI_P0_CONTROL::p0RxRemapDscpIpv6

Port 0 receive remap thread to DSCP IPV6 priority

◆ p0RxRemapDscpIpv4

Uint32 CSL_CPSW_CPPI_P0_CONTROL::p0RxRemapDscpIpv4

Port 0 receive remap thread to DSCP IPV6 priority.

◆ p0RxRemapVlan

Uint32 CSL_CPSW_CPPI_P0_CONTROL::p0RxRemapVlan

Port 0 receive remap thread to VLAN.

◆ p0RxEccErrEn

Uint32 CSL_CPSW_CPPI_P0_CONTROL::p0RxEccErrEn

Port 0 receive ECC Error Enable This bit must be set to enable receive ECC error operations

◆ p0TxEccErrEn

Uint32 CSL_CPSW_CPPI_P0_CONTROL::p0TxEccErrEn

Port 0 transmit ECC Error Enable This bit must be set to enable transmit ECC error operations

◆ p0DscpIpv6En

Uint32 CSL_CPSW_CPPI_P0_CONTROL::p0DscpIpv6En

Port 0 IPv6 DSCP enable 0 - Ipv6 DSCP priority mapping is disabled 1 - Ipv6 DSCP priority mapping is enabled

◆ p0DscpIpv4En

Uint32 CSL_CPSW_CPPI_P0_CONTROL::p0DscpIpv4En

Port 0 IPv4 DSCP enable 0 - Ipv4 DSCP priority mapping is disabled 1 - Ipv4 DSCP priority mapping is enabled

◆ p0RxChksumEn

Uint32 CSL_CPSW_CPPI_P0_CONTROL::p0RxChksumEn

Port 0 Receive (port 0 ingress) Checksum Enable 0 - Port 0 receive checksum is disabled 1 - Port 0 receive checksum is enabled