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PDK API Guide for AM64x
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Cache Handling routines for the RTOS Porting Interface.
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Cache coherent type definitions | |
#define | OSAL_CACHEP_COHERENT ((uint32_t) 0U) |
#define | OSAL_CACHEP_NOT_COHERENT ((uint32_t) 1U) |
typedef uint32_t | Osal_CacheP_isCoherent |
This enumerator defines the cache coherent types. More... | |
Functions | |
void | CacheP_wb (const void *addr, int32_t size) |
Function to write back cache lines. More... | |
void | CacheP_Inv (const void *addr, int32_t size) |
Function to invalidate cache lines. More... | |
void | CacheP_wbInv (const void *addr, int32_t size) |
Function to write back and invalidate cache lines. More... | |
void | CacheP_fenceCpu2Dma (uintptr_t addr, uint32_t size, Osal_CacheP_isCoherent isCoherent) |
Function to call before handing over the memory buffer to DMA from CPU. More... | |
void | CacheP_fenceDma2Cpu (uintptr_t addr, uint32_t size, Osal_CacheP_isCoherent isCoherent) |
Function to call before reading the memory to CPU after DMA operations. More... | |