PDK API Guide for AM64x
sciclient_fmwMsgParams.h
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1 /*
2  * Copyright (C) 2018 Texas Instruments Incorporated
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions
6  * are met:
7  *
8  * Redistributions of source code must retain the above copyright
9  * notice, this list of conditions and the following disclaimer.
10  *
11  * Redistributions in binary form must reproduce the above copyright
12  * notice, this list of conditions and the following disclaimer in the
13  * documentation and/or other materials provided with the
14  * distribution.
15  *
16  * Neither the name of Texas Instruments Incorporated nor the names of
17  * its contributors may be used to endorse or promote products derived
18  * from this software without specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  *
32  */
33 
41 #ifndef SCICLIENT_FMWMSGPARAMS_H_
42 #define SCICLIENT_FMWMSGPARAMS_H_
43 
44 /* ========================================================================== */
45 /* Include Files */
46 /* ========================================================================== */
47 
48 #include <stdint.h>
49 #include <ti/csl/soc.h>
50 
51 #ifdef __cplusplus
52 extern "C" {
53 #endif
54 
55 /* ========================================================================== */
56 /* Macros & Typedefs */
57 /* ========================================================================== */
58 
60 #define TISCI_PARAM_UNDEF (0xFFFFFFFFU)
61 
68 /* ABI Major revision - Major revision changes
69 * indicate backward compatibility breakage */
70 #define SCICLIENT_FIRMWARE_ABI_MAJOR (3U)
71 /* ABI Minor revision - Minor revision changes
72 * indicate backward compatibility is maintained,
73 * however, new messages OR extensions to existing
74 * messages might have been adde */
75 #define SCICLIENT_FIRMWARE_ABI_MINOR (1U)
76 /* @} */
77 
85 #define SCICLIENT_CONTEXT_R5_0_SEC_0 (0U)
86 
87 #define SCICLIENT_CONTEXT_R5_0_NONSEC_0 (1U)
88 
89 #define SCICLIENT_CONTEXT_R5_0_SEC_1 (2U)
90 
91 #define SCICLIENT_CONTEXT_R5_0_NONSEC_1 (3U)
92 
93 #define SCICLIENT_CONTEXT_A53_SEC_0 (4U)
94 
95 #define SCICLIENT_CONTEXT_A53_NONSEC_0 (5U)
96 
97 #define SCICLIENT_CONTEXT_A53_NONSEC_1 (6U)
98 
99 #define SCICLIENT_CONTEXT_A53_NONSEC_2 (7U)
100 
101 #define SCICLIENT_CONTEXT_M4_NONSEC_0 (8U)
102 
103 #define SCICLIENT_CONTEXT_R5_1_SEC_0 (9U)
104 
105 #define SCICLIENT_CONTEXT_R5_1_NONSEC_0 (10U)
106 
107 #define SCICLIENT_CONTEXT_R5_1_SEC_1 (11U)
108 
109 #define SCICLIENT_CONTEXT_R5_1_NONSEC_1 (12U)
110 
111 #define SCICLIENT_CONTEXT_ICSSG_NONSEC_0 (13U)
112 
113 #define SCICLIENT_CONTEXT_M4_SEC_0 (14U) /* TBD */
114 
116 #define SCICLIENT_CONTEXT_MAX_NUM (15U)
117 /* @} */
118 
127 #define SCICLIENT_PROCID_A53_CL0_C0 (0x20U)
128 
129 #define SCICLIENT_PROCID_A53_CL0_C1 (0x21U)
130 
131 #define SCICLIENT_PROCID_R5_CL0_C0 (0x01U)
132 
133 #define SCICLIENT_PROCID_R5_CL0_C1 (0x02U)
134 
135 #define SCICLIENT_PROCID_R5_CL1_C0 (0x06U)
136 
137 #define SCICLIENT_PROCID_R5_CL1_C1 (0x07U)
138 /*** AM64_MAIN_SEC_MMR_MAIN_0: (Cluster 16 Processor 0) */
139 #define SCICLIENT_PROCID_MCU_M4FSS0_C0 (0x18U)
140 
141 
142 /* @} */
143 
145 #define TISCI_MSG_VALUE_RM_NULL_RING_TYPE (0xFFFFu)
146 #define TISCI_MSG_VALUE_RM_NULL_RING_INDEX (0xFFFFFFFFu)
147 #define TISCI_MSG_VALUE_RM_NULL_RING_ADDR (0xFFFFFFFFu)
148 #define TISCI_MSG_VALUE_RM_NULL_RING_COUNT (0xFFFFFFFFu)
149 
154 #define TISCI_MSG_VALUE_RM_NULL_RING_MODE (0xFFu)
155 #define TISCI_MSG_VALUE_RM_NULL_RING_SIZE (0xFFu)
156 #define TISCI_MSG_VALUE_RM_NULL_ORDER_ID (0xFFu)
157 #define TISCI_MSG_VALUE_RM_UDMAP_NULL_CH_TYPE (0xFFu)
158 #define TISCI_MSG_VALUE_RM_UDMAP_NULL_CH_INDEX (0xFFFFFFFFu)
159 
167 #include <ti/drv/sciclient/soc/sysfw/include/am64x/tisci_devices.h>
168 /* @} */
169 
176 #include <ti/drv/sciclient/soc/sysfw/include/am64x/tisci_clocks.h>
177 /* @} */
178 
186 #define TISCI_RINGACC0_OES_IRQ_SRC_IDX_START (20U)
187 #define TISCI_RINGACC0_EOES_IRQ_SRC_IDX_START (32U)
188 #define TISCI_TIMERMGR_OES_IRQ_SRC_IDX_START (0U)
189 #define TISCI_PKTDMA0_TX_EOES_IRQ_SRC_IDX_START (4096U)
190 #define TISCI_PKTDMA0_TX_FLOW_OES_IRQ_SRC_IDX_START (4608U)
191 #define TISCI_PKTDMA0_RX_EOES_IRQ_SRC_IDX_START (5120U)
192 #define TISCI_PKTDMA0_RX_FLOW_OES_IRQ_SRC_IDX_START (5632U)
193 #define TISCI_PKTDMA0_RX_FLOW_SOES_IRQ_SRC_IDX_START (6144U)
194 #define TISCI_PKTDMA0_RX_FLOW_FOES_IRQ_SRC_IDX_START (6656U)
195 #define TISCI_BCDMA0_BC_EOES_IRQ_SRC_IDX_START (8192U)
196 #define TISCI_BCDMA0_BC_DC_OES_IRQ_SRC_IDX_START (8704U)
197 #define TISCI_BCDMA0_BC_RC_OES_IRQ_SRC_IDX_START (9216U)
198 #define TISCI_BCDMA0_TX_EOES_IRQ_SRC_IDX_START (9728U)
199 #define TISCI_BCDMA0_TX_DC_OES_IRQ_SRC_IDX_START (10240U)
200 #define TISCI_BCDMA0_TX_RC_OES_IRQ_SRC_IDX_START (10752U)
201 #define TISCI_BCDMA0_RX_EOES_IRQ_SRC_IDX_START (11264U)
202 #define TISCI_BCDMA0_RX_DC_OES_IRQ_SRC_IDX_START (11776U)
203 #define TISCI_BCDMA0_RX_RC_OES_IRQ_SRC_IDX_START (12288U)
204 
205 /* @} */
206 
213 #define SCICLIENT_DEV_MCU_R5FSS0_CORE0 (TISCI_DEV_R5FSS0_CORE0)
214 #define SCICLIENT_DEV_MCU_R5FSS0_CORE1 (TISCI_DEV_R5FSS0_CORE1)
215 /* @} */
216 
223 #define SCICLIENT_DEV_MCU_R5FSS0_CORE0_PROCID \
224  (SCICLIENT_PROCID_R5_CL0_C0)
225 #define SCICLIENT_DEV_MCU_R5FSS0_CORE1_PROCID \
226  (SCICLIENT_PROCID_R5_CL0_C1)
227 /* @} */
228 
230 #define SCICLIENT_ALLOWED_BOARDCFG_BASE_START (CSL_MSRAM_256K0_RAM_BASE)
231 
232 #define SCICLIENT_ALLOWED_BOARDCFG_BASE_END (CSL_MSRAM_256K0_RAM_BASE + CSL_MSRAM_256K0_RAM_SIZE * 8UL)
233 
234 /* ========================================================================== */
235 /* Structure Declarations */
236 /* ========================================================================== */
237 
238 /* None */
239 
240 #ifdef __cplusplus
241 }
242 #endif
243 
244 #endif /* #ifndef SCICLIENT_FMWMSGPARAMS_H_ */