DMAWFF3.h

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/*
 * Copyright (c) 2023-2025, Texas Instruments Incorporated
 * All rights reserved.
 *
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 *    notice, this list of conditions and the following disclaimer.
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 * *  Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
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 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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 */
#ifndef ti_drivers_DMAWFF3__include
#define ti_drivers_DMAWFF3__include

#include <stdint.h>
#include <stdbool.h>

#include <ti/drivers/Power.h>

#include <ti/devices/DeviceFamily.h>
#include DeviceFamily_constructPath(inc/hw_types.h)
#include DeviceFamily_constructPath(driverlib/dma.h)

#ifdef __cplusplus
extern "C" {
#endif

typedef enum
{
    DMAWFF3_CONFIG_SRC_PTR_WRAP       = DMA_CONFIG_SRC_PTR_WRAP,
    DMAWFF3_CONFIG_DST_PTR_WRAP       = DMA_CONFIG_DST_PTR_WRAP,
    DMAWFF3_CONFIG_FORCE_REQ          = DMA_CONFIG_FORCE_REQ,
    DMAWFF3_CONFIG_SRC_PTR_FIFO       = DMA_CONFIG_SRC_PTR_FIFO,
    DMAWFF3_CONFIG_DST_PTR_FIFO       = DMA_CONFIG_DST_PTR_FIFO,
    DMAWFF3_CONFIG_RX                 = DMA_CONFIG_RX,
    DMAWFF3_CONFIG_TX                 = DMA_CONFIG_TX,
    DMAWFF3_CONFIG_CLEAR_AT_JOB_START = DMA_CONFIG_CLEAR_AT_JOB_START,
} DMAWFF3_ChConfig;

typedef enum
{
    DMAWFF3_WORD_SIZE_1B = DMA_WORD_SIZE_1B,
    DMAWFF3_WORD_SIZE_2B = DMA_WORD_SIZE_2B,
    DMAWFF3_WORD_SIZE_4B = DMA_WORD_SIZE_4B,
} DMAWFF3_WordSize;

typedef enum
{
    DMAWFF3_BLOCK_SIZE_1B = DMA_WORD_SIZE_1B,
    DMAWFF3_BLOCK_SIZE_2B = DMA_WORD_SIZE_2B,
    DMAWFF3_BLOCK_SIZE_4B = DMA_WORD_SIZE_4B,
} DMAWFF3_BlockSize;

typedef enum
{
    DMAWFF3_PERIPH_UARTLIN_0 = DMA_PERIPH_UARTLIN_0,
    DMAWFF3_PERIPH_UARTLIN_1 = DMA_PERIPH_UARTLIN_1,
    DMAWFF3_PERIPH_SPI_0     = DMA_PERIPH_SPI_0,
    DMAWFF3_PERIPH_SPI_1     = DMA_PERIPH_SPI_1,
    DMAWFF3_PERIPH_I2C_0     = DMA_PERIPH_I2C_0,
    DMAWFF3_PERIPH_I2C_1     = DMA_PERIPH_I2C_1,
    DMAWFF3_PERIPH_SDMMC     = DMA_PERIPH_SDMMC,
    DMAWFF3_PERIPH_SDIO      = DMA_PERIPH_SDIO,
    DMAWFF3_PERIPH_MCAN      = DMA_PERIPH_MCAN,
    DMAWFF3_PERIPH_ADC       = DMA_PERIPH_ADC,
    DMAWFF3_PERIPH_PDM       = DMA_PERIPH_PDM,
    DMAWFF3_PERIPH_HIF       = DMA_PERIPH_HIF,
    DMAWFF3_PERIPH_UARTLIN_2 = DMA_PERIPH_UARTLIN_2,
} DMAWFF3_Peripheral;

extern void DMAWFF3_disableChannel(uint32_t channel);

extern uint16_t DMAWFF3_getRemainingBytes(uint32_t channel);

extern void DMAWFF3_init(void);

extern void DMAWFF3_initChannel(uint32_t channel);

__STATIC_INLINE void DMAWFF3_configureChannel(uint32_t channel,
                                              uint8_t blockSize,
                                              DMAWFF3_WordSize wordSize,
                                              DMAWFF3_ChConfig config)
{
    /* Configure DMA channel */
    DMAConfigureChannel(channel, blockSize, wordSize, config);
}

__STATIC_INLINE void DMAWFF3_connectChannel(uint32_t channel, DMAWFF3_Peripheral peripheral)
{
    /* Connect DMA channel to peripheral */
    DMAInitChannel(channel, (DMAPeripheral)peripheral);
}

__STATIC_INLINE void DMAWFF3_clearInterrupt(uint32_t channelBitmask)
{
    /* Clear DMA interrupts */
    DMAClearInt(channelBitmask);
}

__STATIC_INLINE void DMAWFF3_startTransaction(uint32_t channel,
                                              const uint32_t *srcStartAddr,
                                              uint32_t *dstStartAddr,
                                              uint16_t transLenByte,
                                              bool remainingBytesBurst)
{
    /* Start DMA transaction */
    DMAStartTransaction(channel, srcStartAddr, dstStartAddr, transLenByte, remainingBytesBurst);
}

#ifdef __cplusplus
}
#endif

#endif /* ti_drivers_DMAWFF3__include */