CC35xxDriverLibrary
uart.h
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1 /******************************************************************************
2  * Filename: uart.h
3  *
4  * Description: Defines and prototypes for the UART peripheral.
5  *
6  * Copyright (c) 2022-2024 Texas Instruments Incorporated
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions are met:
10  *
11  * 1) Redistributions of source code must retain the above copyright notice,
12  * this list of conditions and the following disclaimer.
13  *
14  * 2) Redistributions in binary form must reproduce the above copyright notice,
15  * this list of conditions and the following disclaimer in the documentation
16  * and/or other materials provided with the distribution.
17  *
18  * 3) Neither the name of the copyright holder nor the names of its
19  * contributors may be used to endorse or promote products derived from this
20  * software without specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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29  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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32  * POSSIBILITY OF SUCH DAMAGE.
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34  ******************************************************************************/
35 
36 #ifndef __UART_H__
37 #define __UART_H__
38 
39 //*****************************************************************************
40 //
45 //
46 //*****************************************************************************
47 
48 #include <stdbool.h>
49 #include <stdint.h>
50 #include "../inc/hw_types.h"
51 #include "../inc/hw_memmap.h"
52 #include "../inc/hw_uartlin.h"
53 #include "debug.h"
54 
55 //*****************************************************************************
56 //
57 // If building with a C++ compiler, make all of the definitions in this header
58 // have a C binding.
59 //
60 //*****************************************************************************
61 #ifdef __cplusplus
62 extern "C" {
63 #endif
64 
65 //*****************************************************************************
66 //
67 // Values that can be passed to UARTEnableInt, UARTDisableInt, and UARTClearInt
68 // as the intFlags parameter, and returned from UARTIntStatus.
69 //
70 //*****************************************************************************
71 #define UART_INT_EOT UARTLIN_IMSC_EOT_M
72 #define UART_INT_OE UARTLIN_IMSC_OE_M
73 #define UART_INT_BE UARTLIN_IMSC_BE_M
74 #define UART_INT_PE UARTLIN_IMSC_PE_M
75 #define UART_INT_FE UARTLIN_IMSC_FE_M
76 #define UART_INT_RT UARTLIN_IMSC_RT_M
77 #define UART_INT_RX UARTLIN_IMSC_RX_M
78 #define UART_INT_TX UARTLIN_IMSC_TX_M
79 #define UART_INT_CTS UARTLIN_IMSC_CTSM_M
80 #define UART_INT_TXDMADONE UARTLIN_IMSC_TXDMADONE_M
81 #define UART_INT_RXDMADONE UARTLIN_IMSC_RXDMADONE_M
82 
83 #define UART_INT_ALL \
84  (UART_INT_EOT | UART_INT_OE | UART_INT_BE | UART_INT_PE | UART_INT_FE | UART_INT_RT | UART_INT_RX | UART_INT_TX | \
85  UART_INT_CTS | UART_INT_TXDMADONE | UART_INT_RXDMADONE)
86 
87 //*****************************************************************************
88 //
89 // Values that can be passed to UARTConfigSetExpClk as the config parameter
90 // and returned by UARTConfigGetExpClk in the pconfig parameter.
91 //
92 //*****************************************************************************
93 #define UART_CONFIG_WLEN_MASK 0x00000060
94 #define UART_CONFIG_WLEN_8 0x00000060
95 #define UART_CONFIG_WLEN_7 0x00000040
96 #define UART_CONFIG_WLEN_6 0x00000020
97 #define UART_CONFIG_WLEN_5 0x00000000
98 #define UART_CONFIG_STOP_MASK 0x00000008
99 #define UART_CONFIG_STOP_ONE 0x00000000
100 #define UART_CONFIG_STOP_TWO 0x00000008
101 #define UART_CONFIG_PAR_MASK 0x00000086
102 #define UART_CONFIG_PAR_NONE 0x00000000
103 #define UART_CONFIG_PAR_EVEN 0x00000006
104 #define UART_CONFIG_PAR_ODD 0x00000002
105 #define UART_CONFIG_PAR_ONE 0x00000082
106 #define UART_CONFIG_PAR_ZERO 0x00000086
107 
108 //*****************************************************************************
109 //
110 // Values that can be passed to UARTFIFOLevelSet as the txLevel parameter
111 //
112 //*****************************************************************************
113 #define UART_FIFO_TX2_8 0x00000001
114 #define UART_FIFO_TX4_8 0x00000002
115 #define UART_FIFO_TX6_8 0x00000003
116 
117 //*****************************************************************************
118 //
119 // Values that can be passed to UARTFIFOLevelSet as the rxLevel parameter
120 //
121 //*****************************************************************************
122 #define UART_FIFO_RX2_8 0x00000008
123 #define UART_FIFO_RX4_8 0x00000010
124 #define UART_FIFO_RX6_8 0x00000018
125 
126 //*****************************************************************************
127 //
128 // Values that can be passed to UARTDMAEnable() and UARTDMADisable().
129 //
130 //*****************************************************************************
131 #define UART_DMA_ERR_RXSTOP 0x00000004
132 #define UART_DMA_TX 0x00000002
133 #define UART_DMA_RX 0x00000001
134 
135 //*****************************************************************************
136 //
137 // Values returned by UARTRxErrorGet().
138 //
139 //*****************************************************************************
140 #define UART_RXERROR_OVERRUN 0x00000008
141 #define UART_RXERROR_BREAK 0x00000004
142 #define UART_RXERROR_PARITY 0x00000002
143 #define UART_RXERROR_FRAMING 0x00000001
144 
145 //*****************************************************************************
146 //
147 // API Functions and prototypes
148 //
149 //*****************************************************************************
150 
151 //*****************************************************************************
152 //
169 //
170 //*****************************************************************************
171 __STATIC_INLINE void UARTSetFifoLevel(uint32_t base, uint32_t txLevel, uint32_t rxLevel)
172 {
173  // Check the arguments.
174  ASSERT((txLevel == UART_FIFO_TX2_8) || (txLevel == UART_FIFO_TX4_8) || (txLevel == UART_FIFO_TX6_8));
175  ASSERT((rxLevel == UART_FIFO_RX2_8) || (rxLevel == UART_FIFO_RX4_8) || (rxLevel == UART_FIFO_RX6_8));
176 
177  // Set the FIFO interrupt levels.
178  HWREG(base + UARTLIN_O_IFLS) = txLevel | rxLevel;
179 }
180 
181 //*****************************************************************************
182 //
199 //
200 //*****************************************************************************
201 void UARTClockCtrl(uint32_t base, bool clkEnable);
202 
203 //*****************************************************************************
204 //
233 //
234 //*****************************************************************************
235 extern void UARTConfigSetExpClk(uint32_t base, uint32_t UARTClkFreq, uint32_t baudFreq, uint32_t config);
236 
237 //*****************************************************************************
238 //
249 //
250 //*****************************************************************************
251 extern void UARTDisable(uint32_t base);
252 
253 //*****************************************************************************
254 //
265 //
266 //*****************************************************************************
267 extern void UARTEnable(uint32_t base);
268 
269 //*****************************************************************************
270 //
278 //
279 //*****************************************************************************
280 __STATIC_INLINE void UARTEnableFifo(uint32_t base)
281 {
282  // Enable the FIFO.
284 }
285 
286 //*****************************************************************************
287 //
295 //
296 //*****************************************************************************
297 __STATIC_INLINE void UARTDisableFifo(uint32_t base)
298 {
299  // Disable the FIFO.
300  HWREG(base + UARTLIN_O_LCRH) &= ~(UARTLIN_LCRH_FEN);
301 }
302 
303 //*****************************************************************************
304 //
315 //
316 //*****************************************************************************
318 {
319  // Return the availability of characters.
320  return ((HWREG(base + UARTLIN_O_FR) & UARTLIN_FR_RXFE) ? false : true);
321 }
322 
323 //*****************************************************************************
324 //
338 //
339 //*****************************************************************************
341 {
342  // Return a character from the data register
343  return (HWREGB(base + UARTLIN_O_DR));
344 }
345 
346 //*****************************************************************************
347 //
357 //
358 //*****************************************************************************
359 extern uint8_t UARTGetChar(uint32_t base);
360 
361 //*****************************************************************************
362 //
373 //
374 //*****************************************************************************
376 {
377  // Return the availability of space.
378  return ((HWREG(base + UARTLIN_O_FR) & UARTLIN_FR_TXFF) ? false : true);
379 }
380 
381 //*****************************************************************************
382 //
397 //
398 //*****************************************************************************
399 __STATIC_INLINE void UARTPutCharNonBlocking(uint32_t base, uint8_t data)
400 {
401  // Write this character to the transmit FIFO.
402  HWREG(base + UARTLIN_O_DR) = data;
403 }
404 
405 //*****************************************************************************
406 //
417 //
418 //*****************************************************************************
419 extern void UARTPutChar(uint32_t base, uint8_t data);
420 
421 //*****************************************************************************
422 //
435 //
436 //*****************************************************************************
437 __STATIC_INLINE bool UARTBusy(uint32_t base)
438 {
439  // Determine if the UART is busy.
440  return ((HWREG(base + UARTLIN_O_FR) & UARTLIN_FR_BUSY) ? true : false);
441 }
442 
443 //*****************************************************************************
444 //
467 //
468 //*****************************************************************************
469 __STATIC_INLINE void UARTEnableInt(uint32_t base, uint32_t intFlags)
470 {
471  // Enable the specified interrupts.
472  HWREG(base + UARTLIN_O_IMSC) |= intFlags;
473 }
474 
475 //*****************************************************************************
476 //
498 //
499 //*****************************************************************************
500 __STATIC_INLINE void UARTDisableInt(uint32_t base, uint32_t intFlags)
501 {
502  // Disable the specified interrupts.
503  HWREG(base + UARTLIN_O_IMSC) &= ~(intFlags);
504 }
505 
506 //*****************************************************************************
507 //
531 //
532 //*****************************************************************************
533 __STATIC_INLINE uint32_t UARTIntStatus(uint32_t base, bool masked)
534 {
535  // Return either the masked interrupt status or the raw interrupt status as
536  // requested.
537  if (masked)
538  {
539  return (HWREG(base + UARTLIN_O_MIS));
540  }
541  else
542  {
543  return (HWREG(base + UARTLIN_O_RIS));
544  }
545 }
546 
547 //*****************************************************************************
548 //
586 //
587 //*****************************************************************************
588 __STATIC_INLINE void UARTClearInt(uint32_t base, uint32_t intFlags)
589 {
590  // Clear the requested interrupt sources
591  HWREG(base + UARTLIN_O_ICR) = intFlags;
592 }
593 
594 //*****************************************************************************
595 //
613 //
614 //*****************************************************************************
615 __STATIC_INLINE void UARTEnableDma(uint32_t base, uint32_t dmaFlags)
616 {
617  // Set the requested bits in the UART DMA control register.
618  HWREG(base + UARTLIN_O_DMACTL) |= dmaFlags;
619 }
620 
621 //*****************************************************************************
622 //
636 //
637 //*****************************************************************************
638 __STATIC_INLINE void UARTDisableDma(uint32_t base, uint32_t dmaFlags)
639 {
640  // Clear the requested bits in the UART DMA control register.
641  HWREG(base + UARTLIN_O_DMACTL) &= ~dmaFlags;
642 }
643 
644 //*****************************************************************************
645 //
661 //
662 //*****************************************************************************
663 __STATIC_INLINE uint32_t UARTGetRxError(uint32_t base)
664 {
665  // Return the current value of the receive status register.
666  return (HWREG(base + UARTLIN_O_RSRECR) & 0x0000000F);
667 }
668 
669 //*****************************************************************************
670 //
681 //
682 //*****************************************************************************
684 {
685  // Any write to the Error Clear Register will clear all bits which are
686  // currently set.
687  HWREG(base + UARTLIN_O_RSRECR) = 0;
688 }
689 
690 //*****************************************************************************
691 //
699 //
700 //*****************************************************************************
701 __STATIC_INLINE void UARTEnableCts(uint32_t base)
702 {
704 }
705 
706 //*****************************************************************************
707 //
715 //
716 //*****************************************************************************
717 __STATIC_INLINE void UARTEnableRts(uint32_t base)
718 {
720 }
721 
722 //*****************************************************************************
723 //
731 //
732 //*****************************************************************************
733 __STATIC_INLINE void UARTDisableCts(uint32_t base)
734 {
735  HWREG(base + UARTLIN_O_CTL) &= ~(UARTLIN_CTL_CTSEN);
736 }
737 
738 //*****************************************************************************
739 //
747 //
748 //*****************************************************************************
749 __STATIC_INLINE void UARTDisableRts(uint32_t base)
750 {
751  HWREG(base + UARTLIN_O_CTL) &= ~(UARTLIN_CTL_RTSEN);
752 }
753 
754 //*****************************************************************************
755 //
756 // Mark the end of the C bindings section for C++ compilers.
757 //
758 //*****************************************************************************
759 #ifdef __cplusplus
760 }
761 #endif
762 
763 //*****************************************************************************
764 //
768 //
769 //*****************************************************************************
770 
771 #endif // __UART_H__
#define UARTLIN_LCRH_FEN
Definition: hw_uartlin.h:567
#define UARTLIN_CTL_CTSEN
Definition: hw_uartlin.h:876
__STATIC_INLINE void UARTPutCharNonBlocking(uint32_t base, uint8_t data)
Sends a character to the specified port.
Definition: uart.h:399
#define UART_FIFO_RX2_8
Receive interrupt at 1/4 Full.
Definition: uart.h:122
#define UARTLIN_O_RSRECR
Definition: hw_uartlin.h:48
__STATIC_INLINE uint32_t UARTIntStatus(uint32_t base, bool masked)
Gets the current interrupt status.
Definition: uart.h:533
__STATIC_INLINE uint8_t UARTGetCharNonBlocking(uint32_t base)
Receives a character from the specified port.
Definition: uart.h:340
#define UARTLIN_CTL_RTSEN
Definition: hw_uartlin.h:859
__STATIC_INLINE void UARTSetFifoLevel(uint32_t base, uint32_t txLevel, uint32_t rxLevel)
Sets the FIFO level at which interrupts are generated.
Definition: uart.h:171
__STATIC_INLINE void UARTEnableInt(uint32_t base, uint32_t intFlags)
Enables individual UART interrupt sources.
Definition: uart.h:469
#define HWREG(x)
Definition: hw_types.h:78
#define __STATIC_INLINE
Definition: hw_types.h:57
#define UART_FIFO_RX6_8
Receive interrupt at 3/4 Full.
Definition: uart.h:124
#define UARTLIN_O_CTL
Definition: hw_uartlin.h:66
#define UARTLIN_O_MIS
Definition: hw_uartlin.h:78
__STATIC_INLINE void UARTEnableCts(uint32_t base)
Enable CTS flow control.
Definition: uart.h:701
#define UARTLIN_O_FR
Definition: hw_uartlin.h:51
__STATIC_INLINE bool UARTBusy(uint32_t base)
Determines whether the UART transmitter is busy or not.
Definition: uart.h:437
__STATIC_INLINE void UARTDisableFifo(uint32_t base)
Disables the transmit and receive FIFOs.
Definition: uart.h:297
void UARTClockCtrl(uint32_t base, bool clkEnable)
Controls the UART bus clock.
Definition: uart.c:43
__STATIC_INLINE void UARTDisableRts(uint32_t base)
Disable RTS flow control.
Definition: uart.h:749
__STATIC_INLINE void UARTEnableRts(uint32_t base)
Enable RTS flow control.
Definition: uart.h:717
#define UARTLIN_O_RIS
Definition: hw_uartlin.h:75
#define UARTLIN_FR_RXFE
Definition: hw_uartlin.h:358
#define UARTLIN_O_IFLS
Definition: hw_uartlin.h:69
__STATIC_INLINE void UARTClearInt(uint32_t base, uint32_t intFlags)
Clears UART interrupt sources.
Definition: uart.h:588
#define UARTLIN_FR_TXFF
Definition: hw_uartlin.h:373
void UARTDisable(uint32_t base)
Disables transmitting and receiving.
Definition: uart.c:102
#define UARTLIN_O_IMSC
Definition: hw_uartlin.h:72
#define UARTLIN_O_ICR
Definition: hw_uartlin.h:81
#define UARTLIN_FR_BUSY
Definition: hw_uartlin.h:343
__STATIC_INLINE void UARTEnableFifo(uint32_t base)
Enables the transmit and receive FIFOs.
Definition: uart.h:280
#define ASSERT(expr)
Definition: debug.h:81
void UARTPutChar(uint32_t base, uint8_t data)
Waits to send a character to the specified port.
Definition: uart.c:133
#define UART_FIFO_TX6_8
Transmit interrupt at 3/4 Full.
Definition: uart.h:115
__STATIC_INLINE bool UARTSpaceAvailable(uint32_t base)
Determines if there is any space in the transmit FIFO.
Definition: uart.h:375
#define UART_FIFO_TX4_8
Transmit interrupt at 1/2 Full.
Definition: uart.h:114
uint8_t UARTGetChar(uint32_t base)
Waits for a character from the specified port.
Definition: uart.c:119
#define UART_FIFO_RX4_8
Receive interrupt at 1/2 Full.
Definition: uart.h:123
__STATIC_INLINE void UARTEnableDma(uint32_t base, uint32_t dmaFlags)
Enable UART DMA operation.
Definition: uart.h:615
__STATIC_INLINE void UARTDisableInt(uint32_t base, uint32_t intFlags)
Disables individual UART interrupt sources.
Definition: uart.h:500
void UARTEnable(uint32_t base)
Enables transmitting and receiving.
Definition: uart.c:62
__STATIC_INLINE bool UARTCharAvailable(uint32_t base)
Determines if there are any characters in the receive FIFO.
Definition: uart.h:317
#define UART_FIFO_TX2_8
Transmit interrupt at 1/4 Full.
Definition: uart.h:113
void UARTConfigSetExpClk(uint32_t base, uint32_t UARTClkFreq, uint32_t baudFreq, uint32_t config)
Sets the configuration of a UART.
Definition: uart.c:79
#define UARTLIN_O_LCRH
Definition: hw_uartlin.h:63
#define UARTLIN_O_DMACTL
Definition: hw_uartlin.h:84
__STATIC_INLINE void UARTClearRxError(uint32_t base)
Clears all reported receiver errors.
Definition: uart.h:683
__STATIC_INLINE uint32_t UARTGetRxError(uint32_t base)
Gets current receiver errors.
Definition: uart.h:663
#define HWREGB(x)
Definition: hw_types.h:90
__STATIC_INLINE void UARTDisableCts(uint32_t base)
Disable CTS flow control.
Definition: uart.h:733
#define UARTLIN_O_DR
Definition: hw_uartlin.h:45
__STATIC_INLINE void UARTDisableDma(uint32_t base, uint32_t dmaFlags)
Disable UART DMA operation.
Definition: uart.h:638