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CC35xxDriverLibrary
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Go to the source code of this file.
Data Structures | |
| struct | OSPISTIGConfig_t |
Macros | |
| #define | OSPI_STIG_READ_DATA_LOWER OSPI_O_FLASH_RD_DATA_LOWER |
| Flash Read Data Register (Lower) More... | |
| #define | OSPI_STIG_READ_DATA_UPPER OSPI_O_FLASH_RD_DATA_UPPER |
| Flash Read Data Register (Upper) More... | |
| #define | OSPI_STIG_MEMORY_BANK_TRANSFER_ENABLE OSPI_FLASH_CMD_CTRL_STIG_MEM_BANK_EN_ENABLE |
| Memory Bank should only be enabled when triggering Flash Rd/Wr commands with Memory Bank transfer. More... | |
| #define | OSPI_STIG_MEMORY_BANK_TRANSFER_DISABLE OSPI_FLASH_CMD_CTRL_STIG_MEM_BANK_EN_DISABLE |
| Memory Bank should be disabled before triggering any operation that not use Memory Bank transfer. More... | |
| #define | OSPI_STIG_WRITE_DATA_ENABLE OSPI_FLASH_CMD_CTRL_ENB_WRITE_DATA_ENABLE |
| Enable write data transfer if flash command requires write data bytes to be sent to the device. More... | |
| #define | OSPI_STIG_WRITE_DATA_DISABLE OSPI_FLASH_CMD_CTRL_ENB_MODE_BIT_DISABLE |
| Disable write data transfer if flash command do not requires write data to the device. More... | |
| #define | OSPI_STIG_MODE_BIT_ENABLE OSPI_FLASH_CMD_CTRL_ENB_MODE_BIT_ENABLE |
| #define | OSPI_STIG_MODE_BIT_DISABLE OSPI_FLASH_CMD_CTRL_ENB_MODE_BIT_DISABLE |
| Disable Mode bit if not required by the flash command. More... | |
| #define | OSPI_STIG_COMMAND_ADDRESS_ENABLE OSPI_FLASH_CMD_CTRL_ENB_COMD_ADDR_ENABLE |
| Enable Address if flash command requires an address. More... | |
| #define | OSPI_STIG_COMMAND_ADDRESS_DISABLE OSPI_FLASH_CMD_CTRL_ENB_COMD_ADDR_DISABLE |
| Disable Address if flash command not requires an address. (e.g WEN command 0x6) More... | |
| #define | OSPI_STIG_READ_DATA_ENABLE OSPI_FLASH_CMD_CTRL_ENB_READ_DATA_ENABLE |
| Enable read data if flash command expect response data bytes received from the device. More... | |
| #define | OSPI_STIG_READ_DATA_DISABLE OSPI_FLASH_CMD_CTRL_ENB_READ_DATA_DISABLE |
| Disable read data if flash command not expected data bytes received from the device. More... | |
Enumerations | |
| enum | OSPIFlashStatusRegister { OSPI_FLASH_STA_REG_WIP = 0x01, OSPI_FLASH_STA_REG_WEL = 0x02, OSPI_FLASH_STA_REG_BP0 = 0x04, OSPI_FLASH_STA_REG_BP1 = 0x08, OSPI_FLASH_STA_REG_BP2 = 0x10, OSPI_FLASH_STA_REG_BP3 = 0x20, OSPI_FLASH_STA_REG_QE = 0x40, OSPI_FLASH_STA_REG_SRWD = 0x80 } |
| OSPI flash status register bit indication. More... | |
| enum | OSPISTIGCommand { OSPI_COMMAND_WRSR = 0x01, OSPI_COMMAND_WRITE = 0x02, OSPI_COMMAND_READ = 0x03, OSPI_COMMAND_FAST_READ = 0x0B, OSPI_COMMAND_RDSR = 0x05, OSPI_COMMAND_WREN = 0x06, OSPI_COMMAND_SE = 0x20, OSPI_COMMAND_CE = 0x60, OSPI_COMMAND_QEN = 0x35, OSPI_COMMAND_QDIS = 0xF5, OSPI_COMMAND_RSTEN = 0x66, OSPI_COMMAND_RST = 0x99 } |
| Sub group of used JEDEC commands. More... | |
| enum | OSPIInstructionType { OSPI_INSTR_TYPE_SPI = 0, OSPI_INSTR_TYPE_DUAL_SPI = 1, OSPI_INSTR_TYPE_QUAD_IO_SPI = 2, OSPI_INSTR_TYPE_OCTAL_IO_SPI = 3 } |
Functions | |
| uint32_t | OSPIGetSTIGDataRegister (uint32_t regSelect) |
| Returns the read data or status register value. More... | |
| void | OSPIExecuteSTIGWriteCommand (OSPISTIGConfig_t OspiStigCommand) |
| Configure and execute the STIG command. More... | |
| void | OSPIStartSTIGCommand (uint32_t configReg) |
| Execute the STIG command. More... | |
| void | OSPISetCommandAddress (uint32_t address) |
| Set the address for the STIG write/read command. More... | |