Macros
#define	SDIO_CARD_FN1_O_FLUSHCMD 0x00000000U

#define	SDIO_CARD_FN1_O_RXTHR 0x00000004U

#define	SDIO_CARD_FN1_O_TXIRQTHR 0x0000000CU

#define	SDIO_CARD_FN1_O_DMABLKTHR 0x00000010U

#define	SDIO_CARD_FN1_O_IRQSTA 0x00000014U

#define	SDIO_CARD_FN1_O_IRQMASK 0x00000018U

#define	SDIO_CARD_FN1_O_CTRL 0x0000001CU

#define	SDIO_CARD_FN1_O_RXPACS 0x00000020U

#define	SDIO_CARD_FN1_O_RXBBUF 0x00000024U

#define	SDIO_CARD_FN1_O_RXBLFT 0x00000028U

#define	SDIO_CARD_FN1_O_RETCTL 0x0000002CU

#define	SDIO_CARD_FN1_O_C2HMSG 0x00000030U

#define	SDIO_CARD_FN1_O_H2CMSG 0x00000034U

#define	SDIO_CARD_FN1_O_CLKEN 0x00000038U

#define	SDIO_CARD_FN1_O_SPAREREG 0x0000003CU

#define	SDIO_CARD_FN1_O_IRQCLR 0x00000040U

#define	SDIO_CARD_FN1_O_RSTREQ 0x00000044U

#define	SDIO_CARD_FN1_O_DATAFIFO 0x00001000U

#define	SDIO_CARD_FN1_FLUSHCMD_RXBUF 0x00000001U

#define	SDIO_CARD_FN1_FLUSHCMD_RXBUF_M 0x00000001U

#define	SDIO_CARD_FN1_FLUSHCMD_RXBUF_S 0U

#define	SDIO_CARD_FN1_FLUSHCMD_TXBUF 0x00000002U

#define	SDIO_CARD_FN1_FLUSHCMD_TXBUF_M 0x00000002U

#define	SDIO_CARD_FN1_FLUSHCMD_TXBUF_S 1U

#define	SDIO_CARD_FN1_RXTHR_VAL_W 6U

#define	SDIO_CARD_FN1_RXTHR_VAL_M 0x000000FCU

#define	SDIO_CARD_FN1_RXTHR_VAL_S 2U

#define	SDIO_CARD_FN1_TXIRQTHR_VAL_W 8U

#define	SDIO_CARD_FN1_TXIRQTHR_VAL_M 0x000000FFU

#define	SDIO_CARD_FN1_TXIRQTHR_VAL_S 0U

#define	SDIO_CARD_FN1_DMABLKTHR_RXDMABLK_W 3U

#define	SDIO_CARD_FN1_DMABLKTHR_RXDMABLK_M 0x00000007U

#define	SDIO_CARD_FN1_DMABLKTHR_RXDMABLK_S 0U

#define	SDIO_CARD_FN1_DMABLKTHR_TXDMABLK_W 3U

#define	SDIO_CARD_FN1_DMABLKTHR_TXDMABLK_M 0x00070000U

#define	SDIO_CARD_FN1_DMABLKTHR_TXDMABLK_S 16U

#define	SDIO_CARD_FN1_IRQSTA_RXALMSFULL 0x00000001U

#define	SDIO_CARD_FN1_IRQSTA_RXALMSFULL_M 0x00000001U

#define	SDIO_CARD_FN1_IRQSTA_RXALMSFULL_S 0U

#define	SDIO_CARD_FN1_IRQSTA_FN1EN 0x00000002U

#define	SDIO_CARD_FN1_IRQSTA_FN1EN_M 0x00000002U

#define	SDIO_CARD_FN1_IRQSTA_FN1EN_S 1U

#define	SDIO_CARD_FN1_IRQSTA_RXBUFOVR 0x00000004U

#define	SDIO_CARD_FN1_IRQSTA_RXBUFOVR_M 0x00000004U

#define	SDIO_CARD_FN1_IRQSTA_RXBUFOVR_S 2U

#define	SDIO_CARD_FN1_IRQSTA_RXBUFUNR 0x00000008U

#define	SDIO_CARD_FN1_IRQSTA_RXBUFUNR_M 0x00000008U

#define	SDIO_CARD_FN1_IRQSTA_RXBUFUNR_S 3U

#define	SDIO_CARD_FN1_IRQSTA_TXBUFOVR 0x00000010U

#define	SDIO_CARD_FN1_IRQSTA_TXBUFOVR_M 0x00000010U

#define	SDIO_CARD_FN1_IRQSTA_TXBUFOVR_S 4U

#define	SDIO_CARD_FN1_IRQSTA_TXBUFUNR 0x00000020U

#define	SDIO_CARD_FN1_IRQSTA_TXBUFUNR_M 0x00000020U

#define	SDIO_CARD_FN1_IRQSTA_TXBUFUNR_S 5U

#define	SDIO_CARD_FN1_IRQSTA_HCIACK 0x00000040U

#define	SDIO_CARD_FN1_IRQSTA_HCIACK_M 0x00000040U

#define	SDIO_CARD_FN1_IRQSTA_HCIACK_S 6U

#define	SDIO_CARD_FN1_IRQSTA_HCINACK 0x00000080U

#define	SDIO_CARD_FN1_IRQSTA_HCINACK_M 0x00000080U

#define	SDIO_CARD_FN1_IRQSTA_HCINACK_S 7U

#define	SDIO_CARD_FN1_IRQSTA_HCIWRRET 0x00000100U

#define	SDIO_CARD_FN1_IRQSTA_HCIWRRET_M 0x00000100U

#define	SDIO_CARD_FN1_IRQSTA_HCIWRRET_S 8U

#define	SDIO_CARD_FN1_IRQSTA_PHYIFERR 0x00000200U

#define	SDIO_CARD_FN1_IRQSTA_PHYIFERR_M 0x00000200U

#define	SDIO_CARD_FN1_IRQSTA_PHYIFERR_S 9U

#define	SDIO_CARD_FN1_IRQSTA_CARDRST 0x00000400U

#define	SDIO_CARD_FN1_IRQSTA_CARDRST_M 0x00000400U

#define	SDIO_CARD_FN1_IRQSTA_CARDRST_S 10U

#define	SDIO_CARD_FN1_IRQSTA_PHYINT 0x00000800U

#define	SDIO_CARD_FN1_IRQSTA_PHYINT_M 0x00000800U

#define	SDIO_CARD_FN1_IRQSTA_PHYINT_S 11U

#define	SDIO_CARD_FN1_IRQSTA_CRCERR 0x00001000U

#define	SDIO_CARD_FN1_IRQSTA_CRCERR_M 0x00001000U

#define	SDIO_CARD_FN1_IRQSTA_CRCERR_S 12U

#define	SDIO_CARD_FN1_IRQSTA_HOST2CORE 0x00002000U

#define	SDIO_CARD_FN1_IRQSTA_HOST2CORE_M 0x00002000U

#define	SDIO_CARD_FN1_IRQSTA_HOST2CORE_S 13U

#define	SDIO_CARD_FN1_IRQMASK_RXALMSFULL 0x00000001U

#define	SDIO_CARD_FN1_IRQMASK_RXALMSFULL_M 0x00000001U

#define	SDIO_CARD_FN1_IRQMASK_RXALMSFULL_S 0U

#define	SDIO_CARD_FN1_IRQMASK_FN1EN 0x00000002U

#define	SDIO_CARD_FN1_IRQMASK_FN1EN_M 0x00000002U

#define	SDIO_CARD_FN1_IRQMASK_FN1EN_S 1U

#define	SDIO_CARD_FN1_IRQMASK_RXBUFOVR 0x00000004U

#define	SDIO_CARD_FN1_IRQMASK_RXBUFOVR_M 0x00000004U

#define	SDIO_CARD_FN1_IRQMASK_RXBUFOVR_S 2U

#define	SDIO_CARD_FN1_IRQMASK_RXBUFUNR 0x00000008U

#define	SDIO_CARD_FN1_IRQMASK_RXBUFUNR_M 0x00000008U

#define	SDIO_CARD_FN1_IRQMASK_RXBUFUNR_S 3U

#define	SDIO_CARD_FN1_IRQMASK_TXBUFOVR 0x00000010U

#define	SDIO_CARD_FN1_IRQMASK_TXBUFOVR_M 0x00000010U

#define	SDIO_CARD_FN1_IRQMASK_TXBUFOVR_S 4U

#define	SDIO_CARD_FN1_IRQMASK_TXBUFUNR 0x00000020U

#define	SDIO_CARD_FN1_IRQMASK_TXBUFUNR_M 0x00000020U

#define	SDIO_CARD_FN1_IRQMASK_TXBUFUNR_S 5U

#define	SDIO_CARD_FN1_IRQMASK_HCIACK 0x00000040U

#define	SDIO_CARD_FN1_IRQMASK_HCIACK_M 0x00000040U

#define	SDIO_CARD_FN1_IRQMASK_HCIACK_S 6U

#define	SDIO_CARD_FN1_IRQMASK_HCINACK 0x00000080U

#define	SDIO_CARD_FN1_IRQMASK_HCINACK_M 0x00000080U

#define	SDIO_CARD_FN1_IRQMASK_HCINACK_S 7U

#define	SDIO_CARD_FN1_IRQMASK_HCIWRRET 0x00000100U

#define	SDIO_CARD_FN1_IRQMASK_HCIWRRET_M 0x00000100U

#define	SDIO_CARD_FN1_IRQMASK_HCIWRRET_S 8U

#define	SDIO_CARD_FN1_IRQMASK_PHYIFERR 0x00000200U

#define	SDIO_CARD_FN1_IRQMASK_PHYIFERR_M 0x00000200U

#define	SDIO_CARD_FN1_IRQMASK_PHYIFERR_S 9U

#define	SDIO_CARD_FN1_IRQMASK_CARDRST 0x00000400U

#define	SDIO_CARD_FN1_IRQMASK_CARDRST_M 0x00000400U

#define	SDIO_CARD_FN1_IRQMASK_CARDRST_S 10U

#define	SDIO_CARD_FN1_IRQMASK_PHYMASK 0x00000800U

#define	SDIO_CARD_FN1_IRQMASK_PHYMASK_M 0x00000800U

#define	SDIO_CARD_FN1_IRQMASK_PHYMASK_S 11U

#define	SDIO_CARD_FN1_IRQMASK_CRCERR 0x00001000U

#define	SDIO_CARD_FN1_IRQMASK_CRCERR_M 0x00001000U

#define	SDIO_CARD_FN1_IRQMASK_CRCERR_S 12U

#define	SDIO_CARD_FN1_IRQMASK_HOST2CORE 0x00002000U

#define	SDIO_CARD_FN1_IRQMASK_HOST2CORE_M 0x00002000U

#define	SDIO_CARD_FN1_IRQMASK_HOST2CORE_S 13U

#define	SDIO_CARD_FN1_CTRL_SDIOEN 0x00000001U

#define	SDIO_CARD_FN1_CTRL_SDIOEN_M 0x00000001U

#define	SDIO_CARD_FN1_CTRL_SDIOEN_S 0U

#define	SDIO_CARD_FN1_CTRL_BACE 0x00000002U

#define	SDIO_CARD_FN1_CTRL_BACE_M 0x00000002U

#define	SDIO_CARD_FN1_CTRL_BACE_S 1U

#define	SDIO_CARD_FN1_CTRL_TXFLEN 0x00000004U

#define	SDIO_CARD_FN1_CTRL_TXFLEN_M 0x00000004U

#define	SDIO_CARD_FN1_CTRL_TXFLEN_S 2U

#define	SDIO_CARD_FN1_CTRL_HIRQSYNC 0x00000008U

#define	SDIO_CARD_FN1_CTRL_HIRQSYNC_M 0x00000008U

#define	SDIO_CARD_FN1_CTRL_HIRQSYNC_S 3U

#define	SDIO_CARD_FN1_RXPACS_VAL_W 10U

#define	SDIO_CARD_FN1_RXPACS_VAL_M 0x000003FFU

#define	SDIO_CARD_FN1_RXPACS_VAL_S 0U

#define	SDIO_CARD_FN1_RXBBUF_VAL_W 11U

#define	SDIO_CARD_FN1_RXBBUF_VAL_M 0x000007FFU

#define	SDIO_CARD_FN1_RXBBUF_VAL_S 0U

#define	SDIO_CARD_FN1_RXBLFT_VAL_W 11U

#define	SDIO_CARD_FN1_RXBLFT_VAL_M 0x000007FFU

#define	SDIO_CARD_FN1_RXBLFT_VAL_S 0U

#define	SDIO_CARD_FN1_RXBLFT_BLIL 0x00008000U

#define	SDIO_CARD_FN1_RXBLFT_BLIL_M 0x00008000U

#define	SDIO_CARD_FN1_RXBLFT_BLIL_S 15U

#define	SDIO_CARD_FN1_RETCTL_VAL 0x00000001U

#define	SDIO_CARD_FN1_RETCTL_VAL_M 0x00000001U

#define	SDIO_CARD_FN1_RETCTL_VAL_S 0U

#define	SDIO_CARD_FN1_C2HMSG_C2HSTS_W 16U

#define	SDIO_CARD_FN1_C2HMSG_C2HSTS_M 0x0000FFFFU

#define	SDIO_CARD_FN1_C2HMSG_C2HSTS_S 0U

#define	SDIO_CARD_FN1_C2HMSG_C2HIRQ 0x00010000U

#define	SDIO_CARD_FN1_C2HMSG_C2HIRQ_M 0x00010000U

#define	SDIO_CARD_FN1_C2HMSG_C2HIRQ_S 16U

#define	SDIO_CARD_FN1_H2CMSG_H2CSTS_W 15U

#define	SDIO_CARD_FN1_H2CMSG_H2CSTS_M 0x00007FFFU

#define	SDIO_CARD_FN1_H2CMSG_H2CSTS_S 0U

#define	SDIO_CARD_FN1_CLKEN_VAL 0x00000001U

#define	SDIO_CARD_FN1_CLKEN_VAL_M 0x00000001U

#define	SDIO_CARD_FN1_CLKEN_VAL_S 0U

#define	SDIO_CARD_FN1_SPAREREG_SPARE_W 8U

#define	SDIO_CARD_FN1_SPAREREG_SPARE_M 0x000000FFU

#define	SDIO_CARD_FN1_SPAREREG_SPARE_S 0U

#define	SDIO_CARD_FN1_IRQCLR_RXALMSFULL 0x00000001U

#define	SDIO_CARD_FN1_IRQCLR_RXALMSFULL_M 0x00000001U

#define	SDIO_CARD_FN1_IRQCLR_RXALMSFULL_S 0U

#define	SDIO_CARD_FN1_IRQCLR_FN1EN 0x00000002U

#define	SDIO_CARD_FN1_IRQCLR_FN1EN_M 0x00000002U

#define	SDIO_CARD_FN1_IRQCLR_FN1EN_S 1U

#define	SDIO_CARD_FN1_IRQCLR_RXBUFOVR 0x00000004U

#define	SDIO_CARD_FN1_IRQCLR_RXBUFOVR_M 0x00000004U

#define	SDIO_CARD_FN1_IRQCLR_RXBUFOVR_S 2U

#define	SDIO_CARD_FN1_IRQCLR_RXBUFUNR 0x00000008U

#define	SDIO_CARD_FN1_IRQCLR_RXBUFUNR_M 0x00000008U

#define	SDIO_CARD_FN1_IRQCLR_RXBUFUNR_S 3U

#define	SDIO_CARD_FN1_IRQCLR_TXBUFOVR 0x00000010U

#define	SDIO_CARD_FN1_IRQCLR_TXBUFOVR_M 0x00000010U

#define	SDIO_CARD_FN1_IRQCLR_TXBUFOVR_S 4U

#define	SDIO_CARD_FN1_IRQCLR_TXBUFUNR 0x00000020U

#define	SDIO_CARD_FN1_IRQCLR_TXBUFUNR_M 0x00000020U

#define	SDIO_CARD_FN1_IRQCLR_TXBUFUNR_S 5U

#define	SDIO_CARD_FN1_IRQCLR_HCIACK 0x00000040U

#define	SDIO_CARD_FN1_IRQCLR_HCIACK_M 0x00000040U

#define	SDIO_CARD_FN1_IRQCLR_HCIACK_S 6U

#define	SDIO_CARD_FN1_IRQCLR_HCINACK 0x00000080U

#define	SDIO_CARD_FN1_IRQCLR_HCINACK_M 0x00000080U

#define	SDIO_CARD_FN1_IRQCLR_HCINACK_S 7U

#define	SDIO_CARD_FN1_IRQCLR_HCIWRRET 0x00000100U

#define	SDIO_CARD_FN1_IRQCLR_HCIWRRET_M 0x00000100U

#define	SDIO_CARD_FN1_IRQCLR_HCIWRRET_S 8U

#define	SDIO_CARD_FN1_IRQCLR_PHYIFERR 0x00000200U

#define	SDIO_CARD_FN1_IRQCLR_PHYIFERR_M 0x00000200U

#define	SDIO_CARD_FN1_IRQCLR_PHYIFERR_S 9U

#define	SDIO_CARD_FN1_IRQCLR_CARDRST 0x00000400U

#define	SDIO_CARD_FN1_IRQCLR_CARDRST_M 0x00000400U

#define	SDIO_CARD_FN1_IRQCLR_CARDRST_S 10U

#define	SDIO_CARD_FN1_IRQCLR_PHYCLEAR 0x00000800U

#define	SDIO_CARD_FN1_IRQCLR_PHYCLEAR_M 0x00000800U

#define	SDIO_CARD_FN1_IRQCLR_PHYCLEAR_S 11U

#define	SDIO_CARD_FN1_IRQCLR_CRCERR 0x00001000U

#define	SDIO_CARD_FN1_IRQCLR_CRCERR_M 0x00001000U

#define	SDIO_CARD_FN1_IRQCLR_CRCERR_S 12U

#define	SDIO_CARD_FN1_IRQCLR_HOST2CORE 0x00002000U

#define	SDIO_CARD_FN1_IRQCLR_HOST2CORE_M 0x00002000U

#define	SDIO_CARD_FN1_IRQCLR_HOST2CORE_S 13U

#define	SDIO_CARD_FN1_RSTREQ_EN 0x00000001U

#define	SDIO_CARD_FN1_RSTREQ_EN_M 0x00000001U

#define	SDIO_CARD_FN1_RSTREQ_EN_S 0U

#define	SDIO_CARD_FN1_DATAFIFO_RDRXWRTX_W 32U

#define	SDIO_CARD_FN1_DATAFIFO_RDRXWRTX_M 0xFFFFFFFFU

#define	SDIO_CARD_FN1_DATAFIFO_RDRXWRTX_S 0U

Macro Definition Documentation

§ SDIO_CARD_FN1_O_FLUSHCMD

#define SDIO_CARD_FN1_O_FLUSHCMD 0x00000000U

§ SDIO_CARD_FN1_O_RXTHR

#define SDIO_CARD_FN1_O_RXTHR 0x00000004U

§ SDIO_CARD_FN1_O_TXIRQTHR

#define SDIO_CARD_FN1_O_TXIRQTHR 0x0000000CU

§ SDIO_CARD_FN1_O_DMABLKTHR

#define SDIO_CARD_FN1_O_DMABLKTHR 0x00000010U

§ SDIO_CARD_FN1_O_IRQSTA

#define SDIO_CARD_FN1_O_IRQSTA 0x00000014U

§ SDIO_CARD_FN1_O_IRQMASK

#define SDIO_CARD_FN1_O_IRQMASK 0x00000018U

§ SDIO_CARD_FN1_O_CTRL

#define SDIO_CARD_FN1_O_CTRL 0x0000001CU

§ SDIO_CARD_FN1_O_RXPACS

#define SDIO_CARD_FN1_O_RXPACS 0x00000020U

§ SDIO_CARD_FN1_O_RXBBUF

#define SDIO_CARD_FN1_O_RXBBUF 0x00000024U

§ SDIO_CARD_FN1_O_RXBLFT

#define SDIO_CARD_FN1_O_RXBLFT 0x00000028U

§ SDIO_CARD_FN1_O_RETCTL

#define SDIO_CARD_FN1_O_RETCTL 0x0000002CU

§ SDIO_CARD_FN1_O_C2HMSG

#define SDIO_CARD_FN1_O_C2HMSG 0x00000030U

§ SDIO_CARD_FN1_O_H2CMSG

#define SDIO_CARD_FN1_O_H2CMSG 0x00000034U

§ SDIO_CARD_FN1_O_CLKEN

#define SDIO_CARD_FN1_O_CLKEN 0x00000038U

§ SDIO_CARD_FN1_O_SPAREREG

#define SDIO_CARD_FN1_O_SPAREREG 0x0000003CU

§ SDIO_CARD_FN1_O_IRQCLR

#define SDIO_CARD_FN1_O_IRQCLR 0x00000040U

§ SDIO_CARD_FN1_O_RSTREQ

#define SDIO_CARD_FN1_O_RSTREQ 0x00000044U

§ SDIO_CARD_FN1_O_DATAFIFO

#define SDIO_CARD_FN1_O_DATAFIFO 0x00001000U

§ SDIO_CARD_FN1_FLUSHCMD_RXBUF

#define SDIO_CARD_FN1_FLUSHCMD_RXBUF 0x00000001U

§ SDIO_CARD_FN1_FLUSHCMD_RXBUF_M

#define SDIO_CARD_FN1_FLUSHCMD_RXBUF_M 0x00000001U

§ SDIO_CARD_FN1_FLUSHCMD_RXBUF_S

#define SDIO_CARD_FN1_FLUSHCMD_RXBUF_S 0U

§ SDIO_CARD_FN1_FLUSHCMD_TXBUF

#define SDIO_CARD_FN1_FLUSHCMD_TXBUF 0x00000002U

§ SDIO_CARD_FN1_FLUSHCMD_TXBUF_M

#define SDIO_CARD_FN1_FLUSHCMD_TXBUF_M 0x00000002U

§ SDIO_CARD_FN1_FLUSHCMD_TXBUF_S

#define SDIO_CARD_FN1_FLUSHCMD_TXBUF_S 1U

§ SDIO_CARD_FN1_RXTHR_VAL_W

#define SDIO_CARD_FN1_RXTHR_VAL_W 6U

§ SDIO_CARD_FN1_RXTHR_VAL_M

#define SDIO_CARD_FN1_RXTHR_VAL_M 0x000000FCU

§ SDIO_CARD_FN1_RXTHR_VAL_S

#define SDIO_CARD_FN1_RXTHR_VAL_S 2U

§ SDIO_CARD_FN1_TXIRQTHR_VAL_W

#define SDIO_CARD_FN1_TXIRQTHR_VAL_W 8U

§ SDIO_CARD_FN1_TXIRQTHR_VAL_M

#define SDIO_CARD_FN1_TXIRQTHR_VAL_M 0x000000FFU

§ SDIO_CARD_FN1_TXIRQTHR_VAL_S

#define SDIO_CARD_FN1_TXIRQTHR_VAL_S 0U

§ SDIO_CARD_FN1_DMABLKTHR_RXDMABLK_W

#define SDIO_CARD_FN1_DMABLKTHR_RXDMABLK_W 3U

§ SDIO_CARD_FN1_DMABLKTHR_RXDMABLK_M

#define SDIO_CARD_FN1_DMABLKTHR_RXDMABLK_M 0x00000007U

§ SDIO_CARD_FN1_DMABLKTHR_RXDMABLK_S

#define SDIO_CARD_FN1_DMABLKTHR_RXDMABLK_S 0U

§ SDIO_CARD_FN1_DMABLKTHR_TXDMABLK_W

#define SDIO_CARD_FN1_DMABLKTHR_TXDMABLK_W 3U

§ SDIO_CARD_FN1_DMABLKTHR_TXDMABLK_M

#define SDIO_CARD_FN1_DMABLKTHR_TXDMABLK_M 0x00070000U

§ SDIO_CARD_FN1_DMABLKTHR_TXDMABLK_S

#define SDIO_CARD_FN1_DMABLKTHR_TXDMABLK_S 16U

§ SDIO_CARD_FN1_IRQSTA_RXALMSFULL

#define SDIO_CARD_FN1_IRQSTA_RXALMSFULL 0x00000001U

§ SDIO_CARD_FN1_IRQSTA_RXALMSFULL_M

#define SDIO_CARD_FN1_IRQSTA_RXALMSFULL_M 0x00000001U

§ SDIO_CARD_FN1_IRQSTA_RXALMSFULL_S

#define SDIO_CARD_FN1_IRQSTA_RXALMSFULL_S 0U

§ SDIO_CARD_FN1_IRQSTA_FN1EN

#define SDIO_CARD_FN1_IRQSTA_FN1EN 0x00000002U

§ SDIO_CARD_FN1_IRQSTA_FN1EN_M

#define SDIO_CARD_FN1_IRQSTA_FN1EN_M 0x00000002U

§ SDIO_CARD_FN1_IRQSTA_FN1EN_S

#define SDIO_CARD_FN1_IRQSTA_FN1EN_S 1U

§ SDIO_CARD_FN1_IRQSTA_RXBUFOVR

#define SDIO_CARD_FN1_IRQSTA_RXBUFOVR 0x00000004U

§ SDIO_CARD_FN1_IRQSTA_RXBUFOVR_M

#define SDIO_CARD_FN1_IRQSTA_RXBUFOVR_M 0x00000004U

§ SDIO_CARD_FN1_IRQSTA_RXBUFOVR_S

#define SDIO_CARD_FN1_IRQSTA_RXBUFOVR_S 2U

§ SDIO_CARD_FN1_IRQSTA_RXBUFUNR

#define SDIO_CARD_FN1_IRQSTA_RXBUFUNR 0x00000008U

§ SDIO_CARD_FN1_IRQSTA_RXBUFUNR_M

#define SDIO_CARD_FN1_IRQSTA_RXBUFUNR_M 0x00000008U

§ SDIO_CARD_FN1_IRQSTA_RXBUFUNR_S

#define SDIO_CARD_FN1_IRQSTA_RXBUFUNR_S 3U

§ SDIO_CARD_FN1_IRQSTA_TXBUFOVR

#define SDIO_CARD_FN1_IRQSTA_TXBUFOVR 0x00000010U

§ SDIO_CARD_FN1_IRQSTA_TXBUFOVR_M

#define SDIO_CARD_FN1_IRQSTA_TXBUFOVR_M 0x00000010U

§ SDIO_CARD_FN1_IRQSTA_TXBUFOVR_S

#define SDIO_CARD_FN1_IRQSTA_TXBUFOVR_S 4U

§ SDIO_CARD_FN1_IRQSTA_TXBUFUNR

#define SDIO_CARD_FN1_IRQSTA_TXBUFUNR 0x00000020U

§ SDIO_CARD_FN1_IRQSTA_TXBUFUNR_M

#define SDIO_CARD_FN1_IRQSTA_TXBUFUNR_M 0x00000020U

§ SDIO_CARD_FN1_IRQSTA_TXBUFUNR_S

#define SDIO_CARD_FN1_IRQSTA_TXBUFUNR_S 5U

§ SDIO_CARD_FN1_IRQSTA_HCIACK

#define SDIO_CARD_FN1_IRQSTA_HCIACK 0x00000040U

§ SDIO_CARD_FN1_IRQSTA_HCIACK_M

#define SDIO_CARD_FN1_IRQSTA_HCIACK_M 0x00000040U

§ SDIO_CARD_FN1_IRQSTA_HCIACK_S

#define SDIO_CARD_FN1_IRQSTA_HCIACK_S 6U

§ SDIO_CARD_FN1_IRQSTA_HCINACK

#define SDIO_CARD_FN1_IRQSTA_HCINACK 0x00000080U

§ SDIO_CARD_FN1_IRQSTA_HCINACK_M

#define SDIO_CARD_FN1_IRQSTA_HCINACK_M 0x00000080U

§ SDIO_CARD_FN1_IRQSTA_HCINACK_S

#define SDIO_CARD_FN1_IRQSTA_HCINACK_S 7U

§ SDIO_CARD_FN1_IRQSTA_HCIWRRET

#define SDIO_CARD_FN1_IRQSTA_HCIWRRET 0x00000100U

§ SDIO_CARD_FN1_IRQSTA_HCIWRRET_M

#define SDIO_CARD_FN1_IRQSTA_HCIWRRET_M 0x00000100U

§ SDIO_CARD_FN1_IRQSTA_HCIWRRET_S

#define SDIO_CARD_FN1_IRQSTA_HCIWRRET_S 8U

§ SDIO_CARD_FN1_IRQSTA_PHYIFERR

#define SDIO_CARD_FN1_IRQSTA_PHYIFERR 0x00000200U

§ SDIO_CARD_FN1_IRQSTA_PHYIFERR_M

#define SDIO_CARD_FN1_IRQSTA_PHYIFERR_M 0x00000200U

§ SDIO_CARD_FN1_IRQSTA_PHYIFERR_S

#define SDIO_CARD_FN1_IRQSTA_PHYIFERR_S 9U

§ SDIO_CARD_FN1_IRQSTA_CARDRST

#define SDIO_CARD_FN1_IRQSTA_CARDRST 0x00000400U

§ SDIO_CARD_FN1_IRQSTA_CARDRST_M

#define SDIO_CARD_FN1_IRQSTA_CARDRST_M 0x00000400U

§ SDIO_CARD_FN1_IRQSTA_CARDRST_S

#define SDIO_CARD_FN1_IRQSTA_CARDRST_S 10U

§ SDIO_CARD_FN1_IRQSTA_PHYINT

#define SDIO_CARD_FN1_IRQSTA_PHYINT 0x00000800U

§ SDIO_CARD_FN1_IRQSTA_PHYINT_M

#define SDIO_CARD_FN1_IRQSTA_PHYINT_M 0x00000800U

§ SDIO_CARD_FN1_IRQSTA_PHYINT_S

#define SDIO_CARD_FN1_IRQSTA_PHYINT_S 11U

§ SDIO_CARD_FN1_IRQSTA_CRCERR

#define SDIO_CARD_FN1_IRQSTA_CRCERR 0x00001000U

§ SDIO_CARD_FN1_IRQSTA_CRCERR_M

#define SDIO_CARD_FN1_IRQSTA_CRCERR_M 0x00001000U

§ SDIO_CARD_FN1_IRQSTA_CRCERR_S

#define SDIO_CARD_FN1_IRQSTA_CRCERR_S 12U

§ SDIO_CARD_FN1_IRQSTA_HOST2CORE

#define SDIO_CARD_FN1_IRQSTA_HOST2CORE 0x00002000U

§ SDIO_CARD_FN1_IRQSTA_HOST2CORE_M

#define SDIO_CARD_FN1_IRQSTA_HOST2CORE_M 0x00002000U

§ SDIO_CARD_FN1_IRQSTA_HOST2CORE_S

#define SDIO_CARD_FN1_IRQSTA_HOST2CORE_S 13U

§ SDIO_CARD_FN1_IRQMASK_RXALMSFULL

#define SDIO_CARD_FN1_IRQMASK_RXALMSFULL 0x00000001U

§ SDIO_CARD_FN1_IRQMASK_RXALMSFULL_M

#define SDIO_CARD_FN1_IRQMASK_RXALMSFULL_M 0x00000001U

§ SDIO_CARD_FN1_IRQMASK_RXALMSFULL_S

#define SDIO_CARD_FN1_IRQMASK_RXALMSFULL_S 0U

§ SDIO_CARD_FN1_IRQMASK_FN1EN

#define SDIO_CARD_FN1_IRQMASK_FN1EN 0x00000002U

§ SDIO_CARD_FN1_IRQMASK_FN1EN_M

#define SDIO_CARD_FN1_IRQMASK_FN1EN_M 0x00000002U

§ SDIO_CARD_FN1_IRQMASK_FN1EN_S

#define SDIO_CARD_FN1_IRQMASK_FN1EN_S 1U

§ SDIO_CARD_FN1_IRQMASK_RXBUFOVR

#define SDIO_CARD_FN1_IRQMASK_RXBUFOVR 0x00000004U

§ SDIO_CARD_FN1_IRQMASK_RXBUFOVR_M

#define SDIO_CARD_FN1_IRQMASK_RXBUFOVR_M 0x00000004U

§ SDIO_CARD_FN1_IRQMASK_RXBUFOVR_S

#define SDIO_CARD_FN1_IRQMASK_RXBUFOVR_S 2U

§ SDIO_CARD_FN1_IRQMASK_RXBUFUNR

#define SDIO_CARD_FN1_IRQMASK_RXBUFUNR 0x00000008U

§ SDIO_CARD_FN1_IRQMASK_RXBUFUNR_M

#define SDIO_CARD_FN1_IRQMASK_RXBUFUNR_M 0x00000008U

§ SDIO_CARD_FN1_IRQMASK_RXBUFUNR_S

#define SDIO_CARD_FN1_IRQMASK_RXBUFUNR_S 3U

§ SDIO_CARD_FN1_IRQMASK_TXBUFOVR

#define SDIO_CARD_FN1_IRQMASK_TXBUFOVR 0x00000010U

§ SDIO_CARD_FN1_IRQMASK_TXBUFOVR_M

#define SDIO_CARD_FN1_IRQMASK_TXBUFOVR_M 0x00000010U

§ SDIO_CARD_FN1_IRQMASK_TXBUFOVR_S

#define SDIO_CARD_FN1_IRQMASK_TXBUFOVR_S 4U

§ SDIO_CARD_FN1_IRQMASK_TXBUFUNR

#define SDIO_CARD_FN1_IRQMASK_TXBUFUNR 0x00000020U

§ SDIO_CARD_FN1_IRQMASK_TXBUFUNR_M

#define SDIO_CARD_FN1_IRQMASK_TXBUFUNR_M 0x00000020U

§ SDIO_CARD_FN1_IRQMASK_TXBUFUNR_S

#define SDIO_CARD_FN1_IRQMASK_TXBUFUNR_S 5U

§ SDIO_CARD_FN1_IRQMASK_HCIACK

#define SDIO_CARD_FN1_IRQMASK_HCIACK 0x00000040U

§ SDIO_CARD_FN1_IRQMASK_HCIACK_M

#define SDIO_CARD_FN1_IRQMASK_HCIACK_M 0x00000040U

§ SDIO_CARD_FN1_IRQMASK_HCIACK_S

#define SDIO_CARD_FN1_IRQMASK_HCIACK_S 6U

§ SDIO_CARD_FN1_IRQMASK_HCINACK

#define SDIO_CARD_FN1_IRQMASK_HCINACK 0x00000080U

§ SDIO_CARD_FN1_IRQMASK_HCINACK_M

#define SDIO_CARD_FN1_IRQMASK_HCINACK_M 0x00000080U

§ SDIO_CARD_FN1_IRQMASK_HCINACK_S

#define SDIO_CARD_FN1_IRQMASK_HCINACK_S 7U

§ SDIO_CARD_FN1_IRQMASK_HCIWRRET

#define SDIO_CARD_FN1_IRQMASK_HCIWRRET 0x00000100U

§ SDIO_CARD_FN1_IRQMASK_HCIWRRET_M

#define SDIO_CARD_FN1_IRQMASK_HCIWRRET_M 0x00000100U

§ SDIO_CARD_FN1_IRQMASK_HCIWRRET_S

#define SDIO_CARD_FN1_IRQMASK_HCIWRRET_S 8U

§ SDIO_CARD_FN1_IRQMASK_PHYIFERR

#define SDIO_CARD_FN1_IRQMASK_PHYIFERR 0x00000200U

§ SDIO_CARD_FN1_IRQMASK_PHYIFERR_M

#define SDIO_CARD_FN1_IRQMASK_PHYIFERR_M 0x00000200U

§ SDIO_CARD_FN1_IRQMASK_PHYIFERR_S

#define SDIO_CARD_FN1_IRQMASK_PHYIFERR_S 9U

§ SDIO_CARD_FN1_IRQMASK_CARDRST

#define SDIO_CARD_FN1_IRQMASK_CARDRST 0x00000400U

§ SDIO_CARD_FN1_IRQMASK_CARDRST_M

#define SDIO_CARD_FN1_IRQMASK_CARDRST_M 0x00000400U

§ SDIO_CARD_FN1_IRQMASK_CARDRST_S

#define SDIO_CARD_FN1_IRQMASK_CARDRST_S 10U

§ SDIO_CARD_FN1_IRQMASK_PHYMASK

#define SDIO_CARD_FN1_IRQMASK_PHYMASK 0x00000800U

§ SDIO_CARD_FN1_IRQMASK_PHYMASK_M

#define SDIO_CARD_FN1_IRQMASK_PHYMASK_M 0x00000800U

§ SDIO_CARD_FN1_IRQMASK_PHYMASK_S

#define SDIO_CARD_FN1_IRQMASK_PHYMASK_S 11U

§ SDIO_CARD_FN1_IRQMASK_CRCERR

#define SDIO_CARD_FN1_IRQMASK_CRCERR 0x00001000U

§ SDIO_CARD_FN1_IRQMASK_CRCERR_M

#define SDIO_CARD_FN1_IRQMASK_CRCERR_M 0x00001000U

§ SDIO_CARD_FN1_IRQMASK_CRCERR_S

#define SDIO_CARD_FN1_IRQMASK_CRCERR_S 12U

§ SDIO_CARD_FN1_IRQMASK_HOST2CORE

#define SDIO_CARD_FN1_IRQMASK_HOST2CORE 0x00002000U

§ SDIO_CARD_FN1_IRQMASK_HOST2CORE_M

#define SDIO_CARD_FN1_IRQMASK_HOST2CORE_M 0x00002000U

§ SDIO_CARD_FN1_IRQMASK_HOST2CORE_S

#define SDIO_CARD_FN1_IRQMASK_HOST2CORE_S 13U

§ SDIO_CARD_FN1_CTRL_SDIOEN

#define SDIO_CARD_FN1_CTRL_SDIOEN 0x00000001U

§ SDIO_CARD_FN1_CTRL_SDIOEN_M

#define SDIO_CARD_FN1_CTRL_SDIOEN_M 0x00000001U

§ SDIO_CARD_FN1_CTRL_SDIOEN_S

#define SDIO_CARD_FN1_CTRL_SDIOEN_S 0U

§ SDIO_CARD_FN1_CTRL_BACE

#define SDIO_CARD_FN1_CTRL_BACE 0x00000002U

§ SDIO_CARD_FN1_CTRL_BACE_M

#define SDIO_CARD_FN1_CTRL_BACE_M 0x00000002U

§ SDIO_CARD_FN1_CTRL_BACE_S

#define SDIO_CARD_FN1_CTRL_BACE_S 1U

§ SDIO_CARD_FN1_CTRL_TXFLEN

#define SDIO_CARD_FN1_CTRL_TXFLEN 0x00000004U

§ SDIO_CARD_FN1_CTRL_TXFLEN_M

#define SDIO_CARD_FN1_CTRL_TXFLEN_M 0x00000004U

§ SDIO_CARD_FN1_CTRL_TXFLEN_S

#define SDIO_CARD_FN1_CTRL_TXFLEN_S 2U

§ SDIO_CARD_FN1_CTRL_HIRQSYNC

#define SDIO_CARD_FN1_CTRL_HIRQSYNC 0x00000008U

§ SDIO_CARD_FN1_CTRL_HIRQSYNC_M

#define SDIO_CARD_FN1_CTRL_HIRQSYNC_M 0x00000008U

§ SDIO_CARD_FN1_CTRL_HIRQSYNC_S

#define SDIO_CARD_FN1_CTRL_HIRQSYNC_S 3U

§ SDIO_CARD_FN1_RXPACS_VAL_W

#define SDIO_CARD_FN1_RXPACS_VAL_W 10U

§ SDIO_CARD_FN1_RXPACS_VAL_M

#define SDIO_CARD_FN1_RXPACS_VAL_M 0x000003FFU

§ SDIO_CARD_FN1_RXPACS_VAL_S

#define SDIO_CARD_FN1_RXPACS_VAL_S 0U

§ SDIO_CARD_FN1_RXBBUF_VAL_W

#define SDIO_CARD_FN1_RXBBUF_VAL_W 11U

§ SDIO_CARD_FN1_RXBBUF_VAL_M

#define SDIO_CARD_FN1_RXBBUF_VAL_M 0x000007FFU

§ SDIO_CARD_FN1_RXBBUF_VAL_S

#define SDIO_CARD_FN1_RXBBUF_VAL_S 0U

§ SDIO_CARD_FN1_RXBLFT_VAL_W

#define SDIO_CARD_FN1_RXBLFT_VAL_W 11U

§ SDIO_CARD_FN1_RXBLFT_VAL_M

#define SDIO_CARD_FN1_RXBLFT_VAL_M 0x000007FFU

§ SDIO_CARD_FN1_RXBLFT_VAL_S

#define SDIO_CARD_FN1_RXBLFT_VAL_S 0U

§ SDIO_CARD_FN1_RXBLFT_BLIL

#define SDIO_CARD_FN1_RXBLFT_BLIL 0x00008000U

§ SDIO_CARD_FN1_RXBLFT_BLIL_M

#define SDIO_CARD_FN1_RXBLFT_BLIL_M 0x00008000U

§ SDIO_CARD_FN1_RXBLFT_BLIL_S

#define SDIO_CARD_FN1_RXBLFT_BLIL_S 15U

§ SDIO_CARD_FN1_RETCTL_VAL

#define SDIO_CARD_FN1_RETCTL_VAL 0x00000001U

§ SDIO_CARD_FN1_RETCTL_VAL_M

#define SDIO_CARD_FN1_RETCTL_VAL_M 0x00000001U

§ SDIO_CARD_FN1_RETCTL_VAL_S

#define SDIO_CARD_FN1_RETCTL_VAL_S 0U

§ SDIO_CARD_FN1_C2HMSG_C2HSTS_W

#define SDIO_CARD_FN1_C2HMSG_C2HSTS_W 16U

§ SDIO_CARD_FN1_C2HMSG_C2HSTS_M

#define SDIO_CARD_FN1_C2HMSG_C2HSTS_M 0x0000FFFFU

§ SDIO_CARD_FN1_C2HMSG_C2HSTS_S

#define SDIO_CARD_FN1_C2HMSG_C2HSTS_S 0U

§ SDIO_CARD_FN1_C2HMSG_C2HIRQ

#define SDIO_CARD_FN1_C2HMSG_C2HIRQ 0x00010000U

§ SDIO_CARD_FN1_C2HMSG_C2HIRQ_M

#define SDIO_CARD_FN1_C2HMSG_C2HIRQ_M 0x00010000U

§ SDIO_CARD_FN1_C2HMSG_C2HIRQ_S

#define SDIO_CARD_FN1_C2HMSG_C2HIRQ_S 16U

§ SDIO_CARD_FN1_H2CMSG_H2CSTS_W

#define SDIO_CARD_FN1_H2CMSG_H2CSTS_W 15U

§ SDIO_CARD_FN1_H2CMSG_H2CSTS_M

#define SDIO_CARD_FN1_H2CMSG_H2CSTS_M 0x00007FFFU

§ SDIO_CARD_FN1_H2CMSG_H2CSTS_S

#define SDIO_CARD_FN1_H2CMSG_H2CSTS_S 0U

§ SDIO_CARD_FN1_CLKEN_VAL

#define SDIO_CARD_FN1_CLKEN_VAL 0x00000001U

§ SDIO_CARD_FN1_CLKEN_VAL_M

#define SDIO_CARD_FN1_CLKEN_VAL_M 0x00000001U

§ SDIO_CARD_FN1_CLKEN_VAL_S

#define SDIO_CARD_FN1_CLKEN_VAL_S 0U

§ SDIO_CARD_FN1_SPAREREG_SPARE_W

#define SDIO_CARD_FN1_SPAREREG_SPARE_W 8U

§ SDIO_CARD_FN1_SPAREREG_SPARE_M

#define SDIO_CARD_FN1_SPAREREG_SPARE_M 0x000000FFU

§ SDIO_CARD_FN1_SPAREREG_SPARE_S

#define SDIO_CARD_FN1_SPAREREG_SPARE_S 0U

§ SDIO_CARD_FN1_IRQCLR_RXALMSFULL

#define SDIO_CARD_FN1_IRQCLR_RXALMSFULL 0x00000001U

§ SDIO_CARD_FN1_IRQCLR_RXALMSFULL_M

#define SDIO_CARD_FN1_IRQCLR_RXALMSFULL_M 0x00000001U

§ SDIO_CARD_FN1_IRQCLR_RXALMSFULL_S

#define SDIO_CARD_FN1_IRQCLR_RXALMSFULL_S 0U

§ SDIO_CARD_FN1_IRQCLR_FN1EN

#define SDIO_CARD_FN1_IRQCLR_FN1EN 0x00000002U

§ SDIO_CARD_FN1_IRQCLR_FN1EN_M

#define SDIO_CARD_FN1_IRQCLR_FN1EN_M 0x00000002U

§ SDIO_CARD_FN1_IRQCLR_FN1EN_S

#define SDIO_CARD_FN1_IRQCLR_FN1EN_S 1U

§ SDIO_CARD_FN1_IRQCLR_RXBUFOVR

#define SDIO_CARD_FN1_IRQCLR_RXBUFOVR 0x00000004U

§ SDIO_CARD_FN1_IRQCLR_RXBUFOVR_M

#define SDIO_CARD_FN1_IRQCLR_RXBUFOVR_M 0x00000004U

§ SDIO_CARD_FN1_IRQCLR_RXBUFOVR_S

#define SDIO_CARD_FN1_IRQCLR_RXBUFOVR_S 2U

§ SDIO_CARD_FN1_IRQCLR_RXBUFUNR

#define SDIO_CARD_FN1_IRQCLR_RXBUFUNR 0x00000008U

§ SDIO_CARD_FN1_IRQCLR_RXBUFUNR_M

#define SDIO_CARD_FN1_IRQCLR_RXBUFUNR_M 0x00000008U

§ SDIO_CARD_FN1_IRQCLR_RXBUFUNR_S

#define SDIO_CARD_FN1_IRQCLR_RXBUFUNR_S 3U

§ SDIO_CARD_FN1_IRQCLR_TXBUFOVR

#define SDIO_CARD_FN1_IRQCLR_TXBUFOVR 0x00000010U

§ SDIO_CARD_FN1_IRQCLR_TXBUFOVR_M

#define SDIO_CARD_FN1_IRQCLR_TXBUFOVR_M 0x00000010U

§ SDIO_CARD_FN1_IRQCLR_TXBUFOVR_S

#define SDIO_CARD_FN1_IRQCLR_TXBUFOVR_S 4U

§ SDIO_CARD_FN1_IRQCLR_TXBUFUNR

#define SDIO_CARD_FN1_IRQCLR_TXBUFUNR 0x00000020U

§ SDIO_CARD_FN1_IRQCLR_TXBUFUNR_M

#define SDIO_CARD_FN1_IRQCLR_TXBUFUNR_M 0x00000020U

§ SDIO_CARD_FN1_IRQCLR_TXBUFUNR_S

#define SDIO_CARD_FN1_IRQCLR_TXBUFUNR_S 5U

§ SDIO_CARD_FN1_IRQCLR_HCIACK

#define SDIO_CARD_FN1_IRQCLR_HCIACK 0x00000040U

§ SDIO_CARD_FN1_IRQCLR_HCIACK_M

#define SDIO_CARD_FN1_IRQCLR_HCIACK_M 0x00000040U

§ SDIO_CARD_FN1_IRQCLR_HCIACK_S

#define SDIO_CARD_FN1_IRQCLR_HCIACK_S 6U

§ SDIO_CARD_FN1_IRQCLR_HCINACK

#define SDIO_CARD_FN1_IRQCLR_HCINACK 0x00000080U

§ SDIO_CARD_FN1_IRQCLR_HCINACK_M

#define SDIO_CARD_FN1_IRQCLR_HCINACK_M 0x00000080U

§ SDIO_CARD_FN1_IRQCLR_HCINACK_S

#define SDIO_CARD_FN1_IRQCLR_HCINACK_S 7U

§ SDIO_CARD_FN1_IRQCLR_HCIWRRET

#define SDIO_CARD_FN1_IRQCLR_HCIWRRET 0x00000100U

§ SDIO_CARD_FN1_IRQCLR_HCIWRRET_M

#define SDIO_CARD_FN1_IRQCLR_HCIWRRET_M 0x00000100U

§ SDIO_CARD_FN1_IRQCLR_HCIWRRET_S

#define SDIO_CARD_FN1_IRQCLR_HCIWRRET_S 8U

§ SDIO_CARD_FN1_IRQCLR_PHYIFERR

#define SDIO_CARD_FN1_IRQCLR_PHYIFERR 0x00000200U

§ SDIO_CARD_FN1_IRQCLR_PHYIFERR_M

#define SDIO_CARD_FN1_IRQCLR_PHYIFERR_M 0x00000200U

§ SDIO_CARD_FN1_IRQCLR_PHYIFERR_S

#define SDIO_CARD_FN1_IRQCLR_PHYIFERR_S 9U

§ SDIO_CARD_FN1_IRQCLR_CARDRST

#define SDIO_CARD_FN1_IRQCLR_CARDRST 0x00000400U

§ SDIO_CARD_FN1_IRQCLR_CARDRST_M

#define SDIO_CARD_FN1_IRQCLR_CARDRST_M 0x00000400U

§ SDIO_CARD_FN1_IRQCLR_CARDRST_S

#define SDIO_CARD_FN1_IRQCLR_CARDRST_S 10U

§ SDIO_CARD_FN1_IRQCLR_PHYCLEAR

#define SDIO_CARD_FN1_IRQCLR_PHYCLEAR 0x00000800U

§ SDIO_CARD_FN1_IRQCLR_PHYCLEAR_M

#define SDIO_CARD_FN1_IRQCLR_PHYCLEAR_M 0x00000800U

§ SDIO_CARD_FN1_IRQCLR_PHYCLEAR_S

#define SDIO_CARD_FN1_IRQCLR_PHYCLEAR_S 11U

§ SDIO_CARD_FN1_IRQCLR_CRCERR

#define SDIO_CARD_FN1_IRQCLR_CRCERR 0x00001000U

§ SDIO_CARD_FN1_IRQCLR_CRCERR_M

#define SDIO_CARD_FN1_IRQCLR_CRCERR_M 0x00001000U

§ SDIO_CARD_FN1_IRQCLR_CRCERR_S

#define SDIO_CARD_FN1_IRQCLR_CRCERR_S 12U

§ SDIO_CARD_FN1_IRQCLR_HOST2CORE

#define SDIO_CARD_FN1_IRQCLR_HOST2CORE 0x00002000U

§ SDIO_CARD_FN1_IRQCLR_HOST2CORE_M

#define SDIO_CARD_FN1_IRQCLR_HOST2CORE_M 0x00002000U

§ SDIO_CARD_FN1_IRQCLR_HOST2CORE_S

#define SDIO_CARD_FN1_IRQCLR_HOST2CORE_S 13U

§ SDIO_CARD_FN1_RSTREQ_EN

#define SDIO_CARD_FN1_RSTREQ_EN 0x00000001U

§ SDIO_CARD_FN1_RSTREQ_EN_M

#define SDIO_CARD_FN1_RSTREQ_EN_M 0x00000001U

§ SDIO_CARD_FN1_RSTREQ_EN_S

#define SDIO_CARD_FN1_RSTREQ_EN_S 0U

§ SDIO_CARD_FN1_DATAFIFO_RDRXWRTX_W

#define SDIO_CARD_FN1_DATAFIFO_RDRXWRTX_W 32U

§ SDIO_CARD_FN1_DATAFIFO_RDRXWRTX_M

#define SDIO_CARD_FN1_DATAFIFO_RDRXWRTX_M 0xFFFFFFFFU

§ SDIO_CARD_FN1_DATAFIFO_RDRXWRTX_S

#define SDIO_CARD_FN1_DATAFIFO_RDRXWRTX_S 0U

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