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CC35xxDriverLibrary
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Go to the source code of this file.
| #define PRCM_AON_O_HFLXGRP 0x00001034U |
| #define PRCM_AON_O_HFLXGRPIND 0x00001038U |
| #define PRCM_AON_O_REFCTL 0x00001048U |
| #define PRCM_AON_O_REFSTA 0x0000104CU |
| #define PRCM_AON_O_HSTATICGRP 0x00001054U |
| #define PRCM_AON_O_HSTATICGRPIND 0x00001058U |
| #define PRCM_AON_O_LOGHMEMSTA 0x0000105CU |
| #define PRCM_AON_O_CONNSTP 0x00001060U |
| #define PRCM_AON_O_HRSTOV 0x00001064U |
| #define PRCM_AON_O_SLPDEEP 0x00001068U |
| #define PRCM_AON_O_SHPRECISE 0x00002000U |
| #define PRCM_AON_O_LFXTCTL 0x00002008U |
| #define PRCM_AON_O_LFXTSPARE 0x0000200CU |
| #define PRCM_AON_O_LFOSCEN 0x00002010U |
| #define PRCM_AON_O_FUSEDATA5 0x00002014U |
| #define PRCM_AON_O_FUSEDATA6 0x00002018U |
| #define PRCM_AON_O_FUSEDATA7 0x0000201CU |
| #define PRCM_AON_O_FUSEDATA8 0x00002020U |
| #define PRCM_AON_O_FUSEDATA9 0x00002024U |
| #define PRCM_AON_O_FUSEDATA10 0x00002028U |
| #define PRCM_AON_O_FUSEDATA11 0x0000202CU |
| #define PRCM_AON_O_FUSEDATA12 0x00002030U |
| #define PRCM_AON_O_FUSEDATA13 0x00002034U |
| #define PRCM_AON_O_FUSEDATA14 0x00002038U |
| #define PRCM_AON_O_PRCMRAWFS0 0x0000203CU |
| #define PRCM_AON_O_PRCMRAWFS1 0x00002040U |
| #define PRCM_AON_O_PRCMRAWFS2 0x00002044U |
| #define PRCM_AON_O_PRCMRAWFS3 0x00002048U |
| #define PRCM_AON_O_PRCMRAWFS4 0x0000204CU |
| #define PRCM_AON_O_PRCMRAWFS5 0x00002050U |
| #define PRCM_AON_O_PRCMRAWFS6 0x00002054U |
| #define PRCM_AON_O_PRCMRAWFS7 0x00002058U |
| #define PRCM_AON_O_PRCMRAWFS8 0x0000205CU |
| #define PRCM_AON_O_PRCMRAWFS9 0x00002060U |
| #define PRCM_AON_O_PRCMRAWFS10 0x00002064U |
| #define PRCM_AON_O_FCLKDET 0x00002068U |
| #define PRCM_AON_O_PLOCKLOSCFG 0x0000206CU |
| #define PRCM_AON_O_PLOCKLOSSTA 0x00002070U |
| #define PRCM_AON_O_RTCCTL 0x00002074U |
| #define PRCM_AON_O_LFINCCTL 0x00002078U |
| #define PRCM_AON_O_LFCLKSTA 0x0000207CU |
| #define PRCM_AON_O_LFINCOVR 0x00002080U |
| #define PRCM_AON_O_LFQUALCTL 0x00002084U |
| #define PRCM_AON_O_LFINCCTLI 0x00002088U |
| #define PRCM_AON_O_SCLKCNT 0x0000208CU |
| #define PRCM_AON_O_SCLKCNTCTL 0x00002090U |
| #define PRCM_AON_O_SCLKCNTSTRT 0x00002094U |
| #define PRCM_AON_O_SCLKCTL 0x00002098U |
| #define PRCM_AON_O_STA 0x0000209CU |
| #define PRCM_AON_O_INTERUPT 0x000020A0U |
| #define PRCM_AON_O_HPRCMSHAR 0x000020A4U |
| #define PRCM_AON_O_CRSLPIND 0x000020A8U |
| #define PRCM_AON_O_HSLPIND 0x000020ACU |
| #define PRCM_AON_O_FNCLKMUXCTL 0x000020B0U |
| #define PRCM_AON_O_RSTCTL 0x000020B4U |
| #define PRCM_AON_O_LFOSC 0x000020B8U |
| #define PRCM_AON_O_FSCFG 0x00007000U |
| #define PRCM_AON_O_PMCIO 0x00007004U |
| #define PRCM_AON_O_BOD 0x0000700CU |
| #define PRCM_AON_O_RVMH 0x00007010U |
| #define PRCM_AON_O_RVML 0x00007014U |
| #define PRCM_AON_O_PSCON 0x00007018U |
| #define PRCM_AON_O_DBGAPEN 0x0000701CU |
| #define PRCM_AON_O_OVDBGAP1 0x00007020U |
| #define PRCM_AON_O_OVDBGAP2 0x00007024U |
| #define PRCM_AON_O_SLPREF 0x00007028U |
| #define PRCM_AON_O_DBGGM 0x0000702CU |
| #define PRCM_AON_O_PMURTRIM 0x00007030U |
| #define PRCM_AON_O_VNWACTL 0x00007034U |
| #define PRCM_AON_O_SRAMKATRIM 0x00007038U |
| #define PRCM_AON_O_VAL 0x00007040U |
| #define PRCM_AON_O_SRAMKAEN 0x00007044U |
| #define PRCM_AON_O_DLDOEN 0x00007048U |
| #define PRCM_AON_O_DLDOVTRIM 0x0000704CU |
| #define PRCM_AON_O_DKAEN 0x00007050U |
| #define PRCM_AON_O_DKATRIM 0x00007054U |
| #define PRCM_AON_O_DLDOLPMOD 0x00007058U |
| #define PRCM_AON_O_DLDOCFG 0x0000705CU |
| #define PRCM_AON_O_RVMTRIMCTL 0x00007060U |
| #define PRCM_AON_O_RVMTRIMPMUSTA 0x00007064U |
| #define PRCM_AON_O_RVMLTRIMCTL 0x00007068U |
| #define PRCM_AON_O_I2VCIRCITCTL 0x0000706CU |
| #define PRCM_AON_O_PMBISTCTL 0x00007070U |
| #define PRCM_AON_O_PMUCOMP 0x00007074U |
| #define PRCM_AON_O_ABGRTRIM 0x00007078U |
| #define PRCM_AON_O_ABGTRIMTMP 0x0000707CU |
| #define PRCM_AON_O_CKMSPARE 0x00007080U |
| #define PRCM_AON_O_ABGPEN 0x00007084U |
| #define PRCM_AON_O_ABGPTRIMMAG 0x00007088U |
| #define PRCM_AON_O_FCLKREQABGPDLY 0x0000708CU |
| #define PRCM_AON_O_FCLKLDODLY 0x00007090U |
| #define PRCM_AON_O_FCBGSETDLY 0x00007094U |
| #define PRCM_AON_O_FCLKABGPFCDLY 0x00007098U |
| #define PRCM_AON_O_ABGPDISDLY 0x0000709CU |
| #define PRCM_AON_O_ABGPTSTMOD 0x000070A0U |
| #define PRCM_AON_O_PRIMSLDOILOD 0x000070A4U |
| #define PRCM_AON_O_PRIMSLIC 0x000070A8U |
| #define PRCM_AON_O_FCLKDISHFXTDLY 0x000070ACU |
| #define PRCM_AON_O_CLKSLIEN 0x000070B0U |
| #define PRCM_AON_O_CLKSLIITRIM 0x000070B4U |
| #define PRCM_AON_O_PRIMSLIRTRIM 0x000070B8U |
| #define PRCM_AON_O_PRIMOSC 0x000070BCU |
| #define PRCM_AON_O_OSCEN 0x000070C0U |
| #define PRCM_AON_O_OSCITRIM 0x000070C4U |
| #define PRCM_AON_O_OSCBSTDLY 0x000070C8U |
| #define PRCM_AON_O_OSCNORMDLY 0x000070CCU |
| #define PRCM_AON_O_CRDIGBUFCTRL 0x000070D0U |
| #define PRCM_AON_O_OSCDLY 0x000070D4U |
| #define PRCM_AON_O_STRUCMLDOCTL 0x000070D8U |
| #define PRCM_AON_O_SHDOWFCLKCTL 0x000070DCU |
| #define PRCM_AON_O_SLIBIBYPCTL 0x000070E0U |
| #define PRCM_AON_O_ECLKREQDLY 0x000070E4U |
| #define PRCM_AON_O_OSCGN 0x000070E8U |
| #define PRCM_AON_O_PRIMENTMUX 0x000070ECU |
| #define PRCM_AON_O_PRIMEN 0x000070F0U |
| #define PRCM_AON_O_PUSHPULEN 0x000070F4U |
| #define PRCM_AON_O_FCLKDISCODLY 0x000070F8U |
| #define PRCM_AON_O_FCLKVLDEXNDLY 0x000070FCU |
| #define PRCM_AON_O_PRIMEXITSLPDLY 0x00007100U |
| #define PRCM_AON_O_FCLK 0x00007108U |
| #define PRCM_AON_O_FCLKDURDLY 0x0000710CU |
| #define PRCM_AON_O_FREFDET 0x00007110U |
| #define PRCM_AON_O_FCLKFSMSOPOV 0x00007114U |
| #define PRCM_AON_O_PMSRNWCAL 0x00007118U |
| #define PRCM_AON_O_PMSTEST 0x0000711CU |
| #define PRCM_AON_O_PMSTMUXCTL 0x00007120U |
| #define PRCM_AON_O_PMSSPAR0 0x00007124U |
| #define PRCM_AON_O_PMSSPAR1 0x00007128U |
| #define PRCM_AON_O_PMSSPAR2 0x0000712CU |
| #define PRCM_AON_O_PMSCTLSTA 0x00007130U |
| #define PRCM_AON_O_PMSSPARIN 0x00007134U |
| #define PRCM_AON_O_PMSPORTSTCTL 0x00007138U |
| #define PRCM_AON_O_PMSSPAR3 0x00007140U |
| #define PRCM_AON_O_PMSSPAR4 0x00007144U |
| #define PRCM_AON_O_PMSDLY 0x00007148U |
| #define PRCM_AON_O_BGDISBGENDLY 0x0000714CU |
| #define PRCM_AON_O_SWENSWDISDLY 0x00007150U |
| #define PRCM_AON_O_BGENSWENDLY 0x00007154U |
| #define PRCM_AON_O_SWDISBGDISDLY 0x00007158U |
| #define PRCM_AON_O_ICGCTL 0x0000715CU |
| #define PRCM_AON_O_HALT 0x00007160U |
| #define PRCM_AON_O_LOGICCA 0x0000716CU |
| #define PRCM_AON_O_LOGICMEMSTA 0x00007170U |
| #define PRCM_AON_O_HOL 0x00007174U |
| #define PRCM_AON_O_PSCONHGEN 0x00007178U |
| #define PRCM_AON_O_IOPROCSBIT 0x0000717CU |
| #define PRCM_AON_O_SCLKCNTCTLCR 0x00007180U |
| #define PRCM_AON_O_STACR 0x00007184U |
| #define PRCM_AON_O_AAONLOGCAPT 0x0000718CU |
| #define PRCM_AON_O_HWDT 0x00007190U |
| #define PRCM_AON_O_SCLKCNTCR 0x00007194U |
| #define PRCM_AON_O_SRAMLDO 0x00007198U |
| #define PRCM_AON_O_DBG 0x0000719CU |
| #define PRCM_AON_O_RSTOVCTL 0x000071A0U |
| #define PRCM_AON_O_PMURSTCLR 0x000071A4U |
| #define PRCM_AON_O_MEMGCTLCRSTAT1 0x000071A8U |
| #define PRCM_AON_O_MEMGCTLCRFLEX 0x000071ACU |
| #define PRCM_AON_O_CRSH 0x000071B0U |
| #define PRCM_AON_HFLXGRP_PWRSTATE1_W 2U |
| #define PRCM_AON_HFLXGRP_PWRSTATE1_M 0x00000003U |
| #define PRCM_AON_HFLXGRP_PWRSTATE1_S 0U |
| #define PRCM_AON_HFLXGRP_PWRSTATE2_W 2U |
| #define PRCM_AON_HFLXGRP_PWRSTATE2_M 0x0000000CU |
| #define PRCM_AON_HFLXGRP_PWRSTATE2_S 2U |
| #define PRCM_AON_HFLXGRP_PWRSTATE3_W 2U |
| #define PRCM_AON_HFLXGRP_PWRSTATE3_M 0x00000030U |
| #define PRCM_AON_HFLXGRP_PWRSTATE3_S 4U |
| #define PRCM_AON_HFLXGRP_PWRSTATE4_W 2U |
| #define PRCM_AON_HFLXGRP_PWRSTATE4_M 0x000000C0U |
| #define PRCM_AON_HFLXGRP_PWRSTATE4_S 6U |
| #define PRCM_AON_HFLXGRP_PWRSTATE5_W 2U |
| #define PRCM_AON_HFLXGRP_PWRSTATE5_M 0x00000300U |
| #define PRCM_AON_HFLXGRP_PWRSTATE5_S 8U |
| #define PRCM_AON_HFLXGRP_PWRSTATE6_W 2U |
| #define PRCM_AON_HFLXGRP_PWRSTATE6_M 0x00000C00U |
| #define PRCM_AON_HFLXGRP_PWRSTATE6_S 10U |
| #define PRCM_AON_HFLXGRP_PWRSTATE7_W 2U |
| #define PRCM_AON_HFLXGRP_PWRSTATE7_M 0x00003000U |
| #define PRCM_AON_HFLXGRP_PWRSTATE7_S 12U |
| #define PRCM_AON_HFLXGRP_PWRSTATE8_W 2U |
| #define PRCM_AON_HFLXGRP_PWRSTATE8_M 0x0000C000U |
| #define PRCM_AON_HFLXGRP_PWRSTATE8_S 14U |
| #define PRCM_AON_HFLXGRP_PWRSTATE9_W 2U |
| #define PRCM_AON_HFLXGRP_PWRSTATE9_M 0x00030000U |
| #define PRCM_AON_HFLXGRP_PWRSTATE9_S 16U |
| #define PRCM_AON_HFLXGRP_PWRSTATE10_W 2U |
| #define PRCM_AON_HFLXGRP_PWRSTATE10_M 0x000C0000U |
| #define PRCM_AON_HFLXGRP_PWRSTATE10_S 18U |
| #define PRCM_AON_HFLXGRPIND_ISSHARED1 0x00000001U |
| #define PRCM_AON_HFLXGRPIND_ISSHARED1_M 0x00000001U |
| #define PRCM_AON_HFLXGRPIND_ISSHARED1_S 0U |
| #define PRCM_AON_HFLXGRPIND_ISSHARED2 0x00000002U |
| #define PRCM_AON_HFLXGRPIND_ISSHARED2_M 0x00000002U |
| #define PRCM_AON_HFLXGRPIND_ISSHARED2_S 1U |
| #define PRCM_AON_HFLXGRPIND_ISSHARED3 0x00000004U |
| #define PRCM_AON_HFLXGRPIND_ISSHARED3_M 0x00000004U |
| #define PRCM_AON_HFLXGRPIND_ISSHARED3_S 2U |
| #define PRCM_AON_HFLXGRPIND_ISSHARED4 0x00000008U |
| #define PRCM_AON_HFLXGRPIND_ISSHARED4_M 0x00000008U |
| #define PRCM_AON_HFLXGRPIND_ISSHARED4_S 3U |
| #define PRCM_AON_HFLXGRPIND_ISSHARED5 0x00000010U |
| #define PRCM_AON_HFLXGRPIND_ISSHARED5_M 0x00000010U |
| #define PRCM_AON_HFLXGRPIND_ISSHARED5_S 4U |
| #define PRCM_AON_HFLXGRPIND_ISSHARED6 0x00000020U |
| #define PRCM_AON_HFLXGRPIND_ISSHARED6_M 0x00000020U |
| #define PRCM_AON_HFLXGRPIND_ISSHARED6_S 5U |
| #define PRCM_AON_HFLXGRPIND_ISSHARED7 0x00000040U |
| #define PRCM_AON_HFLXGRPIND_ISSHARED7_M 0x00000040U |
| #define PRCM_AON_HFLXGRPIND_ISSHARED7_S 6U |
| #define PRCM_AON_HFLXGRPIND_ISSHARED8 0x00000080U |
| #define PRCM_AON_HFLXGRPIND_ISSHARED8_M 0x00000080U |
| #define PRCM_AON_HFLXGRPIND_ISSHARED8_S 7U |
| #define PRCM_AON_HFLXGRPIND_ISSHARED9 0x00000100U |
| #define PRCM_AON_HFLXGRPIND_ISSHARED9_M 0x00000100U |
| #define PRCM_AON_HFLXGRPIND_ISSHARED9_S 8U |
| #define PRCM_AON_HFLXGRPIND_ISSHARED10 0x00000200U |
| #define PRCM_AON_HFLXGRPIND_ISSHARED10_M 0x00000200U |
| #define PRCM_AON_HFLXGRPIND_ISSHARED10_S 9U |
| #define PRCM_AON_REFCTL_SETKICK 0x00000001U |
| #define PRCM_AON_REFCTL_SETKICK_M 0x00000001U |
| #define PRCM_AON_REFCTL_SETKICK_S 0U |
| #define PRCM_AON_REFCTL_ENISO 0x00010000U |
| #define PRCM_AON_REFCTL_ENISO_M 0x00010000U |
| #define PRCM_AON_REFCTL_ENISO_S 16U |
| #define PRCM_AON_REFSTA_DONE 0x00000001U |
| #define PRCM_AON_REFSTA_DONE_M 0x00000001U |
| #define PRCM_AON_REFSTA_DONE_S 0U |
| #define PRCM_AON_HSTATICGRP_PWRSTAT1_W 2U |
| #define PRCM_AON_HSTATICGRP_PWRSTAT1_M 0x00000003U |
| #define PRCM_AON_HSTATICGRP_PWRSTAT1_S 0U |
| #define PRCM_AON_HSTATICGRP_PWRSTAT2_W 2U |
| #define PRCM_AON_HSTATICGRP_PWRSTAT2_M 0x0000000CU |
| #define PRCM_AON_HSTATICGRP_PWRSTAT2_S 2U |
| #define PRCM_AON_HSTATICGRP_PWRSTAT3_W 2U |
| #define PRCM_AON_HSTATICGRP_PWRSTAT3_M 0x00000030U |
| #define PRCM_AON_HSTATICGRP_PWRSTAT3_S 4U |
| #define PRCM_AON_HSTATICGRP_PWRSTAT4_W 2U |
| #define PRCM_AON_HSTATICGRP_PWRSTAT4_M 0x000000C0U |
| #define PRCM_AON_HSTATICGRP_PWRSTAT4_S 6U |
| #define PRCM_AON_HSTATICGRP_PWRSTAT5_W 2U |
| #define PRCM_AON_HSTATICGRP_PWRSTAT5_M 0x00000300U |
| #define PRCM_AON_HSTATICGRP_PWRSTAT5_S 8U |
| #define PRCM_AON_HSTATICGRP_PWRSTAT6_W 2U |
| #define PRCM_AON_HSTATICGRP_PWRSTAT6_M 0x00000C00U |
| #define PRCM_AON_HSTATICGRP_PWRSTAT6_S 10U |
| #define PRCM_AON_HSTATICGRP_PWRSTAT7_W 2U |
| #define PRCM_AON_HSTATICGRP_PWRSTAT7_M 0x00003000U |
| #define PRCM_AON_HSTATICGRP_PWRSTAT7_S 12U |
| #define PRCM_AON_HSTATICGRP_PWRSTAT8_W 2U |
| #define PRCM_AON_HSTATICGRP_PWRSTAT8_M 0x0000C000U |
| #define PRCM_AON_HSTATICGRP_PWRSTAT8_S 14U |
| #define PRCM_AON_HSTATICGRP_PWRSTAT9_W 2U |
| #define PRCM_AON_HSTATICGRP_PWRSTAT9_M 0x00030000U |
| #define PRCM_AON_HSTATICGRP_PWRSTAT9_S 16U |
| #define PRCM_AON_HSTATICGRP_PWRSTAT10_W 2U |
| #define PRCM_AON_HSTATICGRP_PWRSTAT10_M 0x000C0000U |
| #define PRCM_AON_HSTATICGRP_PWRSTAT10_S 18U |
| #define PRCM_AON_HSTATICGRP_PWRSTAT11_W 2U |
| #define PRCM_AON_HSTATICGRP_PWRSTAT11_M 0x00300000U |
| #define PRCM_AON_HSTATICGRP_PWRSTAT11_S 20U |
| #define PRCM_AON_HSTATICGRP_PWRSTAT12_W 2U |
| #define PRCM_AON_HSTATICGRP_PWRSTAT12_M 0x00C00000U |
| #define PRCM_AON_HSTATICGRP_PWRSTAT12_S 22U |
| #define PRCM_AON_HSTATICGRP_PWRSTAT13_W 2U |
| #define PRCM_AON_HSTATICGRP_PWRSTAT13_M 0x03000000U |
| #define PRCM_AON_HSTATICGRP_PWRSTAT13_S 24U |
| #define PRCM_AON_HSTATICGRP_PWRSTAT14_W 2U |
| #define PRCM_AON_HSTATICGRP_PWRSTAT14_M 0x0C000000U |
| #define PRCM_AON_HSTATICGRP_PWRSTAT14_S 26U |
| #define PRCM_AON_HSTATICGRPIND_ISSHARED1 0x00000001U |
| #define PRCM_AON_HSTATICGRPIND_ISSHARED1_M 0x00000001U |
| #define PRCM_AON_HSTATICGRPIND_ISSHARED1_S 0U |
| #define PRCM_AON_HSTATICGRPIND_ISSHARED2 0x00000002U |
| #define PRCM_AON_HSTATICGRPIND_ISSHARED2_M 0x00000002U |
| #define PRCM_AON_HSTATICGRPIND_ISSHARED2_S 1U |
| #define PRCM_AON_HSTATICGRPIND_ISSHARED3 0x00000004U |
| #define PRCM_AON_HSTATICGRPIND_ISSHARED3_M 0x00000004U |
| #define PRCM_AON_HSTATICGRPIND_ISSHARED3_S 2U |
| #define PRCM_AON_HSTATICGRPIND_ISSHARED4 0x00000008U |
| #define PRCM_AON_HSTATICGRPIND_ISSHARED4_M 0x00000008U |
| #define PRCM_AON_HSTATICGRPIND_ISSHARED4_S 3U |
| #define PRCM_AON_LOGHMEMSTA_AONIN_W 14U |
| #define PRCM_AON_LOGHMEMSTA_AONIN_M 0x00003FFFU |
| #define PRCM_AON_LOGHMEMSTA_AONIN_S 0U |
| #define PRCM_AON_CONNSTP_SET 0x00000001U |
| #define PRCM_AON_CONNSTP_SET_M 0x00000001U |
| #define PRCM_AON_CONNSTP_SET_S 0U |
| #define PRCM_AON_HRSTOV_PULSE 0x00000001U |
| #define PRCM_AON_HRSTOV_PULSE_M 0x00000001U |
| #define PRCM_AON_HRSTOV_PULSE_S 0U |
| #define PRCM_AON_SLPDEEP_SET 0x00000001U |
| #define PRCM_AON_SLPDEEP_SET_M 0x00000001U |
| #define PRCM_AON_SLPDEEP_SET_S 0U |
| #define PRCM_AON_SHPRECISE_PMSFREFPU_W 7U |
| #define PRCM_AON_SHPRECISE_PMSFREFPU_M 0x0000007FU |
| #define PRCM_AON_SHPRECISE_PMSFREFPU_S 0U |
| #define PRCM_AON_SHPRECISE_COREPDU_W 7U |
| #define PRCM_AON_SHPRECISE_COREPDU_M 0x00007F00U |
| #define PRCM_AON_SHPRECISE_COREPDU_S 8U |
| #define PRCM_AON_SHPRECISE_HOSTPDU_W 7U |
| #define PRCM_AON_SHPRECISE_HOSTPDU_M 0x007F0000U |
| #define PRCM_AON_SHPRECISE_HOSTPDU_S 16U |
| #define PRCM_AON_LFXTCTL_OSCEN 0x00000001U |
| #define PRCM_AON_LFXTCTL_OSCEN_M 0x00000001U |
| #define PRCM_AON_LFXTCTL_OSCEN_S 0U |
| #define PRCM_AON_LFXTCTL_IBIASEN 0x00000002U |
| #define PRCM_AON_LFXTCTL_IBIASEN_M 0x00000002U |
| #define PRCM_AON_LFXTCTL_IBIASEN_S 1U |
| #define PRCM_AON_LFXTCTL_CPHPMODEN 0x00000004U |
| #define PRCM_AON_LFXTCTL_CPHPMODEN_M 0x00000004U |
| #define PRCM_AON_LFXTCTL_CPHPMODEN_S 2U |
| #define PRCM_AON_LFXTCTL_CPEN 0x00000008U |
| #define PRCM_AON_LFXTCTL_CPEN_M 0x00000008U |
| #define PRCM_AON_LFXTCTL_CPEN_S 3U |
| #define PRCM_AON_LFXTCTL_BYPASS 0x00000010U |
| #define PRCM_AON_LFXTCTL_BYPASS_M 0x00000010U |
| #define PRCM_AON_LFXTCTL_BYPASS_S 4U |
| #define PRCM_AON_LFXTCTL_BOOSTMODE 0x00000020U |
| #define PRCM_AON_LFXTCTL_BOOSTMODE_M 0x00000020U |
| #define PRCM_AON_LFXTCTL_BOOSTMODE_S 5U |
| #define PRCM_AON_LFXTCTL_AMPREGEN 0x00000040U |
| #define PRCM_AON_LFXTCTL_AMPREGEN_M 0x00000040U |
| #define PRCM_AON_LFXTCTL_AMPREGEN_S 6U |
| #define PRCM_AON_LFXTCTL_IBIASITRIM_W 5U |
| #define PRCM_AON_LFXTCTL_IBIASITRIM_M 0x00000F80U |
| #define PRCM_AON_LFXTCTL_IBIASITRIM_S 7U |
| #define PRCM_AON_LFXTCTL_AMPREGRTRIM_W 5U |
| #define PRCM_AON_LFXTCTL_AMPREGRTRIM_M 0x0001F000U |
| #define PRCM_AON_LFXTCTL_AMPREGRTRIM_S 12U |
| #define PRCM_AON_LFXTCTL_IBIASRTRIM_W 5U |
| #define PRCM_AON_LFXTCTL_IBIASRTRIM_M 0x003E0000U |
| #define PRCM_AON_LFXTCTL_IBIASRTRIM_S 17U |
| #define PRCM_AON_LFXTCTL_AMPREGITRIM_W 5U |
| #define PRCM_AON_LFXTCTL_AMPREGITRIM_M 0x07C00000U |
| #define PRCM_AON_LFXTCTL_AMPREGITRIM_S 22U |
| #define PRCM_AON_LFXTSPARE_CTL_W 16U |
| #define PRCM_AON_LFXTSPARE_CTL_M 0x0000FFFFU |
| #define PRCM_AON_LFXTSPARE_CTL_S 0U |
| #define PRCM_AON_LFOSCEN_GOOD 0x00000001U |
| #define PRCM_AON_LFOSCEN_GOOD_M 0x00000001U |
| #define PRCM_AON_LFOSCEN_GOOD_S 0U |
| #define PRCM_AON_FUSEDATA5_DEVX_W 12U |
| #define PRCM_AON_FUSEDATA5_DEVX_M 0x00000FFFU |
| #define PRCM_AON_FUSEDATA5_DEVX_S 0U |
| #define PRCM_AON_FUSEDATA5_DEVY_W 12U |
| #define PRCM_AON_FUSEDATA5_DEVY_M 0x00FFF000U |
| #define PRCM_AON_FUSEDATA5_DEVY_S 12U |
| #define PRCM_AON_FUSEDATA5_DEVWAF_W 6U |
| #define PRCM_AON_FUSEDATA5_DEVWAF_M 0x3F000000U |
| #define PRCM_AON_FUSEDATA5_DEVWAF_S 24U |
| #define PRCM_AON_FUSEDATA6_DEVLOT_W 24U |
| #define PRCM_AON_FUSEDATA6_DEVLOT_M 0x00FFFFFFU |
| #define PRCM_AON_FUSEDATA6_DEVLOT_S 0U |
| #define PRCM_AON_FUSEDATA6_DEVFAB_W 5U |
| #define PRCM_AON_FUSEDATA6_DEVFAB_M 0x1F000000U |
| #define PRCM_AON_FUSEDATA6_DEVFAB_S 24U |
| #define PRCM_AON_FUSEDATA6_DEVFABBE_W 3U |
| #define PRCM_AON_FUSEDATA6_DEVFABBE_M 0xE0000000U |
| #define PRCM_AON_FUSEDATA6_DEVFABBE_S 29U |
| #define PRCM_AON_FUSEDATA7_DBGCURVE1_W 7U |
| #define PRCM_AON_FUSEDATA7_DBGCURVE1_M 0x0000007FU |
| #define PRCM_AON_FUSEDATA7_DBGCURVE1_S 0U |
| #define PRCM_AON_FUSEDATA7_DBGMAG1_W 8U |
| #define PRCM_AON_FUSEDATA7_DBGMAG1_M 0x00007F80U |
| #define PRCM_AON_FUSEDATA7_DBGMAG1_S 7U |
| #define PRCM_AON_FUSEDATA7_DBGRTRIM1_W 5U |
| #define PRCM_AON_FUSEDATA7_DBGRTRIM1_M 0x000F8000U |
| #define PRCM_AON_FUSEDATA7_DBGRTRIM1_S 15U |
| #define PRCM_AON_FUSEDATA7_DBGGMI1_W 5U |
| #define PRCM_AON_FUSEDATA7_DBGGMI1_M 0x01F00000U |
| #define PRCM_AON_FUSEDATA7_DBGGMI1_S 20U |
| #define PRCM_AON_FUSEDATA7_PMCTEMPSNS1_W 7U |
| #define PRCM_AON_FUSEDATA7_PMCTEMPSNS1_M 0xFE000000U |
| #define PRCM_AON_FUSEDATA7_PMCTEMPSNS1_S 25U |
| #define PRCM_AON_FUSEDATA8_DEVDESREV_W 5U |
| #define PRCM_AON_FUSEDATA8_DEVDESREV_M 0x0000001FU |
| #define PRCM_AON_FUSEDATA8_DEVDESREV_S 0U |
| #define PRCM_AON_FUSEDATA8_MEMREPAIR 0x00000020U |
| #define PRCM_AON_FUSEDATA8_MEMREPAIR_M 0x00000020U |
| #define PRCM_AON_FUSEDATA8_MEMREPAIR_S 5U |
| #define PRCM_AON_FUSEDATA8_MKDASHDEF_W 11U |
| #define PRCM_AON_FUSEDATA8_MKDASHDEF_M 0x0001FFC0U |
| #define PRCM_AON_FUSEDATA8_MKDASHDEF_S 6U |
| #define PRCM_AON_FUSEDATA8_CHECKSUM_W 14U |
| #define PRCM_AON_FUSEDATA8_CHECKSUM_M 0x7FFE0000U |
| #define PRCM_AON_FUSEDATA8_CHECKSUM_S 17U |
| #define PRCM_AON_FUSEDATA9_DBGCURVE2_W 7U |
| #define PRCM_AON_FUSEDATA9_DBGCURVE2_M 0x0000007FU |
| #define PRCM_AON_FUSEDATA9_DBGCURVE2_S 0U |
| #define PRCM_AON_FUSEDATA9_DBGMAG2_W 8U |
| #define PRCM_AON_FUSEDATA9_DBGMAG2_M 0x00007F80U |
| #define PRCM_AON_FUSEDATA9_DBGMAG2_S 7U |
| #define PRCM_AON_FUSEDATA9_DBGRTRIM2_W 5U |
| #define PRCM_AON_FUSEDATA9_DBGRTRIM2_M 0x000F8000U |
| #define PRCM_AON_FUSEDATA9_DBGRTRIM2_S 15U |
| #define PRCM_AON_FUSEDATA9_DBGGMI2_W 5U |
| #define PRCM_AON_FUSEDATA9_DBGGMI2_M 0x01F00000U |
| #define PRCM_AON_FUSEDATA9_DBGGMI2_S 20U |
| #define PRCM_AON_FUSEDATA9_PMCTEMPSNS2_W 7U |
| #define PRCM_AON_FUSEDATA9_PMCTEMPSNS2_M 0xFE000000U |
| #define PRCM_AON_FUSEDATA9_PMCTEMPSNS2_S 25U |
| #define PRCM_AON_FUSEDATA10_LOWRVMTRIM_W 7U |
| #define PRCM_AON_FUSEDATA10_LOWRVMTRIM_M 0x0000007FU |
| #define PRCM_AON_FUSEDATA10_LOWRVMTRIM_S 0U |
| #define PRCM_AON_FUSEDATA10_HIRVMTRIM_W 6U |
| #define PRCM_AON_FUSEDATA10_HIRVMTRIM_M 0x00001F80U |
| #define PRCM_AON_FUSEDATA10_HIRVMTRIM_S 7U |
| #define PRCM_AON_FUSEDATA10_ENLOWRVMPROT_W 3U |
| #define PRCM_AON_FUSEDATA10_ENLOWRVMPROT_M 0x0000E000U |
| #define PRCM_AON_FUSEDATA10_ENLOWRVMPROT_S 13U |
| #define PRCM_AON_FUSEDATA10_ENHIRVMPROTECT_W 3U |
| #define PRCM_AON_FUSEDATA10_ENHIRVMPROTECT_M 0x00070000U |
| #define PRCM_AON_FUSEDATA10_ENHIRVMPROTECT_S 16U |
| #define PRCM_AON_FUSEDATA10_I2VCIRCUIT_W 7U |
| #define PRCM_AON_FUSEDATA10_I2VCIRCUIT_M 0x03F80000U |
| #define PRCM_AON_FUSEDATA10_I2VCIRCUIT_S 19U |
| #define PRCM_AON_FUSEDATA10_BROWNOUTTRIM_W 6U |
| #define PRCM_AON_FUSEDATA10_BROWNOUTTRIM_M 0xFC000000U |
| #define PRCM_AON_FUSEDATA10_BROWNOUTTRIM_S 26U |
| #define PRCM_AON_FUSEDATA11_ABGAPTEMP1_W 5U |
| #define PRCM_AON_FUSEDATA11_ABGAPTEMP1_M 0x0000001FU |
| #define PRCM_AON_FUSEDATA11_ABGAPTEMP1_S 0U |
| #define PRCM_AON_FUSEDATA11_ABGAPMAG1_W 5U |
| #define PRCM_AON_FUSEDATA11_ABGAPMAG1_M 0x000007C0U |
| #define PRCM_AON_FUSEDATA11_ABGAPMAG1_S 6U |
| #define PRCM_AON_FUSEDATA11_ABGAPTEMP2_W 5U |
| #define PRCM_AON_FUSEDATA11_ABGAPTEMP2_M 0x0000F800U |
| #define PRCM_AON_FUSEDATA11_ABGAPTEMP2_S 11U |
| #define PRCM_AON_FUSEDATA11_ABGAPMAG2_W 5U |
| #define PRCM_AON_FUSEDATA11_ABGAPMAG2_M 0x003E0000U |
| #define PRCM_AON_FUSEDATA11_ABGAPMAG2_S 17U |
| #define PRCM_AON_FUSEDATA11_ABGRTRIM_W 4U |
| #define PRCM_AON_FUSEDATA11_ABGRTRIM_M 0x03C00000U |
| #define PRCM_AON_FUSEDATA11_ABGRTRIM_S 22U |
| #define PRCM_AON_FUSEDATA11_RFNWELL_W 5U |
| #define PRCM_AON_FUSEDATA11_RFNWELL_M 0x7C000000U |
| #define PRCM_AON_FUSEDATA11_RFNWELL_S 26U |
| #define PRCM_AON_FUSEDATA12_DELTATEMP12_W 8U |
| #define PRCM_AON_FUSEDATA12_DELTATEMP12_M 0x000000FFU |
| #define PRCM_AON_FUSEDATA12_DELTATEMP12_S 0U |
| #define PRCM_AON_FUSEDATA12_LFOSCRESTRIM_W 7U |
| #define PRCM_AON_FUSEDATA12_LFOSCRESTRIM_M 0x00007F00U |
| #define PRCM_AON_FUSEDATA12_LFOSCRESTRIM_S 8U |
| #define PRCM_AON_FUSEDATA12_LFOSCFSEL_W 2U |
| #define PRCM_AON_FUSEDATA12_LFOSCFSEL_M 0x00018000U |
| #define PRCM_AON_FUSEDATA12_LFOSCFSEL_S 15U |
| #define PRCM_AON_FUSEDATA12_BROWNOUTEN_W 3U |
| #define PRCM_AON_FUSEDATA12_BROWNOUTEN_M 0x000E0000U |
| #define PRCM_AON_FUSEDATA12_BROWNOUTEN_S 17U |
| #define PRCM_AON_FUSEDATA12_IOPMOS_W 3U |
| #define PRCM_AON_FUSEDATA12_IOPMOS_M 0x1C000000U |
| #define PRCM_AON_FUSEDATA12_IOPMOS_S 26U |
| #define PRCM_AON_FUSEDATA12_IONMOS_W 3U |
| #define PRCM_AON_FUSEDATA12_IONMOS_M 0xE0000000U |
| #define PRCM_AON_FUSEDATA12_IONMOS_S 29U |
| #define PRCM_AON_FUSEDATA13_CRNMOSRFCODP_W 4U |
| #define PRCM_AON_FUSEDATA13_CRNMOSRFCODP_M 0x0000000FU |
| #define PRCM_AON_FUSEDATA13_CRNMOSRFCODP_S 0U |
| #define PRCM_AON_FUSEDATA13_AFNMOSRFCODP_W 4U |
| #define PRCM_AON_FUSEDATA13_AFNMOSRFCODP_M 0x000000F0U |
| #define PRCM_AON_FUSEDATA13_AFNMOSRFCODP_S 4U |
| #define PRCM_AON_FUSEDATA13_CRPMOSRFCODP_W 4U |
| #define PRCM_AON_FUSEDATA13_CRPMOSRFCODP_M 0x00000F00U |
| #define PRCM_AON_FUSEDATA13_CRPMOSRFCODP_S 8U |
| #define PRCM_AON_FUSEDATA13_AFPMOSRFCODP_W 4U |
| #define PRCM_AON_FUSEDATA13_AFPMOSRFCODP_M 0x0000F000U |
| #define PRCM_AON_FUSEDATA13_AFPMOSRFCODP_S 12U |
| #define PRCM_AON_FUSEDATA13_COREPMOS_W 3U |
| #define PRCM_AON_FUSEDATA13_COREPMOS_M 0x00070000U |
| #define PRCM_AON_FUSEDATA13_COREPMOS_S 16U |
| #define PRCM_AON_FUSEDATA13_CORENMOS_W 3U |
| #define PRCM_AON_FUSEDATA13_CORENMOS_M 0x00380000U |
| #define PRCM_AON_FUSEDATA13_CORENMOS_S 19U |
| #define PRCM_AON_FUSEDATA13_BYPASSPLL_W 3U |
| #define PRCM_AON_FUSEDATA13_BYPASSPLL_M 0x01C00000U |
| #define PRCM_AON_FUSEDATA13_BYPASSPLL_S 22U |
| #define PRCM_AON_FUSEDATA13_GPADCOFFSET_W 7U |
| #define PRCM_AON_FUSEDATA13_GPADCOFFSET_M 0xFE000000U |
| #define PRCM_AON_FUSEDATA13_GPADCOFFSET_S 25U |
| #define PRCM_AON_FUSEDATA14_CLKMRTRIM_W 5U |
| #define PRCM_AON_FUSEDATA14_CLKMRTRIM_M 0x0000001FU |
| #define PRCM_AON_FUSEDATA14_CLKMRTRIM_S 0U |
| #define PRCM_AON_FUSEDATA14_XTITRIMCTRL_W 6U |
| #define PRCM_AON_FUSEDATA14_XTITRIMCTRL_M 0x000007E0U |
| #define PRCM_AON_FUSEDATA14_XTITRIMCTRL_S 5U |
| #define PRCM_AON_FUSEDATA14_SLITRIMCTRL_W 3U |
| #define PRCM_AON_FUSEDATA14_SLITRIMCTRL_M 0x00003800U |
| #define PRCM_AON_FUSEDATA14_SLITRIMCTRL_S 11U |
| #define PRCM_AON_FUSEDATA14_PALDOMON_W 5U |
| #define PRCM_AON_FUSEDATA14_PALDOMON_M 0x0007C000U |
| #define PRCM_AON_FUSEDATA14_PALDOMON_S 14U |
| #define PRCM_AON_FUSEDATA14_SOCPROCES_W 2U |
| #define PRCM_AON_FUSEDATA14_SOCPROCES_M 0x00180000U |
| #define PRCM_AON_FUSEDATA14_SOCPROCES_S 19U |
| #define PRCM_AON_PRCMRAWFS0_DEVX_W 12U |
| #define PRCM_AON_PRCMRAWFS0_DEVX_M 0x00000FFFU |
| #define PRCM_AON_PRCMRAWFS0_DEVX_S 0U |
| #define PRCM_AON_PRCMRAWFS0_DEVY_W 12U |
| #define PRCM_AON_PRCMRAWFS0_DEVY_M 0x00FFF000U |
| #define PRCM_AON_PRCMRAWFS0_DEVY_S 12U |
| #define PRCM_AON_PRCMRAWFS0_DEVWAF_W 6U |
| #define PRCM_AON_PRCMRAWFS0_DEVWAF_M 0x3F000000U |
| #define PRCM_AON_PRCMRAWFS0_DEVWAF_S 24U |
| #define PRCM_AON_PRCMRAWFS1_DEVLOT_W 24U |
| #define PRCM_AON_PRCMRAWFS1_DEVLOT_M 0x00FFFFFFU |
| #define PRCM_AON_PRCMRAWFS1_DEVLOT_S 0U |
| #define PRCM_AON_PRCMRAWFS1_DEVFAB_W 5U |
| #define PRCM_AON_PRCMRAWFS1_DEVFAB_M 0x1F000000U |
| #define PRCM_AON_PRCMRAWFS1_DEVFAB_S 24U |
| #define PRCM_AON_PRCMRAWFS1_DEVFABBE_W 3U |
| #define PRCM_AON_PRCMRAWFS1_DEVFABBE_M 0xE0000000U |
| #define PRCM_AON_PRCMRAWFS1_DEVFABBE_S 29U |
| #define PRCM_AON_PRCMRAWFS2_DIGBGCURVE1_W 7U |
| #define PRCM_AON_PRCMRAWFS2_DIGBGCURVE1_M 0x0000007FU |
| #define PRCM_AON_PRCMRAWFS2_DIGBGCURVE1_S 0U |
| #define PRCM_AON_PRCMRAWFS2_DIGBGMAG1_W 8U |
| #define PRCM_AON_PRCMRAWFS2_DIGBGMAG1_M 0x00007F80U |
| #define PRCM_AON_PRCMRAWFS2_DIGBGMAG1_S 7U |
| #define PRCM_AON_PRCMRAWFS2_DIGBGRTRIM1_W 5U |
| #define PRCM_AON_PRCMRAWFS2_DIGBGRTRIM1_M 0x000F8000U |
| #define PRCM_AON_PRCMRAWFS2_DIGBGRTRIM1_S 15U |
| #define PRCM_AON_PRCMRAWFS2_DIGBGGMI1_W 5U |
| #define PRCM_AON_PRCMRAWFS2_DIGBGGMI1_M 0x01F00000U |
| #define PRCM_AON_PRCMRAWFS2_DIGBGGMI1_S 20U |
| #define PRCM_AON_PRCMRAWFS2_PMCTEMPSNS1_W 7U |
| #define PRCM_AON_PRCMRAWFS2_PMCTEMPSNS1_M 0xFE000000U |
| #define PRCM_AON_PRCMRAWFS2_PMCTEMPSNS1_S 25U |
| #define PRCM_AON_PRCMRAWFS3_DEVDESREV_W 5U |
| #define PRCM_AON_PRCMRAWFS3_DEVDESREV_M 0x0000001FU |
| #define PRCM_AON_PRCMRAWFS3_DEVDESREV_S 0U |
| #define PRCM_AON_PRCMRAWFS3_MEMREPAIR 0x00000020U |
| #define PRCM_AON_PRCMRAWFS3_MEMREPAIR_M 0x00000020U |
| #define PRCM_AON_PRCMRAWFS3_MEMREPAIR_S 5U |
| #define PRCM_AON_PRCMRAWFS3_MKDASHDEFINED_W 11U |
| #define PRCM_AON_PRCMRAWFS3_MKDASHDEFINED_M 0x0001FFC0U |
| #define PRCM_AON_PRCMRAWFS3_MKDASHDEFINED_S 6U |
| #define PRCM_AON_PRCMRAWFS3_CHECKSUM_W 14U |
| #define PRCM_AON_PRCMRAWFS3_CHECKSUM_M 0x7FFE0000U |
| #define PRCM_AON_PRCMRAWFS3_CHECKSUM_S 17U |
| #define PRCM_AON_PRCMRAWFS4_DIGBGCUR2_W 7U |
| #define PRCM_AON_PRCMRAWFS4_DIGBGCUR2_M 0x0000007FU |
| #define PRCM_AON_PRCMRAWFS4_DIGBGCUR2_S 0U |
| #define PRCM_AON_PRCMRAWFS4_DIGBGMAG2_W 8U |
| #define PRCM_AON_PRCMRAWFS4_DIGBGMAG2_M 0x00007F80U |
| #define PRCM_AON_PRCMRAWFS4_DIGBGMAG2_S 7U |
| #define PRCM_AON_PRCMRAWFS4_DIGBGRTRIM2_W 5U |
| #define PRCM_AON_PRCMRAWFS4_DIGBGRTRIM2_M 0x000F8000U |
| #define PRCM_AON_PRCMRAWFS4_DIGBGRTRIM2_S 15U |
| #define PRCM_AON_PRCMRAWFS4_DIGBGGMI2_W 5U |
| #define PRCM_AON_PRCMRAWFS4_DIGBGGMI2_M 0x01F00000U |
| #define PRCM_AON_PRCMRAWFS4_DIGBGGMI2_S 20U |
| #define PRCM_AON_PRCMRAWFS4_PMCTMPSNS2_W 7U |
| #define PRCM_AON_PRCMRAWFS4_PMCTMPSNS2_M 0xFE000000U |
| #define PRCM_AON_PRCMRAWFS4_PMCTMPSNS2_S 25U |
| #define PRCM_AON_PRCMRAWFS5_LOWRVMTRIM_W 7U |
| #define PRCM_AON_PRCMRAWFS5_LOWRVMTRIM_M 0x0000007FU |
| #define PRCM_AON_PRCMRAWFS5_LOWRVMTRIM_S 0U |
| #define PRCM_AON_PRCMRAWFS5_HIRVMTRIM_W 6U |
| #define PRCM_AON_PRCMRAWFS5_HIRVMTRIM_M 0x00001F80U |
| #define PRCM_AON_PRCMRAWFS5_HIRVMTRIM_S 7U |
| #define PRCM_AON_PRCMRAWFS5_ENLOWRVMPROT_W 3U |
| #define PRCM_AON_PRCMRAWFS5_ENLOWRVMPROT_M 0x0000E000U |
| #define PRCM_AON_PRCMRAWFS5_ENLOWRVMPROT_S 13U |
| #define PRCM_AON_PRCMRAWFS5_ENHIRVMPROT_W 3U |
| #define PRCM_AON_PRCMRAWFS5_ENHIRVMPROT_M 0x00070000U |
| #define PRCM_AON_PRCMRAWFS5_ENHIRVMPROT_S 16U |
| #define PRCM_AON_PRCMRAWFS5_I2VCIRCUIT_W 7U |
| #define PRCM_AON_PRCMRAWFS5_I2VCIRCUIT_M 0x03F80000U |
| #define PRCM_AON_PRCMRAWFS5_I2VCIRCUIT_S 19U |
| #define PRCM_AON_PRCMRAWFS5_BROWNOUTTRIM_W 6U |
| #define PRCM_AON_PRCMRAWFS5_BROWNOUTTRIM_M 0xFC000000U |
| #define PRCM_AON_PRCMRAWFS5_BROWNOUTTRIM_S 26U |
| #define PRCM_AON_PRCMRAWFS6_ABGAPTMP1_W 5U |
| #define PRCM_AON_PRCMRAWFS6_ABGAPTMP1_M 0x0000001FU |
| #define PRCM_AON_PRCMRAWFS6_ABGAPTMP1_S 0U |
| #define PRCM_AON_PRCMRAWFS6_ABGAPMAG1_W 5U |
| #define PRCM_AON_PRCMRAWFS6_ABGAPMAG1_M 0x000007C0U |
| #define PRCM_AON_PRCMRAWFS6_ABGAPMAG1_S 6U |
| #define PRCM_AON_PRCMRAWFS6_ABGAPTMP2_W 5U |
| #define PRCM_AON_PRCMRAWFS6_ABGAPTMP2_M 0x0000F800U |
| #define PRCM_AON_PRCMRAWFS6_ABGAPTMP2_S 11U |
| #define PRCM_AON_PRCMRAWFS6_ABGAPMAG2_W 5U |
| #define PRCM_AON_PRCMRAWFS6_ABGAPMAG2_M 0x003E0000U |
| #define PRCM_AON_PRCMRAWFS6_ABGAPMAG2_S 17U |
| #define PRCM_AON_PRCMRAWFS6_ANABGRTRIM_W 4U |
| #define PRCM_AON_PRCMRAWFS6_ANABGRTRIM_M 0x03C00000U |
| #define PRCM_AON_PRCMRAWFS6_ANABGRTRIM_S 22U |
| #define PRCM_AON_PRCMRAWFS6_RFNWELL_W 5U |
| #define PRCM_AON_PRCMRAWFS6_RFNWELL_M 0x7C000000U |
| #define PRCM_AON_PRCMRAWFS6_RFNWELL_S 26U |
| #define PRCM_AON_PRCMRAWFS7_DELTATMP12_W 8U |
| #define PRCM_AON_PRCMRAWFS7_DELTATMP12_M 0x000000FFU |
| #define PRCM_AON_PRCMRAWFS7_DELTATMP12_S 0U |
| #define PRCM_AON_PRCMRAWFS7_LFORESTRIM_W 7U |
| #define PRCM_AON_PRCMRAWFS7_LFORESTRIM_M 0x00007F00U |
| #define PRCM_AON_PRCMRAWFS7_LFORESTRIM_S 8U |
| #define PRCM_AON_PRCMRAWFS7_LFOSCFSEL_W 2U |
| #define PRCM_AON_PRCMRAWFS7_LFOSCFSEL_M 0x00018000U |
| #define PRCM_AON_PRCMRAWFS7_LFOSCFSEL_S 15U |
| #define PRCM_AON_PRCMRAWFS7_BROWNOUTEN_W 3U |
| #define PRCM_AON_PRCMRAWFS7_BROWNOUTEN_M 0x000E0000U |
| #define PRCM_AON_PRCMRAWFS7_BROWNOUTEN_S 17U |
| #define PRCM_AON_PRCMRAWFS7_IOPMOS_W 3U |
| #define PRCM_AON_PRCMRAWFS7_IOPMOS_M 0x1C000000U |
| #define PRCM_AON_PRCMRAWFS7_IOPMOS_S 26U |
| #define PRCM_AON_PRCMRAWFS7_IONMOS_W 3U |
| #define PRCM_AON_PRCMRAWFS7_IONMOS_M 0xE0000000U |
| #define PRCM_AON_PRCMRAWFS7_IONMOS_S 29U |
| #define PRCM_AON_PRCMRAWFS8_CRNMOSRFCODP_W 4U |
| #define PRCM_AON_PRCMRAWFS8_CRNMOSRFCODP_M 0x0000000FU |
| #define PRCM_AON_PRCMRAWFS8_CRNMOSRFCODP_S 0U |
| #define PRCM_AON_PRCMRAWFS8_AFNMOSRFCODP_W 4U |
| #define PRCM_AON_PRCMRAWFS8_AFNMOSRFCODP_M 0x000000F0U |
| #define PRCM_AON_PRCMRAWFS8_AFNMOSRFCODP_S 4U |
| #define PRCM_AON_PRCMRAWFS8_CRPMOSRFCODP_W 4U |
| #define PRCM_AON_PRCMRAWFS8_CRPMOSRFCODP_M 0x00000F00U |
| #define PRCM_AON_PRCMRAWFS8_CRPMOSRFCODP_S 8U |
| #define PRCM_AON_PRCMRAWFS8_AFPMOSRFCODP_W 4U |
| #define PRCM_AON_PRCMRAWFS8_AFPMOSRFCODP_M 0x0000F000U |
| #define PRCM_AON_PRCMRAWFS8_AFPMOSRFCODP_S 12U |
| #define PRCM_AON_PRCMRAWFS8_COREPMOS_W 3U |
| #define PRCM_AON_PRCMRAWFS8_COREPMOS_M 0x00070000U |
| #define PRCM_AON_PRCMRAWFS8_COREPMOS_S 16U |
| #define PRCM_AON_PRCMRAWFS8_CORENMOS_W 3U |
| #define PRCM_AON_PRCMRAWFS8_CORENMOS_M 0x00380000U |
| #define PRCM_AON_PRCMRAWFS8_CORENMOS_S 19U |
| #define PRCM_AON_PRCMRAWFS8_BYPASSPLL_W 3U |
| #define PRCM_AON_PRCMRAWFS8_BYPASSPLL_M 0x01C00000U |
| #define PRCM_AON_PRCMRAWFS8_BYPASSPLL_S 22U |
| #define PRCM_AON_PRCMRAWFS8_GPADCOFFSET_W 7U |
| #define PRCM_AON_PRCMRAWFS8_GPADCOFFSET_M 0xFE000000U |
| #define PRCM_AON_PRCMRAWFS8_GPADCOFFSET_S 25U |
| #define PRCM_AON_PRCMRAWFS9_CMRTRIM_W 5U |
| #define PRCM_AON_PRCMRAWFS9_CMRTRIM_M 0x0000001FU |
| #define PRCM_AON_PRCMRAWFS9_CMRTRIM_S 0U |
| #define PRCM_AON_PRCMRAWFS9_XTITRIMCTRL_W 6U |
| #define PRCM_AON_PRCMRAWFS9_XTITRIMCTRL_M 0x000007E0U |
| #define PRCM_AON_PRCMRAWFS9_XTITRIMCTRL_S 5U |
| #define PRCM_AON_PRCMRAWFS9_SLITRIMCTRL_W 3U |
| #define PRCM_AON_PRCMRAWFS9_SLITRIMCTRL_M 0x00003800U |
| #define PRCM_AON_PRCMRAWFS9_SLITRIMCTRL_S 11U |
| #define PRCM_AON_PRCMRAWFS9_PALDOINMON_W 5U |
| #define PRCM_AON_PRCMRAWFS9_PALDOINMON_M 0x0007C000U |
| #define PRCM_AON_PRCMRAWFS9_PALDOINMON_S 14U |
| #define PRCM_AON_PRCMRAWFS9_SOCPROCES_W 2U |
| #define PRCM_AON_PRCMRAWFS9_SOCPROCES_M 0x00180000U |
| #define PRCM_AON_PRCMRAWFS9_SOCPROCES_S 19U |
| #define PRCM_AON_FCLKDET_FREQVAL_W 3U |
| #define PRCM_AON_FCLKDET_FREQVAL_M 0x00000007U |
| #define PRCM_AON_FCLKDET_FREQVAL_S 0U |
| #define PRCM_AON_FCLKDET_FAILED 0x00000010U |
| #define PRCM_AON_FCLKDET_FAILED_M 0x00000010U |
| #define PRCM_AON_FCLKDET_FAILED_S 4U |
| #define PRCM_AON_FCLKDET_OVERLAP 0x00000020U |
| #define PRCM_AON_FCLKDET_OVERLAP_M 0x00000020U |
| #define PRCM_AON_FCLKDET_OVERLAP_S 5U |
| #define PRCM_AON_PLOCKLOSCFG_CLR 0x00000001U |
| #define PRCM_AON_PLOCKLOSCFG_CLR_M 0x00000001U |
| #define PRCM_AON_PLOCKLOSCFG_CLR_S 0U |
| #define PRCM_AON_PLOCKLOSSTA_STA 0x00000001U |
| #define PRCM_AON_PLOCKLOSSTA_STA_M 0x00000001U |
| #define PRCM_AON_PLOCKLOSSTA_STA_S 0U |
| #define PRCM_AON_RTCCTL_LFTICKSEL 0x00000001U |
| #define PRCM_AON_RTCCTL_LFTICKSEL_M 0x00000001U |
| #define PRCM_AON_RTCCTL_LFTICKSEL_S 0U |
| #define PRCM_AON_RTCCTL_DISIMMINENT 0x00000002U |
| #define PRCM_AON_RTCCTL_DISIMMINENT_M 0x00000002U |
| #define PRCM_AON_RTCCTL_DISIMMINENT_S 1U |
| #define PRCM_AON_RTCCTL_LFTICKSTA_W 4U |
| #define PRCM_AON_RTCCTL_LFTICKSTA_M 0x00000F00U |
| #define PRCM_AON_RTCCTL_LFTICKSTA_S 8U |
| #define PRCM_AON_LFINCCTL_SOFTRSTRT 0x00000004U |
| #define PRCM_AON_LFINCCTL_SOFTRSTRT_M 0x00000004U |
| #define PRCM_AON_LFINCCTL_SOFTRSTRT_S 2U |
| #define PRCM_AON_LFINCCTL_SOFTRSTRT_ON 0x00000004U |
| #define PRCM_AON_LFINCCTL_SOFTRSTRT_OFF 0x00000000U |
| #define PRCM_AON_LFINCCTL_GEARRSTRT_W 2U |
| #define PRCM_AON_LFINCCTL_GEARRSTRT_M 0x00000018U |
| #define PRCM_AON_LFINCCTL_GEARRSTRT_S 3U |
| #define PRCM_AON_LFINCCTL_GEARRSTRT_TWOTHR 0x00000010U |
| #define PRCM_AON_LFINCCTL_GEARRSTRT_ONETHR 0x00000008U |
| #define PRCM_AON_LFINCCTL_GEARRSTRT_NEVER 0x00000000U |
| #define PRCM_AON_LFINCCTL_ERRTHR_W 2U |
| #define PRCM_AON_LFINCCTL_ERRTHR_M 0x00000060U |
| #define PRCM_AON_LFINCCTL_ERRTHR_S 5U |
| #define PRCM_AON_LFINCCTL_ERRTHR_MIDSMALL 0x00000040U |
| #define PRCM_AON_LFINCCTL_ERRTHR_MIDLARGE 0x00000020U |
| #define PRCM_AON_LFINCCTL_ERRTHR_LARGE 0x00000000U |
| #define PRCM_AON_LFINCCTL_ERRTHR_SMALL 0x00000060U |
| #define PRCM_AON_LFINCCTL_STOPGEAR 0x00000080U |
| #define PRCM_AON_LFINCCTL_STOPGEAR_M 0x00000080U |
| #define PRCM_AON_LFINCCTL_STOPGEAR_S 7U |
| #define PRCM_AON_LFINCCTL_STOPGEAR_LOW 0x00000000U |
| #define PRCM_AON_LFINCCTL_STOPGEAR_HIGH 0x00000080U |
| #define PRCM_AON_LFINCCTL_FKLFTICKSEL_W 2U |
| #define PRCM_AON_LFINCCTL_FKLFTICKSEL_M 0x00000300U |
| #define PRCM_AON_LFINCCTL_FKLFTICKSEL_S 8U |
| #define PRCM_AON_LFINCCTL_FKLFTICKSEL_MIDSMALL 0x00000200U |
| #define PRCM_AON_LFINCCTL_FKLFTICKSEL_MIDLARGE 0x00000100U |
| #define PRCM_AON_LFINCCTL_FKLFTICKSEL_LARGE 0x00000000U |
| #define PRCM_AON_LFINCCTL_FKLFTICKSEL_SMALL 0x00000300U |
| #define PRCM_AON_LFINCCTL_PREVSTBY 0x80000000U |
| #define PRCM_AON_LFINCCTL_PREVSTBY_M 0x80000000U |
| #define PRCM_AON_LFINCCTL_PREVSTBY_S 31U |
| #define PRCM_AON_LFINCCTL_PREVSTBY_OFF 0x00000000U |
| #define PRCM_AON_LFINCCTL_PREVSTBY_ON 0x80000000U |
| #define PRCM_AON_LFCLKSTA_LFINC_W 22U |
| #define PRCM_AON_LFCLKSTA_LFINC_M 0x003FFFFFU |
| #define PRCM_AON_LFCLKSTA_LFINC_S 0U |
| #define PRCM_AON_LFCLKSTA_LFINCSRC_W 2U |
| #define PRCM_AON_LFCLKSTA_LFINCSRC_M 0x00C00000U |
| #define PRCM_AON_LFCLKSTA_LFINCSRC_S 22U |
| #define PRCM_AON_LFCLKSTA_LFINCSRC_OVERRIDE 0x00800000U |
| #define PRCM_AON_LFCLKSTA_LFINCSRC_MEAS 0x00000000U |
| #define PRCM_AON_LFCLKSTA_LFINCSRC_AVG 0x00400000U |
| #define PRCM_AON_LFCLKSTA_LFINCSRC_FAKE 0x00C00000U |
| #define PRCM_AON_LFCLKSTA_LFTICKSRC 0x01000000U |
| #define PRCM_AON_LFCLKSTA_LFTICKSRC_M 0x01000000U |
| #define PRCM_AON_LFCLKSTA_LFTICKSRC_S 24U |
| #define PRCM_AON_LFCLKSTA_LFTICKSRC_LFCLK 0x00000000U |
| #define PRCM_AON_LFCLKSTA_LFTICKSRC_FAKE 0x01000000U |
| #define PRCM_AON_LFCLKSTA_FLTSETLED 0x02000000U |
| #define PRCM_AON_LFCLKSTA_FLTSETLED_M 0x02000000U |
| #define PRCM_AON_LFCLKSTA_FLTSETLED_S 25U |
| #define PRCM_AON_LFCLKSTA_GOOD 0x80000000U |
| #define PRCM_AON_LFCLKSTA_GOOD_M 0x80000000U |
| #define PRCM_AON_LFCLKSTA_GOOD_S 31U |
| #define PRCM_AON_LFINCOVR_LFINC_W 22U |
| #define PRCM_AON_LFINCOVR_LFINC_M 0x003FFFFFU |
| #define PRCM_AON_LFINCOVR_LFINC_S 0U |
| #define PRCM_AON_LFINCOVR_OV 0x80000000U |
| #define PRCM_AON_LFINCOVR_OV_M 0x80000000U |
| #define PRCM_AON_LFINCOVR_OV_S 31U |
| #define PRCM_AON_LFQUALCTL_CONSEC_W 8U |
| #define PRCM_AON_LFQUALCTL_CONSEC_M 0x000000FFU |
| #define PRCM_AON_LFQUALCTL_CONSEC_S 0U |
| #define PRCM_AON_LFQUALCTL_MAXERR_W 6U |
| #define PRCM_AON_LFQUALCTL_MAXERR_M 0x00003F00U |
| #define PRCM_AON_LFQUALCTL_MAXERR_S 8U |
| #define PRCM_AON_LFINCCTLI_INT_W 22U |
| #define PRCM_AON_LFINCCTLI_INT_M 0x003FFFFFU |
| #define PRCM_AON_LFINCCTLI_INT_S 0U |
| #define PRCM_AON_SCLKCNT_DET_W 15U |
| #define PRCM_AON_SCLKCNT_DET_M 0x00007FFFU |
| #define PRCM_AON_SCLKCNT_DET_S 0U |
| #define PRCM_AON_SCLKCNT_PERVAL_W 7U |
| #define PRCM_AON_SCLKCNT_PERVAL_M 0x007F0000U |
| #define PRCM_AON_SCLKCNT_PERVAL_S 16U |
| #define PRCM_AON_SCLKCNTCTL_MODE_W 2U |
| #define PRCM_AON_SCLKCNTCTL_MODE_M 0x00000003U |
| #define PRCM_AON_SCLKCNTCTL_MODE_S 0U |
| #define PRCM_AON_SCLKCNTCTL_PER_W 7U |
| #define PRCM_AON_SCLKCNTCTL_PER_M 0x000001FCU |
| #define PRCM_AON_SCLKCNTCTL_PER_S 2U |
| #define PRCM_AON_SCLKCNTCTL_RESULT_W 15U |
| #define PRCM_AON_SCLKCNTCTL_RESULT_M 0x00FFFE00U |
| #define PRCM_AON_SCLKCNTCTL_RESULT_S 9U |
| #define PRCM_AON_SCLKCNTCTL_RESULTVAL 0x01000000U |
| #define PRCM_AON_SCLKCNTCTL_RESULTVAL_M 0x01000000U |
| #define PRCM_AON_SCLKCNTCTL_RESULTVAL_S 24U |
| #define PRCM_AON_SCLKCNTSTRT_EN 0x00000001U |
| #define PRCM_AON_SCLKCNTSTRT_EN_M 0x00000001U |
| #define PRCM_AON_SCLKCNTSTRT_EN_S 0U |
| #define PRCM_AON_SCLKCTL_LFOSCSEL 0x00000001U |
| #define PRCM_AON_SCLKCTL_LFOSCSEL_M 0x00000001U |
| #define PRCM_AON_SCLKCTL_LFOSCSEL_S 0U |
| #define PRCM_AON_SCLKCTL_SDIVCLKSEL 0x00000002U |
| #define PRCM_AON_SCLKCTL_SDIVCLKSEL_M 0x00000002U |
| #define PRCM_AON_SCLKCTL_SDIVCLKSEL_S 1U |
| #define PRCM_AON_SCLKCTL_P32CLKSEL 0x00000004U |
| #define PRCM_AON_SCLKCTL_P32CLKSEL_M 0x00000004U |
| #define PRCM_AON_SCLKCTL_P32CLKSEL_S 2U |
| #define PRCM_AON_SCLKCTL_GOOD 0x00000008U |
| #define PRCM_AON_SCLKCTL_GOOD_M 0x00000008U |
| #define PRCM_AON_SCLKCTL_GOOD_S 3U |
| #define PRCM_AON_SCLKCTL_DETGOOD 0x00000010U |
| #define PRCM_AON_SCLKCTL_DETGOOD_M 0x00000010U |
| #define PRCM_AON_SCLKCTL_DETGOOD_S 4U |
| #define PRCM_AON_STA_FCLKDETFAIL 0x00000001U |
| #define PRCM_AON_STA_FCLKDETFAIL_M 0x00000001U |
| #define PRCM_AON_STA_FCLKDETFAIL_S 0U |
| #define PRCM_AON_STA_XTALMOD 0x00000002U |
| #define PRCM_AON_STA_XTALMOD_M 0x00000002U |
| #define PRCM_AON_STA_XTALMOD_S 1U |
| #define PRCM_AON_INTERUPT_IRQSTARAW_W 8U |
| #define PRCM_AON_INTERUPT_IRQSTARAW_M 0x000000FFU |
| #define PRCM_AON_INTERUPT_IRQSTARAW_S 0U |
| #define PRCM_AON_INTERUPT_IRQBM_W 8U |
| #define PRCM_AON_INTERUPT_IRQBM_M 0x0000FF00U |
| #define PRCM_AON_INTERUPT_IRQBM_S 8U |
| #define PRCM_AON_INTERUPT_IRQSTABM_W 8U |
| #define PRCM_AON_INTERUPT_IRQSTABM_M 0x00FF0000U |
| #define PRCM_AON_INTERUPT_IRQSTABM_S 16U |
| #define PRCM_AON_HPRCMSHAR_PMSREQOV 0x00000001U |
| #define PRCM_AON_HPRCMSHAR_PMSREQOV_M 0x00000001U |
| #define PRCM_AON_HPRCMSHAR_PMSREQOV_S 0U |
| #define PRCM_AON_HPRCMSHAR_FREFREQOV 0x00000002U |
| #define PRCM_AON_HPRCMSHAR_FREFREQOV_M 0x00000002U |
| #define PRCM_AON_HPRCMSHAR_FREFREQOV_S 1U |
| #define PRCM_AON_HPRCMSHAR_PSHREQOV 0x00000004U |
| #define PRCM_AON_HPRCMSHAR_PSHREQOV_M 0x00000004U |
| #define PRCM_AON_HPRCMSHAR_PSHREQOV_S 2U |
| #define PRCM_AON_CRSLPIND_CTLSTAT 0x00000001U |
| #define PRCM_AON_CRSLPIND_CTLSTAT_M 0x00000001U |
| #define PRCM_AON_CRSLPIND_CTLSTAT_S 0U |
| #define PRCM_AON_HSLPIND_CTLSTAT 0x00000001U |
| #define PRCM_AON_HSLPIND_CTLSTAT_M 0x00000001U |
| #define PRCM_AON_HSLPIND_CTLSTAT_S 0U |
| #define PRCM_AON_FNCLKMUXCTL_DBGCLKSEL_W 3U |
| #define PRCM_AON_FNCLKMUXCTL_DBGCLKSEL_M 0x00000007U |
| #define PRCM_AON_FNCLKMUXCTL_DBGCLKSEL_S 0U |
| #define PRCM_AON_FNCLKMUXCTL_SEL_W 2U |
| #define PRCM_AON_FNCLKMUXCTL_SEL_M 0x00000018U |
| #define PRCM_AON_FNCLKMUXCTL_SEL_S 3U |
| #define PRCM_AON_RSTCTL_SOCAON 0x00000001U |
| #define PRCM_AON_RSTCTL_SOCAON_M 0x00000001U |
| #define PRCM_AON_RSTCTL_SOCAON_S 0U |
| #define PRCM_AON_LFOSC_FSFSEL_W 2U |
| #define PRCM_AON_LFOSC_FSFSEL_M 0x00000003U |
| #define PRCM_AON_LFOSC_FSFSEL_S 0U |
| #define PRCM_AON_LFOSC_SELOVFSEL 0x00000004U |
| #define PRCM_AON_LFOSC_SELOVFSEL_M 0x00000004U |
| #define PRCM_AON_LFOSC_SELOVFSEL_S 2U |
| #define PRCM_AON_LFOSC_OVFSELVAL_W 2U |
| #define PRCM_AON_LFOSC_OVFSELVAL_M 0x00000018U |
| #define PRCM_AON_LFOSC_OVFSELVAL_S 3U |
| #define PRCM_AON_LFOSC_FSRESTRIM_W 7U |
| #define PRCM_AON_LFOSC_FSRESTRIM_M 0x00000FE0U |
| #define PRCM_AON_LFOSC_FSRESTRIM_S 5U |
| #define PRCM_AON_LFOSC_SELOVRESTRIM 0x00001000U |
| #define PRCM_AON_LFOSC_SELOVRESTRIM_M 0x00001000U |
| #define PRCM_AON_LFOSC_SELOVRESTRIM_S 12U |
| #define PRCM_AON_LFOSC_OVRESTRIMVAL_W 7U |
| #define PRCM_AON_LFOSC_OVRESTRIMVAL_M 0x000FE000U |
| #define PRCM_AON_LFOSC_OVRESTRIMVAL_S 13U |
| #define PRCM_AON_LFOSC_SELOVOSCEN 0x00100000U |
| #define PRCM_AON_LFOSC_SELOVOSCEN_M 0x00100000U |
| #define PRCM_AON_LFOSC_SELOVOSCEN_S 20U |
| #define PRCM_AON_LFOSC_OVOSCEN 0x00200000U |
| #define PRCM_AON_LFOSC_OVOSCEN_M 0x00200000U |
| #define PRCM_AON_LFOSC_OVOSCEN_S 21U |
| #define PRCM_AON_LFOSC_OVOSCSTOPEN 0x00400000U |
| #define PRCM_AON_LFOSC_OVOSCSTOPEN_M 0x00400000U |
| #define PRCM_AON_LFOSC_OVOSCSTOPEN_S 22U |
| #define PRCM_AON_FSCFG_SELOVEFCRDY 0x00000001U |
| #define PRCM_AON_FSCFG_SELOVEFCRDY_M 0x00000001U |
| #define PRCM_AON_FSCFG_SELOVEFCRDY_S 0U |
| #define PRCM_AON_FSCFG_OVEFCRDY 0x00000002U |
| #define PRCM_AON_FSCFG_OVEFCRDY_M 0x00000002U |
| #define PRCM_AON_FSCFG_OVEFCRDY_S 1U |
| #define PRCM_AON_PMCIO_SOPSTA_W 2U |
| #define PRCM_AON_PMCIO_SOPSTA_M 0x00000003U |
| #define PRCM_AON_PMCIO_SOPSTA_S 0U |
| #define PRCM_AON_BOD_COMPEN 0x00000001U |
| #define PRCM_AON_BOD_COMPEN_M 0x00000001U |
| #define PRCM_AON_BOD_COMPEN_S 0U |
| #define PRCM_AON_BOD_IPEN 0x00000002U |
| #define PRCM_AON_BOD_IPEN_M 0x00000002U |
| #define PRCM_AON_BOD_IPEN_S 1U |
| #define PRCM_AON_BOD_SELOVLOIQ 0x00000008U |
| #define PRCM_AON_BOD_SELOVLOIQ_M 0x00000008U |
| #define PRCM_AON_BOD_SELOVLOIQ_S 3U |
| #define PRCM_AON_BOD_OVLOIQ 0x00000010U |
| #define PRCM_AON_BOD_OVLOIQ_M 0x00000010U |
| #define PRCM_AON_BOD_OVLOIQ_S 4U |
| #define PRCM_AON_BOD_FSMLOIQ 0x00000020U |
| #define PRCM_AON_BOD_FSMLOIQ_M 0x00000020U |
| #define PRCM_AON_BOD_FSMLOIQ_S 5U |
| #define PRCM_AON_BOD_FSTRIM_W 6U |
| #define PRCM_AON_BOD_FSTRIM_M 0x00000FC0U |
| #define PRCM_AON_BOD_FSTRIM_S 6U |
| #define PRCM_AON_BOD_SELOVTRIM 0x00001000U |
| #define PRCM_AON_BOD_SELOVTRIM_M 0x00001000U |
| #define PRCM_AON_BOD_SELOVTRIM_S 12U |
| #define PRCM_AON_BOD_OVTRIM_W 6U |
| #define PRCM_AON_BOD_OVTRIM_M 0x0007E000U |
| #define PRCM_AON_BOD_OVTRIM_S 13U |
| #define PRCM_AON_BOD_HYSTCTL_W 2U |
| #define PRCM_AON_BOD_HYSTCTL_M 0x00180000U |
| #define PRCM_AON_BOD_HYSTCTL_S 19U |
| #define PRCM_AON_BOD_SELOVENPROT 0x00200000U |
| #define PRCM_AON_BOD_SELOVENPROT_M 0x00200000U |
| #define PRCM_AON_BOD_SELOVENPROT_S 21U |
| #define PRCM_AON_BOD_OVENPROT 0x00400000U |
| #define PRCM_AON_BOD_OVENPROT_M 0x00400000U |
| #define PRCM_AON_BOD_OVENPROT_S 22U |
| #define PRCM_AON_BOD_FSENPROT_W 3U |
| #define PRCM_AON_BOD_FSENPROT_M 0x03800000U |
| #define PRCM_AON_BOD_FSENPROT_S 23U |
| #define PRCM_AON_BOD_BTFDBACKEN 0x04000000U |
| #define PRCM_AON_BOD_BTFDBACKEN_M 0x04000000U |
| #define PRCM_AON_BOD_BTFDBACKEN_S 26U |
| #define PRCM_AON_BOD_RSTCAUSECLR 0x80000000U |
| #define PRCM_AON_BOD_RSTCAUSECLR_M 0x80000000U |
| #define PRCM_AON_BOD_RSTCAUSECLR_S 31U |
| #define PRCM_AON_RVMH_COMPEN 0x00000001U |
| #define PRCM_AON_RVMH_COMPEN_M 0x00000001U |
| #define PRCM_AON_RVMH_COMPEN_S 0U |
| #define PRCM_AON_RVMH_IPEN 0x00000002U |
| #define PRCM_AON_RVMH_IPEN_M 0x00000002U |
| #define PRCM_AON_RVMH_IPEN_S 1U |
| #define PRCM_AON_RVMH_FSENPROT_W 3U |
| #define PRCM_AON_RVMH_FSENPROT_M 0x0000001CU |
| #define PRCM_AON_RVMH_FSENPROT_S 2U |
| #define PRCM_AON_RVMH_SELOVENPROT 0x00000020U |
| #define PRCM_AON_RVMH_SELOVENPROT_M 0x00000020U |
| #define PRCM_AON_RVMH_SELOVENPROT_S 5U |
| #define PRCM_AON_RVMH_OVENPROT 0x00000040U |
| #define PRCM_AON_RVMH_OVENPROT_M 0x00000040U |
| #define PRCM_AON_RVMH_OVENPROT_S 6U |
| #define PRCM_AON_RVMH_SELOVLOIQ 0x00000080U |
| #define PRCM_AON_RVMH_SELOVLOIQ_M 0x00000080U |
| #define PRCM_AON_RVMH_SELOVLOIQ_S 7U |
| #define PRCM_AON_RVMH_OVLOIQ 0x00000100U |
| #define PRCM_AON_RVMH_OVLOIQ_M 0x00000100U |
| #define PRCM_AON_RVMH_OVLOIQ_S 8U |
| #define PRCM_AON_RVMH_FSMLOIQ 0x00000200U |
| #define PRCM_AON_RVMH_FSMLOIQ_M 0x00000200U |
| #define PRCM_AON_RVMH_FSMLOIQ_S 9U |
| #define PRCM_AON_RVMH_HYSTCTL_W 2U |
| #define PRCM_AON_RVMH_HYSTCTL_M 0x00000C00U |
| #define PRCM_AON_RVMH_HYSTCTL_S 10U |
| #define PRCM_AON_RVML_COMPEN 0x00000001U |
| #define PRCM_AON_RVML_COMPEN_M 0x00000001U |
| #define PRCM_AON_RVML_COMPEN_S 0U |
| #define PRCM_AON_RVML_IPEN 0x00000002U |
| #define PRCM_AON_RVML_IPEN_M 0x00000002U |
| #define PRCM_AON_RVML_IPEN_S 1U |
| #define PRCM_AON_RVML_FSENPROT_W 3U |
| #define PRCM_AON_RVML_FSENPROT_M 0x0000001CU |
| #define PRCM_AON_RVML_FSENPROT_S 2U |
| #define PRCM_AON_RVML_SELOVENPROT 0x00000020U |
| #define PRCM_AON_RVML_SELOVENPROT_M 0x00000020U |
| #define PRCM_AON_RVML_SELOVENPROT_S 5U |
| #define PRCM_AON_RVML_OVENPROT 0x00000040U |
| #define PRCM_AON_RVML_OVENPROT_M 0x00000040U |
| #define PRCM_AON_RVML_OVENPROT_S 6U |
| #define PRCM_AON_RVML_SELOVLOIQ 0x00000080U |
| #define PRCM_AON_RVML_SELOVLOIQ_M 0x00000080U |
| #define PRCM_AON_RVML_SELOVLOIQ_S 7U |
| #define PRCM_AON_RVML_OVLOIQ 0x00000100U |
| #define PRCM_AON_RVML_OVLOIQ_M 0x00000100U |
| #define PRCM_AON_RVML_OVLOIQ_S 8U |
| #define PRCM_AON_RVML_FSMLOIQ 0x00000200U |
| #define PRCM_AON_RVML_FSMLOIQ_M 0x00000200U |
| #define PRCM_AON_RVML_FSMLOIQ_S 9U |
| #define PRCM_AON_RVML_HYSTCTL_W 2U |
| #define PRCM_AON_RVML_HYSTCTL_M 0x00000C00U |
| #define PRCM_AON_RVML_HYSTCTL_S 10U |
| #define PRCM_AON_PSCON_DLYPONPGOOD_W 5U |
| #define PRCM_AON_PSCON_DLYPONPGOOD_M 0x0000001FU |
| #define PRCM_AON_PSCON_DLYPONPGOOD_S 0U |
| #define PRCM_AON_PSCON_DLYAONAGOOD_W 4U |
| #define PRCM_AON_PSCON_DLYAONAGOOD_M 0x000001E0U |
| #define PRCM_AON_PSCON_DLYAONAGOOD_S 5U |
| #define PRCM_AON_PSCON_DLYRTAONGOOD_W 4U |
| #define PRCM_AON_PSCON_DLYRTAONGOOD_M 0x00001E00U |
| #define PRCM_AON_PSCON_DLYRTAONGOOD_S 9U |
| #define PRCM_AON_PSCON_DLYPGOODRETUP_W 5U |
| #define PRCM_AON_PSCON_DLYPGOODRETUP_M 0x0003E000U |
| #define PRCM_AON_PSCON_DLYPGOODRETUP_S 13U |
| #define PRCM_AON_DBGAPEN_FSMEN 0x00000001U |
| #define PRCM_AON_DBGAPEN_FSMEN_M 0x00000001U |
| #define PRCM_AON_DBGAPEN_FSMEN_S 0U |
| #define PRCM_AON_DBGAPEN_OVEN 0x00000002U |
| #define PRCM_AON_DBGAPEN_OVEN_M 0x00000002U |
| #define PRCM_AON_DBGAPEN_OVEN_S 1U |
| #define PRCM_AON_DBGAPEN_SELOVEN 0x00000004U |
| #define PRCM_AON_DBGAPEN_SELOVEN_M 0x00000004U |
| #define PRCM_AON_DBGAPEN_SELOVEN_S 2U |
| #define PRCM_AON_DBGAPEN_ISCONST1 0x00000008U |
| #define PRCM_AON_DBGAPEN_ISCONST1_M 0x00000008U |
| #define PRCM_AON_DBGAPEN_ISCONST1_S 3U |
| #define PRCM_AON_DBGAPEN_ISCONST0 0x00000010U |
| #define PRCM_AON_DBGAPEN_ISCONST0_M 0x00000010U |
| #define PRCM_AON_DBGAPEN_ISCONST0_S 4U |
| #define PRCM_AON_OVDBGAP1_OVCURVTRIM_W 7U |
| #define PRCM_AON_OVDBGAP1_OVCURVTRIM_M 0x0000007FU |
| #define PRCM_AON_OVDBGAP1_OVCURVTRIM_S 0U |
| #define PRCM_AON_OVDBGAP1_SELOVCURVTRIM 0x00000080U |
| #define PRCM_AON_OVDBGAP1_SELOVCURVTRIM_M 0x00000080U |
| #define PRCM_AON_OVDBGAP1_SELOVCURVTRIM_S 7U |
| #define PRCM_AON_OVDBGAP1_FSCURVTRIM2_W 7U |
| #define PRCM_AON_OVDBGAP1_FSCURVTRIM2_M 0x00007F00U |
| #define PRCM_AON_OVDBGAP1_FSCURVTRIM2_S 8U |
| #define PRCM_AON_OVDBGAP1_FSCURVTRIM1_W 7U |
| #define PRCM_AON_OVDBGAP1_FSCURVTRIM1_M 0x003F8000U |
| #define PRCM_AON_OVDBGAP1_FSCURVTRIM1_S 15U |
| #define PRCM_AON_OVDBGAP2_OVVMAGTRIM_W 8U |
| #define PRCM_AON_OVDBGAP2_OVVMAGTRIM_M 0x000000FFU |
| #define PRCM_AON_OVDBGAP2_OVVMAGTRIM_S 0U |
| #define PRCM_AON_OVDBGAP2_SELOVVMAGTRIM 0x00000100U |
| #define PRCM_AON_OVDBGAP2_SELOVVMAGTRIM_M 0x00000100U |
| #define PRCM_AON_OVDBGAP2_SELOVVMAGTRIM_S 8U |
| #define PRCM_AON_OVDBGAP2_FSVMAGTRIM1_W 8U |
| #define PRCM_AON_OVDBGAP2_FSVMAGTRIM1_M 0x0001FE00U |
| #define PRCM_AON_OVDBGAP2_FSVMAGTRIM1_S 9U |
| #define PRCM_AON_OVDBGAP2_FSVMAGTRIM2_W 8U |
| #define PRCM_AON_OVDBGAP2_FSVMAGTRIM2_M 0x01FE0000U |
| #define PRCM_AON_OVDBGAP2_FSVMAGTRIM2_S 17U |
| #define PRCM_AON_SLPREF_SELOVDBGIREFEN 0x00000010U |
| #define PRCM_AON_SLPREF_SELOVDBGIREFEN_M 0x00000010U |
| #define PRCM_AON_SLPREF_SELOVDBGIREFEN_S 4U |
| #define PRCM_AON_SLPREF_OVDBGIREFEN 0x00000020U |
| #define PRCM_AON_SLPREF_OVDBGIREFEN_M 0x00000020U |
| #define PRCM_AON_SLPREF_OVDBGIREFEN_S 5U |
| #define PRCM_AON_SLPREF_FSMDIGBGIREFEN 0x00000040U |
| #define PRCM_AON_SLPREF_FSMDIGBGIREFEN_M 0x00000040U |
| #define PRCM_AON_SLPREF_FSMDIGBGIREFEN_S 6U |
| #define PRCM_AON_SLPREF_SELOVLKSWON 0x00000080U |
| #define PRCM_AON_SLPREF_SELOVLKSWON_M 0x00000080U |
| #define PRCM_AON_SLPREF_SELOVLKSWON_S 7U |
| #define PRCM_AON_SLPREF_OVLKSWON 0x00000100U |
| #define PRCM_AON_SLPREF_OVLKSWON_M 0x00000100U |
| #define PRCM_AON_SLPREF_OVLKSWON_S 8U |
| #define PRCM_AON_SLPREF_FDBGENCAPSW 0x00000200U |
| #define PRCM_AON_SLPREF_FDBGENCAPSW_M 0x00000200U |
| #define PRCM_AON_SLPREF_FDBGENCAPSW_S 9U |
| #define PRCM_AON_DBGGM_OVGMITRIM_W 5U |
| #define PRCM_AON_DBGGM_OVGMITRIM_M 0x0000001FU |
| #define PRCM_AON_DBGGM_OVGMITRIM_S 0U |
| #define PRCM_AON_DBGGM_SELOVGMITRIM 0x00000020U |
| #define PRCM_AON_DBGGM_SELOVGMITRIM_M 0x00000020U |
| #define PRCM_AON_DBGGM_SELOVGMITRIM_S 5U |
| #define PRCM_AON_DBGGM_FSTRIM1_W 5U |
| #define PRCM_AON_DBGGM_FSTRIM1_M 0x000007C0U |
| #define PRCM_AON_DBGGM_FSTRIM1_S 6U |
| #define PRCM_AON_DBGGM_FSTRIM2_W 5U |
| #define PRCM_AON_DBGGM_FSTRIM2_M 0x0000F800U |
| #define PRCM_AON_DBGGM_FSTRIM2_S 11U |
| #define PRCM_AON_DBGGM_ENBIAS 0x00010000U |
| #define PRCM_AON_DBGGM_ENBIAS_M 0x00010000U |
| #define PRCM_AON_DBGGM_ENBIAS_S 16U |
| #define PRCM_AON_DBGGM_ENBIASSTRTU 0x00020000U |
| #define PRCM_AON_DBGGM_ENBIASSTRTU_M 0x00020000U |
| #define PRCM_AON_DBGGM_ENBIASSTRTU_S 17U |
| #define PRCM_AON_DBGGM_ENBIASTRIM 0x00040000U |
| #define PRCM_AON_DBGGM_ENBIASTRIM_M 0x00040000U |
| #define PRCM_AON_DBGGM_ENBIASTRIM_S 18U |
| #define PRCM_AON_PMURTRIM_OV_W 5U |
| #define PRCM_AON_PMURTRIM_OV_M 0x0000001FU |
| #define PRCM_AON_PMURTRIM_OV_S 0U |
| #define PRCM_AON_PMURTRIM_SELOV 0x00000020U |
| #define PRCM_AON_PMURTRIM_SELOV_M 0x00000020U |
| #define PRCM_AON_PMURTRIM_SELOV_S 5U |
| #define PRCM_AON_PMURTRIM_FSDBGAP1_W 5U |
| #define PRCM_AON_PMURTRIM_FSDBGAP1_M 0x000007C0U |
| #define PRCM_AON_PMURTRIM_FSDBGAP1_S 6U |
| #define PRCM_AON_PMURTRIM_FSDBGAP2_W 5U |
| #define PRCM_AON_PMURTRIM_FSDBGAP2_M 0x0000F800U |
| #define PRCM_AON_PMURTRIM_FSDBGAP2_S 11U |
| #define PRCM_AON_VNWACTL_SELOVTPEN 0x00000001U |
| #define PRCM_AON_VNWACTL_SELOVTPEN_M 0x00000001U |
| #define PRCM_AON_VNWACTL_SELOVTPEN_S 0U |
| #define PRCM_AON_VNWACTL_OVTOPEN 0x00000002U |
| #define PRCM_AON_VNWACTL_OVTOPEN_M 0x00000002U |
| #define PRCM_AON_VNWACTL_OVTOPEN_S 1U |
| #define PRCM_AON_VNWACTL_OVVDDSEN 0x00000004U |
| #define PRCM_AON_VNWACTL_OVVDDSEN_M 0x00000004U |
| #define PRCM_AON_VNWACTL_OVVDDSEN_S 2U |
| #define PRCM_AON_VNWACTL_SELOVSRENSCNMOD 0x00000008U |
| #define PRCM_AON_VNWACTL_SELOVSRENSCNMOD_M 0x00000008U |
| #define PRCM_AON_VNWACTL_SELOVSRENSCNMOD_S 3U |
| #define PRCM_AON_VNWACTL_OVSRENSCRNMOD 0x00000010U |
| #define PRCM_AON_VNWACTL_OVSRENSCRNMOD_M 0x00000010U |
| #define PRCM_AON_VNWACTL_OVSRENSCRNMOD_S 4U |
| #define PRCM_AON_SRAMKATRIM_RTA_W 6U |
| #define PRCM_AON_SRAMKATRIM_RTA_M 0x0000003FU |
| #define PRCM_AON_SRAMKATRIM_RTA_S 0U |
| #define PRCM_AON_SRAMKATRIM_NORTA_W 6U |
| #define PRCM_AON_SRAMKATRIM_NORTA_M 0x00000FC0U |
| #define PRCM_AON_SRAMKATRIM_NORTA_S 6U |
| #define PRCM_AON_SRAMKATRIM_SLPNORTAMOD 0x00001000U |
| #define PRCM_AON_SRAMKATRIM_SLPNORTAMOD_M 0x00001000U |
| #define PRCM_AON_SRAMKATRIM_SLPNORTAMOD_S 12U |
| #define PRCM_AON_VAL_SPARE_W 7U |
| #define PRCM_AON_VAL_SPARE_M 0x0000007FU |
| #define PRCM_AON_VAL_SPARE_S 0U |
| #define PRCM_AON_SRAMKAEN_FSM 0x00000001U |
| #define PRCM_AON_SRAMKAEN_FSM_M 0x00000001U |
| #define PRCM_AON_SRAMKAEN_FSM_S 0U |
| #define PRCM_AON_SRAMKAEN_OV 0x00000002U |
| #define PRCM_AON_SRAMKAEN_OV_M 0x00000002U |
| #define PRCM_AON_SRAMKAEN_OV_S 1U |
| #define PRCM_AON_SRAMKAEN_SELOV 0x00000004U |
| #define PRCM_AON_SRAMKAEN_SELOV_M 0x00000004U |
| #define PRCM_AON_SRAMKAEN_SELOV_S 2U |
| #define PRCM_AON_SRAMKAEN_TLOAD 0x00000008U |
| #define PRCM_AON_SRAMKAEN_TLOAD_M 0x00000008U |
| #define PRCM_AON_SRAMKAEN_TLOAD_S 3U |
| #define PRCM_AON_DLDOEN_FSM 0x00000001U |
| #define PRCM_AON_DLDOEN_FSM_M 0x00000001U |
| #define PRCM_AON_DLDOEN_FSM_S 0U |
| #define PRCM_AON_DLDOEN_OV 0x00000002U |
| #define PRCM_AON_DLDOEN_OV_M 0x00000002U |
| #define PRCM_AON_DLDOEN_OV_S 1U |
| #define PRCM_AON_DLDOEN_SELOV 0x00000004U |
| #define PRCM_AON_DLDOEN_SELOV_M 0x00000004U |
| #define PRCM_AON_DLDOEN_SELOV_S 2U |
| #define PRCM_AON_DLDOVTRIM_OPP1_W 6U |
| #define PRCM_AON_DLDOVTRIM_OPP1_M 0x0000003FU |
| #define PRCM_AON_DLDOVTRIM_OPP1_S 0U |
| #define PRCM_AON_DKAEN_FSM 0x00000001U |
| #define PRCM_AON_DKAEN_FSM_M 0x00000001U |
| #define PRCM_AON_DKAEN_FSM_S 0U |
| #define PRCM_AON_DKAEN_OV 0x00000002U |
| #define PRCM_AON_DKAEN_OV_M 0x00000002U |
| #define PRCM_AON_DKAEN_OV_S 1U |
| #define PRCM_AON_DKAEN_SELOV 0x00000004U |
| #define PRCM_AON_DKAEN_SELOV_M 0x00000004U |
| #define PRCM_AON_DKAEN_SELOV_S 2U |
| #define PRCM_AON_DKAEN_TLOAD 0x00000008U |
| #define PRCM_AON_DKAEN_TLOAD_M 0x00000008U |
| #define PRCM_AON_DKAEN_TLOAD_S 3U |
| #define PRCM_AON_DKATRIM_VAL_W 6U |
| #define PRCM_AON_DKATRIM_VAL_M 0x0000003FU |
| #define PRCM_AON_DKATRIM_VAL_S 0U |
| #define PRCM_AON_DLDOLPMOD_EN 0x00000001U |
| #define PRCM_AON_DLDOLPMOD_EN_M 0x00000001U |
| #define PRCM_AON_DLDOLPMOD_EN_S 0U |
| #define PRCM_AON_DLDOCFG_TLOADEN 0x00000001U |
| #define PRCM_AON_DLDOCFG_TLOADEN_M 0x00000001U |
| #define PRCM_AON_DLDOCFG_TLOADEN_S 0U |
| #define PRCM_AON_DLDOCFG_SCPROTEN 0x00000002U |
| #define PRCM_AON_DLDOCFG_SCPROTEN_M 0x00000002U |
| #define PRCM_AON_DLDOCFG_SCPROTEN_S 1U |
| #define PRCM_AON_DLDOCFG_SCITRIM_W 2U |
| #define PRCM_AON_DLDOCFG_SCITRIM_M 0x0000000CU |
| #define PRCM_AON_DLDOCFG_SCITRIM_S 2U |
| #define PRCM_AON_DLDOCFG_IQTRIM_W 2U |
| #define PRCM_AON_DLDOCFG_IQTRIM_M 0x00000030U |
| #define PRCM_AON_DLDOCFG_IQTRIM_S 4U |
| #define PRCM_AON_DLDOCFG_ENINRSHLIM 0x00000040U |
| #define PRCM_AON_DLDOCFG_ENINRSHLIM_M 0x00000040U |
| #define PRCM_AON_DLDOCFG_ENINRSHLIM_S 6U |
| #define PRCM_AON_DLDOCFG_SELENINRSHLIM 0x00000080U |
| #define PRCM_AON_DLDOCFG_SELENINRSHLIM_M 0x00000080U |
| #define PRCM_AON_DLDOCFG_SELENINRSHLIM_S 7U |
| #define PRCM_AON_DLDOCFG_SUBREGEN 0x00000100U |
| #define PRCM_AON_DLDOCFG_SUBREGEN_M 0x00000100U |
| #define PRCM_AON_DLDOCFG_SUBREGEN_S 8U |
| #define PRCM_AON_DLDOCFG_IQTRIMINRSH_W 2U |
| #define PRCM_AON_DLDOCFG_IQTRIMINRSH_M 0x00000600U |
| #define PRCM_AON_DLDOCFG_IQTRIMINRSH_S 9U |
| #define PRCM_AON_RVMTRIMCTL_SELOVRVMHTRIM 0x00000001U |
| #define PRCM_AON_RVMTRIMCTL_SELOVRVMHTRIM_M 0x00000001U |
| #define PRCM_AON_RVMTRIMCTL_SELOVRVMHTRIM_S 0U |
| #define PRCM_AON_RVMTRIMCTL_OV_W 6U |
| #define PRCM_AON_RVMTRIMCTL_OV_M 0x0000007EU |
| #define PRCM_AON_RVMTRIMCTL_OV_S 1U |
| #define PRCM_AON_RVMTRIMCTL_SELOVFSM 0x00000080U |
| #define PRCM_AON_RVMTRIMCTL_SELOVFSM_M 0x00000080U |
| #define PRCM_AON_RVMTRIMCTL_SELOVFSM_S 7U |
| #define PRCM_AON_RVMTRIMCTL_OVFSM_W 2U |
| #define PRCM_AON_RVMTRIMCTL_OVFSM_M 0x00000300U |
| #define PRCM_AON_RVMTRIMCTL_OVFSM_S 8U |
| #define PRCM_AON_RVMTRIMCTL_SELOVRVMLTRIM 0x00000400U |
| #define PRCM_AON_RVMTRIMCTL_SELOVRVMLTRIM_M 0x00000400U |
| #define PRCM_AON_RVMTRIMCTL_SELOVRVMLTRIM_S 10U |
| #define PRCM_AON_RVMTRIMCTL_RVMRSTCAUSCLR 0x80000000U |
| #define PRCM_AON_RVMTRIMCTL_RVMRSTCAUSCLR_M 0x80000000U |
| #define PRCM_AON_RVMTRIMCTL_RVMRSTCAUSCLR_S 31U |
| #define PRCM_AON_RVMTRIMPMUSTA_RVMH_W 6U |
| #define PRCM_AON_RVMTRIMPMUSTA_RVMH_M 0x0000003FU |
| #define PRCM_AON_RVMTRIMPMUSTA_RVMH_S 0U |
| #define PRCM_AON_RVMTRIMPMUSTA_FSRVMH_W 6U |
| #define PRCM_AON_RVMTRIMPMUSTA_FSRVMH_M 0x00000FC0U |
| #define PRCM_AON_RVMTRIMPMUSTA_FSRVMH_S 6U |
| #define PRCM_AON_RVMTRIMPMUSTA_RVML_W 7U |
| #define PRCM_AON_RVMTRIMPMUSTA_RVML_M 0x0007F000U |
| #define PRCM_AON_RVMTRIMPMUSTA_RVML_S 12U |
| #define PRCM_AON_RVMTRIMPMUSTA_FSRVML_W 7U |
| #define PRCM_AON_RVMTRIMPMUSTA_FSRVML_M 0x03F80000U |
| #define PRCM_AON_RVMTRIMPMUSTA_FSRVML_S 19U |
| #define PRCM_AON_RVMTRIMPMUSTA_FSMRVML_W 2U |
| #define PRCM_AON_RVMTRIMPMUSTA_FSMRVML_M 0x0C000000U |
| #define PRCM_AON_RVMTRIMPMUSTA_FSMRVML_S 26U |
| #define PRCM_AON_RVMLTRIMCTL_OVOPP1_W 7U |
| #define PRCM_AON_RVMLTRIMCTL_OVOPP1_M 0x0000007FU |
| #define PRCM_AON_RVMLTRIMCTL_OVOPP1_S 0U |
| #define PRCM_AON_RVMLTRIMCTL_OVSLP_W 7U |
| #define PRCM_AON_RVMLTRIMCTL_OVSLP_M 0x00003F80U |
| #define PRCM_AON_RVMLTRIMCTL_OVSLP_S 7U |
| #define PRCM_AON_I2VCIRCITCTL_FS_W 7U |
| #define PRCM_AON_I2VCIRCITCTL_FS_M 0x0000007FU |
| #define PRCM_AON_I2VCIRCITCTL_FS_S 0U |
| #define PRCM_AON_I2VCIRCITCTL_SELOV 0x00000080U |
| #define PRCM_AON_I2VCIRCITCTL_SELOV_M 0x00000080U |
| #define PRCM_AON_I2VCIRCITCTL_SELOV_S 7U |
| #define PRCM_AON_I2VCIRCITCTL_OV_W 7U |
| #define PRCM_AON_I2VCIRCITCTL_OV_M 0x00007F00U |
| #define PRCM_AON_I2VCIRCITCTL_OV_S 8U |
| #define PRCM_AON_PMBISTCTL_VAL_W 4U |
| #define PRCM_AON_PMBISTCTL_VAL_M 0x0000000FU |
| #define PRCM_AON_PMBISTCTL_VAL_S 0U |
| #define PRCM_AON_PMBISTCTL_BM 0x00000010U |
| #define PRCM_AON_PMBISTCTL_BM_M 0x00000010U |
| #define PRCM_AON_PMBISTCTL_BM_S 4U |
| #define PRCM_AON_PMBISTCTL_EN 0x00000020U |
| #define PRCM_AON_PMBISTCTL_EN_M 0x00000020U |
| #define PRCM_AON_PMBISTCTL_EN_S 5U |
| #define PRCM_AON_PMBISTCTL_PORCMPBMEN 0x00000040U |
| #define PRCM_AON_PMBISTCTL_PORCMPBMEN_M 0x00000040U |
| #define PRCM_AON_PMBISTCTL_PORCMPBMEN_S 6U |
| #define PRCM_AON_PMBISTCTL_VTDETCMPBMEN 0x00000080U |
| #define PRCM_AON_PMBISTCTL_VTDETCMPBMEN_M 0x00000080U |
| #define PRCM_AON_PMBISTCTL_VTDETCMPBMEN_S 7U |
| #define PRCM_AON_PMUCOMP_BOD 0x00000001U |
| #define PRCM_AON_PMUCOMP_BOD_M 0x00000001U |
| #define PRCM_AON_PMUCOMP_BOD_S 0U |
| #define PRCM_AON_PMUCOMP_RVML 0x00000002U |
| #define PRCM_AON_PMUCOMP_RVML_M 0x00000002U |
| #define PRCM_AON_PMUCOMP_RVML_S 1U |
| #define PRCM_AON_PMUCOMP_RVMH 0x00000004U |
| #define PRCM_AON_PMUCOMP_RVMH_M 0x00000004U |
| #define PRCM_AON_PMUCOMP_RVMH_S 2U |
| #define PRCM_AON_ABGRTRIM_OV_W 4U |
| #define PRCM_AON_ABGRTRIM_OV_M 0x0000000FU |
| #define PRCM_AON_ABGRTRIM_OV_S 0U |
| #define PRCM_AON_ABGRTRIM_SEL 0x00000020U |
| #define PRCM_AON_ABGRTRIM_SEL_M 0x00000020U |
| #define PRCM_AON_ABGRTRIM_SEL_S 5U |
| #define PRCM_AON_ABGRTRIM_FS_W 4U |
| #define PRCM_AON_ABGRTRIM_FS_M 0x00000F00U |
| #define PRCM_AON_ABGRTRIM_FS_S 8U |
| #define PRCM_AON_ABGTRIMTMP_OV_W 6U |
| #define PRCM_AON_ABGTRIMTMP_OV_M 0x0000003FU |
| #define PRCM_AON_ABGTRIMTMP_OV_S 0U |
| #define PRCM_AON_ABGTRIMTMP_SEL 0x00000100U |
| #define PRCM_AON_ABGTRIMTMP_SEL_M 0x00000100U |
| #define PRCM_AON_ABGTRIMTMP_SEL_S 8U |
| #define PRCM_AON_ABGTRIMTMP_FS_W 5U |
| #define PRCM_AON_ABGTRIMTMP_FS_M 0x00003E00U |
| #define PRCM_AON_ABGTRIMTMP_FS_S 9U |
| #define PRCM_AON_CKMSPARE_LDOREG0_W 2U |
| #define PRCM_AON_CKMSPARE_LDOREG0_M 0x00000003U |
| #define PRCM_AON_CKMSPARE_LDOREG0_S 0U |
| #define PRCM_AON_CKMSPARE_OSCREG0_W 2U |
| #define PRCM_AON_CKMSPARE_OSCREG0_M 0x0000000CU |
| #define PRCM_AON_CKMSPARE_OSCREG0_S 2U |
| #define PRCM_AON_ABGPEN_FFSM 0x00000001U |
| #define PRCM_AON_ABGPEN_FFSM_M 0x00000001U |
| #define PRCM_AON_ABGPEN_FFSM_S 0U |
| #define PRCM_AON_ABGPEN_OV 0x00000002U |
| #define PRCM_AON_ABGPEN_OV_M 0x00000002U |
| #define PRCM_AON_ABGPEN_OV_S 1U |
| #define PRCM_AON_ABGPEN_SELOV 0x00000004U |
| #define PRCM_AON_ABGPEN_SELOV_M 0x00000004U |
| #define PRCM_AON_ABGPEN_SELOV_S 2U |
| #define PRCM_AON_ABGPEN_SELOVFC 0x00000008U |
| #define PRCM_AON_ABGPEN_SELOVFC_M 0x00000008U |
| #define PRCM_AON_ABGPEN_SELOVFC_S 3U |
| #define PRCM_AON_ABGPEN_OVFC 0x00000010U |
| #define PRCM_AON_ABGPEN_OVFC_M 0x00000010U |
| #define PRCM_AON_ABGPEN_OVFC_S 4U |
| #define PRCM_AON_ABGPEN_FFSMFC 0x00000020U |
| #define PRCM_AON_ABGPEN_FFSMFC_M 0x00000020U |
| #define PRCM_AON_ABGPEN_FFSMFC_S 5U |
| #define PRCM_AON_ABGPEN_FILTTRIM_W 4U |
| #define PRCM_AON_ABGPEN_FILTTRIM_M 0x00001E00U |
| #define PRCM_AON_ABGPEN_FILTTRIM_S 9U |
| #define PRCM_AON_ABGPEN_SELOVV2I 0x00002000U |
| #define PRCM_AON_ABGPEN_SELOVV2I_M 0x00002000U |
| #define PRCM_AON_ABGPEN_SELOVV2I_S 13U |
| #define PRCM_AON_ABGPEN_OVV2I 0x00004000U |
| #define PRCM_AON_ABGPEN_OVV2I_M 0x00004000U |
| #define PRCM_AON_ABGPEN_OVV2I_S 14U |
| #define PRCM_AON_ABGPEN_FFSMV2I 0x00008000U |
| #define PRCM_AON_ABGPEN_FFSMV2I_M 0x00008000U |
| #define PRCM_AON_ABGPEN_FFSMV2I_S 15U |
| #define PRCM_AON_ABGPTRIMMAG_OV_W 5U |
| #define PRCM_AON_ABGPTRIMMAG_OV_M 0x0000001FU |
| #define PRCM_AON_ABGPTRIMMAG_OV_S 0U |
| #define PRCM_AON_ABGPTRIMMAG_SELOV 0x00000040U |
| #define PRCM_AON_ABGPTRIMMAG_SELOV_M 0x00000040U |
| #define PRCM_AON_ABGPTRIMMAG_SELOV_S 6U |
| #define PRCM_AON_ABGPTRIMMAG_FS_W 5U |
| #define PRCM_AON_ABGPTRIMMAG_FS_M 0x00001F00U |
| #define PRCM_AON_ABGPTRIMMAG_FS_S 8U |
| #define PRCM_AON_FCLKREQABGPDLY_VAL_W 8U |
| #define PRCM_AON_FCLKREQABGPDLY_VAL_M 0x000007F8U |
| #define PRCM_AON_FCLKREQABGPDLY_VAL_S 3U |
| #define PRCM_AON_FCLKLDODLY_SLICER_W 4U |
| #define PRCM_AON_FCLKLDODLY_SLICER_M 0x0000000FU |
| #define PRCM_AON_FCLKLDODLY_SLICER_S 0U |
| #define PRCM_AON_FCLKLDODLY_STRTUP_W 2U |
| #define PRCM_AON_FCLKLDODLY_STRTUP_M 0x00030000U |
| #define PRCM_AON_FCLKLDODLY_STRTUP_S 16U |
| #define PRCM_AON_FCBGSETDLY_VAL_W 4U |
| #define PRCM_AON_FCBGSETDLY_VAL_M 0x0000000FU |
| #define PRCM_AON_FCBGSETDLY_VAL_S 0U |
| #define PRCM_AON_FCLKABGPFCDLY_VAL_W 5U |
| #define PRCM_AON_FCLKABGPFCDLY_VAL_M 0x0000001FU |
| #define PRCM_AON_FCLKABGPFCDLY_VAL_S 0U |
| #define PRCM_AON_ABGPDISDLY_VAL_W 4U |
| #define PRCM_AON_ABGPDISDLY_VAL_M 0x0000000FU |
| #define PRCM_AON_ABGPDISDLY_VAL_S 0U |
| #define PRCM_AON_ABGPTSTMOD_VAL_W 2U |
| #define PRCM_AON_ABGPTSTMOD_VAL_M 0x00000003U |
| #define PRCM_AON_ABGPTSTMOD_VAL_S 0U |
| #define PRCM_AON_PRIMSLDOILOD_VAL_W 2U |
| #define PRCM_AON_PRIMSLDOILOD_VAL_M 0x00000003U |
| #define PRCM_AON_PRIMSLDOILOD_VAL_S 0U |
| #define PRCM_AON_PRIMSLIC_FSMEN 0x00000001U |
| #define PRCM_AON_PRIMSLIC_FSMEN_M 0x00000001U |
| #define PRCM_AON_PRIMSLIC_FSMEN_S 0U |
| #define PRCM_AON_PRIMSLIC_OVEN 0x00000002U |
| #define PRCM_AON_PRIMSLIC_OVEN_M 0x00000002U |
| #define PRCM_AON_PRIMSLIC_OVEN_S 1U |
| #define PRCM_AON_PRIMSLIC_SELOVEN 0x00000004U |
| #define PRCM_AON_PRIMSLIC_SELOVEN_M 0x00000004U |
| #define PRCM_AON_PRIMSLIC_SELOVEN_S 2U |
| #define PRCM_AON_PRIMSLIC_BYPASS 0x00000010U |
| #define PRCM_AON_PRIMSLIC_BYPASS_M 0x00000010U |
| #define PRCM_AON_PRIMSLIC_BYPASS_S 4U |
| #define PRCM_AON_PRIMSLIC_CMLDOPPUDNCTL 0x00000100U |
| #define PRCM_AON_PRIMSLIC_CMLDOPPUDNCTL_M 0x00000100U |
| #define PRCM_AON_PRIMSLIC_CMLDOPPUDNCTL_S 8U |
| #define PRCM_AON_PRIMSLIC_CMLDOSTRTUMOD2 0x00000200U |
| #define PRCM_AON_PRIMSLIC_CMLDOSTRTUMOD2_M 0x00000200U |
| #define PRCM_AON_PRIMSLIC_CMLDOSTRTUMOD2_S 9U |
| #define PRCM_AON_PRIMSLIC_CMLDOSTRTUMOD1 0x00000400U |
| #define PRCM_AON_PRIMSLIC_CMLDOSTRTUMOD1_M 0x00000400U |
| #define PRCM_AON_PRIMSLIC_CMLDOSTRTUMOD1_S 10U |
| #define PRCM_AON_PRIMSLIC_FFSMCMBIEN 0x00000800U |
| #define PRCM_AON_PRIMSLIC_FFSMCMBIEN_M 0x00000800U |
| #define PRCM_AON_PRIMSLIC_FFSMCMBIEN_S 11U |
| #define PRCM_AON_PRIMSLIC_OVFCLKMBIEN 0x00001000U |
| #define PRCM_AON_PRIMSLIC_OVFCLKMBIEN_M 0x00001000U |
| #define PRCM_AON_PRIMSLIC_OVFCLKMBIEN_S 12U |
| #define PRCM_AON_PRIMSLIC_SELOVFCLKMBIEN 0x00002000U |
| #define PRCM_AON_PRIMSLIC_SELOVFCLKMBIEN_M 0x00002000U |
| #define PRCM_AON_PRIMSLIC_SELOVFCLKMBIEN_S 13U |
| #define PRCM_AON_FCLKDISHFXTDLY_VAL_W 4U |
| #define PRCM_AON_FCLKDISHFXTDLY_VAL_M 0x0000000FU |
| #define PRCM_AON_FCLKDISHFXTDLY_VAL_S 0U |
| #define PRCM_AON_CLKSLIEN_FSM 0x00000001U |
| #define PRCM_AON_CLKSLIEN_FSM_M 0x00000001U |
| #define PRCM_AON_CLKSLIEN_FSM_S 0U |
| #define PRCM_AON_CLKSLIEN_OV 0x00000002U |
| #define PRCM_AON_CLKSLIEN_OV_M 0x00000002U |
| #define PRCM_AON_CLKSLIEN_OV_S 1U |
| #define PRCM_AON_CLKSLIEN_SELOV 0x00000004U |
| #define PRCM_AON_CLKSLIEN_SELOV_M 0x00000004U |
| #define PRCM_AON_CLKSLIEN_SELOV_S 2U |
| #define PRCM_AON_CLKSLIITRIM_OV_W 3U |
| #define PRCM_AON_CLKSLIITRIM_OV_M 0x00000007U |
| #define PRCM_AON_CLKSLIITRIM_OV_S 0U |
| #define PRCM_AON_CLKSLIITRIM_SELOV 0x00000008U |
| #define PRCM_AON_CLKSLIITRIM_SELOV_M 0x00000008U |
| #define PRCM_AON_CLKSLIITRIM_SELOV_S 3U |
| #define PRCM_AON_CLKSLIITRIM_FS_W 3U |
| #define PRCM_AON_CLKSLIITRIM_FS_M 0x00000070U |
| #define PRCM_AON_CLKSLIITRIM_FS_S 4U |
| #define PRCM_AON_PRIMSLIRTRIM_OV_W 5U |
| #define PRCM_AON_PRIMSLIRTRIM_OV_M 0x0000001FU |
| #define PRCM_AON_PRIMSLIRTRIM_OV_S 0U |
| #define PRCM_AON_PRIMSLIRTRIM_SELOV 0x00000020U |
| #define PRCM_AON_PRIMSLIRTRIM_SELOV_M 0x00000020U |
| #define PRCM_AON_PRIMSLIRTRIM_SELOV_S 5U |
| #define PRCM_AON_PRIMSLIRTRIM_FS_W 5U |
| #define PRCM_AON_PRIMSLIRTRIM_FS_M 0x000007C0U |
| #define PRCM_AON_PRIMSLIRTRIM_FS_S 6U |
| #define PRCM_AON_PRIMOSC_SELBISTRT 0x00000001U |
| #define PRCM_AON_PRIMOSC_SELBISTRT_M 0x00000001U |
| #define PRCM_AON_PRIMOSC_SELBISTRT_S 0U |
| #define PRCM_AON_PRIMOSC_OVBISTRT 0x00000002U |
| #define PRCM_AON_PRIMOSC_OVBISTRT_M 0x00000002U |
| #define PRCM_AON_PRIMOSC_OVBISTRT_S 1U |
| #define PRCM_AON_PRIMOSC_BISTRT 0x00000004U |
| #define PRCM_AON_PRIMOSC_BISTRT_M 0x00000004U |
| #define PRCM_AON_PRIMOSC_BISTRT_S 2U |
| #define PRCM_AON_PRIMOSC_CLDOVOSCLEN 0x00000008U |
| #define PRCM_AON_PRIMOSC_CLDOVOSCLEN_M 0x00000008U |
| #define PRCM_AON_PRIMOSC_CLDOVOSCLEN_S 3U |
| #define PRCM_AON_OSCEN_FSM 0x00000001U |
| #define PRCM_AON_OSCEN_FSM_M 0x00000001U |
| #define PRCM_AON_OSCEN_FSM_S 0U |
| #define PRCM_AON_OSCEN_OV 0x00000002U |
| #define PRCM_AON_OSCEN_OV_M 0x00000002U |
| #define PRCM_AON_OSCEN_OV_S 1U |
| #define PRCM_AON_OSCEN_SELOV 0x00000004U |
| #define PRCM_AON_OSCEN_SELOV_M 0x00000004U |
| #define PRCM_AON_OSCEN_SELOV_S 2U |
| #define PRCM_AON_OSCEN_ISNEEDED 0x00000008U |
| #define PRCM_AON_OSCEN_ISNEEDED_M 0x00000008U |
| #define PRCM_AON_OSCEN_ISNEEDED_S 3U |
| #define PRCM_AON_OSCEN_XTSNSPU 0x00000010U |
| #define PRCM_AON_OSCEN_XTSNSPU_M 0x00000010U |
| #define PRCM_AON_OSCEN_XTSNSPU_S 4U |
| #define PRCM_AON_OSCEN_CMXTMODSNS 0x00000200U |
| #define PRCM_AON_OSCEN_CMXTMODSNS_M 0x00000200U |
| #define PRCM_AON_OSCEN_CMXTMODSNS_S 9U |
| #define PRCM_AON_OSCITRIM_SELOV 0x00000001U |
| #define PRCM_AON_OSCITRIM_SELOV_M 0x00000001U |
| #define PRCM_AON_OSCITRIM_SELOV_S 0U |
| #define PRCM_AON_OSCITRIM_FSNORMGN_W 6U |
| #define PRCM_AON_OSCITRIM_FSNORMGN_M 0x0000007EU |
| #define PRCM_AON_OSCITRIM_FSNORMGN_S 1U |
| #define PRCM_AON_OSCITRIM_SELOVOSCGN 0x00000080U |
| #define PRCM_AON_OSCITRIM_SELOVOSCGN_M 0x00000080U |
| #define PRCM_AON_OSCITRIM_SELOVOSCGN_S 7U |
| #define PRCM_AON_OSCITRIM_FSM_W 6U |
| #define PRCM_AON_OSCITRIM_FSM_M 0x00003F00U |
| #define PRCM_AON_OSCITRIM_FSM_S 8U |
| #define PRCM_AON_OSCBSTDLY_VAL_W 7U |
| #define PRCM_AON_OSCBSTDLY_VAL_M 0x000003F8U |
| #define PRCM_AON_OSCBSTDLY_VAL_S 3U |
| #define PRCM_AON_OSCNORMDLY_VAL_W 6U |
| #define PRCM_AON_OSCNORMDLY_VAL_M 0x000001F8U |
| #define PRCM_AON_OSCNORMDLY_VAL_S 3U |
| #define PRCM_AON_CRDIGBUFCTRL_OVCRBUFEN 0x00000001U |
| #define PRCM_AON_CRDIGBUFCTRL_OVCRBUFEN_M 0x00000001U |
| #define PRCM_AON_CRDIGBUFCTRL_OVCRBUFEN_S 0U |
| #define PRCM_AON_CRDIGBUFCTRL_SELOVCRBUFEN 0x00000002U |
| #define PRCM_AON_CRDIGBUFCTRL_SELOVCRBUFEN_M 0x00000002U |
| #define PRCM_AON_CRDIGBUFCTRL_SELOVCRBUFEN_S 1U |
| #define PRCM_AON_CRDIGBUFCTRL_FSMCRBUFEN 0x00000004U |
| #define PRCM_AON_CRDIGBUFCTRL_FSMCRBUFEN_M 0x00000004U |
| #define PRCM_AON_CRDIGBUFCTRL_FSMCRBUFEN_S 2U |
| #define PRCM_AON_CRDIGBUFCTRL_OVDBUFEN 0x00000008U |
| #define PRCM_AON_CRDIGBUFCTRL_OVDBUFEN_M 0x00000008U |
| #define PRCM_AON_CRDIGBUFCTRL_OVDBUFEN_S 3U |
| #define PRCM_AON_CRDIGBUFCTRL_SELOVDBUFEN 0x00000010U |
| #define PRCM_AON_CRDIGBUFCTRL_SELOVDBUFEN_M 0x00000010U |
| #define PRCM_AON_CRDIGBUFCTRL_SELOVDBUFEN_S 4U |
| #define PRCM_AON_CRDIGBUFCTRL_FSMDBUFEN 0x00000020U |
| #define PRCM_AON_CRDIGBUFCTRL_FSMDBUFEN_M 0x00000020U |
| #define PRCM_AON_CRDIGBUFCTRL_FSMDBUFEN_S 5U |
| #define PRCM_AON_OSCDLY_STRTCR_W 2U |
| #define PRCM_AON_OSCDLY_STRTCR_M 0x00000003U |
| #define PRCM_AON_OSCDLY_STRTCR_S 0U |
| #define PRCM_AON_OSCDLY_DISSLIBI_W 2U |
| #define PRCM_AON_OSCDLY_DISSLIBI_M 0x0000000CU |
| #define PRCM_AON_OSCDLY_DISSLIBI_S 2U |
| #define PRCM_AON_STRUCMLDOCTL_SELOV 0x00000001U |
| #define PRCM_AON_STRUCMLDOCTL_SELOV_M 0x00000001U |
| #define PRCM_AON_STRUCMLDOCTL_SELOV_S 0U |
| #define PRCM_AON_STRUCMLDOCTL_OV 0x00000002U |
| #define PRCM_AON_STRUCMLDOCTL_OV_M 0x00000002U |
| #define PRCM_AON_STRUCMLDOCTL_OV_S 1U |
| #define PRCM_AON_STRUCMLDOCTL_FSM 0x00000004U |
| #define PRCM_AON_STRUCMLDOCTL_FSM_M 0x00000004U |
| #define PRCM_AON_STRUCMLDOCTL_FSM_S 2U |
| #define PRCM_AON_SHDOWFCLKCTL_LDOVOUT_W 5U |
| #define PRCM_AON_SHDOWFCLKCTL_LDOVOUT_M 0x0000001FU |
| #define PRCM_AON_SHDOWFCLKCTL_LDOVOUT_S 0U |
| #define PRCM_AON_SHDOWFCLKCTL_HPMODEN 0x00000020U |
| #define PRCM_AON_SHDOWFCLKCTL_HPMODEN_M 0x00000020U |
| #define PRCM_AON_SHDOWFCLKCTL_HPMODEN_S 5U |
| #define PRCM_AON_SLIBIBYPCTL_VAL_W 3U |
| #define PRCM_AON_SLIBIBYPCTL_VAL_M 0x00000007U |
| #define PRCM_AON_SLIBIBYPCTL_VAL_S 0U |
| #define PRCM_AON_ECLKREQDLY_VAL_W 8U |
| #define PRCM_AON_ECLKREQDLY_VAL_M 0x000007F8U |
| #define PRCM_AON_ECLKREQDLY_VAL_S 3U |
| #define PRCM_AON_OSCGN_BOOST_W 6U |
| #define PRCM_AON_OSCGN_BOOST_M 0x0000003FU |
| #define PRCM_AON_OSCGN_BOOST_S 0U |
| #define PRCM_AON_OSCGN_OV_NORM_W 6U |
| #define PRCM_AON_OSCGN_OV_NORM_M 0x00000FC0U |
| #define PRCM_AON_OSCGN_OV_NORM_S 6U |
| #define PRCM_AON_PRIMENTMUX_VAL_W 3U |
| #define PRCM_AON_PRIMENTMUX_VAL_M 0x00000007U |
| #define PRCM_AON_PRIMENTMUX_VAL_S 0U |
| #define PRCM_AON_PRIMEN_OVDIV4 0x00000001U |
| #define PRCM_AON_PRIMEN_OVDIV4_M 0x00000001U |
| #define PRCM_AON_PRIMEN_OVDIV4_S 0U |
| #define PRCM_AON_PRIMEN_OVDIV2 0x00000002U |
| #define PRCM_AON_PRIMEN_OVDIV2_M 0x00000002U |
| #define PRCM_AON_PRIMEN_OVDIV2_S 1U |
| #define PRCM_AON_PUSHPULEN_VAL 0x00000001U |
| #define PRCM_AON_PUSHPULEN_VAL_M 0x00000001U |
| #define PRCM_AON_PUSHPULEN_VAL_S 0U |
| #define PRCM_AON_FCLKDISCODLY_VAL_W 4U |
| #define PRCM_AON_FCLKDISCODLY_VAL_M 0x0000000FU |
| #define PRCM_AON_FCLKDISCODLY_VAL_S 0U |
| #define PRCM_AON_FCLKVLDEXNDLY_VAL_W 3U |
| #define PRCM_AON_FCLKVLDEXNDLY_VAL_M 0x00000007U |
| #define PRCM_AON_FCLKVLDEXNDLY_VAL_S 0U |
| #define PRCM_AON_PRIMEXITSLPDLY_VAL_W 3U |
| #define PRCM_AON_PRIMEXITSLPDLY_VAL_M 0x00000007U |
| #define PRCM_AON_PRIMEXITSLPDLY_VAL_S 0U |
| #define PRCM_AON_FCLK_SELOVVAL 0x00000010U |
| #define PRCM_AON_FCLK_SELOVVAL_M 0x00000010U |
| #define PRCM_AON_FCLK_SELOVVAL_S 4U |
| #define PRCM_AON_FCLK_OVVAL 0x00000020U |
| #define PRCM_AON_FCLK_OVVAL_M 0x00000020U |
| #define PRCM_AON_FCLK_OVVAL_S 5U |
| #define PRCM_AON_FCLK_VAL 0x00000040U |
| #define PRCM_AON_FCLK_VAL_M 0x00000040U |
| #define PRCM_AON_FCLK_VAL_S 6U |
| #define PRCM_AON_FCLK_SELOVREQOUT 0x00000080U |
| #define PRCM_AON_FCLK_SELOVREQOUT_M 0x00000080U |
| #define PRCM_AON_FCLK_SELOVREQOUT_S 7U |
| #define PRCM_AON_FCLK_OVREQOUT 0x00000100U |
| #define PRCM_AON_FCLK_OVREQOUT_M 0x00000100U |
| #define PRCM_AON_FCLK_OVREQOUT_S 8U |
| #define PRCM_AON_FCLK_SELOVREQGZ 0x00000200U |
| #define PRCM_AON_FCLK_SELOVREQGZ_M 0x00000200U |
| #define PRCM_AON_FCLK_SELOVREQGZ_S 9U |
| #define PRCM_AON_FCLK_OVREQGZ 0x00000400U |
| #define PRCM_AON_FCLK_OVREQGZ_M 0x00000400U |
| #define PRCM_AON_FCLK_OVREQGZ_S 10U |
| #define PRCM_AON_FCLK_FSMREQIN 0x00000800U |
| #define PRCM_AON_FCLK_FSMREQIN_M 0x00000800U |
| #define PRCM_AON_FCLK_FSMREQIN_S 11U |
| #define PRCM_AON_FCLKDURDLY_STOP_W 2U |
| #define PRCM_AON_FCLKDURDLY_STOP_M 0x00000003U |
| #define PRCM_AON_FCLKDURDLY_STOP_S 0U |
| #define PRCM_AON_FREFDET_SELOV 0x00000001U |
| #define PRCM_AON_FREFDET_SELOV_M 0x00000001U |
| #define PRCM_AON_FREFDET_SELOV_S 0U |
| #define PRCM_AON_FREFDET_OV_W 3U |
| #define PRCM_AON_FREFDET_OV_M 0x0000000EU |
| #define PRCM_AON_FREFDET_OV_S 1U |
| #define PRCM_AON_FCLKFSMSOPOV_SEL 0x00000001U |
| #define PRCM_AON_FCLKFSMSOPOV_SEL_M 0x00000001U |
| #define PRCM_AON_FCLKFSMSOPOV_SEL_S 0U |
| #define PRCM_AON_PMSRNWCAL_EN 0x00000001U |
| #define PRCM_AON_PMSRNWCAL_EN_M 0x00000001U |
| #define PRCM_AON_PMSRNWCAL_EN_S 0U |
| #define PRCM_AON_PMSTEST_LDTRIM_W 3U |
| #define PRCM_AON_PMSTEST_LDTRIM_M 0x00000007U |
| #define PRCM_AON_PMSTEST_LDTRIM_S 0U |
| #define PRCM_AON_PMSTEST_ENTMUX 0x00000100U |
| #define PRCM_AON_PMSTEST_ENTMUX_M 0x00000100U |
| #define PRCM_AON_PMSTEST_ENTMUX_S 8U |
| #define PRCM_AON_PMSTMUXCTL_VAL_W 32U |
| #define PRCM_AON_PMSTMUXCTL_VAL_M 0xFFFFFFFFU |
| #define PRCM_AON_PMSTMUXCTL_VAL_S 0U |
| #define PRCM_AON_PMSSPAR0_DIGLDO_W 16U |
| #define PRCM_AON_PMSSPAR0_DIGLDO_M 0x0000FFFFU |
| #define PRCM_AON_PMSSPAR0_DIGLDO_S 0U |
| #define PRCM_AON_PMSSPAR1_RCOSC_W 8U |
| #define PRCM_AON_PMSSPAR1_RCOSC_M 0x000000FFU |
| #define PRCM_AON_PMSSPAR1_RCOSC_S 0U |
| #define PRCM_AON_PMSSPAR1_DIGBG_W 8U |
| #define PRCM_AON_PMSSPAR1_DIGBG_M 0x0000FF00U |
| #define PRCM_AON_PMSSPAR1_DIGBG_S 8U |
| #define PRCM_AON_PMSSPAR1_DIGKA_W 8U |
| #define PRCM_AON_PMSSPAR1_DIGKA_M 0xFF000000U |
| #define PRCM_AON_PMSSPAR1_DIGKA_S 24U |
| #define PRCM_AON_PMSSPAR2_VAL_W 16U |
| #define PRCM_AON_PMSSPAR2_VAL_M 0x0000FFFFU |
| #define PRCM_AON_PMSSPAR2_VAL_S 0U |
| #define PRCM_AON_PMSSPAR2_OUT_W 16U |
| #define PRCM_AON_PMSSPAR2_OUT_M 0xFFFF0000U |
| #define PRCM_AON_PMSSPAR2_OUT_S 16U |
| #define PRCM_AON_PMSCTLSTA_STA_W 8U |
| #define PRCM_AON_PMSCTLSTA_STA_M 0x000000FFU |
| #define PRCM_AON_PMSCTLSTA_STA_S 0U |
| #define PRCM_AON_PMSSPARIN_REG0_W 16U |
| #define PRCM_AON_PMSSPARIN_REG0_M 0x0000FFFFU |
| #define PRCM_AON_PMSSPARIN_REG0_S 0U |
| #define PRCM_AON_PMSSPARIN_GEBM 0x04000000U |
| #define PRCM_AON_PMSSPARIN_GEBM_M 0x04000000U |
| #define PRCM_AON_PMSSPARIN_GEBM_S 26U |
| #define PRCM_AON_PMSSPARIN_REG1_W 5U |
| #define PRCM_AON_PMSSPARIN_REG1_M 0xF8000000U |
| #define PRCM_AON_PMSSPARIN_REG1_S 27U |
| #define PRCM_AON_PMSPORTSTCTL_VAL_W 8U |
| #define PRCM_AON_PMSPORTSTCTL_VAL_M 0x000000FFU |
| #define PRCM_AON_PMSPORTSTCTL_VAL_S 0U |
| #define PRCM_AON_PMSSPAR3_INT_W 4U |
| #define PRCM_AON_PMSSPAR3_INT_M 0x0000003CU |
| #define PRCM_AON_PMSSPAR3_INT_S 2U |
| #define PRCM_AON_PMSSPAR3_SRAMKA_W 7U |
| #define PRCM_AON_PMSSPAR3_SRAMKA_M 0x00FE0000U |
| #define PRCM_AON_PMSSPAR3_SRAMKA_S 17U |
| #define PRCM_AON_PMSSPAR4_PMBIST_W 16U |
| #define PRCM_AON_PMSSPAR4_PMBIST_M 0x0000FFFFU |
| #define PRCM_AON_PMSSPAR4_PMBIST_S 0U |
| #define PRCM_AON_PMSDLY_GTS1_W 2U |
| #define PRCM_AON_PMSDLY_GTS1_M 0x00000003U |
| #define PRCM_AON_PMSDLY_GTS1_S 0U |
| #define PRCM_AON_PMSDLY_GTS2_W 2U |
| #define PRCM_AON_PMSDLY_GTS2_M 0x0000000CU |
| #define PRCM_AON_PMSDLY_GTS2_S 2U |
| #define PRCM_AON_PMSDLY_GTS3_W 2U |
| #define PRCM_AON_PMSDLY_GTS3_M 0x00000030U |
| #define PRCM_AON_PMSDLY_GTS3_S 4U |
| #define PRCM_AON_PMSDLY_GTS4_W 2U |
| #define PRCM_AON_PMSDLY_GTS4_M 0x000000C0U |
| #define PRCM_AON_PMSDLY_GTS4_S 6U |
| #define PRCM_AON_PMSDLY_GTS5_W 2U |
| #define PRCM_AON_PMSDLY_GTS5_M 0x00000300U |
| #define PRCM_AON_PMSDLY_GTS5_S 8U |
| #define PRCM_AON_PMSDLY_WU1_W 2U |
| #define PRCM_AON_PMSDLY_WU1_M 0x00003000U |
| #define PRCM_AON_PMSDLY_WU1_S 12U |
| #define PRCM_AON_PMSDLY_WU2_W 2U |
| #define PRCM_AON_PMSDLY_WU2_M 0x0000C000U |
| #define PRCM_AON_PMSDLY_WU2_S 14U |
| #define PRCM_AON_PMSDLY_WU3_W 2U |
| #define PRCM_AON_PMSDLY_WU3_M 0x00030000U |
| #define PRCM_AON_PMSDLY_WU3_S 16U |
| #define PRCM_AON_PMSDLY_WU4_W 2U |
| #define PRCM_AON_PMSDLY_WU4_M 0x000C0000U |
| #define PRCM_AON_PMSDLY_WU4_S 18U |
| #define PRCM_AON_PMSDLY_WU5_W 4U |
| #define PRCM_AON_PMSDLY_WU5_M 0x00F00000U |
| #define PRCM_AON_PMSDLY_WU5_S 20U |
| #define PRCM_AON_BGDISBGENDLY_SLP_W 3U |
| #define PRCM_AON_BGDISBGENDLY_SLP_M 0x00000007U |
| #define PRCM_AON_BGDISBGENDLY_SLP_S 0U |
| #define PRCM_AON_SWENSWDISDLY_SLP_W 3U |
| #define PRCM_AON_SWENSWDISDLY_SLP_M 0x00000007U |
| #define PRCM_AON_SWENSWDISDLY_SLP_S 0U |
| #define PRCM_AON_BGENSWENDLY_SLP_W 2U |
| #define PRCM_AON_BGENSWENDLY_SLP_M 0x00000003U |
| #define PRCM_AON_BGENSWENDLY_SLP_S 0U |
| #define PRCM_AON_SWDISBGDISDLY_SLP_W 2U |
| #define PRCM_AON_SWDISBGDISDLY_SLP_M 0x00000003U |
| #define PRCM_AON_SWDISBGDISDLY_SLP_S 0U |
| #define PRCM_AON_ICGCTL_COEXCLKREQ 0x00000001U |
| #define PRCM_AON_ICGCTL_COEXCLKREQ_M 0x00000001U |
| #define PRCM_AON_ICGCTL_COEXCLKREQ_S 0U |
| #define PRCM_AON_ICGCTL_OCLACLKREQ 0x00000002U |
| #define PRCM_AON_ICGCTL_OCLACLKREQ_M 0x00000002U |
| #define PRCM_AON_ICGCTL_OCLACLKREQ_S 1U |
| #define PRCM_AON_ICGCTL_DBGSCLKREQ 0x00000004U |
| #define PRCM_AON_ICGCTL_DBGSCLKREQ_M 0x00000004U |
| #define PRCM_AON_ICGCTL_DBGSCLKREQ_S 2U |
| #define PRCM_AON_ICGCTL_SFSCLKREQ 0x00000008U |
| #define PRCM_AON_ICGCTL_SFSCLKREQ_M 0x00000008U |
| #define PRCM_AON_ICGCTL_SFSCLKREQ_S 3U |
| #define PRCM_AON_HALT_DBGSEL 0x00000001U |
| #define PRCM_AON_HALT_DBGSEL_M 0x00000001U |
| #define PRCM_AON_HALT_DBGSEL_S 0U |
| #define PRCM_AON_LOGICCA_PON0 0x00000001U |
| #define PRCM_AON_LOGICCA_PON0_M 0x00000001U |
| #define PRCM_AON_LOGICCA_PON0_S 0U |
| #define PRCM_AON_LOGICCA_PON1 0x00000002U |
| #define PRCM_AON_LOGICCA_PON1_M 0x00000002U |
| #define PRCM_AON_LOGICCA_PON1_S 1U |
| #define PRCM_AON_LOGICCA_PGOOD0 0x00000004U |
| #define PRCM_AON_LOGICCA_PGOOD0_M 0x00000004U |
| #define PRCM_AON_LOGICCA_PGOOD0_S 2U |
| #define PRCM_AON_LOGICCA_PGOOD1 0x00000008U |
| #define PRCM_AON_LOGICCA_PGOOD1_M 0x00000008U |
| #define PRCM_AON_LOGICCA_PGOOD1_S 3U |
| #define PRCM_AON_LOGICMEMSTA_CRAONIN_W 12U |
| #define PRCM_AON_LOGICMEMSTA_CRAONIN_M 0x00000FFFU |
| #define PRCM_AON_LOGICMEMSTA_CRAONIN_S 0U |
| #define PRCM_AON_LOGICMEMSTA_FLXAONIN_W 10U |
| #define PRCM_AON_LOGICMEMSTA_FLXAONIN_M 0x03FF0000U |
| #define PRCM_AON_LOGICMEMSTA_FLXAONIN_S 16U |
| #define PRCM_AON_LOGICMEMSTA_CRPONIN 0x04000000U |
| #define PRCM_AON_LOGICMEMSTA_CRPONIN_M 0x04000000U |
| #define PRCM_AON_LOGICMEMSTA_CRPONIN_S 26U |
| #define PRCM_AON_LOGICMEMSTA_AAONPONIN 0x08000000U |
| #define PRCM_AON_LOGICMEMSTA_AAONPONIN_M 0x08000000U |
| #define PRCM_AON_LOGICMEMSTA_AAONPONIN_S 27U |
| #define PRCM_AON_LOGICMEMSTA_CRISO 0x10000000U |
| #define PRCM_AON_LOGICMEMSTA_CRISO_M 0x10000000U |
| #define PRCM_AON_LOGICMEMSTA_CRISO_S 28U |
| #define PRCM_AON_LOGICMEMSTA_AAONISO 0x20000000U |
| #define PRCM_AON_LOGICMEMSTA_AAONISO_M 0x20000000U |
| #define PRCM_AON_LOGICMEMSTA_AAONISO_S 29U |
| #define PRCM_AON_LOGICMEMSTA_MEMSPWRUDNE 0x40000000U |
| #define PRCM_AON_LOGICMEMSTA_MEMSPWRUDNE_M 0x40000000U |
| #define PRCM_AON_LOGICMEMSTA_MEMSPWRUDNE_S 30U |
| #define PRCM_AON_HOL_STA_W 5U |
| #define PRCM_AON_HOL_STA_M 0x0000001FU |
| #define PRCM_AON_HOL_STA_S 0U |
| #define PRCM_AON_PSCONHGEN_RTABHVEMOD_W 2U |
| #define PRCM_AON_PSCONHGEN_RTABHVEMOD_M 0x00000003U |
| #define PRCM_AON_PSCONHGEN_RTABHVEMOD_S 0U |
| #define PRCM_AON_PSCONHGEN_LOGUGTEBP 0x00000004U |
| #define PRCM_AON_PSCONHGEN_LOGUGTEBP_M 0x00000004U |
| #define PRCM_AON_PSCONHGEN_LOGUGTEBP_S 2U |
| #define PRCM_AON_IOPROCSBIT_OVPROGION_W 3U |
| #define PRCM_AON_IOPROCSBIT_OVPROGION_M 0x00000007U |
| #define PRCM_AON_IOPROCSBIT_OVPROGION_S 0U |
| #define PRCM_AON_IOPROCSBIT_SELOVPROGION 0x00000008U |
| #define PRCM_AON_IOPROCSBIT_SELOVPROGION_M 0x00000008U |
| #define PRCM_AON_IOPROCSBIT_SELOVPROGION_S 3U |
| #define PRCM_AON_IOPROCSBIT_OVPROGIOP_W 3U |
| #define PRCM_AON_IOPROCSBIT_OVPROGIOP_M 0x00000070U |
| #define PRCM_AON_IOPROCSBIT_OVPROGIOP_S 4U |
| #define PRCM_AON_IOPROCSBIT_SELOVPROGIOP 0x00000080U |
| #define PRCM_AON_IOPROCSBIT_SELOVPROGIOP_M 0x00000080U |
| #define PRCM_AON_IOPROCSBIT_SELOVPROGIOP_S 7U |
| #define PRCM_AON_IOPROCSBIT_FSPROGION_W 3U |
| #define PRCM_AON_IOPROCSBIT_FSPROGION_M 0x00000700U |
| #define PRCM_AON_IOPROCSBIT_FSPROGION_S 8U |
| #define PRCM_AON_IOPROCSBIT_FSPROGIOP_W 3U |
| #define PRCM_AON_IOPROCSBIT_FSPROGIOP_M 0x00007000U |
| #define PRCM_AON_IOPROCSBIT_FSPROGIOP_S 12U |
| #define PRCM_AON_SCLKCNTCTLCR_MOD_W 2U |
| #define PRCM_AON_SCLKCNTCTLCR_MOD_M 0x00000003U |
| #define PRCM_AON_SCLKCNTCTLCR_MOD_S 0U |
| #define PRCM_AON_SCLKCNTCTLCR_PER_W 7U |
| #define PRCM_AON_SCLKCNTCTLCR_PER_M 0x000001FCU |
| #define PRCM_AON_SCLKCNTCTLCR_PER_S 2U |
| #define PRCM_AON_SCLKCNTCTLCR_RESULT_W 15U |
| #define PRCM_AON_SCLKCNTCTLCR_RESULT_M 0x00FFFE00U |
| #define PRCM_AON_SCLKCNTCTLCR_RESULT_S 9U |
| #define PRCM_AON_SCLKCNTCTLCR_RESULTVAL 0x01000000U |
| #define PRCM_AON_SCLKCNTCTLCR_RESULTVAL_M 0x01000000U |
| #define PRCM_AON_SCLKCNTCTLCR_RESULTVAL_S 24U |
| #define PRCM_AON_STACR_FREQDETVAL_W 2U |
| #define PRCM_AON_STACR_FREQDETVAL_M 0x00000003U |
| #define PRCM_AON_STACR_FREQDETVAL_S 0U |
| #define PRCM_AON_STACR_BODCOMP 0x00000004U |
| #define PRCM_AON_STACR_BODCOMP_M 0x00000004U |
| #define PRCM_AON_STACR_BODCOMP_S 2U |
| #define PRCM_AON_STACR_RVMHCOMP 0x00000008U |
| #define PRCM_AON_STACR_RVMHCOMP_M 0x00000008U |
| #define PRCM_AON_STACR_RVMHCOMP_S 3U |
| #define PRCM_AON_STACR_RVMLCOMP 0x00000010U |
| #define PRCM_AON_STACR_RVMLCOMP_M 0x00000010U |
| #define PRCM_AON_STACR_RVMLCOMP_S 4U |
| #define PRCM_AON_STACR_PLOCK 0x00000020U |
| #define PRCM_AON_STACR_PLOCK_M 0x00000020U |
| #define PRCM_AON_STACR_PLOCK_S 5U |
| #define PRCM_AON_STACR_PLOCKMON 0x00000040U |
| #define PRCM_AON_STACR_PLOCKMON_M 0x00000040U |
| #define PRCM_AON_STACR_PLOCKMON_S 6U |
| #define PRCM_AON_AAONLOGCAPT_PON0 0x00000001U |
| #define PRCM_AON_AAONLOGCAPT_PON0_M 0x00000001U |
| #define PRCM_AON_AAONLOGCAPT_PON0_S 0U |
| #define PRCM_AON_AAONLOGCAPT_PON1 0x00000002U |
| #define PRCM_AON_AAONLOGCAPT_PON1_M 0x00000002U |
| #define PRCM_AON_AAONLOGCAPT_PON1_S 1U |
| #define PRCM_AON_AAONLOGCAPT_PGOOD0 0x00000004U |
| #define PRCM_AON_AAONLOGCAPT_PGOOD0_M 0x00000004U |
| #define PRCM_AON_AAONLOGCAPT_PGOOD0_S 2U |
| #define PRCM_AON_AAONLOGCAPT_PGOOD1 0x00000008U |
| #define PRCM_AON_AAONLOGCAPT_PGOOD1_M 0x00000008U |
| #define PRCM_AON_AAONLOGCAPT_PGOOD1_S 3U |
| #define PRCM_AON_HWDT_FSENOV 0x00000001U |
| #define PRCM_AON_HWDT_FSENOV_M 0x00000001U |
| #define PRCM_AON_HWDT_FSENOV_S 0U |
| #define PRCM_AON_SCLKCNTCR_FCLKDET_W 15U |
| #define PRCM_AON_SCLKCNTCR_FCLKDET_M 0x00007FFFU |
| #define PRCM_AON_SCLKCNTCR_FCLKDET_S 0U |
| #define PRCM_AON_SCLKCNTCR_PERVAL_W 7U |
| #define PRCM_AON_SCLKCNTCR_PERVAL_M 0x007F0000U |
| #define PRCM_AON_SCLKCNTCR_PERVAL_S 16U |
| #define PRCM_AON_SRAMLDO_EN 0x00000001U |
| #define PRCM_AON_SRAMLDO_EN_M 0x00000001U |
| #define PRCM_AON_SRAMLDO_EN_S 0U |
| #define PRCM_AON_SRAMLDO_OVEN 0x00000002U |
| #define PRCM_AON_SRAMLDO_OVEN_M 0x00000002U |
| #define PRCM_AON_SRAMLDO_OVEN_S 1U |
| #define PRCM_AON_SRAMLDO_SELOVEN 0x00000004U |
| #define PRCM_AON_SRAMLDO_SELOVEN_M 0x00000004U |
| #define PRCM_AON_SRAMLDO_SELOVEN_S 2U |
| #define PRCM_AON_SRAMLDO_WKUINRSHLIM 0x00000008U |
| #define PRCM_AON_SRAMLDO_WKUINRSHLIM_M 0x00000008U |
| #define PRCM_AON_SRAMLDO_WKUINRSHLIM_S 3U |
| #define PRCM_AON_SRAMLDO_ENINRSHLIM 0x00000010U |
| #define PRCM_AON_SRAMLDO_ENINRSHLIM_M 0x00000010U |
| #define PRCM_AON_SRAMLDO_ENINRSHLIM_S 4U |
| #define PRCM_AON_SRAMLDO_SELENINRSHLIM 0x00000020U |
| #define PRCM_AON_SRAMLDO_SELENINRSHLIM_M 0x00000020U |
| #define PRCM_AON_SRAMLDO_SELENINRSHLIM_S 5U |
| #define PRCM_AON_DBG_CLKSEL_W 3U |
| #define PRCM_AON_DBG_CLKSEL_M 0x00000007U |
| #define PRCM_AON_DBG_CLKSEL_S 0U |
| #define PRCM_AON_DBG_SHADWSET 0x00010000U |
| #define PRCM_AON_DBG_SHADWSET_M 0x00010000U |
| #define PRCM_AON_DBG_SHADWSET_S 16U |
| #define PRCM_AON_RSTOVCTL_SDIO 0x00000001U |
| #define PRCM_AON_RSTOVCTL_SDIO_M 0x00000001U |
| #define PRCM_AON_RSTOVCTL_SDIO_S 0U |
| #define PRCM_AON_RSTOVCTL_SDIOAO 0x00000002U |
| #define PRCM_AON_RSTOVCTL_SDIOAO_M 0x00000002U |
| #define PRCM_AON_RSTOVCTL_SDIOAO_S 1U |
| #define PRCM_AON_RSTOVCTL_PSCON 0x00000004U |
| #define PRCM_AON_RSTOVCTL_PSCON_M 0x00000004U |
| #define PRCM_AON_RSTOVCTL_PSCON_S 2U |
| #define PRCM_AON_RSTOVCTL_CR 0x00000008U |
| #define PRCM_AON_RSTOVCTL_CR_M 0x00000008U |
| #define PRCM_AON_RSTOVCTL_CR_S 3U |
| #define PRCM_AON_RSTOVCTL_PRCMREGS 0x00000010U |
| #define PRCM_AON_RSTOVCTL_PRCMREGS_M 0x00000010U |
| #define PRCM_AON_RSTOVCTL_PRCMREGS_S 4U |
| #define PRCM_AON_RSTOVCTL_DBGSS 0x00000020U |
| #define PRCM_AON_RSTOVCTL_DBGSS_M 0x00000020U |
| #define PRCM_AON_RSTOVCTL_DBGSS_S 5U |
| #define PRCM_AON_RSTOVCTL_TEST 0x00000080U |
| #define PRCM_AON_RSTOVCTL_TEST_M 0x00000080U |
| #define PRCM_AON_RSTOVCTL_TEST_S 7U |
| #define PRCM_AON_RSTOVCTL_HOSTAON 0x00000100U |
| #define PRCM_AON_RSTOVCTL_HOSTAON_M 0x00000100U |
| #define PRCM_AON_RSTOVCTL_HOSTAON_S 8U |
| #define PRCM_AON_RSTOVCTL_CRAON 0x00000200U |
| #define PRCM_AON_RSTOVCTL_CRAON_M 0x00000200U |
| #define PRCM_AON_RSTOVCTL_CRAON_S 9U |
| #define PRCM_AON_RSTOVCTL_MEMSS 0x00000800U |
| #define PRCM_AON_RSTOVCTL_MEMSS_M 0x00000800U |
| #define PRCM_AON_RSTOVCTL_MEMSS_S 11U |
| #define PRCM_AON_RSTOVCTL_FUSE 0x00001000U |
| #define PRCM_AON_RSTOVCTL_FUSE_M 0x00001000U |
| #define PRCM_AON_RSTOVCTL_FUSE_S 12U |
| #define PRCM_AON_RSTOVCTL_GPADC 0x00002000U |
| #define PRCM_AON_RSTOVCTL_GPADC_M 0x00002000U |
| #define PRCM_AON_RSTOVCTL_GPADC_S 13U |
| #define PRCM_AON_RSTOVCTL_TSENSE 0x00004000U |
| #define PRCM_AON_RSTOVCTL_TSENSE_M 0x00004000U |
| #define PRCM_AON_RSTOVCTL_TSENSE_S 14U |
| #define PRCM_AON_RSTOVCTL_FREF 0x00008000U |
| #define PRCM_AON_RSTOVCTL_FREF_M 0x00008000U |
| #define PRCM_AON_RSTOVCTL_FREF_S 15U |
| #define PRCM_AON_RSTOVCTL_AAON 0x00010000U |
| #define PRCM_AON_RSTOVCTL_AAON_M 0x00010000U |
| #define PRCM_AON_RSTOVCTL_AAON_S 16U |
| #define PRCM_AON_PMURSTCLR_WDTCAUS 0x00000001U |
| #define PRCM_AON_PMURSTCLR_WDTCAUS_M 0x00000001U |
| #define PRCM_AON_PMURSTCLR_WDTCAUS_S 0U |
| #define PRCM_AON_PMURSTCLR_DBGSSCAUS 0x00000002U |
| #define PRCM_AON_PMURSTCLR_DBGSSCAUS_M 0x00000002U |
| #define PRCM_AON_PMURSTCLR_DBGSSCAUS_S 1U |
| #define PRCM_AON_MEMGCTLCRSTAT1_PWRSTA1_W 2U |
| #define PRCM_AON_MEMGCTLCRSTAT1_PWRSTA1_M 0x00000003U |
| #define PRCM_AON_MEMGCTLCRSTAT1_PWRSTA1_S 0U |
| #define PRCM_AON_MEMGCTLCRSTAT1_PWRSTA2_W 2U |
| #define PRCM_AON_MEMGCTLCRSTAT1_PWRSTA2_M 0x0000000CU |
| #define PRCM_AON_MEMGCTLCRSTAT1_PWRSTA2_S 2U |
| #define PRCM_AON_MEMGCTLCRSTAT1_PWRSTA3_W 2U |
| #define PRCM_AON_MEMGCTLCRSTAT1_PWRSTA3_M 0x00000030U |
| #define PRCM_AON_MEMGCTLCRSTAT1_PWRSTA3_S 4U |
| #define PRCM_AON_MEMGCTLCRSTAT1_PWRSTA4_W 2U |
| #define PRCM_AON_MEMGCTLCRSTAT1_PWRSTA4_M 0x000000C0U |
| #define PRCM_AON_MEMGCTLCRSTAT1_PWRSTA4_S 6U |
| #define PRCM_AON_MEMGCTLCRSTAT1_PWRSTA5_W 2U |
| #define PRCM_AON_MEMGCTLCRSTAT1_PWRSTA5_M 0x00000300U |
| #define PRCM_AON_MEMGCTLCRSTAT1_PWRSTA5_S 8U |
| #define PRCM_AON_MEMGCTLCRSTAT1_PWRSTA6_W 2U |
| #define PRCM_AON_MEMGCTLCRSTAT1_PWRSTA6_M 0x00000C00U |
| #define PRCM_AON_MEMGCTLCRSTAT1_PWRSTA6_S 10U |
| #define PRCM_AON_MEMGCTLCRSTAT1_PWRSTA7_W 2U |
| #define PRCM_AON_MEMGCTLCRSTAT1_PWRSTA7_M 0x00003000U |
| #define PRCM_AON_MEMGCTLCRSTAT1_PWRSTA7_S 12U |
| #define PRCM_AON_MEMGCTLCRSTAT1_PWRSTA8_W 2U |
| #define PRCM_AON_MEMGCTLCRSTAT1_PWRSTA8_M 0x0000C000U |
| #define PRCM_AON_MEMGCTLCRSTAT1_PWRSTA8_S 14U |
| #define PRCM_AON_MEMGCTLCRSTAT1_PWRSTA9_W 2U |
| #define PRCM_AON_MEMGCTLCRSTAT1_PWRSTA9_M 0x00030000U |
| #define PRCM_AON_MEMGCTLCRSTAT1_PWRSTA9_S 16U |
| #define PRCM_AON_MEMGCTLCRSTAT1_PWRSTA10_W 2U |
| #define PRCM_AON_MEMGCTLCRSTAT1_PWRSTA10_M 0x000C0000U |
| #define PRCM_AON_MEMGCTLCRSTAT1_PWRSTA10_S 18U |
| #define PRCM_AON_MEMGCTLCRSTAT1_PWRSTA11_W 2U |
| #define PRCM_AON_MEMGCTLCRSTAT1_PWRSTA11_M 0x00300000U |
| #define PRCM_AON_MEMGCTLCRSTAT1_PWRSTA11_S 20U |
| #define PRCM_AON_MEMGCTLCRSTAT1_PWRSTA12_W 2U |
| #define PRCM_AON_MEMGCTLCRSTAT1_PWRSTA12_M 0x00C00000U |
| #define PRCM_AON_MEMGCTLCRSTAT1_PWRSTA12_S 22U |
| #define PRCM_AON_MEMGCTLCRFLEX_PWRSTA1_W 2U |
| #define PRCM_AON_MEMGCTLCRFLEX_PWRSTA1_M 0x00000003U |
| #define PRCM_AON_MEMGCTLCRFLEX_PWRSTA1_S 0U |
| #define PRCM_AON_MEMGCTLCRFLEX_PWRSTA2_W 2U |
| #define PRCM_AON_MEMGCTLCRFLEX_PWRSTA2_M 0x0000000CU |
| #define PRCM_AON_MEMGCTLCRFLEX_PWRSTA2_S 2U |
| #define PRCM_AON_MEMGCTLCRFLEX_PWRSTA3_W 2U |
| #define PRCM_AON_MEMGCTLCRFLEX_PWRSTA3_M 0x00000030U |
| #define PRCM_AON_MEMGCTLCRFLEX_PWRSTA3_S 4U |
| #define PRCM_AON_MEMGCTLCRFLEX_PWRSTA4_W 2U |
| #define PRCM_AON_MEMGCTLCRFLEX_PWRSTA4_M 0x000000C0U |
| #define PRCM_AON_MEMGCTLCRFLEX_PWRSTA4_S 6U |
| #define PRCM_AON_MEMGCTLCRFLEX_PWRSTA5_W 2U |
| #define PRCM_AON_MEMGCTLCRFLEX_PWRSTA5_M 0x00000300U |
| #define PRCM_AON_MEMGCTLCRFLEX_PWRSTA5_S 8U |
| #define PRCM_AON_MEMGCTLCRFLEX_PWRSTA6_W 2U |
| #define PRCM_AON_MEMGCTLCRFLEX_PWRSTA6_M 0x00000C00U |
| #define PRCM_AON_MEMGCTLCRFLEX_PWRSTA6_S 10U |
| #define PRCM_AON_MEMGCTLCRFLEX_PWRSTA7_W 2U |
| #define PRCM_AON_MEMGCTLCRFLEX_PWRSTA7_M 0x00003000U |
| #define PRCM_AON_MEMGCTLCRFLEX_PWRSTA7_S 12U |
| #define PRCM_AON_MEMGCTLCRFLEX_PWRSTA8_W 2U |
| #define PRCM_AON_MEMGCTLCRFLEX_PWRSTA8_M 0x0000C000U |
| #define PRCM_AON_MEMGCTLCRFLEX_PWRSTA8_S 14U |
| #define PRCM_AON_MEMGCTLCRFLEX_PWRSTA9_W 2U |
| #define PRCM_AON_MEMGCTLCRFLEX_PWRSTA9_M 0x00030000U |
| #define PRCM_AON_MEMGCTLCRFLEX_PWRSTA9_S 16U |
| #define PRCM_AON_MEMGCTLCRFLEX_PWRSTA10_W 2U |
| #define PRCM_AON_MEMGCTLCRFLEX_PWRSTA10_M 0x000C0000U |
| #define PRCM_AON_MEMGCTLCRFLEX_PWRSTA10_S 18U |
| #define PRCM_AON_CRSH_PMSREQOV 0x00000001U |
| #define PRCM_AON_CRSH_PMSREQOV_M 0x00000001U |
| #define PRCM_AON_CRSH_PMSREQOV_S 0U |
| #define PRCM_AON_CRSH_FREFREQOV 0x00000002U |
| #define PRCM_AON_CRSH_FREFREQOV_M 0x00000002U |
| #define PRCM_AON_CRSH_FREFREQOV_S 1U |
| #define PRCM_AON_CRSH_PLLSHREQOV 0x00000004U |
| #define PRCM_AON_CRSH_PLLSHREQOV_M 0x00000004U |
| #define PRCM_AON_CRSH_PLLSHREQOV_S 2U |