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CC35xxDriverLibrary
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Go to the source code of this file.
Macros | |
| #define | HIF_O_ICWRFIFO 0x00000000U |
| #define | HIF_O_ICRDFIFO 0x00000010U |
| #define | HIF_O_MOD 0x00000024U |
| #define | HIF_O_FIFOSTA 0x0000002CU |
| #define | HIF_O_UNDER 0x00000030U |
| #define | HIF_O_OVER 0x00000034U |
| #define | HIF_O_RST 0x00000038U |
| #define | HIF_O_FSMSTA 0x0000003CU |
| #define | HIF_O_FIFOTH 0x00000040U |
| #define | HIF_O_IRQ 0x00000044U |
| #define | HIF_O_IM 0x00000048U |
| #define | HIF_O_NABRDY 0x0000004CU |
| #define | HIF_O_CR 0x00000050U |
| #define | HIF_O_RXAON 0x00000054U |
| #define | HIF_O_RXSTALAT 0x00000058U |
| #define | HIF_O_NABHNTSTA 0x0000005CU |
| #define | HIF_O_NAB 0x00000060U |
| #define | HIF_O_HNTBM 0x00000064U |
| #define | HIF_O_HNTBMCLR 0x00000068U |
| #define | HIF_O_HNTSTACLR 0x0000006CU |
| #define | HIF_O_NABHNT 0x00000070U |
| #define | HIF_O_NABHNTCLR 0x00000074U |
| #define | HIF_ICWRFIFO_WORD_W 32U |
| #define | HIF_ICWRFIFO_WORD_M 0xFFFFFFFFU |
| #define | HIF_ICWRFIFO_WORD_S 0U |
| #define | HIF_ICRDFIFO_WORD_W 32U |
| #define | HIF_ICRDFIFO_WORD_M 0xFFFFFFFFU |
| #define | HIF_ICRDFIFO_WORD_S 0U |
| #define | HIF_MOD_CFG_W 2U |
| #define | HIF_MOD_CFG_M 0x00000003U |
| #define | HIF_MOD_CFG_S 0U |
| #define | HIF_FIFOSTA_RDPTR_W 5U |
| #define | HIF_FIFOSTA_RDPTR_M 0x0000001FU |
| #define | HIF_FIFOSTA_RDPTR_S 0U |
| #define | HIF_FIFOSTA_WRPTR_W 5U |
| #define | HIF_FIFOSTA_WRPTR_M 0x00001F00U |
| #define | HIF_FIFOSTA_WRPTR_S 8U |
| #define | HIF_FIFOSTA_EMP 0x00100000U |
| #define | HIF_FIFOSTA_EMP_M 0x00100000U |
| #define | HIF_FIFOSTA_EMP_S 20U |
| #define | HIF_FIFOSTA_FULL 0x00200000U |
| #define | HIF_FIFOSTA_FULL_M 0x00200000U |
| #define | HIF_FIFOSTA_FULL_S 21U |
| #define | HIF_UNDER_STA 0x00000001U |
| #define | HIF_UNDER_STA_M 0x00000001U |
| #define | HIF_UNDER_STA_S 0U |
| #define | HIF_OVER_STA 0x00000001U |
| #define | HIF_OVER_STA_M 0x00000001U |
| #define | HIF_OVER_STA_S 0U |
| #define | HIF_RST_FIFO 0x00000001U |
| #define | HIF_RST_FIFO_M 0x00000001U |
| #define | HIF_RST_FIFO_S 0U |
| #define | HIF_FSMSTA_HANDLER_W 3U |
| #define | HIF_FSMSTA_HANDLER_M 0x00000007U |
| #define | HIF_FSMSTA_HANDLER_S 0U |
| #define | HIF_FSMSTA_WRNAB_W 3U |
| #define | HIF_FSMSTA_WRNAB_M 0x00000700U |
| #define | HIF_FSMSTA_WRNAB_S 8U |
| #define | HIF_FSMSTA_RDNAB_W 3U |
| #define | HIF_FSMSTA_RDNAB_M 0x00070000U |
| #define | HIF_FSMSTA_RDNAB_S 16U |
| #define | HIF_FIFOTH_THR_W 4U |
| #define | HIF_FIFOTH_THR_M 0x0000000FU |
| #define | HIF_FIFOTH_THR_S 0U |
| #define | HIF_FIFOTH_WRTHRNTHIT 0x00000100U |
| #define | HIF_FIFOTH_WRTHRNTHIT_M 0x00000100U |
| #define | HIF_FIFOTH_WRTHRNTHIT_S 8U |
| #define | HIF_FIFOTH_RDTHRHIT 0x00000200U |
| #define | HIF_FIFOTH_RDTHRHIT_M 0x00000200U |
| #define | HIF_FIFOTH_RDTHRHIT_S 9U |
| #define | HIF_FIFOTH_SZAVAIL_W 5U |
| #define | HIF_FIFOTH_SZAVAIL_M 0x001F0000U |
| #define | HIF_FIFOTH_SZAVAIL_S 16U |
| #define | HIF_FIFOTH_SZOCC_W 5U |
| #define | HIF_FIFOTH_SZOCC_M 0x1F000000U |
| #define | HIF_FIFOTH_SZOCC_S 24U |
| #define | HIF_IRQ_RIS_W 6U |
| #define | HIF_IRQ_RIS_M 0x0000003FU |
| #define | HIF_IRQ_RIS_S 0U |
| #define | HIF_IM_EVTBM_W 6U |
| #define | HIF_IM_EVTBM_M 0x0000003FU |
| #define | HIF_IM_EVTBM_S 0U |
| #define | HIF_IM_STA_W 6U |
| #define | HIF_IM_STA_M 0x00000FC0U |
| #define | HIF_IM_STA_S 6U |
| #define | HIF_NABRDY_TORCV 0x00000001U |
| #define | HIF_NABRDY_TORCV_M 0x00000001U |
| #define | HIF_NABRDY_TORCV_S 0U |
| #define | HIF_NABRDY_RCVDONE 0x00000002U |
| #define | HIF_NABRDY_RCVDONE_M 0x00000002U |
| #define | HIF_NABRDY_RCVDONE_S 1U |
| #define | HIF_NABRDY_RCVDONEM2MIDL 0x00000004U |
| #define | HIF_NABRDY_RCVDONEM2MIDL_M 0x00000004U |
| #define | HIF_NABRDY_RCVDONEM2MIDL_S 2U |
| #define | HIF_NABRDY_FIFONEMPT 0x00000008U |
| #define | HIF_NABRDY_FIFONEMPT_M 0x00000008U |
| #define | HIF_NABRDY_FIFONEMPT_S 3U |
| #define | HIF_CR_TMSTMP_W 32U |
| #define | HIF_CR_TMSTMP_M 0xFFFFFFFFU |
| #define | HIF_CR_TMSTMP_S 0U |
| #define | HIF_RXAON_STA_W 32U |
| #define | HIF_RXAON_STA_M 0xFFFFFFFFU |
| #define | HIF_RXAON_STA_S 0U |
| #define | HIF_RXSTALAT_VAL_W 32U |
| #define | HIF_RXSTALAT_VAL_M 0xFFFFFFFFU |
| #define | HIF_RXSTALAT_VAL_S 0U |
| #define | HIF_NABHNTSTA_BMVAL_W 32U |
| #define | HIF_NABHNTSTA_BMVAL_M 0xFFFFFFFFU |
| #define | HIF_NABHNTSTA_BMVAL_S 0U |
| #define | HIF_NAB_BMVAL_W 32U |
| #define | HIF_NAB_BMVAL_M 0xFFFFFFFFU |
| #define | HIF_NAB_BMVAL_S 0U |
| #define | HIF_HNTBM_VAL_W 32U |
| #define | HIF_HNTBM_VAL_M 0xFFFFFFFFU |
| #define | HIF_HNTBM_VAL_S 0U |
| #define | HIF_HNTBMCLR_VAL_W 32U |
| #define | HIF_HNTBMCLR_VAL_M 0xFFFFFFFFU |
| #define | HIF_HNTBMCLR_VAL_S 0U |
| #define | HIF_HNTSTACLR_STA_W 32U |
| #define | HIF_HNTSTACLR_STA_M 0xFFFFFFFFU |
| #define | HIF_HNTSTACLR_STA_S 0U |
| #define | HIF_NABHNT_SET_W 32U |
| #define | HIF_NABHNT_SET_M 0xFFFFFFFFU |
| #define | HIF_NABHNT_SET_S 0U |
| #define | HIF_NABHNTCLR_SET_W 32U |
| #define | HIF_NABHNTCLR_SET_M 0xFFFFFFFFU |
| #define | HIF_NABHNTCLR_SET_S 0U |
| #define HIF_O_ICWRFIFO 0x00000000U |
| #define HIF_O_ICRDFIFO 0x00000010U |
| #define HIF_O_MOD 0x00000024U |
| #define HIF_O_FIFOSTA 0x0000002CU |
| #define HIF_O_UNDER 0x00000030U |
| #define HIF_O_OVER 0x00000034U |
| #define HIF_O_RST 0x00000038U |
| #define HIF_O_FSMSTA 0x0000003CU |
| #define HIF_O_FIFOTH 0x00000040U |
| #define HIF_O_IRQ 0x00000044U |
| #define HIF_O_IM 0x00000048U |
| #define HIF_O_NABRDY 0x0000004CU |
| #define HIF_O_CR 0x00000050U |
| #define HIF_O_RXAON 0x00000054U |
| #define HIF_O_RXSTALAT 0x00000058U |
| #define HIF_O_NABHNTSTA 0x0000005CU |
| #define HIF_O_NAB 0x00000060U |
| #define HIF_O_HNTBM 0x00000064U |
| #define HIF_O_HNTBMCLR 0x00000068U |
| #define HIF_O_HNTSTACLR 0x0000006CU |
| #define HIF_O_NABHNT 0x00000070U |
| #define HIF_O_NABHNTCLR 0x00000074U |
| #define HIF_ICWRFIFO_WORD_W 32U |
| #define HIF_ICWRFIFO_WORD_M 0xFFFFFFFFU |
| #define HIF_ICWRFIFO_WORD_S 0U |
| #define HIF_ICRDFIFO_WORD_W 32U |
| #define HIF_ICRDFIFO_WORD_M 0xFFFFFFFFU |
| #define HIF_ICRDFIFO_WORD_S 0U |
| #define HIF_MOD_CFG_W 2U |
| #define HIF_MOD_CFG_M 0x00000003U |
| #define HIF_MOD_CFG_S 0U |
| #define HIF_FIFOSTA_RDPTR_W 5U |
| #define HIF_FIFOSTA_RDPTR_M 0x0000001FU |
| #define HIF_FIFOSTA_RDPTR_S 0U |
| #define HIF_FIFOSTA_WRPTR_W 5U |
| #define HIF_FIFOSTA_WRPTR_M 0x00001F00U |
| #define HIF_FIFOSTA_WRPTR_S 8U |
| #define HIF_FIFOSTA_EMP 0x00100000U |
| #define HIF_FIFOSTA_EMP_M 0x00100000U |
| #define HIF_FIFOSTA_EMP_S 20U |
| #define HIF_FIFOSTA_FULL 0x00200000U |
| #define HIF_FIFOSTA_FULL_M 0x00200000U |
| #define HIF_FIFOSTA_FULL_S 21U |
| #define HIF_UNDER_STA 0x00000001U |
| #define HIF_UNDER_STA_M 0x00000001U |
| #define HIF_UNDER_STA_S 0U |
| #define HIF_OVER_STA 0x00000001U |
| #define HIF_OVER_STA_M 0x00000001U |
| #define HIF_OVER_STA_S 0U |
| #define HIF_RST_FIFO 0x00000001U |
| #define HIF_RST_FIFO_M 0x00000001U |
| #define HIF_RST_FIFO_S 0U |
| #define HIF_FSMSTA_HANDLER_W 3U |
| #define HIF_FSMSTA_HANDLER_M 0x00000007U |
| #define HIF_FSMSTA_HANDLER_S 0U |
| #define HIF_FSMSTA_WRNAB_W 3U |
| #define HIF_FSMSTA_WRNAB_M 0x00000700U |
| #define HIF_FSMSTA_WRNAB_S 8U |
| #define HIF_FSMSTA_RDNAB_W 3U |
| #define HIF_FSMSTA_RDNAB_M 0x00070000U |
| #define HIF_FSMSTA_RDNAB_S 16U |
| #define HIF_FIFOTH_THR_W 4U |
| #define HIF_FIFOTH_THR_M 0x0000000FU |
| #define HIF_FIFOTH_THR_S 0U |
| #define HIF_FIFOTH_WRTHRNTHIT 0x00000100U |
| #define HIF_FIFOTH_WRTHRNTHIT_M 0x00000100U |
| #define HIF_FIFOTH_WRTHRNTHIT_S 8U |
| #define HIF_FIFOTH_RDTHRHIT 0x00000200U |
| #define HIF_FIFOTH_RDTHRHIT_M 0x00000200U |
| #define HIF_FIFOTH_RDTHRHIT_S 9U |
| #define HIF_FIFOTH_SZAVAIL_W 5U |
| #define HIF_FIFOTH_SZAVAIL_M 0x001F0000U |
| #define HIF_FIFOTH_SZAVAIL_S 16U |
| #define HIF_FIFOTH_SZOCC_W 5U |
| #define HIF_FIFOTH_SZOCC_M 0x1F000000U |
| #define HIF_FIFOTH_SZOCC_S 24U |
| #define HIF_IRQ_RIS_W 6U |
| #define HIF_IRQ_RIS_M 0x0000003FU |
| #define HIF_IRQ_RIS_S 0U |
| #define HIF_IM_EVTBM_W 6U |
| #define HIF_IM_EVTBM_M 0x0000003FU |
| #define HIF_IM_EVTBM_S 0U |
| #define HIF_IM_STA_W 6U |
| #define HIF_IM_STA_M 0x00000FC0U |
| #define HIF_IM_STA_S 6U |
| #define HIF_NABRDY_TORCV 0x00000001U |
| #define HIF_NABRDY_TORCV_M 0x00000001U |
| #define HIF_NABRDY_TORCV_S 0U |
| #define HIF_NABRDY_RCVDONE 0x00000002U |
| #define HIF_NABRDY_RCVDONE_M 0x00000002U |
| #define HIF_NABRDY_RCVDONE_S 1U |
| #define HIF_NABRDY_RCVDONEM2MIDL 0x00000004U |
| #define HIF_NABRDY_RCVDONEM2MIDL_M 0x00000004U |
| #define HIF_NABRDY_RCVDONEM2MIDL_S 2U |
| #define HIF_NABRDY_FIFONEMPT 0x00000008U |
| #define HIF_NABRDY_FIFONEMPT_M 0x00000008U |
| #define HIF_NABRDY_FIFONEMPT_S 3U |
| #define HIF_CR_TMSTMP_W 32U |
| #define HIF_CR_TMSTMP_M 0xFFFFFFFFU |
| #define HIF_CR_TMSTMP_S 0U |
| #define HIF_RXAON_STA_W 32U |
| #define HIF_RXAON_STA_M 0xFFFFFFFFU |
| #define HIF_RXAON_STA_S 0U |
| #define HIF_RXSTALAT_VAL_W 32U |
| #define HIF_RXSTALAT_VAL_M 0xFFFFFFFFU |
| #define HIF_RXSTALAT_VAL_S 0U |
| #define HIF_NABHNTSTA_BMVAL_W 32U |
| #define HIF_NABHNTSTA_BMVAL_M 0xFFFFFFFFU |
| #define HIF_NABHNTSTA_BMVAL_S 0U |
| #define HIF_NAB_BMVAL_W 32U |
| #define HIF_NAB_BMVAL_M 0xFFFFFFFFU |
| #define HIF_NAB_BMVAL_S 0U |
| #define HIF_HNTBM_VAL_W 32U |
| #define HIF_HNTBM_VAL_M 0xFFFFFFFFU |
| #define HIF_HNTBM_VAL_S 0U |
| #define HIF_HNTBMCLR_VAL_W 32U |
| #define HIF_HNTBMCLR_VAL_M 0xFFFFFFFFU |
| #define HIF_HNTBMCLR_VAL_S 0U |
| #define HIF_HNTSTACLR_STA_W 32U |
| #define HIF_HNTSTACLR_STA_M 0xFFFFFFFFU |
| #define HIF_HNTSTACLR_STA_S 0U |
| #define HIF_NABHNT_SET_W 32U |
| #define HIF_NABHNT_SET_M 0xFFFFFFFFU |
| #define HIF_NABHNT_SET_S 0U |
| #define HIF_NABHNTCLR_SET_W 32U |
| #define HIF_NABHNTCLR_SET_M 0xFFFFFFFFU |
| #define HIF_NABHNTCLR_SET_S 0U |