Collaboration diagram for [adc.h] ADC Peripheral Interface:

Macros
#define	ADC_CLOCK_DIVIDER_1 ADC_CTL0_SCLKDIV_DIV_BY_1
	Set ADC clock to system clock divided by 1. More...

#define	ADC_CLOCK_DIVIDER_2 ADC_CTL0_SCLKDIV_DIV_BY_2
	Set ADC clock to system clock divided by 2. More...

#define	ADC_CLOCK_DIVIDER_4 ADC_CTL0_SCLKDIV_DIV_BY_4
	Set ADC clock to system clock divided by 4. More...

#define	ADC_CLOCK_DIVIDER_8 ADC_CTL0_SCLKDIV_DIV_BY_8
	Set ADC clock to system clock divided by 8. More...

#define	ADC_CLOCK_DIVIDER_16 ADC_CTL0_SCLKDIV_DIV_BY_16
	Set ADC clock to system clock divided by 16. More...

#define	ADC_CLOCK_DIVIDER_24 ADC_CTL0_SCLKDIV_DIV_BY_24
	Set ADC clock to system clock divided by 24. More...

#define	ADC_CLOCK_DIVIDER_32 ADC_CTL0_SCLKDIV_DIV_BY_32
	Set ADC clock to system clock divided by 32. More...

#define	ADC_CLOCK_DIVIDER_48 ADC_CTL0_SCLKDIV_DIV_BY_48
	Set ADC clock to system clock divided by 48. More...

#define	ADC_MODE_SINGLE (0 << ADC_MEMCTL_0_MOD_S)
	Set ADC mode to single ended. More...

#define	ADC_MODE_DIFFERENTIAL (1 << ADC_MEMCTL_0_MOD_S)
	Set ADC mode to differential. More...

#define	ADC_INTERNAL_REFERENCE 0
	Set ADC reference to internal, which is fixed to 1.4 V. More...

#define	ADC_EXTERNAL_REFERENCE 1
	Set ADC reference to external, where VPP pin must be supplied with 1.8 V. More...

#define	ADC_VDDA_REFERENCE 2
	Set ADC reference to VDDA, which is fixed to 1.8 V. More...

#define	ADC_FULL_SCALE_RANGE_0V0_3V3 0
	Set ADC to measure from 0 to 3.3 V. More...

#define	ADC_FULL_SCALE_RANGE_0V1_3V3 1
	Set ADC to measure from 0.1 to 3.3 V. More...

#define	ADC_FULL_SCALE_RANGE_0V0_3V2 2
	Set ADC to measure from 0 to 3.2 V. More...

#define	ADC_FULL_SCALE_RANGE_0V0_1V8 3
	Set ADC to measure from 0 to 1.8 V. More...

#define	ADC_POWER_DOWN_POLICY_AUTO ADC_CTL0_PWRDN_AUTO
	ADC is powered down on completion of a conversion if there is no pending trigger. To be used with ADCSetPowerDownPolicy() More...

#define	ADC_POWER_DOWN_POLICY_MANUAL ADC_CTL0_PWRDN_MANUAL
	ADC remains powered on as long as the power mode it set to manual. To be used with ADCSetPowerDownPolicy() More...

#define	ADC_SEQUENCE_REPEATSEQUENCE ADC_CTL1_CONSEQ_REPEATSEQUENCE
	Set ADC conversion sequence to repeat control registers defined by start and stop address, as set by ADCSetMemctlRange. More...

#define	ADC_SEQUENCE_REPEATSINGLE ADC_CTL1_CONSEQ_REPEATSINGLE
	Set ADC conversion sequence to repeat control register defined by start as set by ADCSetMemctlRange. More...

#define	ADC_SEQUENCE_SEQUENCE ADC_CTL1_CONSEQ_SEQUENCE
	Set ADC conversion sequence to a single pass of control registers defined by start and stop address, as set by ADCSetMemctlRange. More...

#define	ADC_SEQUENCE_SINGLE ADC_CTL1_CONSEQ_SINGLE
	Set ADC conversion sequence to do a single conversion of control register defined by start, as set by ADCSetMemctlRange. More...

#define	ADC_SAMPLE_MODE_AUTO ADC_CTL1_SAMPMODE_AUTO
	Sample duration is controlled by values set using ADCSetSampleDuration() More...

#define	ADC_SAMPLE_MODE_MANUAL ADC_CTL1_SAMPMODE_MANUAL
	Sample phase is manually started using ADCStartConversion() and manually stopped using ADCStopConversion() More...

#define	ADC_TRIGGER_SOURCE_EVENT ADC_CTL1_TRIGSRC_EVENT
	The ADC trigger source is a hardware event. More...

#define	ADC_TRIGGER_SOURCE_SOFTWARE ADC_CTL1_TRIGSRC_SOFTWARE
	The ADC trigger source is software. More...

#define	ADC_TRIGGER_POLICY_AUTO_NEXT ADC_MEMCTL_0_TRIG_AUTO_NEXT
	The next conversion is automatically started after the completion of the previous conversion. More...

#define	ADC_TRIGGER_POLICY_TRIGGER_NEXT ADC_MEMCTL_0_TRIG_TRIGGER_NEXT
	The next conversion requires a trigger. More...

#define	ADC_INT_MEMRES_15 ADC_INTEVT0BM_MEMRESIFG15
	Result ready in memory result register 15. More...

#define	ADC_INT_MEMRES_14 ADC_INTEVT0BM_MEMRESIFG14
	Result ready in memory result register 14. More...

#define	ADC_INT_MEMRES_13 ADC_INTEVT0BM_MEMRESIFG13
	Result ready in memory result register 13. More...

#define	ADC_INT_MEMRES_12 ADC_INTEVT0BM_MEMRESIFG12
	Result ready in memory result register 12. More...

#define	ADC_INT_MEMRES_11 ADC_INTEVT0BM_MEMRESIFG11
	Result ready in memory result register 11. More...

#define	ADC_INT_MEMRES_10 ADC_INTEVT0BM_MEMRESIFG10
	Result ready in memory result register 10. More...

#define	ADC_INT_MEMRES_09 ADC_INTEVT0BM_MEMRESIFG9
	Result ready in memory result register 9. More...

#define	ADC_INT_MEMRES_08 ADC_INTEVT0BM_MEMRESIFG8
	Result ready in memory result register 8. More...

#define	ADC_INT_MEMRES_07 ADC_INTEVT0BM_MEMRESIFG7
	Result ready in memory result register 7. More...

#define	ADC_INT_MEMRES_06 ADC_INTEVT0BM_MEMRESIFG6
	Result ready in memory result register 6. More...

#define	ADC_INT_MEMRES_05 ADC_INTEVT0BM_MEMRESIFG5
	Result ready in memory result register 5. More...

#define	ADC_INT_MEMRES_04 ADC_INTEVT0BM_MEMRESIFG4
	Result ready in memory result register 4. More...

#define	ADC_INT_MEMRES_03 ADC_INTEVT0BM_MEMRESIFG3
	Result ready in memory result register 3. More...

#define	ADC_INT_MEMRES_02 ADC_INTEVT0BM_MEMRESIFG2
	Result ready in memory result register 2. More...

#define	ADC_INT_MEMRES_01 ADC_INTEVT0BM_MEMRESIFG1
	Result ready in memory result register 1. More...

#define	ADC_INT_MEMRES_00 ADC_INTEVT0BM_MEMRESIFG0
	Result ready in memory result register 0. More...

#define	ADC_INT_UVIFG ADC_INTEVT0BM_UVIFG
	Conversion underflow. More...

#define	ADC_INT_DMADONE ADC_INTEVT0BM_DMADONE
	DMA transaction done. More...

#define	ADC_INT_INIFG ADC_INTEVT0BM_INIFG
	ADC result is inside window comparator range. More...

#define	ADC_INT_LOWIFG ADC_INTEVT0BM_LOFG
	ADC result is below window comparator range. More...

#define	ADC_INT_HIGHIFG ADC_INTEVT0BM_HIFG
	ADC result is above window comparator range. More...

#define	ADC_INT_TOVIFG ADC_INTEVT0BM_TOVIFG
	Sequence conversion timeout overflow. More...

#define	ADC_INT_OVIFG ADC_INTEVT0BM_OVIFG
	Conversion overflow. More...

#define	ADC_INT_ALL
	All interrupts. More...

Functions
void	ADCSetSampleDuration (uint32_t clkDiv, uint16_t clkCycles)
	Sets the clock-divider value, and sample duration. More...

void	ADCSetInput (uint32_t reference, uint8_t channel, uint8_t fullScaleRange, uint32_t index)
	Sets the ADC reference source and input channel. More...

void	ADCSetMemctlRange (uint32_t start, uint32_t stop)
	Set start and stop control registers. More...

void	ADCSetPowerDownPolicy (uint32_t powerDownPolicy)
	Set power down policy. More...

void	ADCSetSequence (uint32_t sequence)
	Set conversion sequence. More...

void	ADCSetSamplingClk (uint32_t clkSrc)
	Set sampling clock source. More...

void	ADCSetSamplingMode (uint32_t samplingMode)
	Set ADC sampling mode. More...

void	ADCSetTriggerSource (uint32_t triggerSource)
	Set ADC trigger source. More...

void	ADCSetTriggerPolicy (uint32_t triggerPolicy, uint32_t index)
	Set ADC trigger policy. More...

__STATIC_INLINE void	ADCStartConversion (void)
	Start conversion. More...

__STATIC_INLINE void	ADCStopConversion (void)
	Stop sample phase of a conversion. More...

__STATIC_INLINE void	ADCEnableConversion (void)
	Enable conversion. More...

__STATIC_INLINE void	ADCDisableConversion (void)
	Disable conversion. More...

__STATIC_INLINE void	ADCEnableDmaTrigger (void)
	Enable DMA trigger for data transfer. More...

__STATIC_INLINE void	ADCDisableDmaTrigger (void)
	Disable DMA trigger for data transfer. More...

__STATIC_INLINE uint32_t	ADCReadResult (uint32_t index)
	Read conversion result from ADC. More...

__STATIC_INLINE bool	ADCIsBusy (void)
	Check if ADC is busy. More...

__STATIC_INLINE uint32_t	ADCReadResultNonBlocking (uint32_t index)
	Read conversion result from ADC. More...

uint32_t	ADCValueToMicrovolts (uint32_t adcCode, uint32_t fullScaleRange)
	Convert ADC code to microvolts. More...

__STATIC_INLINE void	ADCEnableInterrupt (uint32_t intFlags)
	Enables individual ADC interrupt sources. More...

__STATIC_INLINE void	ADCDisableInterrupt (uint32_t intFlags)
	Disables individual ADC interrupt sources. More...

__STATIC_INLINE uint32_t	ADCRawInterruptStatus (void)
	Gets the current raw interrupt status. More...

__STATIC_INLINE uint32_t	ADCMaskedInterruptStatus (void)
	Gets the current masked interrupt status. More...

__STATIC_INLINE void	ADCClearInterrupt (uint32_t intFlags)
	Clears ADC interrupt sources. More...

void	ADCStoreTrims (void)
	Store trim values. More...

void	ADCRestoreTrims (void)
	Restore trim values. More...

ADC sample clock sources
#define	ADC_SAMPLE_CLK_NONE 0
	Sample clock gated. More...

#define	ADC_SAMPLE_CLK_SOC_CLK 1
	SOC clock. More...

#define	ADC_SAMPLE_CLK_HFXT 2
	HFXT clock. More...

#define	ADC_SAMPLE_CLK_SOC_PLL_CLK_DIV 3
	SOC PLL CLOCK DIV. More...

Detailed Description

Macro Definition Documentation

§ ADC_CLOCK_DIVIDER_1

#define ADC_CLOCK_DIVIDER_1 ADC_CTL0_SCLKDIV_DIV_BY_1

Set ADC clock to system clock divided by 1.

§ ADC_CLOCK_DIVIDER_2

#define ADC_CLOCK_DIVIDER_2 ADC_CTL0_SCLKDIV_DIV_BY_2

Set ADC clock to system clock divided by 2.

§ ADC_CLOCK_DIVIDER_4

#define ADC_CLOCK_DIVIDER_4 ADC_CTL0_SCLKDIV_DIV_BY_4

Set ADC clock to system clock divided by 4.

§ ADC_CLOCK_DIVIDER_8

#define ADC_CLOCK_DIVIDER_8 ADC_CTL0_SCLKDIV_DIV_BY_8

Set ADC clock to system clock divided by 8.

§ ADC_CLOCK_DIVIDER_16

#define ADC_CLOCK_DIVIDER_16 ADC_CTL0_SCLKDIV_DIV_BY_16

Set ADC clock to system clock divided by 16.

§ ADC_CLOCK_DIVIDER_24

#define ADC_CLOCK_DIVIDER_24 ADC_CTL0_SCLKDIV_DIV_BY_24

Set ADC clock to system clock divided by 24.

§ ADC_CLOCK_DIVIDER_32

#define ADC_CLOCK_DIVIDER_32 ADC_CTL0_SCLKDIV_DIV_BY_32

Set ADC clock to system clock divided by 32.

§ ADC_CLOCK_DIVIDER_48

#define ADC_CLOCK_DIVIDER_48 ADC_CTL0_SCLKDIV_DIV_BY_48

Set ADC clock to system clock divided by 48.

§ ADC_MODE_SINGLE

#define ADC_MODE_SINGLE (0 << ADC_MEMCTL_0_MOD_S)

Set ADC mode to single ended.

Referenced by ADCSetInput().

§ ADC_MODE_DIFFERENTIAL

#define ADC_MODE_DIFFERENTIAL (1 << ADC_MEMCTL_0_MOD_S)

Set ADC mode to differential.

§ ADC_INTERNAL_REFERENCE

#define ADC_INTERNAL_REFERENCE 0

Set ADC reference to internal, which is fixed to 1.4 V.

Referenced by ADCSetInput().

§ ADC_EXTERNAL_REFERENCE

#define ADC_EXTERNAL_REFERENCE 1

Set ADC reference to external, where VPP pin must be supplied with 1.8 V.

Referenced by ADCSetInput().

§ ADC_VDDA_REFERENCE

#define ADC_VDDA_REFERENCE 2

Set ADC reference to VDDA, which is fixed to 1.8 V.

Referenced by ADCSetInput().

§ ADC_FULL_SCALE_RANGE_0V0_3V3

#define ADC_FULL_SCALE_RANGE_0V0_3V3 0

Set ADC to measure from 0 to 3.3 V.

Referenced by ADCSetInput(), and ADCValueToMicrovolts().

§ ADC_FULL_SCALE_RANGE_0V1_3V3

#define ADC_FULL_SCALE_RANGE_0V1_3V3 1

Set ADC to measure from 0.1 to 3.3 V.

Referenced by ADCSetInput(), and ADCValueToMicrovolts().

§ ADC_FULL_SCALE_RANGE_0V0_3V2

#define ADC_FULL_SCALE_RANGE_0V0_3V2 2

Set ADC to measure from 0 to 3.2 V.

Referenced by ADCSetInput(), and ADCValueToMicrovolts().

§ ADC_FULL_SCALE_RANGE_0V0_1V8

#define ADC_FULL_SCALE_RANGE_0V0_1V8 3

Set ADC to measure from 0 to 1.8 V.

Referenced by ADCSetInput(), and ADCValueToMicrovolts().

§ ADC_POWER_DOWN_POLICY_AUTO

#define ADC_POWER_DOWN_POLICY_AUTO ADC_CTL0_PWRDN_AUTO

ADC is powered down on completion of a conversion if there is no pending trigger. To be used with ADCSetPowerDownPolicy()

§ ADC_POWER_DOWN_POLICY_MANUAL

#define ADC_POWER_DOWN_POLICY_MANUAL ADC_CTL0_PWRDN_MANUAL

ADC remains powered on as long as the power mode it set to manual. To be used with ADCSetPowerDownPolicy()

§ ADC_SEQUENCE_REPEATSEQUENCE

#define ADC_SEQUENCE_REPEATSEQUENCE ADC_CTL1_CONSEQ_REPEATSEQUENCE

Set ADC conversion sequence to repeat control registers defined by start and stop address, as set by ADCSetMemctlRange.

§ ADC_SEQUENCE_REPEATSINGLE

#define ADC_SEQUENCE_REPEATSINGLE ADC_CTL1_CONSEQ_REPEATSINGLE

Set ADC conversion sequence to repeat control register defined by start as set by ADCSetMemctlRange.

§ ADC_SEQUENCE_SEQUENCE

#define ADC_SEQUENCE_SEQUENCE ADC_CTL1_CONSEQ_SEQUENCE

Set ADC conversion sequence to a single pass of control registers defined by start and stop address, as set by ADCSetMemctlRange.

§ ADC_SEQUENCE_SINGLE

#define ADC_SEQUENCE_SINGLE ADC_CTL1_CONSEQ_SINGLE

Set ADC conversion sequence to do a single conversion of control register defined by start, as set by ADCSetMemctlRange.

§ ADC_SAMPLE_MODE_AUTO

#define ADC_SAMPLE_MODE_AUTO ADC_CTL1_SAMPMODE_AUTO

Sample duration is controlled by values set using ADCSetSampleDuration()

§ ADC_SAMPLE_MODE_MANUAL

#define ADC_SAMPLE_MODE_MANUAL ADC_CTL1_SAMPMODE_MANUAL

Sample phase is manually started using ADCStartConversion() and manually stopped using ADCStopConversion()

This can only be used when the trigger source selected by ADCSetTriggerSource() is ADC_TRIGGER_SOURCE_SOFTWARE

§ ADC_TRIGGER_SOURCE_EVENT

#define ADC_TRIGGER_SOURCE_EVENT ADC_CTL1_TRIGSRC_EVENT

The ADC trigger source is a hardware event.

Can only be used when the sample mode configured using ADCSetSamplingMode() is ADC_SAMPLE_MODE_AUTO

§ ADC_TRIGGER_SOURCE_SOFTWARE

#define ADC_TRIGGER_SOURCE_SOFTWARE ADC_CTL1_TRIGSRC_SOFTWARE

The ADC trigger source is software.

ADCStartConversion() is used to trigger the start of a conversion. If the sampling mode configured using ADCSetSamplingMode() is ADC_SAMPLE_MODE_MANUAL, then the sample phase must also be manually stopped using ADCStopConversion()

§ ADC_TRIGGER_POLICY_AUTO_NEXT

#define ADC_TRIGGER_POLICY_AUTO_NEXT ADC_MEMCTL_0_TRIG_AUTO_NEXT

The next conversion is automatically started after the completion of the previous conversion.

This means that no trigger is needed to start the next conversion.

§ ADC_TRIGGER_POLICY_TRIGGER_NEXT

#define ADC_TRIGGER_POLICY_TRIGGER_NEXT ADC_MEMCTL_0_TRIG_TRIGGER_NEXT

The next conversion requires a trigger.

§ ADC_INT_MEMRES_15

#define ADC_INT_MEMRES_15 ADC_INTEVT0BM_MEMRESIFG15

Result ready in memory result register 15.

§ ADC_INT_MEMRES_14

#define ADC_INT_MEMRES_14 ADC_INTEVT0BM_MEMRESIFG14

Result ready in memory result register 14.

§ ADC_INT_MEMRES_13

#define ADC_INT_MEMRES_13 ADC_INTEVT0BM_MEMRESIFG13

Result ready in memory result register 13.

§ ADC_INT_MEMRES_12

#define ADC_INT_MEMRES_12 ADC_INTEVT0BM_MEMRESIFG12

Result ready in memory result register 12.

§ ADC_INT_MEMRES_11

#define ADC_INT_MEMRES_11 ADC_INTEVT0BM_MEMRESIFG11

Result ready in memory result register 11.

§ ADC_INT_MEMRES_10

#define ADC_INT_MEMRES_10 ADC_INTEVT0BM_MEMRESIFG10

Result ready in memory result register 10.

§ ADC_INT_MEMRES_09

#define ADC_INT_MEMRES_09 ADC_INTEVT0BM_MEMRESIFG9

Result ready in memory result register 9.

§ ADC_INT_MEMRES_08

#define ADC_INT_MEMRES_08 ADC_INTEVT0BM_MEMRESIFG8

Result ready in memory result register 8.

§ ADC_INT_MEMRES_07

#define ADC_INT_MEMRES_07 ADC_INTEVT0BM_MEMRESIFG7

Result ready in memory result register 7.

§ ADC_INT_MEMRES_06

#define ADC_INT_MEMRES_06 ADC_INTEVT0BM_MEMRESIFG6

Result ready in memory result register 6.

§ ADC_INT_MEMRES_05

#define ADC_INT_MEMRES_05 ADC_INTEVT0BM_MEMRESIFG5

Result ready in memory result register 5.

§ ADC_INT_MEMRES_04

#define ADC_INT_MEMRES_04 ADC_INTEVT0BM_MEMRESIFG4

Result ready in memory result register 4.

§ ADC_INT_MEMRES_03

#define ADC_INT_MEMRES_03 ADC_INTEVT0BM_MEMRESIFG3

Result ready in memory result register 3.

§ ADC_INT_MEMRES_02

#define ADC_INT_MEMRES_02 ADC_INTEVT0BM_MEMRESIFG2

Result ready in memory result register 2.

§ ADC_INT_MEMRES_01

#define ADC_INT_MEMRES_01 ADC_INTEVT0BM_MEMRESIFG1

Result ready in memory result register 1.

§ ADC_INT_MEMRES_00

#define ADC_INT_MEMRES_00 ADC_INTEVT0BM_MEMRESIFG0

Result ready in memory result register 0.

§ ADC_INT_UVIFG

#define ADC_INT_UVIFG ADC_INTEVT0BM_UVIFG

Conversion underflow.

§ ADC_INT_DMADONE

#define ADC_INT_DMADONE ADC_INTEVT0BM_DMADONE

DMA transaction done.

§ ADC_INT_INIFG

#define ADC_INT_INIFG ADC_INTEVT0BM_INIFG

ADC result is inside window comparator range.

§ ADC_INT_LOWIFG

#define ADC_INT_LOWIFG ADC_INTEVT0BM_LOFG

ADC result is below window comparator range.

§ ADC_INT_HIGHIFG

#define ADC_INT_HIGHIFG ADC_INTEVT0BM_HIFG

ADC result is above window comparator range.

§ ADC_INT_TOVIFG

#define ADC_INT_TOVIFG ADC_INTEVT0BM_TOVIFG

Sequence conversion timeout overflow.

§ ADC_INT_OVIFG

#define ADC_INT_OVIFG ADC_INTEVT0BM_OVIFG

Conversion overflow.

§ ADC_INT_ALL

#define ADC_INT_ALL

Value:

(ADC_INT_OVIFG | ADC_INT_TOVIFG | ADC_INT_HIGHIFG | ADC_INT_LOWIFG | ADC_INT_INIFG | ADC_INT_DMADONE | \
     ADC_INT_UVIFG | ADC_INT_MEMRES_00 | ADC_INT_MEMRES_01 | ADC_INT_MEMRES_02 | ADC_INT_MEMRES_03 |       \
     ADC_INT_MEMRES_04 | ADC_INT_MEMRES_05 | ADC_INT_MEMRES_06 | ADC_INT_MEMRES_07 | ADC_INT_MEMRES_08 |   \
     ADC_INT_MEMRES_09 | ADC_INT_MEMRES_10 | ADC_INT_MEMRES_11 | ADC_INT_MEMRES_12 | ADC_INT_MEMRES_13 |   \
     ADC_INT_MEMRES_14 | ADC_INT_MEMRES_15)

All interrupts.

§ ADC_SAMPLE_CLK_NONE

#define ADC_SAMPLE_CLK_NONE 0

Sample clock gated.

§ ADC_SAMPLE_CLK_SOC_CLK

#define ADC_SAMPLE_CLK_SOC_CLK 1

SOC clock.

§ ADC_SAMPLE_CLK_HFXT

#define ADC_SAMPLE_CLK_HFXT 2

HFXT clock.

§ ADC_SAMPLE_CLK_SOC_PLL_CLK_DIV

#define ADC_SAMPLE_CLK_SOC_PLL_CLK_DIV 3

SOC PLL CLOCK DIV.

Referenced by ADCSetSamplingClk().

Function Documentation

§ ADCSetSampleDuration()

void ADCSetSampleDuration	(	uint32_t	clkDiv,
		uint16_t	clkCycles
	)

Sets the clock-divider value, and sample duration.

This function sets the clock divider, which determines the ADC clock, derived from the system clock, and sets the duration of a sample in ADC-clock cycles

Parameters

clkDiv	is the clock divider value ADC_CLOCK_DIVIDER_1 ADC_CLOCK_DIVIDER_2 ADC_CLOCK_DIVIDER_4 ADC_CLOCK_DIVIDER_8 ADC_CLOCK_DIVIDER_16 ADC_CLOCK_DIVIDER_24 ADC_CLOCK_DIVIDER_32 ADC_CLOCK_DIVIDER_48
clkCycles	is the duration of a sample, in ADC-clock cycles. Valid range of input is [0, 16383]

Note: The numerical value of clkDiv is not the actual divider value. See the list of possible arguments and which divider value they represent.; The minimum sampling time for the ADC is 500 ns if using an external reference source or 1000 ns if using an internal reference source. The clock-divider and sample duration must be set accordingly to maintain this requirement.

Returns: None

References ADC_BASE, ADC_CTL0_SCLKDIV_M, ADC_O_CTL0, ADC_O_SCOMP0, ADC_SCOMP0_SMP_M, ASSERT, and HWREG.

§ ADCSetInput()

void ADCSetInput	(	uint32_t	reference,
		uint8_t	channel,
		uint8_t	fullScaleRange,
		uint32_t	index
	)

Sets the ADC reference source and input channel.

This function sets the ADC reference and input channel. The control register index that the settings are applied to must also be passed as a parameter

Parameters

reference	Reference source used in conversion ADC_INTERNAL_REFERENCE ADC_VDDA_REFERENCE ADC_EXTERNAL_REFERENCE
channel	Internal channels that can be muxed to ADC. Channels 0-11 correspond to analog pins 0-11. See device data for more information.
fullScaleRange	Select sample range of the ADC. ADC_FULL_SCALE_RANGE_0V0_3V3 ADC_FULL_SCALE_RANGE_0V1_3V3 ADC_FULL_SCALE_RANGE_0V0_3V2 ADC_FULL_SCALE_RANGE_0V0_1V8
index	Index of which control register to write to. See device data for valid indexes.

Returns: None

References ADC_BASE, ADC_EXTERNAL_REFERENCE, ADC_FULL_SCALE_RANGE_0V0_1V8, ADC_FULL_SCALE_RANGE_0V0_3V2, ADC_FULL_SCALE_RANGE_0V0_3V3, ADC_FULL_SCALE_RANGE_0V1_3V3, ADC_INTERNAL_REFERENCE, ADC_MEMCTL_0_CHANSEL_M, ADC_MEMCTL_0_CHANSEL_S, ADC_MEMCTL_0_FSR_M, ADC_MEMCTL_0_MOD_M, ADC_MEMCTL_0_VRSEL_EXTREF, ADC_MEMCTL_0_VRSEL_INTREF, ADC_MEMCTL_0_VRSEL_M, ADC_MODCTL_SCASEL_M, ADC_MODCTL_VREFRAN_M, ADC_MODE_SINGLE, ADC_O_MEMCTL_0, ADC_O_MODCTL, ADC_O_REFCFG, ADC_REFCFG_IBPROG_VAL0, ADC_REFCFG_REFEN_DISABLE, ADC_REFCFG_REFEN_ENABLE, ADC_REFCFG_REFVSEL_V1P4, ADC_VDDA_REFERENCE, ASSERT, and HWREG.

§ ADCSetMemctlRange()

void ADCSetMemctlRange	(	uint32_t	start,
		uint32_t	stop
	)

Set start and stop control registers.

This function selects which control registers should be selected for a conversion. Valid indexes are [0, 3]. For a single conversion, start and stop should be set to the same.

Parameters

start	the index of first control register used in sequence
stop	the index of last control register used in sequence

Returns: None

References ADC_BASE, ADC_CTL2_ENDADD_M, ADC_CTL2_ENDADD_S, ADC_CTL2_STARTADD_M, ADC_CTL2_STARTADD_S, ADC_O_CTL2, and HWREG.

§ ADCSetPowerDownPolicy()

void ADCSetPowerDownPolicy ( uint32_t powerDownPolicy )

Set power down policy.

This function sets the power down policy for the ADC.

Parameters

powerDownPolicy

Returns: None

References ADC_BASE, ADC_CTL0_PWRDN_M, ADC_O_CTL0, ASSERT, and HWREG.

§ ADCSetSequence()

void ADCSetSequence ( uint32_t sequence )

Set conversion sequence.

This function sets the sequence for ADC conversions. The actual sequence is defined by ADCSetMemctlRange. For a single conversion, start and stop should be set to the same.

Parameters

sequence

Returns: None

References ADC_BASE, ADC_CTL1_CONSEQ_M, ADC_O_CTL1, ASSERT, and HWREG.

§ ADCSetSamplingClk()

void ADCSetSamplingClk ( uint32_t clkSrc )

Set sampling clock source.

This function sets the source of the sample clock.

Parameters

clkSrc

Returns: None

References ADC_BASE, ADC_CONVCTL_CONCLKSEL_M, ADC_CONVCTL_CONCLKSEL_S, ADC_CONVCTL_CONVCLKEN_M, ADC_CONVCTL_CONVCLKEN_S, ADC_O_CONVCTL, ADC_SAMPLE_CLK_SOC_PLL_CLK_DIV, ASSERT, and HWREG.

§ ADCSetSamplingMode()

void ADCSetSamplingMode ( uint32_t samplingMode )

Set ADC sampling mode.

Parameters

samplingMode

Returns: None

References ADC_BASE, ADC_CTL1_SAMPMODE_M, ADC_O_CTL1, ASSERT, and HWREG.

§ ADCSetTriggerSource()

void ADCSetTriggerSource ( uint32_t triggerSource )

Set ADC trigger source.

Parameters

triggerSource

Returns: None

References ADC_BASE, ADC_CTL1_SC_M, ADC_CTL1_TRIGSRC_M, ADC_O_CTL1, ASSERT, and HWREG.

§ ADCSetTriggerPolicy()

void ADCSetTriggerPolicy	(	uint32_t	triggerPolicy,
		uint32_t	index
	)

Set ADC trigger policy.

This is not applicable when the sequence set by ADCSetSequence() is ADC_SEQUENCE_SINGLE

Parameters

triggerPolicy	ADC_TRIGGER_POLICY_AUTO_NEXT ADC_TRIGGER_POLICY_TRIGGER_NEXT
index	Index of which control register to write to. See device data for valid indexes.

Returns: None

References ADC_BASE, ADC_MEMCTL_0_TRIG_M, ADC_O_MEMCTL_0, ASSERT, and HWREG.

§ ADCStartConversion()

__STATIC_INLINE void ADCStartConversion ( void )

Start conversion.

Can only be used if the trigger source is set to ADC_TRIGGER_SOURCE_SOFTWARE using ADCSetTriggerSource()

Note: It takes a minimum of 16 system-clock cycles for the BUSY-bit in the STATUS register to go high after calling this function.

Returns: None

References ADC_BASE, ADC_CTL1_SC_START, ADC_O_CTL1, and HWREG.

§ ADCStopConversion()

__STATIC_INLINE void ADCStopConversion ( void )

Stop sample phase of a conversion.

Only applicable if the trigger source is set to ADC_TRIGGER_SOURCE_SOFTWARE using ADCSetTriggerSource() and if the sampling mode is set to ADC_SAMPLE_MODE_MANUAL using ADCSetSamplingMode().

Returns: None

References ADC_BASE, ADC_CTL1_SC_M, ADC_O_CTL1, and HWREG.

§ ADCEnableConversion()

__STATIC_INLINE void ADCEnableConversion ( void )

Enable conversion.

This will enable ADC conversions. The ADC sequencer will wait for the trigger configured using ADCSetTriggerSource() before the first conversion is started.

If the trigger source has been configured to ADC_TRIGGER_SOURCE_SOFTWARE, then the conversion can be started using ADCStartConversion().

Note: While conversion is enabled, configuration of the ADC is not possible, so all configurations must be done before enabling conversion.

See also: ADCDisableConversion()

Returns: None

References ADC_BASE, ADC_CTL0_ENC_ON, ADC_O_CTL0, and HWREG.

§ ADCDisableConversion()

__STATIC_INLINE void ADCDisableConversion ( void )

Disable conversion.

This will disable ADC conversions. The current conversion will finish and the result can be read out using ADCReadResult() or ADCReadResultNonBlocking(). Any subsequent conversions in a sequence will be aborted.

Returns: None

References ADC_BASE, ADC_CTL0_ENC_M, ADC_O_CTL0, and HWREG.

§ ADCEnableDmaTrigger()

__STATIC_INLINE void ADCEnableDmaTrigger ( void )

Enable DMA trigger for data transfer.

Note: The DMA trigger is automatically cleared by hardware based on DMA done signal at the end of data transfer. Software has to re-enable the DMA trigger for ADC to generate DMA triggers after the DMA done signal.

Returns: None

References ADC_BASE, ADC_CTL2_DMAEN_ENABLE, ADC_O_CTL2, and HWREG.

§ ADCDisableDmaTrigger()

__STATIC_INLINE void ADCDisableDmaTrigger ( void )

Disable DMA trigger for data transfer.

Returns: None

References ADC_BASE, ADC_CTL2_DMAEN_M, ADC_O_CTL2, and HWREG.

§ ADCReadResult()

__STATIC_INLINE uint32_t ADCReadResult ( uint32_t index )

Read conversion result from ADC.

This function blocks until a conversion is done, and returns data from the given memory register. The index corresponds to the selected control register used for the conversion

Parameters

index Index of which memory result register to read from

Returns: Raw ADC conversion result

References ADC_BASE, ADC_O_MEMRES_0, ADC_O_STA, ADC_STA_BUSY_ACTIVE, and HWREG.

§ ADCIsBusy()

__STATIC_INLINE bool ADCIsBusy ( void )

Check if ADC is busy.

This function returns whether the ADC is busy or not.

Returns: ADC Busy status true: ADC sampling or conversion is in progress. false: No ADC sampling or conversion in progress.

Note: It takes a minimum of 9 system-clock cycles between writing to the START-bit, and the BUSY-bit in the STATUS register going high

References ADC_BASE, ADC_O_STA, ADC_STA_BUSY_ACTIVE, and HWREG.

§ ADCReadResultNonBlocking()

__STATIC_INLINE uint32_t ADCReadResultNonBlocking ( uint32_t index )

Read conversion result from ADC.

This function returns data from the given memory register without blocking. The index corresponds to the selected control register used for the conversion

Parameters

index Index of which memory result register to read from

Returns: Raw ADC conversion result

References ADC_BASE, ADC_O_MEMRES_0, ADCValueToMicrovolts(), and HWREG.

§ ADCValueToMicrovolts()

uint32_t ADCValueToMicrovolts	(	uint32_t	adcCode,
		uint32_t	fullScaleRange
	)

Convert ADC code to microvolts.

This function converts an adjusted ADC code to microvolts

Parameters

adcCode	Raw adjusted adc code
fullScaleRange	Select sample range of the ADC. The range should be the same as the one configured for the sample using ADCSetInput. ADC_FULL_SCALE_RANGE_0V0_3V3 ADC_FULL_SCALE_RANGE_0V1_3V3 ADC_FULL_SCALE_RANGE_0V0_3V2 ADC_FULL_SCALE_RANGE_0V0_1V8

Returns: ADC result in microvolts. If the fullScaleRange is not one of the above, the result will always be 0.

References ADC_FULL_SCALE_RANGE_0V0_1V8, ADC_FULL_SCALE_RANGE_0V0_3V2, ADC_FULL_SCALE_RANGE_0V0_3V3, ADC_FULL_SCALE_RANGE_0V1_3V3, and ADC_MAX_CODE.

Referenced by ADCReadResultNonBlocking().

§ ADCEnableInterrupt()

__STATIC_INLINE void ADCEnableInterrupt ( uint32_t intFlags )

Enables individual ADC interrupt sources.

This function enables the indicated ADC interrupt sources.

Parameters

intFlags

is the bit mask of the interrupt sources to be enabled. The parameter is the bitwise OR of any of the following:

ADC_INT_MEMRES_N (ADC_INT_MEMRES_00, ADC_INT_MEMRES_01, etc)
ADC_INT_UVIFG
ADC_INT_DMADONE
ADC_INT_INIFG
ADC_INT_LOWIFG
ADC_INT_HIGHIFG
ADC_INT_TOVIFG
ADC_INT_OVIFG

Returns: None

References ADC_BASE, ADC_O_INTEVT0BM, and HWREG.

§ ADCDisableInterrupt()

__STATIC_INLINE void ADCDisableInterrupt ( uint32_t intFlags )

Disables individual ADC interrupt sources.

This function disables the indicated ADC interrupt sources.

Parameters

intFlags

is the bit mask of the interrupt sources to be disabled. The parameter is the bitwise OR of any of the following:

ADC_INT_MEMRES_N (ADC_INT_MEMRES_00, ADC_INT_MEMRES_01, etc)
ADC_INT_UVIFG
ADC_INT_DMADONE
ADC_INT_INIFG
ADC_INT_LOWIFG
ADC_INT_HIGHIFG
ADC_INT_TOVIFG
ADC_INT_OVIFG

Returns: None

References ADC_BASE, ADC_O_INTEVT0BM, and HWREG.

§ ADCRawInterruptStatus()

__STATIC_INLINE uint32_t ADCRawInterruptStatus ( void )

Gets the current raw interrupt status.

This function returns the raw interrupt status for the ADC

Returns

Returns the current interrupt status, a bitwise OR of the following:

ADC_INT_MEMRES_N (ADC_INT_MEMRES_00, ADC_INT_MEMRES_01, etc)
ADC_INT_UVIFG
ADC_INT_DMADONE
ADC_INT_INIFG
ADC_INT_LOWIFG
ADC_INT_HIGHIFG
ADC_INT_TOVIFG
ADC_INT_OVIFG

References ADC_BASE, ADC_O_INTEVT0RIS, and HWREG.

§ ADCMaskedInterruptStatus()

__STATIC_INLINE uint32_t ADCMaskedInterruptStatus ( void )

Gets the current masked interrupt status.

This function returns the masked interrupt status for the ADC

Returns

Returns the current interrupt status, enumerated as a bit field of:

ADC_INT_MEMRES_N (ADC_INT_MEMRES_00, ADC_INT_MEMRES_01, etc)
ADC_INT_UVIFG
ADC_INT_DMADONE
ADC_INT_INIFG
ADC_INT_LOWIFG
ADC_INT_HIGHIFG
ADC_INT_TOVIFG
ADC_INT_OVIFG

References ADC_BASE, ADC_O_INTEVT0MIS, and HWREG.

§ ADCClearInterrupt()

__STATIC_INLINE void ADCClearInterrupt ( uint32_t intFlags )

Clears ADC interrupt sources.

The specified ADC interrupt sources are cleared, so that they no longer assert. This function must be called in the interrupt handler to keep the interrupt from being triggered again immediately upon exit.

Note

Due to write buffers and synchronizers in the system it may take several clock cycles from a register write clearing an event in a module and until the event is actually cleared in the NVIC of the system CPU. It is recommended to clear the event source early in the interrupt service routine (ISR) to allow the event clear to propagate to the NVIC before returning from the ISR. At the same time, an early event clear allows new events of the same type to be pended instead of ignored if the event is cleared later in the ISR. It is the responsibility of the programmer to make sure that enough time has passed before returning from the ISR to avoid false re-triggering of the cleared event. A simple, although not necessarily optimal, way of clearing an event before returning from the ISR is:

Write to clear event (buffered write).
Dummy read from the event source module (making sure the write has propagated).
Wait two system CPU clock cycles, either user code or two NOPs (allowing cleared event to propagate through any synchronizers).

Parameters

intFlags

is a bit mask of the interrupt sources to be cleared. The parameter is the bitwise OR of any of the following:

ADC_INT_MEMRES_N (ADC_INT_MEMRES_00, ADC_INT_MEMRES_01, etc)
ADC_INT_UVIFG
ADC_INT_DMADONE
ADC_INT_INIFG
ADC_INT_LOWIFG
ADC_INT_HIGHIFG
ADC_INT_TOVIFG
ADC_INT_OVIFG

Returns: None

References ADC_BASE, ADC_O_INTEVT0CLR, ADCRestoreTrims(), ADCStoreTrims(), and HWREG.

§ ADCStoreTrims()

void ADCStoreTrims ( void )

Store trim values.

The ADC MMRs do not retain their values when the system enters sleep mode. Therefore, it is necessary to store the trim values from the ADC MMRs before entering sleep. This function performs the storing process to preserve the trim values.

Note: This function must be called before entering sleep.

Precondition: ADCRestoreTrims() is called when exiting sleep.

Returns: None

Referenced by ADCClearInterrupt().

§ ADCRestoreTrims()

void ADCRestoreTrims ( void )

Restore trim values.

The ADC MMRs do not retain their values when the system enters sleep mode. Therefore, it is necessary to restore the trim values in the ADC MMRs upon waking up from sleep. This function performs that restoration process.

Note: This function must be called when exiting sleep.

Precondition: ADCStoreTrims() is called before entering sleep.

Returns: None

References ADC_BASE, ADC_CTRL_FSBIT0, ADC_CTRL_FSBIT0_S, ADC_CTRL_FSBIT1, ADC_CTRL_FSBIT1_S, ADC_O_CTRL, and HWREG.

Referenced by ADCClearInterrupt().

Macros

Functions

ADC sample clock sources

Detailed Description

Macro Definition Documentation

§ ADC_CLOCK_DIVIDER_1

§ ADC_CLOCK_DIVIDER_2

§ ADC_CLOCK_DIVIDER_4

§ ADC_CLOCK_DIVIDER_8

§ ADC_CLOCK_DIVIDER_16

§ ADC_CLOCK_DIVIDER_24

§ ADC_CLOCK_DIVIDER_32

§ ADC_CLOCK_DIVIDER_48

§ ADC_MODE_SINGLE

§ ADC_MODE_DIFFERENTIAL

§ ADC_INTERNAL_REFERENCE

§ ADC_EXTERNAL_REFERENCE

§ ADC_VDDA_REFERENCE

§ ADC_FULL_SCALE_RANGE_0V0_3V3

§ ADC_FULL_SCALE_RANGE_0V1_3V3

§ ADC_FULL_SCALE_RANGE_0V0_3V2

§ ADC_FULL_SCALE_RANGE_0V0_1V8

§ ADC_POWER_DOWN_POLICY_AUTO

§ ADC_POWER_DOWN_POLICY_MANUAL

§ ADC_SEQUENCE_REPEATSEQUENCE

§ ADC_SEQUENCE_REPEATSINGLE

§ ADC_SEQUENCE_SEQUENCE

§ ADC_SEQUENCE_SINGLE

§ ADC_SAMPLE_MODE_AUTO

§ ADC_SAMPLE_MODE_MANUAL

§ ADC_TRIGGER_SOURCE_EVENT

§ ADC_TRIGGER_SOURCE_SOFTWARE

§ ADC_TRIGGER_POLICY_AUTO_NEXT

§ ADC_TRIGGER_POLICY_TRIGGER_NEXT

§ ADC_INT_MEMRES_15

§ ADC_INT_MEMRES_14

§ ADC_INT_MEMRES_13

§ ADC_INT_MEMRES_12

§ ADC_INT_MEMRES_11

§ ADC_INT_MEMRES_10

§ ADC_INT_MEMRES_09

§ ADC_INT_MEMRES_08

§ ADC_INT_MEMRES_07

§ ADC_INT_MEMRES_06

§ ADC_INT_MEMRES_05

§ ADC_INT_MEMRES_04

§ ADC_INT_MEMRES_03

§ ADC_INT_MEMRES_02

§ ADC_INT_MEMRES_01

§ ADC_INT_MEMRES_00

§ ADC_INT_UVIFG

§ ADC_INT_DMADONE

§ ADC_INT_INIFG

§ ADC_INT_LOWIFG

§ ADC_INT_HIGHIFG

§ ADC_INT_TOVIFG

§ ADC_INT_OVIFG

§ ADC_INT_ALL

§ ADC_SAMPLE_CLK_NONE

§ ADC_SAMPLE_CLK_SOC_CLK

§ ADC_SAMPLE_CLK_HFXT

§ ADC_SAMPLE_CLK_SOC_PLL_CLK_DIV

Function Documentation

§ ADCSetSampleDuration()

§ ADCSetInput()

§ ADCSetMemctlRange()

§ ADCSetPowerDownPolicy()

§ ADCSetSequence()

§ ADCSetSamplingClk()

§ ADCSetSamplingMode()

§ ADCSetTriggerSource()

§ ADCSetTriggerPolicy()

§ ADCStartConversion()

§ ADCStopConversion()

§ ADCEnableConversion()

§ ADCDisableConversion()

§ ADCEnableDmaTrigger()

§ ADCDisableDmaTrigger()

§ ADCReadResult()

§ ADCIsBusy()