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CC35xxDriverLibrary
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#include <stdint.h>#include "../inc/hw_adc.h"#include "../inc/hw_memmap.h"#include "../inc/hw_types.h"
Go to the source code of this file.
Macros | |
| #define | ADC_CLOCK_DIVIDER_1 ADC_CTL0_SCLKDIV_DIV_BY_1 |
| Set ADC clock to system clock divided by 1. More... | |
| #define | ADC_CLOCK_DIVIDER_2 ADC_CTL0_SCLKDIV_DIV_BY_2 |
| Set ADC clock to system clock divided by 2. More... | |
| #define | ADC_CLOCK_DIVIDER_4 ADC_CTL0_SCLKDIV_DIV_BY_4 |
| Set ADC clock to system clock divided by 4. More... | |
| #define | ADC_CLOCK_DIVIDER_8 ADC_CTL0_SCLKDIV_DIV_BY_8 |
| Set ADC clock to system clock divided by 8. More... | |
| #define | ADC_CLOCK_DIVIDER_16 ADC_CTL0_SCLKDIV_DIV_BY_16 |
| Set ADC clock to system clock divided by 16. More... | |
| #define | ADC_CLOCK_DIVIDER_24 ADC_CTL0_SCLKDIV_DIV_BY_24 |
| Set ADC clock to system clock divided by 24. More... | |
| #define | ADC_CLOCK_DIVIDER_32 ADC_CTL0_SCLKDIV_DIV_BY_32 |
| Set ADC clock to system clock divided by 32. More... | |
| #define | ADC_CLOCK_DIVIDER_48 ADC_CTL0_SCLKDIV_DIV_BY_48 |
| Set ADC clock to system clock divided by 48. More... | |
| #define | ADC_MODE_SINGLE (0 << ADC_MEMCTL_0_MOD_S) |
| Set ADC mode to single ended. More... | |
| #define | ADC_MODE_DIFFERENTIAL (1 << ADC_MEMCTL_0_MOD_S) |
| Set ADC mode to differential. More... | |
| #define | ADC_INTERNAL_REFERENCE 0 |
| Set ADC reference to internal, which is fixed to 1.4 V. More... | |
| #define | ADC_EXTERNAL_REFERENCE 1 |
| Set ADC reference to external, where VPP pin must be supplied with 1.8 V. More... | |
| #define | ADC_VDDA_REFERENCE 2 |
| Set ADC reference to VDDA, which is fixed to 1.8 V. More... | |
| #define | ADC_FULL_SCALE_RANGE_0V0_3V3 0 |
| Set ADC to measure from 0 to 3.3 V. More... | |
| #define | ADC_FULL_SCALE_RANGE_0V1_3V3 1 |
| Set ADC to measure from 0.1 to 3.3 V. More... | |
| #define | ADC_FULL_SCALE_RANGE_0V0_3V2 2 |
| Set ADC to measure from 0 to 3.2 V. More... | |
| #define | ADC_FULL_SCALE_RANGE_0V0_1V8 3 |
| Set ADC to measure from 0 to 1.8 V. More... | |
| #define | ADC_POWER_DOWN_POLICY_AUTO ADC_CTL0_PWRDN_AUTO |
| ADC is powered down on completion of a conversion if there is no pending trigger. To be used with ADCSetPowerDownPolicy() More... | |
| #define | ADC_POWER_DOWN_POLICY_MANUAL ADC_CTL0_PWRDN_MANUAL |
| ADC remains powered on as long as the power mode it set to manual. To be used with ADCSetPowerDownPolicy() More... | |
| #define | ADC_SEQUENCE_REPEATSEQUENCE ADC_CTL1_CONSEQ_REPEATSEQUENCE |
| Set ADC conversion sequence to repeat control registers defined by start and stop address, as set by ADCSetMemctlRange. More... | |
| #define | ADC_SEQUENCE_REPEATSINGLE ADC_CTL1_CONSEQ_REPEATSINGLE |
| Set ADC conversion sequence to repeat control register defined by start as set by ADCSetMemctlRange. More... | |
| #define | ADC_SEQUENCE_SEQUENCE ADC_CTL1_CONSEQ_SEQUENCE |
| Set ADC conversion sequence to a single pass of control registers defined by start and stop address, as set by ADCSetMemctlRange. More... | |
| #define | ADC_SEQUENCE_SINGLE ADC_CTL1_CONSEQ_SINGLE |
| Set ADC conversion sequence to do a single conversion of control register defined by start, as set by ADCSetMemctlRange. More... | |
| #define | ADC_SAMPLE_MODE_AUTO ADC_CTL1_SAMPMODE_AUTO |
| Sample duration is controlled by values set using ADCSetSampleDuration() More... | |
| #define | ADC_SAMPLE_MODE_MANUAL ADC_CTL1_SAMPMODE_MANUAL |
| Sample phase is manually started using ADCStartConversion() and manually stopped using ADCStopConversion() More... | |
| #define | ADC_TRIGGER_SOURCE_EVENT ADC_CTL1_TRIGSRC_EVENT |
| The ADC trigger source is a hardware event. More... | |
| #define | ADC_TRIGGER_SOURCE_SOFTWARE ADC_CTL1_TRIGSRC_SOFTWARE |
| The ADC trigger source is software. More... | |
| #define | ADC_TRIGGER_POLICY_AUTO_NEXT ADC_MEMCTL_0_TRIG_AUTO_NEXT |
| The next conversion is automatically started after the completion of the previous conversion. More... | |
| #define | ADC_TRIGGER_POLICY_TRIGGER_NEXT ADC_MEMCTL_0_TRIG_TRIGGER_NEXT |
| The next conversion requires a trigger. More... | |
| #define | ADC_INT_MEMRES_15 ADC_INTEVT0BM_MEMRESIFG15 |
| Result ready in memory result register 15. More... | |
| #define | ADC_INT_MEMRES_14 ADC_INTEVT0BM_MEMRESIFG14 |
| Result ready in memory result register 14. More... | |
| #define | ADC_INT_MEMRES_13 ADC_INTEVT0BM_MEMRESIFG13 |
| Result ready in memory result register 13. More... | |
| #define | ADC_INT_MEMRES_12 ADC_INTEVT0BM_MEMRESIFG12 |
| Result ready in memory result register 12. More... | |
| #define | ADC_INT_MEMRES_11 ADC_INTEVT0BM_MEMRESIFG11 |
| Result ready in memory result register 11. More... | |
| #define | ADC_INT_MEMRES_10 ADC_INTEVT0BM_MEMRESIFG10 |
| Result ready in memory result register 10. More... | |
| #define | ADC_INT_MEMRES_09 ADC_INTEVT0BM_MEMRESIFG9 |
| Result ready in memory result register 9. More... | |
| #define | ADC_INT_MEMRES_08 ADC_INTEVT0BM_MEMRESIFG8 |
| Result ready in memory result register 8. More... | |
| #define | ADC_INT_MEMRES_07 ADC_INTEVT0BM_MEMRESIFG7 |
| Result ready in memory result register 7. More... | |
| #define | ADC_INT_MEMRES_06 ADC_INTEVT0BM_MEMRESIFG6 |
| Result ready in memory result register 6. More... | |
| #define | ADC_INT_MEMRES_05 ADC_INTEVT0BM_MEMRESIFG5 |
| Result ready in memory result register 5. More... | |
| #define | ADC_INT_MEMRES_04 ADC_INTEVT0BM_MEMRESIFG4 |
| Result ready in memory result register 4. More... | |
| #define | ADC_INT_MEMRES_03 ADC_INTEVT0BM_MEMRESIFG3 |
| Result ready in memory result register 3. More... | |
| #define | ADC_INT_MEMRES_02 ADC_INTEVT0BM_MEMRESIFG2 |
| Result ready in memory result register 2. More... | |
| #define | ADC_INT_MEMRES_01 ADC_INTEVT0BM_MEMRESIFG1 |
| Result ready in memory result register 1. More... | |
| #define | ADC_INT_MEMRES_00 ADC_INTEVT0BM_MEMRESIFG0 |
| Result ready in memory result register 0. More... | |
| #define | ADC_INT_UVIFG ADC_INTEVT0BM_UVIFG |
| Conversion underflow. More... | |
| #define | ADC_INT_DMADONE ADC_INTEVT0BM_DMADONE |
| DMA transaction done. More... | |
| #define | ADC_INT_INIFG ADC_INTEVT0BM_INIFG |
| ADC result is inside window comparator range. More... | |
| #define | ADC_INT_LOWIFG ADC_INTEVT0BM_LOFG |
| ADC result is below window comparator range. More... | |
| #define | ADC_INT_HIGHIFG ADC_INTEVT0BM_HIFG |
| ADC result is above window comparator range. More... | |
| #define | ADC_INT_TOVIFG ADC_INTEVT0BM_TOVIFG |
| Sequence conversion timeout overflow. More... | |
| #define | ADC_INT_OVIFG ADC_INTEVT0BM_OVIFG |
| Conversion overflow. More... | |
| #define | ADC_INT_ALL |
| All interrupts. More... | |
ADC sample clock sources | |
| #define | ADC_SAMPLE_CLK_NONE 0 |
| Sample clock gated. More... | |
| #define | ADC_SAMPLE_CLK_SOC_CLK 1 |
| SOC clock. More... | |
| #define | ADC_SAMPLE_CLK_HFXT 2 |
| HFXT clock. More... | |
| #define | ADC_SAMPLE_CLK_SOC_PLL_CLK_DIV 3 |
| SOC PLL CLOCK DIV. More... | |
Functions | |
| void | ADCSetSampleDuration (uint32_t clkDiv, uint16_t clkCycles) |
| Sets the clock-divider value, and sample duration. More... | |
| void | ADCSetInput (uint32_t reference, uint8_t channel, uint8_t fullScaleRange, uint32_t index) |
| Sets the ADC reference source and input channel. More... | |
| void | ADCSetMemctlRange (uint32_t start, uint32_t stop) |
| Set start and stop control registers. More... | |
| void | ADCSetPowerDownPolicy (uint32_t powerDownPolicy) |
| Set power down policy. More... | |
| void | ADCSetSequence (uint32_t sequence) |
| Set conversion sequence. More... | |
| void | ADCSetSamplingClk (uint32_t clkSrc) |
| Set sampling clock source. More... | |
| void | ADCSetSamplingMode (uint32_t samplingMode) |
| Set ADC sampling mode. More... | |
| void | ADCSetTriggerSource (uint32_t triggerSource) |
| Set ADC trigger source. More... | |
| void | ADCSetTriggerPolicy (uint32_t triggerPolicy, uint32_t index) |
| Set ADC trigger policy. More... | |
| __STATIC_INLINE void | ADCStartConversion (void) |
| Start conversion. More... | |
| __STATIC_INLINE void | ADCStopConversion (void) |
| Stop sample phase of a conversion. More... | |
| __STATIC_INLINE void | ADCEnableConversion (void) |
| Enable conversion. More... | |
| __STATIC_INLINE void | ADCDisableConversion (void) |
| Disable conversion. More... | |
| __STATIC_INLINE void | ADCEnableDmaTrigger (void) |
| Enable DMA trigger for data transfer. More... | |
| __STATIC_INLINE void | ADCDisableDmaTrigger (void) |
| Disable DMA trigger for data transfer. More... | |
| __STATIC_INLINE uint32_t | ADCReadResult (uint32_t index) |
| Read conversion result from ADC. More... | |
| __STATIC_INLINE bool | ADCIsBusy (void) |
| Check if ADC is busy. More... | |
| __STATIC_INLINE uint32_t | ADCReadResultNonBlocking (uint32_t index) |
| Read conversion result from ADC. More... | |
| uint32_t | ADCValueToMicrovolts (uint32_t adcCode, uint32_t fullScaleRange) |
| Convert ADC code to microvolts. More... | |
| __STATIC_INLINE void | ADCEnableInterrupt (uint32_t intFlags) |
| Enables individual ADC interrupt sources. More... | |
| __STATIC_INLINE void | ADCDisableInterrupt (uint32_t intFlags) |
| Disables individual ADC interrupt sources. More... | |
| __STATIC_INLINE uint32_t | ADCRawInterruptStatus (void) |
| Gets the current raw interrupt status. More... | |
| __STATIC_INLINE uint32_t | ADCMaskedInterruptStatus (void) |
| Gets the current masked interrupt status. More... | |
| __STATIC_INLINE void | ADCClearInterrupt (uint32_t intFlags) |
| Clears ADC interrupt sources. More... | |
| void | ADCStoreTrims (void) |
| Store trim values. More... | |
| void | ADCRestoreTrims (void) |
| Restore trim values. More... | |