Data Fields
I2SWFF3_HWAttrs Struct Reference

I2S Hardware attributes. More...

#include <I2SWFF3.h>

Collaboration diagram for I2SWFF3_HWAttrs:
Collaboration graph
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Data Fields

I2SWFF3_ClkSrc clkSrc
 
I2SWFF3_ADFS adfs
 
uint32_t audioClkFreq
 
uint_least8_t sd1Pin
 
uint_least8_t sd1PinMux
 
uint_least8_t sd0Pin
 
uint_least8_t sd0PinMux
 
uint_least8_t sckPin
 
uint_least8_t sckPinMux
 
uint_least8_t cclkPin
 
uint_least8_t cclkPinMux
 
uint_least8_t wsPin
 
uint_least8_t wsPinMux
 
uint8_t intPriority
 

Detailed Description

I2S Hardware attributes.

intPriority is the I2S peripheral's interrupt priority, as defined by the RTOS kernel. This value is passed unmodified to HwiP_construct().

A sample structure is shown below:

const I2SWFF3_HWAttrs i2sHWAttrs[CONFIG_TI_DRIVERS_I2S_COUNT] = {
{
.adfs = {.tref = 100000, // ((1THz)/160MHz)*16 = 6250*16 = 100000
.div = 13, // div_temp1 = floor(160MHz/12.288MHz) = 13
// div_temp2 = ceil(160MHz/12.288MHz) = 14
// delta_temp1 = (1THz)*(1/(12.288MHz*13))-(1/160MHz) = -437
// delta_temp2 = (1THz)*(1/(12.288MHz*14))-(1/160MHz) = 10
// abs(delta_temp2) < abs (delta_temp1)
.delta = 160, // delta_temp2*16 = 160
.deltaSign = 0,}, // delta_temp2 is positive
.audioClkFreq = 12288031, // (1THz)/((((1THz)/160MHz)+(160/16))*13) = 12288031
.sd1Pin = CONFIG_I2S_ADI,
.sd1PinMux = 7,
.sd0Pin = CONFIG_I2S_ADO,
.sd0PinMux = 7,
.sckPin = CONFIG_I2S_BCLK,
.sckPinMux = 7,
.cclkPin = CONFIG_I2S_CCLK,
.cclkPinMux = 8,
.wsPin = CONFIG_I2S_WCLK,
.wsPinMux = 7,
.intPriority = ~0,
},
};

Field Documentation

§ clkSrc

I2SWFF3_ClkSrc I2SWFF3_HWAttrs::clkSrc

I2S clock source.

§ adfs

I2SWFF3_ADFS I2SWFF3_HWAttrs::adfs

ADFS configuration.

§ audioClkFreq

uint32_t I2SWFF3_HWAttrs::audioClkFreq

Audio clock (ACLK) frequency. This is the output of ADFS, so it must match clkSrc and the adfs configuration.

§ sd1Pin

uint_least8_t I2SWFF3_HWAttrs::sd1Pin

Pin used for SD1 signal.

§ sd1PinMux

uint_least8_t I2SWFF3_HWAttrs::sd1PinMux

Mux value used to mux the SD1 signal to sd1Pin.

§ sd0Pin

uint_least8_t I2SWFF3_HWAttrs::sd0Pin

Pin used for SD0 signal.

§ sd0PinMux

uint_least8_t I2SWFF3_HWAttrs::sd0PinMux

Mux value used to mux the SD0 signal to sd0Pin.

§ sckPin

uint_least8_t I2SWFF3_HWAttrs::sckPin

Pin used for SCLK signal.

§ sckPinMux

uint_least8_t I2SWFF3_HWAttrs::sckPinMux

Mux value used to mux the SCLK signal to sckPin.

§ cclkPin

uint_least8_t I2SWFF3_HWAttrs::cclkPin

Pin used for CCLK signal. Not used in most of the applications.

§ cclkPinMux

uint_least8_t I2SWFF3_HWAttrs::cclkPinMux

Mux value used to mux the CCLK signal to cclkPin.

§ wsPin

uint_least8_t I2SWFF3_HWAttrs::wsPin

Pin used for WS signal.

§ wsPinMux

uint_least8_t I2SWFF3_HWAttrs::wsPinMux

Mux value used to mux the WS signal to wsPin.

§ intPriority

uint8_t I2SWFF3_HWAttrs::intPriority

I2S Peripheral's interrupt priority.


The documentation for this struct was generated from the following file:
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