I2S.h
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32 /*!****************************************************************************
33  * @file I2S.h
34  * @brief Inter-Integrated Circuit Sound (I2S) Bus Driver
35  *
36  * The I2S header file should be included in an application as follows:
37  * @code
38  * #include <ti/drivers/I2S.h>
39  * @endcode
40  *
41  * @anchor ti_drivers_I2S_Overview
42  * # Overview #
43  *
44  * The I2S driver facilitates the use of Inter-IC Sound (I2S), which is
45  * used to connect digital audio devices so that audio signals can be
46  * communicated between devices. The I2S driver simplifies reading and
47  * writing to any of the Multichannel Audio Serial Port (McASP) peripherals
48  * on the board with Receive and Transmit support. These include read and
49  * write characters on the McASP peripheral.
50  *
51  * I2S interfaces typically consist of 4 or 5 signals. The 5th signal is not
52  * systematically used.
53  * @li <b>Serial Clock (SCK)</b> also called Bit Clock (BCLK) or Multichannel
54  * Audio Frame Synchronization (McAFSX)
55  * @li <b>Word Select (WS)</b> also called Word Clock (WCLK), Left Right
56  * Clock (LRCLK) or Multichannel Audio Clock (McACLK)
57  * @li <b>Serial Data (SD0)</b> also called AD0, AD1, McAXR0, or possibly SDI
58  * @li <b>Serial Data (SD1)</b> also called AD1, ADI, McAXR1, or possibly SDI
59  * @li <b>Controller Clock (CCLK)</b>
60  *
61  * <hr>
62  * @anchor ti_drivers_I2S_Usage
63  * # Usage #
64  *
65  * <b>The I2S driver provides the following APIs:</b>
66  * @li I2S_init(): @copybrief I2S_init
67  * @li I2S_open(): @copybrief I2S_open
68  * @li I2S_Params_init(): @copybrief I2S_Params_init
69  * @li I2S_Transaction_init(): @copybrief I2S_Transaction_init
70  * @li I2S_setReadQueueHead(): @copybrief I2S_setReadQueueHead
71  * @li I2S_setWriteQueueHead(): @copybrief I2S_setWriteQueueHead
72  * @li I2S_startClocks(): @copybrief I2S_startClocks
73  * @li I2S_startRead(): @copybrief I2S_startRead
74  * @li I2S_startWrite(): @copybrief I2S_startWrite
75  * @li I2S_stopRead(): @copybrief I2S_stopRead
76  * @li I2S_stopWrite(): @copybrief I2S_stopWrite
77  * @li I2S_stopClocks(): @copybrief I2S_stopClocks
78  * @li I2S_close(): @copybrief I2S_close
79  *
80  * <hr>
81  * @anchor ti_drivers_I2S_Driver_Transactions
82  * ### Transactions #
83  *
84  * Data transfers are achieved through #I2S_Transaction structures. Application
85  * is responsible to maintain the transactions queues. The I2S driver completes
86  * the transactions one by one. When a transaction is over, the I2S driver
87  * takes in consideration the next transaction (if the next transaction is
88  * NULL, the I2S drivers signals this to the user).
89  * The I2S driver relies on the following fields of the #I2S_Transaction to
90  * complete it:
91  * - the buffer
92  * - the length of the buffer
93  * - a pointer on the next transaction to achieve (kept in a List_Elem
94  * structure)
95  * .
96  * The I2S driver provides the following elements (fields of the
97  * #I2S_Transaction):
98  * - the number of untransferred bytes: the driver is designed to avoid memory
99  * corruption and will not complete an incomplete transaction (meaning a
100  * transaction where the buffer size would not permit to send or receive a
101  * whole number of samples). In this case, the system considers the samples
102  * of the beginning of the buffer and read/write as much as possible samples
103  * and ignore the end of the buffer. The number of untransafered bytes is the
104  * number of bytes left at the end of the buffer)
105  * - the number of completions of the transaction. This value is basically
106  * incremented by one every time the transaction is completed.
107  *
108  * Please note that these two fields are valid only when the transaction has
109  * been completed. Consult examples to get more details on the transaction
110  * usage.
111  *
112  * The sample buffer structure and content is different between devices. Please
113  * refer to the device-specific documentation for details.
114  *
115  * <hr>
116  * @anchor ti_drivers_I2S_Driver_ProvidingData
117  * ### Providing data to the I2S driver #
118  * Application is responsible to handle the queues of transactions.
119  * Application is also responsible to provide to the driver a pointer on the
120  * first transaction to consider (considering that all the following
121  * transactions are correctly queued).
122  * #I2S_setReadQueueHead() and #I2S_setWriteQueueHead() allow the user to set
123  * the first transaction to consider. These functions should be used only when
124  * no transaction is running on the considered interface.
125  *
126  * <hr>
127  * @anchor ti_drivers_I2S_Driver_StartStopClocks
128  * ### Start and stop clocks and transactions #
129  * Clocks can be started and stopped by the application.
130  * Read and write can be started and stopped independently.
131  * To start a transfer, clocks must be running.
132  * To stop the clocks no transfer must be running.
133  * Refer to the following functions for more details:
134  * @li I2S_startClocks() @li I2S_startRead() @li I2S_startWrite()
135  * @li I2S_stopRead() @li I2S_stopWrite() @li I2S_stopClocks()
136  *
137  * @note
138  * @li In #I2S_TARGET mode, clocks must be started and stopped exactly like
139  * it is done in #I2S_CONTROLLER mode.
140  * @li If the queue of transaction is not empty, the calls to #I2S_stopRead()
141  * and #I2S_stopWrite() are blocking and potentially long.
142  *
143  * <hr>
144  * @anchor ti_drivers_I2S_Examples
145  * ## Examples #
146  *
147  * @li @ref ti_drivers_I2S_Example_PlayAndStop "Play and Stop"
148  * @li @ref ti_drivers_I2S_Example_Streaming "Streaming"
149  * @li @ref ti_drivers_I2S_Example_RepeatMode "Repeat"
150  *
151  * <hr>
152  * @anchor ti_drivers_I2S_Example_PlayAndStop
153  * ### Mode Play and Stop #
154  * The following example shows how to simultaneously receive and send out a
155  * given amount of data.
156  *
157  * <hr>
158  * @anchor ti_drivers_I2S_Example_PlayAndStop_Code
159  * @code
160  * static I2S_Handle i2sHandle;
161  *
162  * static uint16_t readBuf1[500]; // the data read will end up in this buffer
163  * static uint16_t readBuf2[500]; // the data read will end up in this buffer
164  * static uint16_t readBuf3[500]; // the data read will end up in this buffer
165  * static uint16_t writeBuf1[250] = {...some data...}; // this buffer will be sent out
166  * static uint16_t writeBuf2[250] = {...some data...}; // this buffer will be sent out
167  * static uint16_t writeBuf3[250] = {...some data...}; // this buffer will be sent out
168  *
169  * static I2S_Transaction i2sRead1;
170  * static I2S_Transaction i2sRead2;
171  * static I2S_Transaction i2sRead3;
172  * static I2S_Transaction i2sWrite1;
173  * static I2S_Transaction i2sWrite2;
174  * static I2S_Transaction i2sWrite3;
175  *
176  * List_List i2sReadList;
177  * List_List i2sWriteList;
178  *
179  * static volatile bool readStopped = (bool)true;
180  * static volatile bool writeStopped = (bool)true;
181  *
182  * static void writeCallbackFxn(I2S_Handle handle, int_fast16_t status, I2S_Transaction *transactionPtr) {
183  *
184  * if(status & I2S_ALL_TRANSACTIONS_SUCCESS){
185  *
186  * // Note: Here we do not queue new transfers or set a new queue-head.
187  * // The driver will stop sending out data on its own.
188  * writeStopped = (bool)true;
189  * }
190  * }
191  *
192  * static void readCallbackFxn(I2S_Handle handle, int_fast16_t status, I2S_Transaction *transactionPtr) {
193  *
194  * if(status & I2S_ALL_TRANSACTIONS_SUCCESS){
195  *
196  * // Note: Here we do not queue new transfers or set a new queue-head.
197  * // The driver will stop receiving data on its own.
198  * readStopped = (bool)true;
199  * }
200  * }
201  *
202  * static void errCallbackFxn(I2S_Handle handle, int_fast16_t status, I2S_Transaction *transactionPtr) {
203  *
204  * // Handle the I2S error
205  * }
206  *
207  * void *modePlayAndStopThread(void *arg0)
208  * {
209  * I2S_Params i2sParams;
210  *
211  * I2S_init();
212  *
213  * // Initialize I2S opening parameters
214  * I2S_Params_init(&i2sParams);
215  * i2sParams.fixedBufferLength = 250; // fixedBufferLength is the greatest common
216  * // divisor of all the different buffers
217  * // (here buffers' size are 250 and 500 bytes)
218  * i2sParams.writeCallback = writeCallbackFxn ;
219  * i2sParams.readCallback = readCallbackFxn ;
220  * i2sParams.errorCallback = errCallbackFxn;
221  *
222  * i2sHandle = I2S_open(CONFIG_I2S0, &i2sParams);
223  *
224  * // Initialize the read-transactions
225  * I2S_Transaction_init(&i2sRead1);
226  * I2S_Transaction_init(&i2sRead2);
227  * I2S_Transaction_init(&i2sRead3);
228  * i2sRead1.bufPtr = readBuf1;
229  * i2sRead2.bufPtr = readBuf2;
230  * i2sRead3.bufPtr = readBuf3;
231  * i2sRead1.bufSize = sizeof(readBuf1);
232  * i2sRead2.bufSize = sizeof(readBuf2);
233  * i2sRead3.bufSize = sizeof(readBuf3);
234  * List_put(&i2sReadList, (List_Elem*)&i2sRead1);
235  * List_put(&i2sReadList, (List_Elem*)&i2sRead2);
236  * List_put(&i2sReadList, (List_Elem*)&i2sRead3);
237  *
238  * I2S_setReadQueueHead(i2sHandle, &i2sRead1);
239  *
240  * // Initialize the write-transactions
241  * I2S_Transaction_init(&i2sWrite1);
242  * I2S_Transaction_init(&i2sWrite2);
243  * I2S_Transaction_init(&i2sWrite3);
244  * i2sWrite1.bufPtr = writeBuf1;
245  * i2sWrite2.bufPtr = writeBuf2;
246  * i2sWrite3.bufPtr = writeBuf3;
247  * i2sWrite1.bufSize = sizeof(writeBuf1);
248  * i2sWrite2.bufSize = sizeof(writeBuf2);
249  * i2sWrite3.bufSize = sizeof(writeBuf3);
250  * List_put(&i2sWriteList, (List_Elem*)&i2sWrite1);
251  * List_put(&i2sWriteList, (List_Elem*)&i2sWrite2);
252  * List_put(&i2sWriteList, (List_Elem*)&i2sWrite3);
253  *
254  * I2S_setWriteQueueHead(i2sHandle, &i2sWrite1);
255  *
256  * I2S_startClocks(i2sHandle);
257  * I2S_startWrite(i2sHandle);
258  * I2S_startRead(i2sHandle);
259  *
260  * readStopped = (bool)false;
261  * writeStopped = (bool)false;
262  *
263  * while (1) {
264  *
265  * if(readStopped && writeStopped) {
266  * I2S_stopClocks(i2sHandle);
267  * I2S_close(i2sHandle);
268  * while (1);
269  * }
270  * }
271  * }
272  * @endcode
273  *
274  * \note If you desire to put only one transaction in the queue,
275  * fixedBufferLength must be inferior to half the length (in bytes) of the
276  * buffer to transfer.
277  *
278  * <hr>
279  * @anchor ti_drivers_I2S_Example_Streaming
280  * ### Writing Data in Continuous Streaming Mode #
281  * The following example shows how to read and write data in streaming mode.
282  * A dummy treatment of the data is also done.
283  * This example is not complete (semaphore and tasks creation are not shown).
284  *
285  * <hr>
286  * @anchor ti_drivers_I2S_Example_Streaming_Code
287  * @code
288  * static I2S_Handle i2sHandle;
289  * static sem_t semDataReadyForTreatment;
290  *
291  * // These buffers will successively be written, treated and sent out
292  * static uint16_t readBuf1[500];
293  * static uint16_t readBuf2[500];
294  * static uint16_t readBuf3[500];
295  * static uint16_t readBuf4[500];
296  * static uint16_t writeBuf1[500]={0};
297  * static uint16_t writeBuf2[500]={0};
298  * static uint16_t writeBuf3[500]={0};
299  * static uint16_t writeBuf4[500]={0};
300  *
301  * // These transactions will successively be part of the
302  * // i2sReadList, the treatmentList and the i2sWriteList
303  * static I2S_Transaction i2sRead1;
304  * static I2S_Transaction i2sRead2;
305  * static I2S_Transaction i2sRead3;
306  * static I2S_Transaction i2sRead4;
307  * static I2S_Transaction i2sWrite1;
308  * static I2S_Transaction i2sWrite2;
309  * static I2S_Transaction i2sWrite3;
310  * static I2S_Transaction i2sWrite4;
311  *
312  * List_List i2sReadList;
313  * List_List treatmentList;
314  * List_List i2sWriteList;
315  *
316  * static void writeCallbackFxn(I2S_Handle handle, int_fast16_t status, I2S_Transaction *transactionPtr) {
317  *
318  * // We must remove the previous transaction (the current one is not over)
319  * I2S_Transaction *transactionFinished = (I2S_Transaction*)List_prev(&transactionPtr->queueElement);
320  *
321  * if(transactionFinished != NULL){
322  * // Remove the finished transaction from the write queue
323  * List_remove(&i2sWriteList, (List_Elem*)transactionFinished);
324  *
325  * // This transaction must now feed the read queue (we do not need anymore the data of this transaction)
326  * transactionFinished->queueElement.next = NULL;
327  * List_put(&i2sReadList, (List_Elem*)transactionFinished);
328  *
329  * // We need to queue a new transaction: let's take one in the treatment queue
330  * I2S_Transaction *newTransaction = (I2S_Transaction*)List_head(&treatmentList);
331  * if(newTransaction != NULL){
332  * List_remove(&treatmentList, (List_Elem*)newTransaction);
333  * newTransaction->queueElement.next = NULL;
334  * List_put(&i2sWriteList, (List_Elem*)newTransaction);
335  * }
336  * }
337  * }
338  *
339  * static void readCallbackFxn(I2S_Handle handle, int_fast16_t status, I2S_Transaction *transactionPtr) {
340  *
341  * // We must remove the previous transaction (the current one is not over)
342  * I2S_Transaction *transactionFinished = (I2S_Transaction*)List_prev(&transactionPtr->queueElement);
343  *
344  * if(transactionFinished != NULL){
345  * // The finished transaction contains data that must be treated
346  * List_remove(&i2sReadList, (List_Elem*)transactionFinished);
347  * transactionFinished->queueElement.next = NULL;
348  * List_put(&treatmentList, (List_Elem*)transactionFinished);
349  *
350  * // Start the treatment of the data
351  * sem_post(&semDataReadyForTreatment);
352  *
353  * // We do not need to queue transaction here: writeCallbackFxn takes care of this :)
354  * }
355  * }
356  *
357  * static void errCallbackFxn(I2S_Handle handle, int_fast16_t status, I2S_Transaction *transactionPtr) {
358  *
359  * // Handle the I2S error
360  * }
361  *
362  * void *echoExampleThread(void *arg0)
363  * {
364  * I2S_Params i2sParams;
365  *
366  * I2S_init();
367  *
368  * int retc = sem_init(&semDataReadyForTreatment, 0, 0);
369  * if (retc == -1) {
370  * while (1);
371  * }
372  *
373  * // Initialize the treatmentList (this list is initially empty)
374  * List_clearList(&treatmentList);
375  *
376  * //Initialize I2S opening parameters
377  * I2S_Params_init(&i2sParams);
378  * i2sParams.fixedBufferLength = 500;
379  * i2sParams.writeCallback = writeCallbackFxn ;
380  * i2sParams.readCallback = readCallbackFxn ;
381  * i2sParams.errorCallback = errCallbackFxn;
382  *
383  * i2sHandle = I2S_open(CONFIG_I2S0, &i2sParams);
384  *
385  * // Initialize the read-transactions
386  * I2S_Transaction_init(&i2sRead1);
387  * I2S_Transaction_init(&i2sRead2);
388  * I2S_Transaction_init(&i2sRead3);
389  * I2S_Transaction_init(&i2sRead4);
390  * i2sRead1.bufPtr = readBuf1;
391  * i2sRead2.bufPtr = readBuf2;
392  * i2sRead3.bufPtr = readBuf3;
393  * i2sRead4.bufPtr = readBuf4;
394  * i2sRead1.bufSize = sizeof(readBuf1);
395  * i2sRead2.bufSize = sizeof(readBuf2);
396  * i2sRead3.bufSize = sizeof(readBuf3);
397  * i2sRead4.bufSize = sizeof(readBuf4);
398  * List_clearList(&i2sReadList);
399  * List_put(&i2sReadList, (List_Elem*)&i2sRead1);
400  * List_put(&i2sReadList, (List_Elem*)&i2sRead2);
401  * List_put(&i2sReadList, (List_Elem*)&i2sRead3);
402  * List_put(&i2sReadList, (List_Elem*)&i2sRead4);
403  *
404  * I2S_setReadQueueHead(i2sHandle, &i2sRead1);
405  *
406  * // Initialize the write-transactions
407  * I2S_Transaction_init(&i2sWrite1);
408  * I2S_Transaction_init(&i2sWrite2);
409  * I2S_Transaction_init(&i2sWrite3);
410  * I2S_Transaction_init(&i2sWrite4);
411  * i2sWrite1.bufPtr = writeBuf1;
412  * i2sWrite2.bufPtr = writeBuf2;
413  * i2sWrite3.bufPtr = writeBuf3;
414  * i2sWrite4.bufPtr = writeBuf4;
415  * i2sWrite1.bufSize = sizeof(writeBuf1);
416  * i2sWrite2.bufSize = sizeof(writeBuf2);
417  * i2sWrite3.bufSize = sizeof(writeBuf3);
418  * i2sWrite4.bufSize = sizeof(writeBuf4);
419  * List_clearList(&i2sWriteList);
420  * List_put(&i2sWriteList, (List_Elem*)&i2sWrite1);
421  * List_put(&i2sWriteList, (List_Elem*)&i2sWrite2);
422  * List_put(&i2sWriteList, (List_Elem*)&i2sWrite3);
423  * List_put(&i2sWriteList, (List_Elem*)&i2sWrite4);
424  *
425  * I2S_setWriteQueueHead(i2sHandle, &i2sWrite1);
426  *
427  * I2S_startClocks(i2sHandle);
428  * I2S_startWrite(i2sHandle);
429  * I2S_startRead(i2sHandle);
430  *
431  * while (1) {
432  * uint8_t k = 0;
433  * I2S_Transaction* lastAchievedReadTransaction = NULL;
434  *
435  * retc = sem_wait(&semDataReadyForTreatment);
436  * if (retc == -1) {
437  * while (1);
438  * }
439  *
440  * lastAchievedReadTransaction = (I2S_Transaction*) List_head(&treatmentList);
441  *
442  * if(lastAchievedReadTransaction != NULL) {
443  *
444  * // Need a critical section to be sure to have corresponding bufPtr and bufSize
445  * uintptr_t key = HwiP_disable();
446  * uint16_t *buf = lastAchievedReadTransaction->bufPtr;
447  * uint16_t bufLength = lastAchievedReadTransaction->bufSize / sizeof(uint16_t);
448  * HwiP_restore(key);
449  *
450  * // My dummy data treatment...
451  * for(k=0; k<bufLength; k++) {
452  * buf[k]--;
453  * }
454  * for(k=0; k<bufLength; k++) {
455  * buf[k]++;
456  * }
457  * }
458  * }
459  * }
460  * @endcode
461  *
462  * <hr>
463  * @anchor ti_drivers_I2S_Example_RepeatMode
464  * ### Writing Data in repeat Mode #
465  * The following example shows how to read and write data in repeat mode.
466  * The same buffers are continuously written and send out while the driver is
467  * not stopped.
468  * Here, we decide to only stop sending out after an arbitrary number of
469  * sending.
470  *
471  * <hr>
472  * @anchor ti_drivers_I2S_Example_RepeatMode_Code
473  * @code
474  * static I2S_Handle i2sHandle;
475  *
476  * // This buffer will be continuously re-written
477  * static uint16_t readBuf[500];
478  * // This data will be continuously sent out
479  * static uint16_t writeBuf[500] = {...some cool data...};
480  *
481  * static I2S_Transaction i2sRead;
482  * static I2S_Transaction i2sWrite;
483  *
484  * List_List i2sReadList;
485  * List_List i2sWriteList;
486  *
487  * static volatile bool writeFinished = (bool)false;
488  * static void writeCallbackFxn(I2S_Handle handle, int_fast16_t status, I2S_Transaction *transactionPtr) {
489  *
490  * // Nothing to do here: the buffer(s) are queued in a ring list, the transfers are
491  * // executed without any action from the application.
492  *
493  * // We must consider the previous transaction (ok, when you have only one transaction it's the same)
494  * I2S_Transaction *transactionFinished = (I2S_Transaction*)List_prev(&transactionPtr->queueElement);
495  *
496  * if(transactionFinished != NULL){
497  * // After an arbitrary number of completion of the transaction, we will stop writting
498  * if(transactionFinished->numberOfCompletions >= 10) {
499  *
500  * // Note: You cannot use I2S_stopRead() / I2S_stopWrite() in the callback.
501  * // The execution of these functions is potentially blocking and can mess up the
502  * // system.
503  *
504  * writeFinished = (bool)true;
505  * }
506  * }
507  * }
508  *
509  * static void readCallbackFxn(I2S_Handle handle, int_fast16_t status, I2S_Transaction *transactionPtr) {
510  * // Nothing to do here: the buffer(s) are queued in a ring list, the transfers are
511  * // executed without any action from the application.
512  * }
513  *
514  * static void errCallbackFxn(I2S_Handle handle, int_fast16_t status, I2S_Transaction *transactionPtr) {
515  *
516  * // Handle the I2S error
517  * }
518  *
519  * void *modeRepeat(void *arg0)
520  * {
521  * I2S_Params i2sParams;
522  *
523  * // Initialize I2S opening parameters
524  * I2S_Params_init(&i2sParams);
525  * i2sParams.fixedBufferLength = 500; // No problem here: the driver consider
526  * // the list as an infinite list.
527  * i2sParams.writeCallback = writeCallbackFxn ;
528  * i2sParams.readCallback = readCallbackFxn ;
529  * i2sParams.errorCallback = errCallbackFxn;
530  *
531  * i2sHandle = I2S_open(CONFIG_I2S0, &i2sParams);
532  *
533  * // Initialize the read-transactions
534  * I2S_Transaction_init(&i2sRead);
535  * i2sRead.bufPtr = readBuf;
536  * i2sRead.bufSize = sizeof(readBuf);
537  * List_put(&i2sReadList, (List_Elem*)&i2sRead);
538  * List_tail(&i2sReadList)->next = List_head(&i2sReadList);// Read buffers are queued in a ring-list
539  * List_head(&i2sReadList)->prev = List_tail(&i2sReadList);
540  *
541  * I2S_setReadQueueHead(i2sHandle, &i2sRead);
542  *
543  * // Initialize the write-transactions
544  * I2S_Transaction_init(&i2sWrite);
545  * i2sWrite.bufPtr = writeBuf;
546  * i2sWrite.bufSize = sizeof(writeBuf);
547  * List_put(&i2sWriteList, (List_Elem*)&i2sWrite);
548  * List_tail(&i2sWriteList)->next = List_head(&i2sWriteList); // Write buffers are queued in a ring-list
549  * List_head(&i2sWriteList)->prev = List_tail(&i2sWriteList);
550  *
551  * I2S_setWriteQueueHead(i2sHandle, &i2sWrite);
552  *
553  * I2S_startClocks(i2sHandle);
554  * I2S_startWrite(i2sHandle);
555  * I2S_startRead(i2sHandle);
556  *
557  * while (1) {
558  *
559  * if(writeFinished){
560  * writeFinished = (bool)false;
561  * I2S_stopWrite(i2sHandle);
562  * }
563  * }
564  * }
565  * @endcode
566  *
567  * @note In the case of circular lists, there is no problem to put only one
568  * buffer in the queue.
569  *
570  * <hr>
571  * @anchor ti_drivers_I2S_Configuration
572  * # Configuration
573  *
574  * Refer to the @ref driver_configuration "Driver's Configuration" section for
575  * driver configuration information.
576  * <hr>
577  ******************************************************************************
578  */
579 
580 #ifndef ti_drivers_I2S__include
581 #define ti_drivers_I2S__include
582 
583 #include <stddef.h>
584 #include <stdbool.h>
585 #include <stdint.h>
586 
587 #include <ti/drivers/utils/List.h>
588 
589 #ifdef __cplusplus
590 extern "C" {
591 #endif
592 
607 #define I2S_ALL_TRANSACTIONS_SUCCESS (0x0001U)
608 
615 #define I2S_TRANSACTION_SUCCESS (0x0002U)
616 
624 #define I2S_TIMEOUT_ERROR (0x0100U)
625 
633 #define I2S_BUS_ERROR (0x0200U)
634 
642 #define I2S_WS_ERROR (0x0400U)
643 
651 #define I2S_PTR_READ_ERROR (0x0800U)
652 
660 #define I2S_PTR_WRITE_ERROR (0x1000U)
661 
673 typedef struct
674 {
676  void *object;
677 
679  void const *hwAttrs;
680 } I2S_Config;
681 
686 
690 typedef struct
691 {
695  void *bufPtr;
697  size_t bufSize;
705  uintptr_t arg;
707 
723 typedef void (*I2S_Callback)(I2S_Handle handle, int_fast16_t status, I2S_Transaction *transactionPtr);
724 
733 typedef void (*I2S_RegUpdate)(uint32_t ui32Base, uint32_t ui32NextPointer);
734 
741 typedef void (*I2S_StopInterface)(I2S_Handle handle);
742 
753 typedef enum
754 {
755 
762 
769 typedef enum
770 {
771 
775 } I2S_Role;
776 
782 typedef enum
783 {
784 
791 
800 
809 typedef enum
810 {
818 
827 
828 } I2S_PhaseType;
829 
836 typedef enum
837 {
838 
840  I2S_SD0_INPUT = 0x01U,
841  I2S_SD0_OUTPUT = 0x02U,
843  I2S_SD1_INPUT = 0x10U,
844  I2S_SD1_OUTPUT = 0x20U
847 
870 typedef enum
871 {
872 
880 
889 
898 
906 
907  I2S_1_CHANNEL = 0x01U,
908  I2S_2_CHANNELS = 0x03U,
909  I2S_3_CHANNELS = 0x07U,
910  I2S_4_CHANNELS = 0x0FU,
911  I2S_5_CHANNELS = 0x1FU,
912  I2S_6_CHANNELS = 0x3FU,
913  I2S_7_CHANNELS = 0x7FU,
914  I2S_8_CHANNELS = 0xFFU,
918 
927 typedef struct
928 {
929 
941 
947  bool invertWS;
948 
958 
969 
973  I2S_MemoryLength memorySlotLength;
974 
980 
986 
988  uint8_t bitsPerWord;
989 
994 
999 
1006  I2S_DataInterfaceUse SD0Use;
1007 
1014  I2S_DataInterfaceUse SD1Use;
1015 
1023  I2S_ChannelConfig SD0Channels;
1024 
1032  I2S_ChannelConfig SD1Channels;
1033 
1037  I2S_PhaseType phaseType;
1038 
1046 
1048  uint16_t startUpDelay;
1049 
1055  uint16_t CCLKDivider;
1056 
1066 
1072 
1078 
1081 
1083  void *custom;
1084 } I2S_Params;
1085 
1091 extern const I2S_Params I2S_defaultParams;
1092 
1103 extern void I2S_close(I2S_Handle handle);
1104 
1113 extern void I2S_init(void);
1114 
1135 extern I2S_Handle I2S_open(uint_least8_t index, I2S_Params *params);
1136 
1172 extern void I2S_Params_init(I2S_Params *params);
1173 
1191 extern void I2S_Transaction_init(I2S_Transaction *transaction);
1192 
1210 extern void I2S_setReadQueueHead(I2S_Handle handle, I2S_Transaction *transaction);
1211 
1229 extern void I2S_setWriteQueueHead(I2S_Handle handle, I2S_Transaction *transaction);
1230 
1244 extern void I2S_startClocks(I2S_Handle handle);
1245 
1265 extern void I2S_stopClocks(I2S_Handle handle);
1266 
1291 extern void I2S_startRead(I2S_Handle handle);
1292 
1317 extern void I2S_startWrite(I2S_Handle handle);
1318 
1342 extern void I2S_stopRead(I2S_Handle handle);
1343 
1367 extern void I2S_stopWrite(I2S_Handle handle);
1368 
1369 #ifdef __cplusplus
1370 }
1371 #endif
1372 
1373 #endif /* ti_drivers_I2S__include */
ADC_Params params
Definition: Driver_Init.h:11
I2S_Handle I2S_open(uint_least8_t index, I2S_Params *params)
Function to initialize a given I2S peripheral specified by the particular index value. The parameter specifies which mode the I2S will operate.
I2S_MemoryLength
I2S slot memory length setting.
Definition: I2S.h:753
Definition: I2S.h:842
void * object
Definition: I2S.h:676
Only channel 2 is activated.
Definition: I2S.h:897
Definition: I2S.h:756
size_t bytesTransferred
Definition: I2S.h:699
const I2S_Params I2S_defaultParams
Default I2S_Params structure.
Definition: I2S.h:839
bool isMSBFirst
Definition: I2S.h:957
uint8_t beforeWordPadding
Definition: I2S.h:979
Definition: I2S.h:758
void(* I2S_Callback)(I2S_Handle handle, int_fast16_t status, I2S_Transaction *transactionPtr)
The definition of a user-callback function used by the I2S driver.
Definition: I2S.h:723
Definition: I2S.h:911
Definition: I2S.h:913
Definition: I2S.h:772
void(* I2S_RegUpdate)(uint32_t ui32Base, uint32_t ui32NextPointer)
The definition of a function used to set the I2S register.
Definition: I2S.h:733
size_t untransferredBytes
Definition: I2S.h:701
Definition: I2S.h:773
void I2S_setWriteQueueHead(I2S_Handle handle, I2S_Transaction *transaction)
Function to set the first write-transaction to consider.
I2S_DataInterfaceUse SD1Use
Definition: I2S.h:1014
uint32_t samplingFrequency
Definition: I2S.h:1065
I2S Global configuration.
Definition: I2S.h:673
I2S_DataInterfaceUse
I2S data interface configuration.
Definition: I2S.h:836
No channel activated.
Definition: I2S.h:879
I2S_PhaseType
I2S phase setting.
Definition: I2S.h:809
Definition: I2S.h:840
Definition: I2S.h:915
I2S_Role
I2S controller / target selection.
Definition: I2S.h:769
uint16_t fixedBufferLength
Definition: I2S.h:1045
Sampling on falling edges.
Definition: I2S.h:790
void I2S_init(void)
Function to initializes the I2S module.
void I2S_startClocks(I2S_Handle handle)
Start the WS, SCK and CCLK clocks.
uint16_t numberOfCompletions
Definition: I2S.h:703
bool isDMAUnused
Definition: I2S.h:968
Sampling on rising edges.
Definition: I2S.h:798
I2S_MemoryLength memorySlotLength
Definition: I2S.h:973
I2S_SamplingEdge samplingEdge
Definition: I2S.h:998
Definition: I2S.h:757
List_Elem queueElement
Definition: I2S.h:693
void I2S_startWrite(I2S_Handle handle)
Start write transactions.
I2S_Config * I2S_Handle
A handle that is returned from a I2S_open() call.
Definition: I2S.h:685
void I2S_Transaction_init(I2S_Transaction *transaction)
Initialize an I2S_Transaction struct to known state.
I2S_ChannelConfig
Channels used selection.
Definition: I2S.h:870
void I2S_setReadQueueHead(I2S_Handle handle, I2S_Transaction *transaction)
Function to set the first read-transaction to consider.
I2S_SamplingEdge
I2S sampling setting.
Definition: I2S.h:782
bool invertWS
Definition: I2S.h:947
I2S_PhaseType phaseType
Definition: I2S.h:1037
Definition: I2S.h:907
uint16_t startUpDelay
Definition: I2S.h:1048
Definition: I2S.h:759
I2S_DataInterfaceUse SD0Use
Definition: I2S.h:1006
void I2S_stopClocks(I2S_Handle handle)
Stops the WS, SCK and CCLK clocks.
void(* I2S_StopInterface)(I2S_Handle handle)
The definition of a function used to stop an I2S interface.
Definition: I2S.h:741
bool trueI2sFormat
Definition: I2S.h:940
I2S_Callback errorCallback
Definition: I2S.h:1080
I2S_Role moduleRole
Definition: I2S.h:993
void I2S_stopWrite(I2S_Handle handle)
Stop write transactions.
Channels 1 and 2 are activated.
Definition: I2S.h:905
I2S_ChannelConfig SD1Channels
Definition: I2S.h:1032
void I2S_stopRead(I2S_Handle handle)
Stop read transactions.
Definition: I2S.h:914
uintptr_t arg
Definition: I2S.h:705
size_t bufSize
Definition: I2S.h:697
void * custom
Definition: I2S.h:1083
void I2S_Params_init(I2S_Params *params)
Function to initialize the I2S_Params struct to its defaults.
void I2S_startRead(I2S_Handle handle)
Start read transactions.
Dual phase.
Definition: I2S.h:826
I2S_Callback writeCallback
Definition: I2S.h:1077
Definition: I2S.h:909
Definition: I2S.h:844
Definition: I2S.h:843
uint8_t bitsPerWord
Definition: I2S.h:988
Definition: I2S.h:910
Only channel 1 is activated.
Definition: I2S.h:888
I2S_Callback readCallback
Definition: I2S.h:1071
Definition: List.h:126
I2S transaction descriptor.
Definition: I2S.h:690
Definition: I2S.h:908
void const * hwAttrs
Definition: I2S.h:679
void I2S_close(I2S_Handle handle)
Function to close a given I2S peripheral specified by the I2S handle.
Single phase.
Definition: I2S.h:817
Definition: I2S.h:912
uint8_t afterWordPadding
Definition: I2S.h:985
I2S_ChannelConfig SD0Channels
Definition: I2S.h:1023
Definition: I2S.h:841
uint16_t CCLKDivider
Definition: I2S.h:1055
Linked List interface for use in drivers.
Basic I2S Parameters.
Definition: I2S.h:927
void * bufPtr
Definition: I2S.h:695
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