GPTimerWFF3.h

Go to the documentation of this file.

/*
 * Copyright (c) 2024, Texas Instruments Incorporated
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * *  Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 * *  Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * *  Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
/*!*****************************************************************************
 *  @file       GPTimerWFF3.h
 *  @brief      GPTimer driver implementation for Wi-Fi F3 devices
 *
 *  @anchor ti_drivers_GPTimerWFF3_Overview
 *  # Overview #
 *  The GPTimer driver allows you to measure elapsed time with simple and
 *  portable APIs. It also allows for asynchronous callbacks after a
 *  certain amount of time has elapsed.
 *  In addition the driver supports APIs for both capture and compare
 *  of IO signals muxable to the four channels of each GPT peripheral
 *  instance. The channel capture functionality can be used to measure period
 *  and duty cycle of an input signal. The channel compare functionality can
 *  be used for generating PWM signals.
 *
 *  The GPTimer driver also handles the general purpose timer resource
 *  allocation. For each driver that requires use of a general purpose timer, it
 *  calls #GPTimerWFF3_open() to occupy the specified timer, and calls
 *  #GPTimerWFF3_close() to release the occupied timer resource.
 *
 *  @anchor ti_drivers_GPTimerWFF3_PeripheralProperties
 *  # GPT peripheral properties #
 *  The table below lists supported counter widths for each peripheral instance
 *  number on available device types.
 *  The timer counter clock is sourced from the internal prescaler stage which
 *  has the system clock as input.
 *  The prescaler can be configured to divide the input system clock,
 *  effectively extending the maximal time interval for the timer counter while
 *  reducing the timer resolution.
 *
 * | Device type   | GPT0    | GPT1    |
 * |---------------|---------|---------|
 * | CC35xx        | 32 bits | 32 bits |

 *
 *  @anchor ti_drivers_GPTimerWFF3_CounterModes
 *  # Counter Modes #
 *  The GPTimer driver supports the following timer counter modes:
 *    - Oneshot mode counting upwards. When the counter reaches the target
 *      value, the timer is stopped automatically and the TGT interrupt status
 *      flag (#GPTimerWFF3_INT_TGT) is set.
 *    - Periodic mode counting upwards. When the counter reaches target value it
 *      wraps and restarts counting from 0 again. The TGT interrupt status flag
 *      is set each time the target value is reached. The ZERO interrupt status
 *      flag (#GPTimerWFF3_INT_ZERO) is set each time the counter restarts
 *      from 0.
 *    - Periodic mode counting upwards/downwards. When the counter reaches
 *      target value while counting upwards the TGT interrupt flag is set and it
 *      starts counting downwards to 0. When 0 is reached the ZERO interrupt
 *      status flag is set and the sequence is repeated.
 *
 *  @anchor ti_drivers_GPTimerWFF3_UnsupportedFeatures
 *  # GPT peripheral features not supported by the GPTimer driver #
 *  - Channel input from the event fabric is not supported
 *  - Channel output dead band control is not supported
 *  - Use of channel input filter is not supported
 *  - DMA usage is not supported
 *  - ADC trigger is not supported
 *  - QDEC mode where the timer acts as a quadrature decoder is not supported
 *  - Timer synchronization is not supported
 *  - IR generation is not supported
 *  - Brushless DC motor control is not supported
 *  - Fault and Park is not supported
 *  - Prescaler counter clock sourced from events is not supported
 *
 *  @anchor ti_drivers_GPTimerWFF3_PowerManagement
 *  # Power Management #
 *  The power management framework will try to put the device into the most
 *  power efficient mode whenever possible. Please see the technical reference
 *  manual for further details on each power mode.
 *
 *  The GPTimer driver will set constraints on disallowed power modes when
 *  needed, removing the need for the application to handle this.
 *  The following statements are valid:
 *    - After #GPTimerWFF3_open():
 *        The device is still allowed to enter Sleep. When the device is
 *        active, the corresponding GPT peripheral will be enabled and clocked.
 *        Note that a configured counter target and configured channels will not
 *        be retained when going in and out of Sleep.
 *        The counter target is set by the functions
 *        #GPTimerWFF3_setInitialCounterTarget() and
 *        #GPTimerWFF3_setNextCounterTarget().
 *    - After #GPTimerWFF3_start():
 *        The device will only go to Idle power mode since the system clock is
 *        needed for timer operation.
 *    - After #GPTimerWFF3_stop():
 *        The device is still allowed to enter Sleep. When the device is
 *        active, the corresponding GPT peripheral will be enabled and clocked.
 *    - After #GPTimerWFF3_close():
 *        The underlying GPT peripherals bus clock is turned off. The device is
 *        allowed to enter Sleep.
 *
 *  @anchor ti_drivers_GPTimerWFF3_Accuracy
 *  # Accuracy #
 *  The timer clock of the GPT peripheral is dependent on the system clock.
 *
 *  @anchor ti_drivers_GPTimerWFF3_Usage
 *  # Usage #
 *
 *  This documentation provides some basic @ref ti_drivers_GPTimerWFF3_Examples
 *  "examples" in the form of commented code fragments.
 *
 *
 *  <hr>
 *  @anchor ti_drivers_GPTimerWFF3_Examples
 *  # Examples
 *
 *  @note
 *  <b>The following examples are intended for reference only and are not
 *  intended for application use.</b>
 *
 *  @li @ref ti_drivers_GPTimerWFF3_Example_periodic "Periodic timer"
 *  @li @ref ti_drivers_GPTimerWFF3_Example_output "Output signal generation"
 *
 *
 *  @anchor ti_drivers_GPTimerWFF3_Example_periodic
 *  ## Periodic timer example##
 *  The code example below will generate an interrupt using the GPTimer every
 *  1 ms.
 *  Note that when a count-up counter mode is used, the number of counter ticks
 *  to reach the target value equals target value + 1.
 *
 *  @anchor ti_drivers_GPTimerWFF3_Code
 *  @code
 *  #include <ti/drivers/timer/GPTimerWFF3.h>
 *
 *  void timerCallback(GPTimerWFF3_Handle gptHandle, GPTimerWFF3_IntMask interruptMask) {
 *      // interrupt callback code goes here. Minimize processing in interrupt.
 *  }
 *
 *  void* taskFxn(void* arg) {
 *
 *    GPTimerWFF3_Handle gptHandle;
 *    GPTimerWFF3_Params params;
 *    uint32_t counterTarget;
 *
 *    // Initialize parameters and assign callback function to be used
 *    GPTimerWFF3_Params_init(&params);
 *    params.hwiCallbackFxn = timerCallback;
 *
 *    // Open driver
 *    gptHandle = GPTimerWFF3_open(0, &params);
 *
 *    // Set counter target
 *    counterTarget = 40000 - 1;  // 1 ms with a counter clock of 40 MHz
 *    GPTimerWFF3_setInitialCounterTarget(gptHandle, counterTarget, true);
 *
 *    // Enable counter target interrupt
 *    GPTimerWFF3_enableInterrupt(gptHandle, GPTimerWFF3_INT_TGT);
 *
 *    // Start counter in count-up-periodic mode
 *    GPTimerWFF3_start(gptHandle, GPTimerWFF3_CTL_MODE_UP_PER);
 *
 *    // Generate counter target interrupt every 1 ms forever
 *    while(1);
 *  }
 *  @endcode
 *
 *
 *  @anchor ti_drivers_GPTimerWFF3_Example_output
 *  ## Output signal generation example##
 *  The code example below will generate an output signal of 32 kHz with a 50 %
 *  duty cycle on channel 2.
 *  With an up/down counter mode, the counter target value determines the signal
 *  period and the value must be set to half the number of the total counter
 *  ticks per signal period.
 *  With a channel action of toggle-on-compare, the channel compare value must
 *  be set to (counter target value)/2 in order to obtain a 50 % duty cycle of
 *  the output signal.
 *  The period of a 32 kHz signal equals 1250 counter ticks when the counter has
 *  a 40 MHz clock.
 *
 *
 *  @code
 *  #include <ti/drivers/timer/GPTimerWFF3.h>
 *
 *  void* taskFxn(void* arg) {
 *
 *    GPTimerWFF3_Handle gptHandle;
 *    GPTimerWFF3_Params params;
 *    uint32_t cntTargetVal = 1250/2;
 *    uint32_t chCompVal    = cntTargetVal/2;
 *
 *    // Configure channel 2 action
 *    GPTimerWFF3_Params_init(&params);
 *    params.channelProperty[2].action = GPTimerWFF3_CH_TOGGLE_ON_COMPARE_PERIODIC;
 *
 *    // Open driver
 *    gptHandle = GPTimerWFF3_open(0, &params);
 *
 *    // Set channel output signal period
 *    GPTimerWFF3_setInitialCounterTarget(gptHandle, cntTargetVal, false);
 *
 *    // Set channel output signal duty cycle
 *    GPTimerWFF3_setInitialChannelCompVal(gptHandle, GPTimerWFF3_CH_NO_2, chCompVal, false);
 *
 *    // Start the GPTimer in up-down-periodic mode
 *    GPTimerWFF3_start(gptHandle, GPTimerWFF3_CTL_MODE_UPDWN_PER);
 *
 *    // Output signal forever
 *    while(1);
 *  }
 *  @endcode
 *
 *
 *  ## Opening the GPTimerWFF3 Driver #
 *
 *  Opening a GPTimerWFFF3 requires four steps:
 *  1.  Create and initialize a #GPTimerWFF3_Params structure.
 *  2.  Set non-default parameter values.
 *  3.  Call #GPTimerWFF3_open(), passing the index of the timer in the
 *      #GPTimerWFF3_Config structure, and the address of the #GPTimerWFF3_Params
 *      structure. The timer instance is specified by the index in the
 *      #GPTimerWFF3_Config structure.
 *  4.  Verify that the timer handle returned by #GPTimerWFF3_open() is non-NULL.
 *      The handle will be used to operate the timer driver instance you just
 *      opened.
 *
 *  <hr>
 *  @anchor ti_drivers_GPTWFF3_Configuration
 *  # Configuration
 *
 *  Refer to the @ref driver_configuration "Driver's Configuration" section
 *  for driver configuration information.
 *  <hr>
 *
 *  ============================================================================
 */

#ifndef ti_drivers_timer_GPTimerWFF3__include
#define ti_drivers_timer_GPTimerWFF3__include

#include <ti/drivers/dpl/HwiP.h>
#include <ti/drivers/Power.h>
#include <ti/drivers/GPIO.h>

#include <ti/devices/DeviceFamily.h>
#include DeviceFamily_constructPath(inc/hw_gptimer.h)

#ifdef __cplusplus
extern "C" {
#endif

/* Define for number of channels on the GPT peripheral */
#define NO_OF_GPT_CHANNELS 4

typedef enum
{
    GPTimerWFF3_CH_NO_0 = 0,
    GPTimerWFF3_CH_NO_1 = 1,
    GPTimerWFF3_CH_NO_2 = 2,
    GPTimerWFF3_CH_NO_3 = 3,
} GPTimerWFF3_ChannelNo;

typedef enum
{
    GPTimerWFF3_CH_DIR_NONE   = 0,
    GPTimerWFF3_CH_DIR_INPUT  = 1,
    GPTimerWFF3_CH_DIR_OUTPUT = 2,
} GPTimerWFF3_ChannelDir;

typedef enum
{
    GPTimerWFF3_CH_LEVEL_LOW  = GPTIMER_OUTCTL_CLROUT0,
    GPTimerWFF3_CH_LEVEL_HIGH = GPTIMER_OUTCTL_SETOUT0,
} GPTimerWFF3_ChannelLevel;

typedef enum
{
    GPTimerWFF3_CH_EDGE_NONE = GPTIMER_C0CFG_EDGE_NONE,
    GPTimerWFF3_CH_EDGE_RISE = GPTIMER_C0CFG_EDGE_RISE,
    GPTimerWFF3_CH_EDGE_FALL = GPTIMER_C0CFG_EDGE_FALL,
    GPTimerWFF3_CH_EDGE_BOTH = GPTIMER_C0CFG_EDGE_BOTH,
} GPTimerWFF3_ChannelInputEdge;

typedef enum
{
    GPTimerWFF3_CTL_MODE_DIS       = GPTIMER_CTL_MODE_DIS,
    GPTimerWFF3_CTL_MODE_UP_ONCE   = GPTIMER_CTL_MODE_UP_ONCE,
    GPTimerWFF3_CTL_MODE_UP_PER    = GPTIMER_CTL_MODE_UP_PER,
    GPTimerWFF3_CTL_MODE_UPDWN_PER = GPTIMER_CTL_MODE_UPDWN_PER,
} GPTimerWFF3_Mode;

typedef enum
{
    GPTimerWFF3_INT_TGT            = 1 << GPTIMER_RIS_TGT_S,
    GPTimerWFF3_INT_ZERO           = 1 << GPTIMER_RIS_ZERO_S,
    GPTimerWFF3_INT_COUNTER_CHANGE = 1 << GPTIMER_RIS_CNTRCHNG_S,
    GPTimerWFF3_INT_DIR_CHANGE     = 1 << GPTIMER_RIS_DIRCHNG_S,
    GPTimerWFF3_INT_CH0_CC         = 1 << GPTIMER_RIS_C0CC_S,
    GPTimerWFF3_INT_CH1_CC         = 1 << GPTIMER_RIS_C1CC_S,
    GPTimerWFF3_INT_CH2_CC         = 1 << GPTIMER_RIS_C2CC_S,
    GPTimerWFF3_INT_CH3_CC         = 1 << GPTIMER_RIS_C3CC_S,
} GPTimerWFF3_Interrupt;

typedef enum
{
    GPTimerWFF3_DEBUG_STALL_OFF       = GPTIMER_EMU_HALT_DIS,
    GPTimerWFF3_DEBUG_STALL_IMMEDIATE = (GPTIMER_EMU_HALT_EN | GPTIMER_EMU_CTL_IMMEDIATE),
    GPTimerWFF3_DEBUG_STALL_ON_ZERO   = (GPTIMER_EMU_HALT_EN | GPTIMER_EMU_CTL_ZERCOND),
} GPTimerWFF3_DebugMode;

typedef enum
{
    GPTimerWFF3_CH_COMPARE_COUNTER_DIR_BOTH = GPTIMER_CTL_CMPDIR_BOTH,
    GPTimerWFF3_CH_COMPARE_COUNTER_DIR_UP   = GPTIMER_CTL_CMPDIR_UP,
    GPTimerWFF3_CH_COMPARE_COUNTER_DIR_DOWN = GPTIMER_CTL_CMPDIR_DOWN,
} GPTimerWFF3_ChannelCmpDir;

typedef enum
{
    GPTimerWFF3_CH_DISABLE = GPTIMER_C0CFG_CCACT_DIS,

    /***************************************************************************
     *                        Channel compare actions.                         *
     *                                                                         *
     * The following list of channel compare actions will force the channel to *
     * be configured as an output.                                             *
     ***************************************************************************/
    GPTimerWFF3_CH_TOGGLE_ON_COMPARE_PERIODIC = GPTIMER_C0CFG_CCACT_TGL_ON_CMP,

    GPTimerWFF3_CH_TOGGLE_ON_COMPARE_ONCE = GPTIMER_C0CFG_CCACT_TGL_ON_CMP_DIS,

    GPTimerWFF3_CH_SET_ON_COMPARE_PERIODIC = GPTIMER_C0CFG_CCACT_SET_ON_CMP,

    GPTimerWFF3_CH_SET_ON_COMPARE_ONCE = GPTIMER_C0CFG_CCACT_SET_ON_CMP_DIS,

    GPTimerWFF3_CH_CLEAR_ON_COMPARE_PERIODIC = GPTIMER_C0CFG_CCACT_CLR_ON_CMP,

    GPTimerWFF3_CH_CLEAR_ON_COMPARE_ONCE = GPTIMER_C0CFG_CCACT_CLR_ON_CMP_DIS,

    GPTimerWFF3_CH_SET_ON_0_TOGGLE_ON_CMP_PERIODIC = GPTIMER_C0CFG_CCACT_SET_ON_0_TGL_ON_CMP,

    GPTimerWFF3_CH_SET_ON_0_TOGGLE_ON_COMPARE_ONCE = GPTIMER_C0CFG_CCACT_SET_ON_0_TGL_ON_CMP_DIS,

    GPTimerWFF3_CH_CLR_ON_0_TOGGLE_ON_COMPARE_PERIODIC = GPTIMER_C0CFG_CCACT_CLR_ON_0_TGL_ON_CMP,

    GPTimerWFF3_CH_CLR_ON_0_TOGGLE_ON_COMPARE_ONCE = GPTIMER_C0CFG_CCACT_CLR_ON_0_TGL_ON_CMP_DIS,

    GPTimerWFF3_CH_PULSE_ON_COMPARE_PERIODIC = GPTIMER_C0CFG_CCACT_PULSE_ON_CMP,

    GPTimerWFF3_CH_PULSE_ON_COMPARE_ONCE = GPTIMER_C0CFG_CCACT_PULSE_ON_CMP_DIS,

    /**************************************************************************
     *                     Channel capture actions.                           *
     *                                                                        *
     * The following list of channel actions will force the channel to be     *
     * configured as an input.                                                *
     * The counter value will be captured and the captured value can be read  *
     * by the #GPTimerWFF3_getChCompareVal() and                              *
     * #GPTimerWFF3_getNextChCompareVal() functions.                          *
     **************************************************************************/
    GPTimerWFF3_CH_SET_ON_CAPTURE_PERIODIC = GPTIMER_C0CFG_CCACT_SET_ON_CAPT,

    GPTimerWFF3_CH_SET_ON_CAPTURE_ONCE = GPTIMER_C0CFG_CCACT_SET_ON_CAPT_DIS,

    GPTimerWFF3_CH_PULSE_WIDTH_MEASURE = GPTIMER_C0CFG_CCACT_PER_PULSE_WIDTH_MEAS,
} GPTimerWFF3_ChannelAction;

/* Forward declaration of GPTimer configuration */
typedef struct GPTimerWFF3_Config GPTimerWFF3_Config;

/* GPTimer handle is pointer to configuration structure */
typedef GPTimerWFF3_Config *GPTimerWFF3_Handle;

/* Interrupt bit vector. See GPTimerWFF3_Interrupt for available interrupts */
typedef uint16_t GPTimerWFF3_IntMask;

typedef void (*GPTimerWFF3_HwiFxn)(GPTimerWFF3_Handle handle, GPTimerWFF3_IntMask interruptMask);

typedef struct GPTimerWFF3_ChannelProp
{
    GPTimerWFF3_ChannelAction action;
    GPTimerWFF3_ChannelInputEdge inputEdge;
} GPTimerWFF3_ChannelProp;

typedef struct GPTimerWFF3_Params
{
    GPTimerWFF3_HwiFxn hwiCallbackFxn;
    bool intPhaseLate;
    uint8_t prescalerDiv;
    GPTimerWFF3_DebugMode debugStallMode;
    GPTimerWFF3_ChannelCmpDir counterDirChCompare;
    GPTimerWFF3_ChannelProp channelProperty[NO_OF_GPT_CHANNELS];
} GPTimerWFF3_Params;

typedef struct GPTimerWFF3_ChannelConf
{
    uint8_t pin;
    uint8_t pinMux;
    uint8_t nPin;
    uint8_t nPinMux;
} GPTimerWFF3_ChannelConf;

typedef struct GPTimerWFF3_HWAttrs
{
    uint32_t baseAddr;
    PowerWFF3_Resource powerID;
    GPTimerWFF3_ChannelConf channelConfig[NO_OF_GPT_CHANNELS];
    uint8_t intNum;
    uint8_t intPriority;
} GPTimerWFF3_HWAttrs;

typedef struct GPTimerWFF3_Object
{
    HwiP_Struct hwi;
    GPTimerWFF3_HwiFxn hwiCallbackFxn;
    Power_NotifyObj postNotify;
    uintptr_t arg;
    bool isOpen;
    bool intPhaseLate;
    uint8_t prescalerDiv;
    GPTimerWFF3_DebugMode debugStallMode;
    GPTimerWFF3_ChannelCmpDir counterDirChCompare;
    GPTimerWFF3_ChannelProp channelProperty[NO_OF_GPT_CHANNELS];
} GPTimerWFF3_Object;

struct GPTimerWFF3_Config
{
    GPTimerWFF3_Object *object;
    const GPTimerWFF3_HWAttrs *hwAttrs;
};

extern void GPTimerWFF3_Params_init(GPTimerWFF3_Params *params);

extern GPTimerWFF3_Handle GPTimerWFF3_open(uint_least8_t index, const GPTimerWFF3_Params *params);

extern void GPTimerWFF3_close(GPTimerWFF3_Handle handle);

extern void GPTimerWFF3_start(GPTimerWFF3_Handle handle, GPTimerWFF3_Mode mode);

extern void GPTimerWFF3_stop(GPTimerWFF3_Handle handle);

extern void GPTimerWFF3_setInitialCounterTarget(GPTimerWFF3_Handle handle, uint32_t value, bool intFlagClr);

extern void GPTimerWFF3_setNextCounterTarget(GPTimerWFF3_Handle handle, uint32_t value, bool intFlagClr);

extern uint32_t GPTimerWFF3_getCounter(GPTimerWFF3_Handle handle);

extern uintptr_t GPTimerWFF3_getArg(GPTimerWFF3_Handle handle);

extern void GPTimerWFF3_setArg(GPTimerWFF3_Handle handle, uintptr_t arg);

void GPTimerWFF3_enableInterrupt(GPTimerWFF3_Handle handle, GPTimerWFF3_IntMask intMask);

void GPTimerWFF3_disableInterrupt(GPTimerWFF3_Handle handle, GPTimerWFF3_IntMask intMask);

void GPTimerWFF3_setInitialChannelCompVal(GPTimerWFF3_Handle handle,
                                          GPTimerWFF3_ChannelNo chNo,
                                          uint32_t value,
                                          bool intFlagClr);

void GPTimerWFF3_setNextChannelCompVal(GPTimerWFF3_Handle handle,
                                       GPTimerWFF3_ChannelNo chNo,
                                       uint32_t value,
                                       bool intFlagClr);

void GPTimerWFF3_setChannelOutputLevel(GPTimerWFF3_Handle handle,
                                       GPTimerWFF3_ChannelNo chNo,
                                       GPTimerWFF3_ChannelLevel level);

uint32_t GPTimerWFF3_getChCompareVal(GPTimerWFF3_Handle handle, GPTimerWFF3_ChannelNo chNo);

uint32_t GPTimerWFF3_getChCaptureVal(GPTimerWFF3_Handle handle, GPTimerWFF3_ChannelNo chNo);

uint32_t GPTimerWFF3_getNextChCompareVal(GPTimerWFF3_Handle handle, GPTimerWFF3_ChannelNo chNo);

uint32_t GPTimerWFF3_getNextChCaptureVal(GPTimerWFF3_Handle handle, GPTimerWFF3_ChannelNo chNo);

uint32_t GPTimerWFF3_getCounterWidth(GPTimerWFF3_Handle handle);

#ifdef __cplusplus
}
#endif
#endif /* ti_drivers_timer_GPTimerWFF3__include */