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CC35xxDriverLibrary
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Go to the source code of this file.
| #define PLL_SHARING_O_WCSPLLM 0x00000000U |
| #define PLL_SHARING_O_WCSPLLN 0x00000004U |
| #define PLL_SHARING_O_WCSQFACCFG 0x00000008U |
| #define PLL_SHARING_O_WCSPFACCFG 0x0000000CU |
| #define PLL_SHARING_O_WCSPLLSWAL 0x00000010U |
| #define PLL_SHARING_O_WCSPLLCFG 0x00000014U |
| #define PLL_SHARING_O_CR 0x00000018U |
| #define PLL_SHARING_O_GEN 0x0000001CU |
| #define PLL_SHARING_O_WCSCFG 0x00000020U |
| #define PLL_SHARING_O_GENCFG 0x00000024U |
| #define PLL_SHARING_O_LOCK 0x00000028U |
| #define PLL_SHARING_O_SOPBM 0x0000002CU |
| #define PLL_SHARING_O_DBGSS 0x00000030U |
| #define PLL_SHARING_O_ICG 0x00000034U |
| #define PLL_SHARING_WCSPLLM_VAL_W 9U |
| #define PLL_SHARING_WCSPLLM_VAL_M 0x000001FFU |
| #define PLL_SHARING_WCSPLLM_VAL_S 0U |
| #define PLL_SHARING_WCSPLLN_VAL_W 7U |
| #define PLL_SHARING_WCSPLLN_VAL_M 0x0000007FU |
| #define PLL_SHARING_WCSPLLN_VAL_S 0U |
| #define PLL_SHARING_WCSPLLN_NSEL 0x00000080U |
| #define PLL_SHARING_WCSPLLN_NSEL_M 0x00000080U |
| #define PLL_SHARING_WCSPLLN_NSEL_S 7U |
| #define PLL_SHARING_WCSQFACCFG_SWAL_W 24U |
| #define PLL_SHARING_WCSQFACCFG_SWAL_M 0x00FFFFFFU |
| #define PLL_SHARING_WCSQFACCFG_SWAL_S 0U |
| #define PLL_SHARING_WCSPFACCFG_SWAL_W 20U |
| #define PLL_SHARING_WCSPFACCFG_SWAL_M 0x000FFFFFU |
| #define PLL_SHARING_WCSPFACCFG_SWAL_S 0U |
| #define PLL_SHARING_WCSPLLSWAL_EN 0x00000001U |
| #define PLL_SHARING_WCSPLLSWAL_EN_M 0x00000001U |
| #define PLL_SHARING_WCSPLLSWAL_EN_S 0U |
| #define PLL_SHARING_WCSPLLSWAL_BYP 0x00000002U |
| #define PLL_SHARING_WCSPLLSWAL_BYP_M 0x00000002U |
| #define PLL_SHARING_WCSPLLSWAL_BYP_S 1U |
| #define PLL_SHARING_WCSPLLSWAL_PRBSEN 0x00000004U |
| #define PLL_SHARING_WCSPLLSWAL_PRBSEN_M 0x00000004U |
| #define PLL_SHARING_WCSPLLSWAL_PRBSEN_S 2U |
| #define PLL_SHARING_WCSPLLSWAL_PRBSGN 0x00000008U |
| #define PLL_SHARING_WCSPLLSWAL_PRBSGN_M 0x00000008U |
| #define PLL_SHARING_WCSPLLSWAL_PRBSGN_S 3U |
| #define PLL_SHARING_WCSPLLSWAL_CONSWAL_W 2U |
| #define PLL_SHARING_WCSPLLSWAL_CONSWAL_M 0x00000030U |
| #define PLL_SHARING_WCSPLLSWAL_CONSWAL_S 4U |
| #define PLL_SHARING_WCSPLLCFG_EN 0x00000001U |
| #define PLL_SHARING_WCSPLLCFG_EN_M 0x00000001U |
| #define PLL_SHARING_WCSPLLCFG_EN_S 0U |
| #define PLL_SHARING_WCSPLLCFG_OV_W 2U |
| #define PLL_SHARING_WCSPLLCFG_OV_M 0x00000006U |
| #define PLL_SHARING_WCSPLLCFG_OV_S 1U |
| #define PLL_SHARING_WCSPLLCFG_LOCKCNT_W 4U |
| #define PLL_SHARING_WCSPLLCFG_LOCKCNT_M 0x00000078U |
| #define PLL_SHARING_WCSPLLCFG_LOCKCNT_S 3U |
| #define PLL_SHARING_WCSPLLCFG_USELOCKMON 0x00000080U |
| #define PLL_SHARING_WCSPLLCFG_USELOCKMON_M 0x00000080U |
| #define PLL_SHARING_WCSPLLCFG_USELOCKMON_S 7U |
| #define PLL_SHARING_WCSPLLCFG_DISCNT_W 3U |
| #define PLL_SHARING_WCSPLLCFG_DISCNT_M 0x00000700U |
| #define PLL_SHARING_WCSPLLCFG_DISCNT_S 8U |
| #define PLL_SHARING_WCSPLLCFG_FCLKSEL 0x00000800U |
| #define PLL_SHARING_WCSPLLCFG_FCLKSEL_M 0x00000800U |
| #define PLL_SHARING_WCSPLLCFG_FCLKSEL_S 11U |
| #define PLL_SHARING_WCSPLLCFG_GLMFCLKSEL 0x00001000U |
| #define PLL_SHARING_WCSPLLCFG_GLMFCLKSEL_M 0x00001000U |
| #define PLL_SHARING_WCSPLLCFG_GLMFCLKSEL_S 12U |
| #define PLL_SHARING_WCSPLLCFG_FCLKFSOV 0x00002000U |
| #define PLL_SHARING_WCSPLLCFG_FCLKFSOV_M 0x00002000U |
| #define PLL_SHARING_WCSPLLCFG_FCLKFSOV_S 13U |
| #define PLL_SHARING_WCSPLLCFG_LOCKOV_W 2U |
| #define PLL_SHARING_WCSPLLCFG_LOCKOV_M 0x0000C000U |
| #define PLL_SHARING_WCSPLLCFG_LOCKOV_S 14U |
| #define PLL_SHARING_WCSPLLCFG_LFREQMODEN 0x00010000U |
| #define PLL_SHARING_WCSPLLCFG_LFREQMODEN_M 0x00010000U |
| #define PLL_SHARING_WCSPLLCFG_LFREQMODEN_S 16U |
| #define PLL_SHARING_WCSPLLCFG_HFREQMODEN 0x00020000U |
| #define PLL_SHARING_WCSPLLCFG_HFREQMODEN_M 0x00020000U |
| #define PLL_SHARING_WCSPLLCFG_HFREQMODEN_S 17U |
| #define PLL_SHARING_WCSPLLCFG_CLRVCOSLP 0x00040000U |
| #define PLL_SHARING_WCSPLLCFG_CLRVCOSLP_M 0x00040000U |
| #define PLL_SHARING_WCSPLLCFG_CLRVCOSLP_S 18U |
| #define PLL_SHARING_WCSPLLCFG_PHSEL_W 5U |
| #define PLL_SHARING_WCSPLLCFG_PHSEL_M 0x00F80000U |
| #define PLL_SHARING_WCSPLLCFG_PHSEL_S 19U |
| #define PLL_SHARING_WCSPLLCFG_PHASEOV 0x01000000U |
| #define PLL_SHARING_WCSPLLCFG_PHASEOV_M 0x01000000U |
| #define PLL_SHARING_WCSPLLCFG_PHASEOV_S 24U |
| #define PLL_SHARING_CR_PLLEN 0x00000001U |
| #define PLL_SHARING_CR_PLLEN_M 0x00000001U |
| #define PLL_SHARING_CR_PLLEN_S 0U |
| #define PLL_SHARING_GEN_CRDIV2OV 0x00000001U |
| #define PLL_SHARING_GEN_CRDIV2OV_M 0x00000001U |
| #define PLL_SHARING_GEN_CRDIV2OV_S 0U |
| #define PLL_SHARING_GEN_CRM3DIV2OV 0x00000002U |
| #define PLL_SHARING_GEN_CRM3DIV2OV_M 0x00000002U |
| #define PLL_SHARING_GEN_CRM3DIV2OV_S 1U |
| #define PLL_SHARING_GEN_SOCDIV2OV 0x00000004U |
| #define PLL_SHARING_GEN_SOCDIV2OV_M 0x00000004U |
| #define PLL_SHARING_GEN_SOCDIV2OV_S 2U |
| #define PLL_SHARING_GEN_PPLLDIVVAL_W 2U |
| #define PLL_SHARING_GEN_PPLLDIVVAL_M 0x00000030U |
| #define PLL_SHARING_GEN_PPLLDIVVAL_S 4U |
| #define PLL_SHARING_GEN_PPLLLDDIVV 0x00000040U |
| #define PLL_SHARING_GEN_PPLLLDDIVV_M 0x00000040U |
| #define PLL_SHARING_GEN_PPLLLDDIVV_S 6U |
| #define PLL_SHARING_GEN_PCLKSRCCNG 0x00000080U |
| #define PLL_SHARING_GEN_PCLKSRCCNG_M 0x00000080U |
| #define PLL_SHARING_GEN_PCLKSRCCNG_S 7U |
| #define PLL_SHARING_GEN_PDIVEN 0x00000100U |
| #define PLL_SHARING_GEN_PDIVEN_M 0x00000100U |
| #define PLL_SHARING_GEN_PDIVEN_S 8U |
| #define PLL_SHARING_GEN_PHYDIV2OV 0x00000200U |
| #define PLL_SHARING_GEN_PHYDIV2OV_M 0x00000200U |
| #define PLL_SHARING_GEN_PHYDIV2OV_S 9U |
| #define PLL_SHARING_GEN_CRM3ICGOV 0x00010000U |
| #define PLL_SHARING_GEN_CRM3ICGOV_M 0x00010000U |
| #define PLL_SHARING_GEN_CRM3ICGOV_S 16U |
| #define PLL_SHARING_GEN_SOCICGOV 0x00020000U |
| #define PLL_SHARING_GEN_SOCICGOV_M 0x00020000U |
| #define PLL_SHARING_GEN_SOCICGOV_S 17U |
| #define PLL_SHARING_GEN_HICGOV 0x00040000U |
| #define PLL_SHARING_GEN_HICGOV_M 0x00040000U |
| #define PLL_SHARING_GEN_HICGOV_S 18U |
| #define PLL_SHARING_GEN_PICGOV 0x00080000U |
| #define PLL_SHARING_GEN_PICGOV_M 0x00080000U |
| #define PLL_SHARING_GEN_PICGOV_S 19U |
| #define PLL_SHARING_GEN_GPADCICGOV 0x00100000U |
| #define PLL_SHARING_GEN_GPADCICGOV_M 0x00100000U |
| #define PLL_SHARING_GEN_GPADCICGOV_S 20U |
| #define PLL_SHARING_GEN_CRICGOV 0x00200000U |
| #define PLL_SHARING_GEN_CRICGOV_M 0x00200000U |
| #define PLL_SHARING_GEN_CRICGOV_S 21U |
| #define PLL_SHARING_GEN_PHYICGOV 0x00400000U |
| #define PLL_SHARING_GEN_PHYICGOV_M 0x00400000U |
| #define PLL_SHARING_GEN_PHYICGOV_S 22U |
| #define PLL_SHARING_GEN_UALGNPHYCR 0x01000000U |
| #define PLL_SHARING_GEN_UALGNPHYCR_M 0x01000000U |
| #define PLL_SHARING_GEN_UALGNPHYCR_S 24U |
| #define PLL_SHARING_WCSCFG_CTL_W 32U |
| #define PLL_SHARING_WCSCFG_CTL_M 0xFFFFFFFFU |
| #define PLL_SHARING_WCSCFG_CTL_S 0U |
| #define PLL_SHARING_GENCFG_DFTWCSPICGOV 0x00000001U |
| #define PLL_SHARING_GENCFG_DFTWCSPICGOV_M 0x00000001U |
| #define PLL_SHARING_GENCFG_DFTWCSPICGOV_S 0U |
| #define PLL_SHARING_LOCK_STS 0x00000001U |
| #define PLL_SHARING_LOCK_STS_M 0x00000001U |
| #define PLL_SHARING_LOCK_STS_S 0U |
| #define PLL_SHARING_LOCK_MONSTS 0x00000002U |
| #define PLL_SHARING_LOCK_MONSTS_M 0x00000002U |
| #define PLL_SHARING_LOCK_MONSTS_S 1U |
| #define PLL_SHARING_SOPBM_PLLEN 0x00000001U |
| #define PLL_SHARING_SOPBM_PLLEN_M 0x00000001U |
| #define PLL_SHARING_SOPBM_PLLEN_S 0U |
| #define PLL_SHARING_SOPBM_FREFSEL 0x00000002U |
| #define PLL_SHARING_SOPBM_FREFSEL_M 0x00000002U |
| #define PLL_SHARING_SOPBM_FREFSEL_S 1U |
| #define PLL_SHARING_SOPBM_BYPSEL 0x00000004U |
| #define PLL_SHARING_SOPBM_BYPSEL_M 0x00000004U |
| #define PLL_SHARING_SOPBM_BYPSEL_S 2U |
| #define PLL_SHARING_DBGSS_FSEL 0x00000001U |
| #define PLL_SHARING_DBGSS_FSEL_M 0x00000001U |
| #define PLL_SHARING_DBGSS_FSEL_S 0U |
| #define PLL_SHARING_ICG_CRM3DIS 0x00000001U |
| #define PLL_SHARING_ICG_CRM3DIS_M 0x00000001U |
| #define PLL_SHARING_ICG_CRM3DIS_S 0U |
| #define PLL_SHARING_ICG_CRDIS 0x00000002U |
| #define PLL_SHARING_ICG_CRDIS_M 0x00000002U |
| #define PLL_SHARING_ICG_CRDIS_S 1U |
| #define PLL_SHARING_ICG_SOCDIS 0x00000004U |
| #define PLL_SHARING_ICG_SOCDIS_M 0x00000004U |
| #define PLL_SHARING_ICG_SOCDIS_S 2U |
| #define PLL_SHARING_ICG_HDIS 0x00000008U |
| #define PLL_SHARING_ICG_HDIS_M 0x00000008U |
| #define PLL_SHARING_ICG_HDIS_S 3U |
| #define PLL_SHARING_ICG_PLL32DIS 0x00000010U |
| #define PLL_SHARING_ICG_PLL32DIS_M 0x00000010U |
| #define PLL_SHARING_ICG_PLL32DIS_S 4U |
| #define PLL_SHARING_ICG_PHYDIS 0x00000020U |
| #define PLL_SHARING_ICG_PHYDIS_M 0x00000020U |
| #define PLL_SHARING_ICG_PHYDIS_S 5U |
| #define PLL_SHARING_ICG_SOCPSWLDIS 0x00000040U |
| #define PLL_SHARING_ICG_SOCPSWLDIS_M 0x00000040U |
| #define PLL_SHARING_ICG_SOCPSWLDIS_S 6U |