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CC35xxDriverLibrary
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Go to the source code of this file.
| #define HSM_O_EIP130_072_MAILBOX1_IN 0x00000000U |
| #define HSM_O_EIP130_072_MAILBOX2_IN 0x00000400U |
| #define HSM_O_AICPOLCTL 0x00003E00U |
| #define HSM_O_AICTYPCTL 0x00003E04U |
| #define HSM_O_AICENCTL 0x00003E08U |
| #define HSM_O_AICRAWCTL 0x00003E0CU |
| #define HSM_O_AICENSET 0x00003E0CU |
| #define HSM_O_AICENSTA 0x00003E10U |
| #define HSM_O_AICACK 0x00003E10U |
| #define HSM_O_AICENCLR 0x00003E14U |
| #define HSM_O_AICOPTS 0x00003E18U |
| #define HSM_O_AICVER 0x00003E1CU |
| #define HSM_O_MBXSTA 0x00003F00U |
| #define HSM_O_MBXCTL 0x00003F00U |
| #define HSM_O_MBXRAWSTA 0x00003F04U |
| #define HSM_O_MBXRST 0x00003F04U |
| #define HSM_O_MBXLINKID 0x00003F08U |
| #define HSM_O_MBXOUTID 0x00003F0CU |
| #define HSM_O_MBXLCKOUT 0x00003F10U |
| #define HSM_O_MODULESTA 0x00003FE0U |
| #define HSM_O_EIPOPTS2 0x00003FF4U |
| #define HSM_O_EIPOPTS1 0x00003FF8U |
| #define HSM_O_EIPVER 0x00003FFCU |
| #define HSM_AICPOLCTL_CTL0 0x00000001U |
| #define HSM_AICPOLCTL_CTL0_M 0x00000001U |
| #define HSM_AICPOLCTL_CTL0_S 0U |
| #define HSM_AICPOLCTL_CTL1 0x00000002U |
| #define HSM_AICPOLCTL_CTL1_M 0x00000002U |
| #define HSM_AICPOLCTL_CTL1_S 1U |
| #define HSM_AICPOLCTL_CTL2 0x00000004U |
| #define HSM_AICPOLCTL_CTL2_M 0x00000004U |
| #define HSM_AICPOLCTL_CTL2_S 2U |
| #define HSM_AICPOLCTL_CTL3 0x00000008U |
| #define HSM_AICPOLCTL_CTL3_M 0x00000008U |
| #define HSM_AICPOLCTL_CTL3_S 3U |
| #define HSM_AICPOLCTL_CTL4 0x00000010U |
| #define HSM_AICPOLCTL_CTL4_M 0x00000010U |
| #define HSM_AICPOLCTL_CTL4_S 4U |
| #define HSM_AICTYPCTL_CTL0 0x00000001U |
| #define HSM_AICTYPCTL_CTL0_M 0x00000001U |
| #define HSM_AICTYPCTL_CTL0_S 0U |
| #define HSM_AICTYPCTL_CTL1 0x00000002U |
| #define HSM_AICTYPCTL_CTL1_M 0x00000002U |
| #define HSM_AICTYPCTL_CTL1_S 1U |
| #define HSM_AICTYPCTL_CTL2 0x00000004U |
| #define HSM_AICTYPCTL_CTL2_M 0x00000004U |
| #define HSM_AICTYPCTL_CTL2_S 2U |
| #define HSM_AICTYPCTL_CTL3 0x00000008U |
| #define HSM_AICTYPCTL_CTL3_M 0x00000008U |
| #define HSM_AICTYPCTL_CTL3_S 3U |
| #define HSM_AICTYPCTL_CTL4 0x00000010U |
| #define HSM_AICTYPCTL_CTL4_M 0x00000010U |
| #define HSM_AICTYPCTL_CTL4_S 4U |
| #define HSM_AICENCTL_CTL_W 5U |
| #define HSM_AICENCTL_CTL_M 0x0000001FU |
| #define HSM_AICENCTL_CTL_S 0U |
| #define HSM_AICRAWCTL_STA0 0x00000001U |
| #define HSM_AICRAWCTL_STA0_M 0x00000001U |
| #define HSM_AICRAWCTL_STA0_S 0U |
| #define HSM_AICRAWCTL_STA1 0x00000002U |
| #define HSM_AICRAWCTL_STA1_M 0x00000002U |
| #define HSM_AICRAWCTL_STA1_S 1U |
| #define HSM_AICRAWCTL_STA2 0x00000004U |
| #define HSM_AICRAWCTL_STA2_M 0x00000004U |
| #define HSM_AICRAWCTL_STA2_S 2U |
| #define HSM_AICRAWCTL_STA3 0x00000008U |
| #define HSM_AICRAWCTL_STA3_M 0x00000008U |
| #define HSM_AICRAWCTL_STA3_S 3U |
| #define HSM_AICRAWCTL_STA4 0x00000010U |
| #define HSM_AICRAWCTL_STA4_M 0x00000010U |
| #define HSM_AICRAWCTL_STA4_S 4U |
| #define HSM_AICENSET_ENSET_W 5U |
| #define HSM_AICENSET_ENSET_M 0x0000001FU |
| #define HSM_AICENSET_ENSET_S 0U |
| #define HSM_AICENSTA_STA_W 5U |
| #define HSM_AICENSTA_STA_M 0x0000001FU |
| #define HSM_AICENSTA_STA_S 0U |
| #define HSM_AICACK_ACK0 0x00000001U |
| #define HSM_AICACK_ACK0_M 0x00000001U |
| #define HSM_AICACK_ACK0_S 0U |
| #define HSM_AICACK_ACK1 0x00000002U |
| #define HSM_AICACK_ACK1_M 0x00000002U |
| #define HSM_AICACK_ACK1_S 1U |
| #define HSM_AICACK_ACK2 0x00000004U |
| #define HSM_AICACK_ACK2_M 0x00000004U |
| #define HSM_AICACK_ACK2_S 2U |
| #define HSM_AICACK_ACK3 0x00000008U |
| #define HSM_AICACK_ACK3_M 0x00000008U |
| #define HSM_AICACK_ACK3_S 3U |
| #define HSM_AICACK_ACK4 0x00000010U |
| #define HSM_AICACK_ACK4_M 0x00000010U |
| #define HSM_AICACK_ACK4_S 4U |
| #define HSM_AICENCLR_CLR_W 5U |
| #define HSM_AICENCLR_CLR_M 0x0000001FU |
| #define HSM_AICENCLR_CLR_S 0U |
| #define HSM_AICOPTS_NUMOFIN_W 6U |
| #define HSM_AICOPTS_NUMOFIN_M 0x0000003FU |
| #define HSM_AICOPTS_NUMOFIN_S 0U |
| #define HSM_AICOPTS_EXTMAP 0x00000080U |
| #define HSM_AICOPTS_EXTMAP_M 0x00000080U |
| #define HSM_AICOPTS_EXTMAP_S 7U |
| #define HSM_AICOPTS_MINIMAP 0x00000100U |
| #define HSM_AICOPTS_MINIMAP_M 0x00000100U |
| #define HSM_AICOPTS_MINIMAP_S 8U |
| #define HSM_AICVER_EIPNUM_W 8U |
| #define HSM_AICVER_EIPNUM_M 0x000000FFU |
| #define HSM_AICVER_EIPNUM_S 0U |
| #define HSM_AICVER_EIPNUMCOMP_W 8U |
| #define HSM_AICVER_EIPNUMCOMP_M 0x0000FF00U |
| #define HSM_AICVER_EIPNUMCOMP_S 8U |
| #define HSM_AICVER_PATCHLVL_W 4U |
| #define HSM_AICVER_PATCHLVL_M 0x000F0000U |
| #define HSM_AICVER_PATCHLVL_S 16U |
| #define HSM_AICVER_MINORVER_W 4U |
| #define HSM_AICVER_MINORVER_M 0x00F00000U |
| #define HSM_AICVER_MINORVER_S 20U |
| #define HSM_AICVER_MAJORVER_W 4U |
| #define HSM_AICVER_MAJORVER_M 0x0F000000U |
| #define HSM_AICVER_MAJORVER_S 24U |
| #define HSM_MBXSTA_INFULL1 0x00000001U |
| #define HSM_MBXSTA_INFULL1_M 0x00000001U |
| #define HSM_MBXSTA_INFULL1_S 0U |
| #define HSM_MBXSTA_OUTFULL1 0x00000002U |
| #define HSM_MBXSTA_OUTFULL1_M 0x00000002U |
| #define HSM_MBXSTA_OUTFULL1_S 1U |
| #define HSM_MBXSTA_LINKED1 0x00000004U |
| #define HSM_MBXSTA_LINKED1_M 0x00000004U |
| #define HSM_MBXSTA_LINKED1_S 2U |
| #define HSM_MBXSTA_AVAIL1 0x00000008U |
| #define HSM_MBXSTA_AVAIL1_M 0x00000008U |
| #define HSM_MBXSTA_AVAIL1_S 3U |
| #define HSM_MBXSTA_INFULL2 0x00000010U |
| #define HSM_MBXSTA_INFULL2_M 0x00000010U |
| #define HSM_MBXSTA_INFULL2_S 4U |
| #define HSM_MBXSTA_OUTFULL2 0x00000020U |
| #define HSM_MBXSTA_OUTFULL2_M 0x00000020U |
| #define HSM_MBXSTA_OUTFULL2_S 5U |
| #define HSM_MBXSTA_LINKED2 0x00000040U |
| #define HSM_MBXSTA_LINKED2_M 0x00000040U |
| #define HSM_MBXSTA_LINKED2_S 6U |
| #define HSM_MBXSTA_AVAIL2 0x00000080U |
| #define HSM_MBXSTA_AVAIL2_M 0x00000080U |
| #define HSM_MBXSTA_AVAIL2_S 7U |
| #define HSM_MBXCTL_INFULL1 0x00000001U |
| #define HSM_MBXCTL_INFULL1_M 0x00000001U |
| #define HSM_MBXCTL_INFULL1_S 0U |
| #define HSM_MBXCTL_OUTEMP1 0x00000002U |
| #define HSM_MBXCTL_OUTEMP1_M 0x00000002U |
| #define HSM_MBXCTL_OUTEMP1_S 1U |
| #define HSM_MBXCTL_LINK1 0x00000004U |
| #define HSM_MBXCTL_LINK1_M 0x00000004U |
| #define HSM_MBXCTL_LINK1_S 2U |
| #define HSM_MBXCTL_UNLINK1 0x00000008U |
| #define HSM_MBXCTL_UNLINK1_M 0x00000008U |
| #define HSM_MBXCTL_UNLINK1_S 3U |
| #define HSM_MBXCTL_INFULL2 0x00000010U |
| #define HSM_MBXCTL_INFULL2_M 0x00000010U |
| #define HSM_MBXCTL_INFULL2_S 4U |
| #define HSM_MBXCTL_OUTEMP2 0x00000020U |
| #define HSM_MBXCTL_OUTEMP2_M 0x00000020U |
| #define HSM_MBXCTL_OUTEMP2_S 5U |
| #define HSM_MBXCTL_LINK2 0x00000040U |
| #define HSM_MBXCTL_LINK2_M 0x00000040U |
| #define HSM_MBXCTL_LINK2_S 6U |
| #define HSM_MBXCTL_UNLINK2 0x00000080U |
| #define HSM_MBXCTL_UNLINK2_M 0x00000080U |
| #define HSM_MBXCTL_UNLINK2_S 7U |
| #define HSM_MBXRAWSTA_INFULL1 0x00000001U |
| #define HSM_MBXRAWSTA_INFULL1_M 0x00000001U |
| #define HSM_MBXRAWSTA_INFULL1_S 0U |
| #define HSM_MBXRAWSTA_OUTFULL1 0x00000002U |
| #define HSM_MBXRAWSTA_OUTFULL1_M 0x00000002U |
| #define HSM_MBXRAWSTA_OUTFULL1_S 1U |
| #define HSM_MBXRAWSTA_LINKED1 0x00000004U |
| #define HSM_MBXRAWSTA_LINKED1_M 0x00000004U |
| #define HSM_MBXRAWSTA_LINKED1_S 2U |
| #define HSM_MBXRAWSTA_INFULL2 0x00000010U |
| #define HSM_MBXRAWSTA_INFULL2_M 0x00000010U |
| #define HSM_MBXRAWSTA_INFULL2_S 4U |
| #define HSM_MBXRAWSTA_OUTFULL2 0x00000020U |
| #define HSM_MBXRAWSTA_OUTFULL2_M 0x00000020U |
| #define HSM_MBXRAWSTA_OUTFULL2_S 5U |
| #define HSM_MBXRAWSTA_LINKED2 0x00000040U |
| #define HSM_MBXRAWSTA_LINKED2_M 0x00000040U |
| #define HSM_MBXRAWSTA_LINKED2_S 6U |
| #define HSM_MBXRST_OUTEMP1 0x00000002U |
| #define HSM_MBXRST_OUTEMP1_M 0x00000002U |
| #define HSM_MBXRST_OUTEMP1_S 1U |
| #define HSM_MBXRST_UNLINK1 0x00000008U |
| #define HSM_MBXRST_UNLINK1_M 0x00000008U |
| #define HSM_MBXRST_UNLINK1_S 3U |
| #define HSM_MBXRST_OUTEMP2 0x00000020U |
| #define HSM_MBXRST_OUTEMP2_M 0x00000020U |
| #define HSM_MBXRST_OUTEMP2_S 5U |
| #define HSM_MBXRST_UNLINK2 0x00000080U |
| #define HSM_MBXRST_UNLINK2_M 0x00000080U |
| #define HSM_MBXRST_UNLINK2_S 7U |
| #define HSM_MBXLINKID_LINKID1_W 3U |
| #define HSM_MBXLINKID_LINKID1_M 0x00000007U |
| #define HSM_MBXLINKID_LINKID1_S 0U |
| #define HSM_MBXLINKID_PROTACC1 0x00000008U |
| #define HSM_MBXLINKID_PROTACC1_M 0x00000008U |
| #define HSM_MBXLINKID_PROTACC1_S 3U |
| #define HSM_MBXLINKID_LINKID2_W 3U |
| #define HSM_MBXLINKID_LINKID2_M 0x00000070U |
| #define HSM_MBXLINKID_LINKID2_S 4U |
| #define HSM_MBXLINKID_PORTACC2 0x00000080U |
| #define HSM_MBXLINKID_PORTACC2_M 0x00000080U |
| #define HSM_MBXLINKID_PORTACC2_S 7U |
| #define HSM_MBXOUTID_OUTID1_W 3U |
| #define HSM_MBXOUTID_OUTID1_M 0x00000007U |
| #define HSM_MBXOUTID_OUTID1_S 0U |
| #define HSM_MBXOUTID_PROTACC1 0x00000008U |
| #define HSM_MBXOUTID_PROTACC1_M 0x00000008U |
| #define HSM_MBXOUTID_PROTACC1_S 3U |
| #define HSM_MBXOUTID_OUTID2_W 3U |
| #define HSM_MBXOUTID_OUTID2_M 0x00000070U |
| #define HSM_MBXOUTID_OUTID2_S 4U |
| #define HSM_MBXOUTID_PORTACC2 0x00000080U |
| #define HSM_MBXOUTID_PORTACC2_M 0x00000080U |
| #define HSM_MBXOUTID_PORTACC2_S 7U |
| #define HSM_MBXLCKOUT_LOCKOUT1_W 8U |
| #define HSM_MBXLCKOUT_LOCKOUT1_M 0x000000FFU |
| #define HSM_MBXLCKOUT_LOCKOUT1_S 0U |
| #define HSM_MBXLCKOUT_LOCKOUT2_W 8U |
| #define HSM_MBXLCKOUT_LOCKOUT2_M 0x0000FF00U |
| #define HSM_MBXLCKOUT_LOCKOUT2_S 8U |
| #define HSM_MODULESTA_FIPSMOD 0x00000001U |
| #define HSM_MODULESTA_FIPSMOD_M 0x00000001U |
| #define HSM_MODULESTA_FIPSMOD_S 0U |
| #define HSM_MODULESTA_NFIPSMOD 0x00000002U |
| #define HSM_MODULESTA_NFIPSMOD_M 0x00000002U |
| #define HSM_MODULESTA_NFIPSMOD_S 1U |
| #define HSM_MODULESTA_CRCBUSY 0x00000100U |
| #define HSM_MODULESTA_CRCBUSY_M 0x00000100U |
| #define HSM_MODULESTA_CRCBUSY_S 8U |
| #define HSM_MODULESTA_CRCOK 0x00000200U |
| #define HSM_MODULESTA_CRCOK_M 0x00000200U |
| #define HSM_MODULESTA_CRCOK_S 9U |
| #define HSM_MODULESTA_CRCERR 0x00000400U |
| #define HSM_MODULESTA_CRCERR_M 0x00000400U |
| #define HSM_MODULESTA_CRCERR_S 10U |
| #define HSM_MODULESTA_FATALERR 0x80000000U |
| #define HSM_MODULESTA_FATALERR_M 0x80000000U |
| #define HSM_MODULESTA_FATALERR_S 31U |
| #define HSM_EIPOPTS2_DESAES 0x00000001U |
| #define HSM_EIPOPTS2_DESAES_M 0x00000001U |
| #define HSM_EIPOPTS2_DESAES_S 0U |
| #define HSM_EIPOPTS2_SHA 0x00000004U |
| #define HSM_EIPOPTS2_SHA_M 0x00000004U |
| #define HSM_EIPOPTS2_SHA_S 2U |
| #define HSM_EIPOPTS2_TRNG 0x00000008U |
| #define HSM_EIPOPTS2_TRNG_M 0x00000008U |
| #define HSM_EIPOPTS2_TRNG_S 3U |
| #define HSM_EIPOPTS2_CRC 0x00000010U |
| #define HSM_EIPOPTS2_CRC_M 0x00000010U |
| #define HSM_EIPOPTS2_CRC_S 4U |
| #define HSM_EIPOPTS2_PKCP 0x00000020U |
| #define HSM_EIPOPTS2_PKCP_M 0x00000020U |
| #define HSM_EIPOPTS2_PKCP_S 5U |
| #define HSM_EIPOPTS2_CCPU 0x00000100U |
| #define HSM_EIPOPTS2_CCPU_M 0x00000100U |
| #define HSM_EIPOPTS2_CCPU_S 8U |
| #define HSM_EIPOPTS2_PRAM 0x00000200U |
| #define HSM_EIPOPTS2_PRAM_M 0x00000200U |
| #define HSM_EIPOPTS2_PRAM_S 9U |
| #define HSM_EIPOPTS2_BUSIF 0x00001000U |
| #define HSM_EIPOPTS2_BUSIF_M 0x00001000U |
| #define HSM_EIPOPTS2_BUSIF_S 12U |
| #define HSM_EIPOPTS2_ADDCE1 0x00010000U |
| #define HSM_EIPOPTS2_ADDCE1_M 0x00010000U |
| #define HSM_EIPOPTS2_ADDCE1_S 16U |
| #define HSM_EIPOPTS2_ADDCE2 0x00020000U |
| #define HSM_EIPOPTS2_ADDCE2_M 0x00020000U |
| #define HSM_EIPOPTS2_ADDCE2_S 17U |
| #define HSM_EIPOPTS2_ADDCE3 0x00040000U |
| #define HSM_EIPOPTS2_ADDCE3_M 0x00040000U |
| #define HSM_EIPOPTS2_ADDCE3_S 18U |
| #define HSM_EIPOPTS2_ADDCE4 0x00080000U |
| #define HSM_EIPOPTS2_ADDCE4_M 0x00080000U |
| #define HSM_EIPOPTS2_ADDCE4_S 19U |
| #define HSM_EIPOPTS2_ADDCE5 0x00100000U |
| #define HSM_EIPOPTS2_ADDCE5_M 0x00100000U |
| #define HSM_EIPOPTS2_ADDCE5_S 20U |
| #define HSM_EIPOPTS2_ADDCE6 0x00200000U |
| #define HSM_EIPOPTS2_ADDCE6_M 0x00200000U |
| #define HSM_EIPOPTS2_ADDCE6_S 21U |
| #define HSM_EIPOPTS2_ADDCE7 0x00400000U |
| #define HSM_EIPOPTS2_ADDCE7_M 0x00400000U |
| #define HSM_EIPOPTS2_ADDCE7_S 22U |
| #define HSM_EIPOPTS2_ADDCE8 0x00800000U |
| #define HSM_EIPOPTS2_ADDCE8_M 0x00800000U |
| #define HSM_EIPOPTS2_ADDCE8_S 23U |
| #define HSM_EIPOPTS2_ADDCE9 0x01000000U |
| #define HSM_EIPOPTS2_ADDCE9_M 0x01000000U |
| #define HSM_EIPOPTS2_ADDCE9_S 24U |
| #define HSM_EIPOPTS2_ADDCE10 0x02000000U |
| #define HSM_EIPOPTS2_ADDCE10_M 0x02000000U |
| #define HSM_EIPOPTS2_ADDCE10_S 25U |
| #define HSM_EIPOPTS1_NUMOFMBX_W 4U |
| #define HSM_EIPOPTS1_NUMOFMBX_M 0x0000000FU |
| #define HSM_EIPOPTS1_NUMOFMBX_S 0U |
| #define HSM_EIPOPTS1_MBXSIZE_W 2U |
| #define HSM_EIPOPTS1_MBXSIZE_M 0x00000030U |
| #define HSM_EIPOPTS1_MBXSIZE_S 4U |
| #define HSM_EIPOPTS1_HOSTID_W 8U |
| #define HSM_EIPOPTS1_HOSTID_M 0x0000FF00U |
| #define HSM_EIPOPTS1_HOSTID_S 8U |
| #define HSM_EIPOPTS1_MASID_W 3U |
| #define HSM_EIPOPTS1_MASID_M 0x00070000U |
| #define HSM_EIPOPTS1_MASID_S 16U |
| #define HSM_EIPOPTS1_MYID_W 3U |
| #define HSM_EIPOPTS1_MYID_M 0x00700000U |
| #define HSM_EIPOPTS1_MYID_S 20U |
| #define HSM_EIPOPTS1_MYIDSEC 0x00800000U |
| #define HSM_EIPOPTS1_MYIDSEC_M 0x00800000U |
| #define HSM_EIPOPTS1_MYIDSEC_S 23U |
| #define HSM_EIPOPTS1_HOSTIDSEC_W 8U |
| #define HSM_EIPOPTS1_HOSTIDSEC_M 0xFF000000U |
| #define HSM_EIPOPTS1_HOSTIDSEC_S 24U |
| #define HSM_EIPVER_EIPNUM_W 8U |
| #define HSM_EIPVER_EIPNUM_M 0x000000FFU |
| #define HSM_EIPVER_EIPNUM_S 0U |
| #define HSM_EIPVER_EIPNUMCOMP_W 8U |
| #define HSM_EIPVER_EIPNUMCOMP_M 0x0000FF00U |
| #define HSM_EIPVER_EIPNUMCOMP_S 8U |
| #define HSM_EIPVER_PATCHLVL_W 4U |
| #define HSM_EIPVER_PATCHLVL_M 0x000F0000U |
| #define HSM_EIPVER_PATCHLVL_S 16U |
| #define HSM_EIPVER_MINORVER_W 4U |
| #define HSM_EIPVER_MINORVER_M 0x00F00000U |
| #define HSM_EIPVER_MINORVER_S 20U |
| #define HSM_EIPVER_MAJORVER_W 4U |
| #define HSM_EIPVER_MAJORVER_M 0x0F000000U |
| #define HSM_EIPVER_MAJORVER_S 24U |