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CC35xxDriverLibrary
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Go to the source code of this file.
Macros | |
| #define | DCAN_O_CREL 0x00000000U |
| #define | DCAN_O_ENDN 0x00000004U |
| #define | DCAN_O_DBTP 0x0000000CU |
| #define | DCAN_O_TEST 0x00000010U |
| #define | DCAN_O_RWD 0x00000014U |
| #define | DCAN_O_CCCR 0x00000018U |
| #define | DCAN_O_NBTP 0x0000001CU |
| #define | DCAN_O_TSCC 0x00000020U |
| #define | DCAN_O_TSCV 0x00000024U |
| #define | DCAN_O_TOCC 0x00000028U |
| #define | DCAN_O_TOCV 0x0000002CU |
| #define | DCAN_O_ECR 0x00000040U |
| #define | DCAN_O_PSR 0x00000044U |
| #define | DCAN_O_TDCR 0x00000048U |
| #define | DCAN_O_IR 0x00000050U |
| #define | DCAN_O_IE 0x00000054U |
| #define | DCAN_O_ILS 0x00000058U |
| #define | DCAN_O_ILE 0x0000005CU |
| #define | DCAN_O_GFC 0x00000080U |
| #define | DCAN_O_SIDFC 0x00000084U |
| #define | DCAN_O_XIDFC 0x00000088U |
| #define | DCAN_O_XIDAM 0x00000090U |
| #define | DCAN_O_HPMS 0x00000094U |
| #define | DCAN_O_NDAT1 0x00000098U |
| #define | DCAN_O_NDAT2 0x0000009CU |
| #define | DCAN_O_RXF0C 0x000000A0U |
| #define | DCAN_O_RXF0S 0x000000A4U |
| #define | DCAN_O_RXF0A 0x000000A8U |
| #define | DCAN_O_RXBC 0x000000ACU |
| #define | DCAN_O_RXF1C 0x000000B0U |
| #define | DCAN_O_RXF1S 0x000000B4U |
| #define | DCAN_O_RXF1A 0x000000B8U |
| #define | DCAN_O_RXESC 0x000000BCU |
| #define | DCAN_O_TXBC 0x000000C0U |
| #define | DCAN_O_TXFQS 0x000000C4U |
| #define | DCAN_O_TXESC 0x000000C8U |
| #define | DCAN_O_TXBRPAP 0x000000CCU |
| #define | DCAN_O_TXBAR 0x000000D0U |
| #define | DCAN_O_TXBCR 0x000000D4U |
| #define | DCAN_O_TXBTO 0x000000D8U |
| #define | DCAN_O_TXBCF 0x000000DCU |
| #define | DCAN_O_TXTIE 0x000000E0U |
| #define | DCAN_O_TXBCIE 0x000000E4U |
| #define | DCAN_O_TXEFC 0x000000F0U |
| #define | DCAN_O_TXEFS 0x000000F4U |
| #define | DCAN_O_TXEFA 0x000000F8U |
| #define | DCAN_O_SSPID 0x00000200U |
| #define | DCAN_O_SSCTL 0x00000204U |
| #define | DCAN_O_SSSTA 0x00000208U |
| #define | DCAN_O_SSICS 0x0000020CU |
| #define | DCAN_O_SSIRS 0x00000210U |
| #define | DCAN_O_SSIECS 0x00000214U |
| #define | DCAN_O_SSIE 0x00000218U |
| #define | DCAN_O_SSIES 0x0000021CU |
| #define | DCAN_O_SSEOI 0x00000220U |
| #define | DCAN_O_EXTTSPS 0x00000224U |
| #define | DCAN_O_EXTTSUSI 0x00000228U |
| #define | DCAN_O_ERRREV 0x00000400U |
| #define | DCAN_O_ERRVEC 0x00000408U |
| #define | DCAN_O_ERRSTA 0x0000040CU |
| #define | DCAN_O_ERRWRAPREV 0x00000410U |
| #define | DCAN_O_ERRCTL 0x00000414U |
| #define | DCAN_O_ERRCTL1 0x00000418U |
| #define | DCAN_O_ERRCTL2 0x0000041CU |
| #define | DCAN_O_ERRSTA1 0x00000420U |
| #define | DCAN_O_ERRSTA2 0x00000424U |
| #define | DCAN_O_ERRSTA3 0x00000428U |
| #define | DCAN_O_SECEOI 0x0000043CU |
| #define | DCAN_O_SECSTA 0x00000440U |
| #define | DCAN_O_SECENSET 0x00000480U |
| #define | DCAN_O_SECENCLR 0x000004C0U |
| #define | DCAN_O_DEDEOI 0x0000053CU |
| #define | DCAN_O_DEDSTA 0x00000540U |
| #define | DCAN_O_DEDENSET 0x00000580U |
| #define | DCAN_O_DEDENCLR 0x000005C0U |
| #define | DCAN_O_AGGRENSET 0x00000600U |
| #define | DCAN_O_AGGRENCLR 0x00000604U |
| #define | DCAN_O_AGGRSTASET 0x00000608U |
| #define | DCAN_O_AGGRSTACLR 0x0000060CU |
| #define | DCAN_O_DESC 0x00000800U |
| #define | DCAN_O_IMASK0 0x00000844U |
| #define | DCAN_O_RIS0 0x00000848U |
| #define | DCAN_O_MIS0 0x0000084CU |
| #define | DCAN_O_ISET0 0x00000850U |
| #define | DCAN_O_ICLR0 0x00000854U |
| #define | DCAN_O_IMASK1 0x00000868U |
| #define | DCAN_O_RIS1 0x0000086CU |
| #define | DCAN_O_MIS1 0x00000870U |
| #define | DCAN_O_ISET1 0x00000874U |
| #define | DCAN_O_ICLR1 0x00000878U |
| #define | DCAN_O_CLKDIV 0x00000904U |
| #define | DCAN_O_CLKCTL 0x00000908U |
| #define | DCAN_O_CLKSTA 0x0000090CU |
| #define | DCAN_O_DMA0CTL 0x00000924U |
| #define | DCAN_O_DMA1CTL 0x0000092CU |
| #define | DCAN_O_TTOFE0 0x00000938U |
| #define | DCAN_O_TTOFE1 0x00000948U |
| #define | DCAN_O_TTONDAT1 0x00000950U |
| #define | DCAN_O_SRAM 0x00001000U |
| #define | DCAN_O_CLKCFG 0x00002000U |
| #define | DCAN_CREL_DAY_W 8U |
| #define | DCAN_CREL_DAY_M 0x000000FFU |
| #define | DCAN_CREL_DAY_S 0U |
| #define | DCAN_CREL_MON_W 8U |
| #define | DCAN_CREL_MON_M 0x0000FF00U |
| #define | DCAN_CREL_MON_S 8U |
| #define | DCAN_CREL_YEAR_W 4U |
| #define | DCAN_CREL_YEAR_M 0x000F0000U |
| #define | DCAN_CREL_YEAR_S 16U |
| #define | DCAN_CREL_SUBSTEP_W 4U |
| #define | DCAN_CREL_SUBSTEP_M 0x00F00000U |
| #define | DCAN_CREL_SUBSTEP_S 20U |
| #define | DCAN_CREL_STEP_W 4U |
| #define | DCAN_CREL_STEP_M 0x0F000000U |
| #define | DCAN_CREL_STEP_S 24U |
| #define | DCAN_CREL_REL_W 4U |
| #define | DCAN_CREL_REL_M 0xF0000000U |
| #define | DCAN_CREL_REL_S 28U |
| #define | DCAN_ENDN_ETV_W 32U |
| #define | DCAN_ENDN_ETV_M 0xFFFFFFFFU |
| #define | DCAN_ENDN_ETV_S 0U |
| #define | DCAN_DBTP_DSJW_W 4U |
| #define | DCAN_DBTP_DSJW_M 0x0000000FU |
| #define | DCAN_DBTP_DSJW_S 0U |
| #define | DCAN_DBTP_DTSEG2_W 4U |
| #define | DCAN_DBTP_DTSEG2_M 0x000000F0U |
| #define | DCAN_DBTP_DTSEG2_S 4U |
| #define | DCAN_DBTP_DTSEG1_W 5U |
| #define | DCAN_DBTP_DTSEG1_M 0x00001F00U |
| #define | DCAN_DBTP_DTSEG1_S 8U |
| #define | DCAN_DBTP_DBRP_W 5U |
| #define | DCAN_DBTP_DBRP_M 0x001F0000U |
| #define | DCAN_DBTP_DBRP_S 16U |
| #define | DCAN_DBTP_TDC 0x00800000U |
| #define | DCAN_DBTP_TDC_M 0x00800000U |
| #define | DCAN_DBTP_TDC_S 23U |
| #define | DCAN_TEST_LBCK 0x00000010U |
| #define | DCAN_TEST_LBCK_M 0x00000010U |
| #define | DCAN_TEST_LBCK_S 4U |
| #define | DCAN_TEST_TX_W 2U |
| #define | DCAN_TEST_TX_M 0x00000060U |
| #define | DCAN_TEST_TX_S 5U |
| #define | DCAN_TEST_RX 0x00000080U |
| #define | DCAN_TEST_RX_M 0x00000080U |
| #define | DCAN_TEST_RX_S 7U |
| #define | DCAN_RWD_WDC_W 8U |
| #define | DCAN_RWD_WDC_M 0x000000FFU |
| #define | DCAN_RWD_WDC_S 0U |
| #define | DCAN_RWD_WDV_W 8U |
| #define | DCAN_RWD_WDV_M 0x0000FF00U |
| #define | DCAN_RWD_WDV_S 8U |
| #define | DCAN_CCCR_INIT 0x00000001U |
| #define | DCAN_CCCR_INIT_M 0x00000001U |
| #define | DCAN_CCCR_INIT_S 0U |
| #define | DCAN_CCCR_CCE 0x00000002U |
| #define | DCAN_CCCR_CCE_M 0x00000002U |
| #define | DCAN_CCCR_CCE_S 1U |
| #define | DCAN_CCCR_ASM 0x00000004U |
| #define | DCAN_CCCR_ASM_M 0x00000004U |
| #define | DCAN_CCCR_ASM_S 2U |
| #define | DCAN_CCCR_CSA 0x00000008U |
| #define | DCAN_CCCR_CSA_M 0x00000008U |
| #define | DCAN_CCCR_CSA_S 3U |
| #define | DCAN_CCCR_CSR 0x00000010U |
| #define | DCAN_CCCR_CSR_M 0x00000010U |
| #define | DCAN_CCCR_CSR_S 4U |
| #define | DCAN_CCCR_MON 0x00000020U |
| #define | DCAN_CCCR_MON_M 0x00000020U |
| #define | DCAN_CCCR_MON_S 5U |
| #define | DCAN_CCCR_DAR 0x00000040U |
| #define | DCAN_CCCR_DAR_M 0x00000040U |
| #define | DCAN_CCCR_DAR_S 6U |
| #define | DCAN_CCCR_TEST 0x00000080U |
| #define | DCAN_CCCR_TEST_M 0x00000080U |
| #define | DCAN_CCCR_TEST_S 7U |
| #define | DCAN_CCCR_FDOE 0x00000100U |
| #define | DCAN_CCCR_FDOE_M 0x00000100U |
| #define | DCAN_CCCR_FDOE_S 8U |
| #define | DCAN_CCCR_BRSE 0x00000200U |
| #define | DCAN_CCCR_BRSE_M 0x00000200U |
| #define | DCAN_CCCR_BRSE_S 9U |
| #define | DCAN_CCCR_PXHD 0x00001000U |
| #define | DCAN_CCCR_PXHD_M 0x00001000U |
| #define | DCAN_CCCR_PXHD_S 12U |
| #define | DCAN_CCCR_EFBI 0x00002000U |
| #define | DCAN_CCCR_EFBI_M 0x00002000U |
| #define | DCAN_CCCR_EFBI_S 13U |
| #define | DCAN_CCCR_TXP 0x00004000U |
| #define | DCAN_CCCR_TXP_M 0x00004000U |
| #define | DCAN_CCCR_TXP_S 14U |
| #define | DCAN_CCCR_NISO 0x00008000U |
| #define | DCAN_CCCR_NISO_M 0x00008000U |
| #define | DCAN_CCCR_NISO_S 15U |
| #define | DCAN_NBTP_NTSEG2_W 7U |
| #define | DCAN_NBTP_NTSEG2_M 0x0000007FU |
| #define | DCAN_NBTP_NTSEG2_S 0U |
| #define | DCAN_NBTP_NTSEG1_W 8U |
| #define | DCAN_NBTP_NTSEG1_M 0x0000FF00U |
| #define | DCAN_NBTP_NTSEG1_S 8U |
| #define | DCAN_NBTP_NBRP_W 9U |
| #define | DCAN_NBTP_NBRP_M 0x01FF0000U |
| #define | DCAN_NBTP_NBRP_S 16U |
| #define | DCAN_NBTP_NSJW_W 7U |
| #define | DCAN_NBTP_NSJW_M 0xFE000000U |
| #define | DCAN_NBTP_NSJW_S 25U |
| #define | DCAN_TSCC_TSS_W 2U |
| #define | DCAN_TSCC_TSS_M 0x00000003U |
| #define | DCAN_TSCC_TSS_S 0U |
| #define | DCAN_TSCC_TCP_W 4U |
| #define | DCAN_TSCC_TCP_M 0x000F0000U |
| #define | DCAN_TSCC_TCP_S 16U |
| #define | DCAN_TSCV_TSC_W 16U |
| #define | DCAN_TSCV_TSC_M 0x0000FFFFU |
| #define | DCAN_TSCV_TSC_S 0U |
| #define | DCAN_TOCC_ETOC 0x00000001U |
| #define | DCAN_TOCC_ETOC_M 0x00000001U |
| #define | DCAN_TOCC_ETOC_S 0U |
| #define | DCAN_TOCC_TOS_W 2U |
| #define | DCAN_TOCC_TOS_M 0x00000006U |
| #define | DCAN_TOCC_TOS_S 1U |
| #define | DCAN_TOCC_TOP_W 16U |
| #define | DCAN_TOCC_TOP_M 0xFFFF0000U |
| #define | DCAN_TOCC_TOP_S 16U |
| #define | DCAN_TOCV_TOC_W 16U |
| #define | DCAN_TOCV_TOC_M 0x0000FFFFU |
| #define | DCAN_TOCV_TOC_S 0U |
| #define | DCAN_ECR_TEC_W 8U |
| #define | DCAN_ECR_TEC_M 0x000000FFU |
| #define | DCAN_ECR_TEC_S 0U |
| #define | DCAN_ECR_REC_W 7U |
| #define | DCAN_ECR_REC_M 0x00007F00U |
| #define | DCAN_ECR_REC_S 8U |
| #define | DCAN_ECR_RP 0x00008000U |
| #define | DCAN_ECR_RP_M 0x00008000U |
| #define | DCAN_ECR_RP_S 15U |
| #define | DCAN_ECR_CEL_W 8U |
| #define | DCAN_ECR_CEL_M 0x00FF0000U |
| #define | DCAN_ECR_CEL_S 16U |
| #define | DCAN_PSR_LEC_W 3U |
| #define | DCAN_PSR_LEC_M 0x00000007U |
| #define | DCAN_PSR_LEC_S 0U |
| #define | DCAN_PSR_ACT_W 2U |
| #define | DCAN_PSR_ACT_M 0x00000018U |
| #define | DCAN_PSR_ACT_S 3U |
| #define | DCAN_PSR_EP 0x00000020U |
| #define | DCAN_PSR_EP_M 0x00000020U |
| #define | DCAN_PSR_EP_S 5U |
| #define | DCAN_PSR_EW 0x00000040U |
| #define | DCAN_PSR_EW_M 0x00000040U |
| #define | DCAN_PSR_EW_S 6U |
| #define | DCAN_PSR_BO 0x00000080U |
| #define | DCAN_PSR_BO_M 0x00000080U |
| #define | DCAN_PSR_BO_S 7U |
| #define | DCAN_PSR_DLEC_W 3U |
| #define | DCAN_PSR_DLEC_M 0x00000700U |
| #define | DCAN_PSR_DLEC_S 8U |
| #define | DCAN_PSR_RESI 0x00000800U |
| #define | DCAN_PSR_RESI_M 0x00000800U |
| #define | DCAN_PSR_RESI_S 11U |
| #define | DCAN_PSR_RBRS 0x00001000U |
| #define | DCAN_PSR_RBRS_M 0x00001000U |
| #define | DCAN_PSR_RBRS_S 12U |
| #define | DCAN_PSR_RFDF 0x00002000U |
| #define | DCAN_PSR_RFDF_M 0x00002000U |
| #define | DCAN_PSR_RFDF_S 13U |
| #define | DCAN_PSR_PXE 0x00004000U |
| #define | DCAN_PSR_PXE_M 0x00004000U |
| #define | DCAN_PSR_PXE_S 14U |
| #define | DCAN_PSR_TDCV_W 7U |
| #define | DCAN_PSR_TDCV_M 0x007F0000U |
| #define | DCAN_PSR_TDCV_S 16U |
| #define | DCAN_TDCR_TDCF_W 7U |
| #define | DCAN_TDCR_TDCF_M 0x0000007FU |
| #define | DCAN_TDCR_TDCF_S 0U |
| #define | DCAN_TDCR_TDCO_W 7U |
| #define | DCAN_TDCR_TDCO_M 0x00007F00U |
| #define | DCAN_TDCR_TDCO_S 8U |
| #define | DCAN_IR_RF0N 0x00000001U |
| #define | DCAN_IR_RF0N_M 0x00000001U |
| #define | DCAN_IR_RF0N_S 0U |
| #define | DCAN_IR_RF0W 0x00000002U |
| #define | DCAN_IR_RF0W_M 0x00000002U |
| #define | DCAN_IR_RF0W_S 1U |
| #define | DCAN_IR_RF0F 0x00000004U |
| #define | DCAN_IR_RF0F_M 0x00000004U |
| #define | DCAN_IR_RF0F_S 2U |
| #define | DCAN_IR_RF0L 0x00000008U |
| #define | DCAN_IR_RF0L_M 0x00000008U |
| #define | DCAN_IR_RF0L_S 3U |
| #define | DCAN_IR_RF1N 0x00000010U |
| #define | DCAN_IR_RF1N_M 0x00000010U |
| #define | DCAN_IR_RF1N_S 4U |
| #define | DCAN_IR_RF1W 0x00000020U |
| #define | DCAN_IR_RF1W_M 0x00000020U |
| #define | DCAN_IR_RF1W_S 5U |
| #define | DCAN_IR_RF1F 0x00000040U |
| #define | DCAN_IR_RF1F_M 0x00000040U |
| #define | DCAN_IR_RF1F_S 6U |
| #define | DCAN_IR_RF1L 0x00000080U |
| #define | DCAN_IR_RF1L_M 0x00000080U |
| #define | DCAN_IR_RF1L_S 7U |
| #define | DCAN_IR_HPM 0x00000100U |
| #define | DCAN_IR_HPM_M 0x00000100U |
| #define | DCAN_IR_HPM_S 8U |
| #define | DCAN_IR_TC 0x00000200U |
| #define | DCAN_IR_TC_M 0x00000200U |
| #define | DCAN_IR_TC_S 9U |
| #define | DCAN_IR_TCF 0x00000400U |
| #define | DCAN_IR_TCF_M 0x00000400U |
| #define | DCAN_IR_TCF_S 10U |
| #define | DCAN_IR_TFE 0x00000800U |
| #define | DCAN_IR_TFE_M 0x00000800U |
| #define | DCAN_IR_TFE_S 11U |
| #define | DCAN_IR_TEFN 0x00001000U |
| #define | DCAN_IR_TEFN_M 0x00001000U |
| #define | DCAN_IR_TEFN_S 12U |
| #define | DCAN_IR_TEFW 0x00002000U |
| #define | DCAN_IR_TEFW_M 0x00002000U |
| #define | DCAN_IR_TEFW_S 13U |
| #define | DCAN_IR_TEFF 0x00004000U |
| #define | DCAN_IR_TEFF_M 0x00004000U |
| #define | DCAN_IR_TEFF_S 14U |
| #define | DCAN_IR_TEFL 0x00008000U |
| #define | DCAN_IR_TEFL_M 0x00008000U |
| #define | DCAN_IR_TEFL_S 15U |
| #define | DCAN_IR_TSW 0x00010000U |
| #define | DCAN_IR_TSW_M 0x00010000U |
| #define | DCAN_IR_TSW_S 16U |
| #define | DCAN_IR_MRAF 0x00020000U |
| #define | DCAN_IR_MRAF_M 0x00020000U |
| #define | DCAN_IR_MRAF_S 17U |
| #define | DCAN_IR_TOO 0x00040000U |
| #define | DCAN_IR_TOO_M 0x00040000U |
| #define | DCAN_IR_TOO_S 18U |
| #define | DCAN_IR_DRX 0x00080000U |
| #define | DCAN_IR_DRX_M 0x00080000U |
| #define | DCAN_IR_DRX_S 19U |
| #define | DCAN_IR_BEU 0x00200000U |
| #define | DCAN_IR_BEU_M 0x00200000U |
| #define | DCAN_IR_BEU_S 21U |
| #define | DCAN_IR_ELO 0x00400000U |
| #define | DCAN_IR_ELO_M 0x00400000U |
| #define | DCAN_IR_ELO_S 22U |
| #define | DCAN_IR_EP 0x00800000U |
| #define | DCAN_IR_EP_M 0x00800000U |
| #define | DCAN_IR_EP_S 23U |
| #define | DCAN_IR_EW 0x01000000U |
| #define | DCAN_IR_EW_M 0x01000000U |
| #define | DCAN_IR_EW_S 24U |
| #define | DCAN_IR_BO 0x02000000U |
| #define | DCAN_IR_BO_M 0x02000000U |
| #define | DCAN_IR_BO_S 25U |
| #define | DCAN_IR_WDI 0x04000000U |
| #define | DCAN_IR_WDI_M 0x04000000U |
| #define | DCAN_IR_WDI_S 26U |
| #define | DCAN_IR_PEA 0x08000000U |
| #define | DCAN_IR_PEA_M 0x08000000U |
| #define | DCAN_IR_PEA_S 27U |
| #define | DCAN_IR_PED 0x10000000U |
| #define | DCAN_IR_PED_M 0x10000000U |
| #define | DCAN_IR_PED_S 28U |
| #define | DCAN_IR_ARA 0x20000000U |
| #define | DCAN_IR_ARA_M 0x20000000U |
| #define | DCAN_IR_ARA_S 29U |
| #define | DCAN_IE_RF0NE 0x00000001U |
| #define | DCAN_IE_RF0NE_M 0x00000001U |
| #define | DCAN_IE_RF0NE_S 0U |
| #define | DCAN_IE_RF0WE 0x00000002U |
| #define | DCAN_IE_RF0WE_M 0x00000002U |
| #define | DCAN_IE_RF0WE_S 1U |
| #define | DCAN_IE_RF0FE 0x00000004U |
| #define | DCAN_IE_RF0FE_M 0x00000004U |
| #define | DCAN_IE_RF0FE_S 2U |
| #define | DCAN_IE_RF0LE 0x00000008U |
| #define | DCAN_IE_RF0LE_M 0x00000008U |
| #define | DCAN_IE_RF0LE_S 3U |
| #define | DCAN_IE_RF1NE 0x00000010U |
| #define | DCAN_IE_RF1NE_M 0x00000010U |
| #define | DCAN_IE_RF1NE_S 4U |
| #define | DCAN_IE_RF1WE 0x00000020U |
| #define | DCAN_IE_RF1WE_M 0x00000020U |
| #define | DCAN_IE_RF1WE_S 5U |
| #define | DCAN_IE_RF1FE 0x00000040U |
| #define | DCAN_IE_RF1FE_M 0x00000040U |
| #define | DCAN_IE_RF1FE_S 6U |
| #define | DCAN_IE_RF1LE 0x00000080U |
| #define | DCAN_IE_RF1LE_M 0x00000080U |
| #define | DCAN_IE_RF1LE_S 7U |
| #define | DCAN_IE_HPME 0x00000100U |
| #define | DCAN_IE_HPME_M 0x00000100U |
| #define | DCAN_IE_HPME_S 8U |
| #define | DCAN_IE_TCE 0x00000200U |
| #define | DCAN_IE_TCE_M 0x00000200U |
| #define | DCAN_IE_TCE_S 9U |
| #define | DCAN_IE_TCFE 0x00000400U |
| #define | DCAN_IE_TCFE_M 0x00000400U |
| #define | DCAN_IE_TCFE_S 10U |
| #define | DCAN_IE_TFEE 0x00000800U |
| #define | DCAN_IE_TFEE_M 0x00000800U |
| #define | DCAN_IE_TFEE_S 11U |
| #define | DCAN_IE_TEFNE 0x00001000U |
| #define | DCAN_IE_TEFNE_M 0x00001000U |
| #define | DCAN_IE_TEFNE_S 12U |
| #define | DCAN_IE_TEFWE 0x00002000U |
| #define | DCAN_IE_TEFWE_M 0x00002000U |
| #define | DCAN_IE_TEFWE_S 13U |
| #define | DCAN_IE_TEFFE 0x00004000U |
| #define | DCAN_IE_TEFFE_M 0x00004000U |
| #define | DCAN_IE_TEFFE_S 14U |
| #define | DCAN_IE_TEFLE 0x00008000U |
| #define | DCAN_IE_TEFLE_M 0x00008000U |
| #define | DCAN_IE_TEFLE_S 15U |
| #define | DCAN_IE_TSWE 0x00010000U |
| #define | DCAN_IE_TSWE_M 0x00010000U |
| #define | DCAN_IE_TSWE_S 16U |
| #define | DCAN_IE_MRAFE 0x00020000U |
| #define | DCAN_IE_MRAFE_M 0x00020000U |
| #define | DCAN_IE_MRAFE_S 17U |
| #define | DCAN_IE_TOOE 0x00040000U |
| #define | DCAN_IE_TOOE_M 0x00040000U |
| #define | DCAN_IE_TOOE_S 18U |
| #define | DCAN_IE_DRXE 0x00080000U |
| #define | DCAN_IE_DRXE_M 0x00080000U |
| #define | DCAN_IE_DRXE_S 19U |
| #define | DCAN_IE_BEUE 0x00200000U |
| #define | DCAN_IE_BEUE_M 0x00200000U |
| #define | DCAN_IE_BEUE_S 21U |
| #define | DCAN_IE_ELOE 0x00400000U |
| #define | DCAN_IE_ELOE_M 0x00400000U |
| #define | DCAN_IE_ELOE_S 22U |
| #define | DCAN_IE_EPE 0x00800000U |
| #define | DCAN_IE_EPE_M 0x00800000U |
| #define | DCAN_IE_EPE_S 23U |
| #define | DCAN_IE_EWE 0x01000000U |
| #define | DCAN_IE_EWE_M 0x01000000U |
| #define | DCAN_IE_EWE_S 24U |
| #define | DCAN_IE_BOE 0x02000000U |
| #define | DCAN_IE_BOE_M 0x02000000U |
| #define | DCAN_IE_BOE_S 25U |
| #define | DCAN_IE_WDIE 0x04000000U |
| #define | DCAN_IE_WDIE_M 0x04000000U |
| #define | DCAN_IE_WDIE_S 26U |
| #define | DCAN_IE_PEAE 0x08000000U |
| #define | DCAN_IE_PEAE_M 0x08000000U |
| #define | DCAN_IE_PEAE_S 27U |
| #define | DCAN_IE_PEDE 0x10000000U |
| #define | DCAN_IE_PEDE_M 0x10000000U |
| #define | DCAN_IE_PEDE_S 28U |
| #define | DCAN_IE_ARAE 0x20000000U |
| #define | DCAN_IE_ARAE_M 0x20000000U |
| #define | DCAN_IE_ARAE_S 29U |
| #define | DCAN_ILS_RF0NL 0x00000001U |
| #define | DCAN_ILS_RF0NL_M 0x00000001U |
| #define | DCAN_ILS_RF0NL_S 0U |
| #define | DCAN_ILS_RF0WL 0x00000002U |
| #define | DCAN_ILS_RF0WL_M 0x00000002U |
| #define | DCAN_ILS_RF0WL_S 1U |
| #define | DCAN_ILS_RF0FL 0x00000004U |
| #define | DCAN_ILS_RF0FL_M 0x00000004U |
| #define | DCAN_ILS_RF0FL_S 2U |
| #define | DCAN_ILS_RF0LL 0x00000008U |
| #define | DCAN_ILS_RF0LL_M 0x00000008U |
| #define | DCAN_ILS_RF0LL_S 3U |
| #define | DCAN_ILS_RF1NL 0x00000010U |
| #define | DCAN_ILS_RF1NL_M 0x00000010U |
| #define | DCAN_ILS_RF1NL_S 4U |
| #define | DCAN_ILS_RF1WL 0x00000020U |
| #define | DCAN_ILS_RF1WL_M 0x00000020U |
| #define | DCAN_ILS_RF1WL_S 5U |
| #define | DCAN_ILS_RF1FL 0x00000040U |
| #define | DCAN_ILS_RF1FL_M 0x00000040U |
| #define | DCAN_ILS_RF1FL_S 6U |
| #define | DCAN_ILS_RF1LL 0x00000080U |
| #define | DCAN_ILS_RF1LL_M 0x00000080U |
| #define | DCAN_ILS_RF1LL_S 7U |
| #define | DCAN_ILS_HPML 0x00000100U |
| #define | DCAN_ILS_HPML_M 0x00000100U |
| #define | DCAN_ILS_HPML_S 8U |
| #define | DCAN_ILS_TCL 0x00000200U |
| #define | DCAN_ILS_TCL_M 0x00000200U |
| #define | DCAN_ILS_TCL_S 9U |
| #define | DCAN_ILS_TCFL 0x00000400U |
| #define | DCAN_ILS_TCFL_M 0x00000400U |
| #define | DCAN_ILS_TCFL_S 10U |
| #define | DCAN_ILS_TFEL 0x00000800U |
| #define | DCAN_ILS_TFEL_M 0x00000800U |
| #define | DCAN_ILS_TFEL_S 11U |
| #define | DCAN_ILS_TEFNL 0x00001000U |
| #define | DCAN_ILS_TEFNL_M 0x00001000U |
| #define | DCAN_ILS_TEFNL_S 12U |
| #define | DCAN_ILS_TEFWL 0x00002000U |
| #define | DCAN_ILS_TEFWL_M 0x00002000U |
| #define | DCAN_ILS_TEFWL_S 13U |
| #define | DCAN_ILS_TEFFL 0x00004000U |
| #define | DCAN_ILS_TEFFL_M 0x00004000U |
| #define | DCAN_ILS_TEFFL_S 14U |
| #define | DCAN_ILS_TEFLL 0x00008000U |
| #define | DCAN_ILS_TEFLL_M 0x00008000U |
| #define | DCAN_ILS_TEFLL_S 15U |
| #define | DCAN_ILS_TSWL 0x00010000U |
| #define | DCAN_ILS_TSWL_M 0x00010000U |
| #define | DCAN_ILS_TSWL_S 16U |
| #define | DCAN_ILS_MRAFL 0x00020000U |
| #define | DCAN_ILS_MRAFL_M 0x00020000U |
| #define | DCAN_ILS_MRAFL_S 17U |
| #define | DCAN_ILS_TOOL 0x00040000U |
| #define | DCAN_ILS_TOOL_M 0x00040000U |
| #define | DCAN_ILS_TOOL_S 18U |
| #define | DCAN_ILS_DRXL 0x00080000U |
| #define | DCAN_ILS_DRXL_M 0x00080000U |
| #define | DCAN_ILS_DRXL_S 19U |
| #define | DCAN_ILS_BECL 0x00100000U |
| #define | DCAN_ILS_BECL_M 0x00100000U |
| #define | DCAN_ILS_BECL_S 20U |
| #define | DCAN_ILS_BEUL 0x00200000U |
| #define | DCAN_ILS_BEUL_M 0x00200000U |
| #define | DCAN_ILS_BEUL_S 21U |
| #define | DCAN_ILS_ELOL 0x00400000U |
| #define | DCAN_ILS_ELOL_M 0x00400000U |
| #define | DCAN_ILS_ELOL_S 22U |
| #define | DCAN_ILS_EPL 0x00800000U |
| #define | DCAN_ILS_EPL_M 0x00800000U |
| #define | DCAN_ILS_EPL_S 23U |
| #define | DCAN_ILS_EWL 0x01000000U |
| #define | DCAN_ILS_EWL_M 0x01000000U |
| #define | DCAN_ILS_EWL_S 24U |
| #define | DCAN_ILS_BOL 0x02000000U |
| #define | DCAN_ILS_BOL_M 0x02000000U |
| #define | DCAN_ILS_BOL_S 25U |
| #define | DCAN_ILS_WDIL 0x04000000U |
| #define | DCAN_ILS_WDIL_M 0x04000000U |
| #define | DCAN_ILS_WDIL_S 26U |
| #define | DCAN_ILS_PEAL 0x08000000U |
| #define | DCAN_ILS_PEAL_M 0x08000000U |
| #define | DCAN_ILS_PEAL_S 27U |
| #define | DCAN_ILS_PEDL 0x10000000U |
| #define | DCAN_ILS_PEDL_M 0x10000000U |
| #define | DCAN_ILS_PEDL_S 28U |
| #define | DCAN_ILS_ARAL 0x20000000U |
| #define | DCAN_ILS_ARAL_M 0x20000000U |
| #define | DCAN_ILS_ARAL_S 29U |
| #define | DCAN_ILE_EINT0 0x00000001U |
| #define | DCAN_ILE_EINT0_M 0x00000001U |
| #define | DCAN_ILE_EINT0_S 0U |
| #define | DCAN_ILE_EINT1 0x00000002U |
| #define | DCAN_ILE_EINT1_M 0x00000002U |
| #define | DCAN_ILE_EINT1_S 1U |
| #define | DCAN_GFC_RRFE 0x00000001U |
| #define | DCAN_GFC_RRFE_M 0x00000001U |
| #define | DCAN_GFC_RRFE_S 0U |
| #define | DCAN_GFC_RRFS 0x00000002U |
| #define | DCAN_GFC_RRFS_M 0x00000002U |
| #define | DCAN_GFC_RRFS_S 1U |
| #define | DCAN_GFC_ANFE_W 2U |
| #define | DCAN_GFC_ANFE_M 0x0000000CU |
| #define | DCAN_GFC_ANFE_S 2U |
| #define | DCAN_GFC_ANFS_W 2U |
| #define | DCAN_GFC_ANFS_M 0x00000030U |
| #define | DCAN_GFC_ANFS_S 4U |
| #define | DCAN_SIDFC_FLSSA_W 14U |
| #define | DCAN_SIDFC_FLSSA_M 0x0000FFFCU |
| #define | DCAN_SIDFC_FLSSA_S 2U |
| #define | DCAN_SIDFC_LSS_W 8U |
| #define | DCAN_SIDFC_LSS_M 0x00FF0000U |
| #define | DCAN_SIDFC_LSS_S 16U |
| #define | DCAN_XIDFC_FLESA_W 14U |
| #define | DCAN_XIDFC_FLESA_M 0x0000FFFCU |
| #define | DCAN_XIDFC_FLESA_S 2U |
| #define | DCAN_XIDFC_LSE_W 7U |
| #define | DCAN_XIDFC_LSE_M 0x007F0000U |
| #define | DCAN_XIDFC_LSE_S 16U |
| #define | DCAN_XIDAM_EIDM_W 29U |
| #define | DCAN_XIDAM_EIDM_M 0x1FFFFFFFU |
| #define | DCAN_XIDAM_EIDM_S 0U |
| #define | DCAN_HPMS_BIDX_W 6U |
| #define | DCAN_HPMS_BIDX_M 0x0000003FU |
| #define | DCAN_HPMS_BIDX_S 0U |
| #define | DCAN_HPMS_MSI_W 2U |
| #define | DCAN_HPMS_MSI_M 0x000000C0U |
| #define | DCAN_HPMS_MSI_S 6U |
| #define | DCAN_HPMS_FIDX_W 7U |
| #define | DCAN_HPMS_FIDX_M 0x00007F00U |
| #define | DCAN_HPMS_FIDX_S 8U |
| #define | DCAN_HPMS_FLST 0x00008000U |
| #define | DCAN_HPMS_FLST_M 0x00008000U |
| #define | DCAN_HPMS_FLST_S 15U |
| #define | DCAN_NDAT1_ND0 0x00000001U |
| #define | DCAN_NDAT1_ND0_M 0x00000001U |
| #define | DCAN_NDAT1_ND0_S 0U |
| #define | DCAN_NDAT1_ND1 0x00000002U |
| #define | DCAN_NDAT1_ND1_M 0x00000002U |
| #define | DCAN_NDAT1_ND1_S 1U |
| #define | DCAN_NDAT1_ND2 0x00000004U |
| #define | DCAN_NDAT1_ND2_M 0x00000004U |
| #define | DCAN_NDAT1_ND2_S 2U |
| #define | DCAN_NDAT1_ND3 0x00000008U |
| #define | DCAN_NDAT1_ND3_M 0x00000008U |
| #define | DCAN_NDAT1_ND3_S 3U |
| #define | DCAN_NDAT1_ND4 0x00000010U |
| #define | DCAN_NDAT1_ND4_M 0x00000010U |
| #define | DCAN_NDAT1_ND4_S 4U |
| #define | DCAN_NDAT1_ND5 0x00000020U |
| #define | DCAN_NDAT1_ND5_M 0x00000020U |
| #define | DCAN_NDAT1_ND5_S 5U |
| #define | DCAN_NDAT1_ND6 0x00000040U |
| #define | DCAN_NDAT1_ND6_M 0x00000040U |
| #define | DCAN_NDAT1_ND6_S 6U |
| #define | DCAN_NDAT1_ND7 0x00000080U |
| #define | DCAN_NDAT1_ND7_M 0x00000080U |
| #define | DCAN_NDAT1_ND7_S 7U |
| #define | DCAN_NDAT1_ND8 0x00000100U |
| #define | DCAN_NDAT1_ND8_M 0x00000100U |
| #define | DCAN_NDAT1_ND8_S 8U |
| #define | DCAN_NDAT1_ND9 0x00000200U |
| #define | DCAN_NDAT1_ND9_M 0x00000200U |
| #define | DCAN_NDAT1_ND9_S 9U |
| #define | DCAN_NDAT1_ND10 0x00000400U |
| #define | DCAN_NDAT1_ND10_M 0x00000400U |
| #define | DCAN_NDAT1_ND10_S 10U |
| #define | DCAN_NDAT1_ND11 0x00000800U |
| #define | DCAN_NDAT1_ND11_M 0x00000800U |
| #define | DCAN_NDAT1_ND11_S 11U |
| #define | DCAN_NDAT1_ND12 0x00001000U |
| #define | DCAN_NDAT1_ND12_M 0x00001000U |
| #define | DCAN_NDAT1_ND12_S 12U |
| #define | DCAN_NDAT1_ND13 0x00002000U |
| #define | DCAN_NDAT1_ND13_M 0x00002000U |
| #define | DCAN_NDAT1_ND13_S 13U |
| #define | DCAN_NDAT1_ND14 0x00004000U |
| #define | DCAN_NDAT1_ND14_M 0x00004000U |
| #define | DCAN_NDAT1_ND14_S 14U |
| #define | DCAN_NDAT1_ND15 0x00008000U |
| #define | DCAN_NDAT1_ND15_M 0x00008000U |
| #define | DCAN_NDAT1_ND15_S 15U |
| #define | DCAN_NDAT1_ND16 0x00010000U |
| #define | DCAN_NDAT1_ND16_M 0x00010000U |
| #define | DCAN_NDAT1_ND16_S 16U |
| #define | DCAN_NDAT1_ND17 0x00020000U |
| #define | DCAN_NDAT1_ND17_M 0x00020000U |
| #define | DCAN_NDAT1_ND17_S 17U |
| #define | DCAN_NDAT1_ND18 0x00040000U |
| #define | DCAN_NDAT1_ND18_M 0x00040000U |
| #define | DCAN_NDAT1_ND18_S 18U |
| #define | DCAN_NDAT1_ND19 0x00080000U |
| #define | DCAN_NDAT1_ND19_M 0x00080000U |
| #define | DCAN_NDAT1_ND19_S 19U |
| #define | DCAN_NDAT1_ND20 0x00100000U |
| #define | DCAN_NDAT1_ND20_M 0x00100000U |
| #define | DCAN_NDAT1_ND20_S 20U |
| #define | DCAN_NDAT1_ND21 0x00200000U |
| #define | DCAN_NDAT1_ND21_M 0x00200000U |
| #define | DCAN_NDAT1_ND21_S 21U |
| #define | DCAN_NDAT1_ND22 0x00400000U |
| #define | DCAN_NDAT1_ND22_M 0x00400000U |
| #define | DCAN_NDAT1_ND22_S 22U |
| #define | DCAN_NDAT1_ND23 0x00800000U |
| #define | DCAN_NDAT1_ND23_M 0x00800000U |
| #define | DCAN_NDAT1_ND23_S 23U |
| #define | DCAN_NDAT1_ND24 0x01000000U |
| #define | DCAN_NDAT1_ND24_M 0x01000000U |
| #define | DCAN_NDAT1_ND24_S 24U |
| #define | DCAN_NDAT1_ND25 0x02000000U |
| #define | DCAN_NDAT1_ND25_M 0x02000000U |
| #define | DCAN_NDAT1_ND25_S 25U |
| #define | DCAN_NDAT1_ND26 0x04000000U |
| #define | DCAN_NDAT1_ND26_M 0x04000000U |
| #define | DCAN_NDAT1_ND26_S 26U |
| #define | DCAN_NDAT1_ND27 0x08000000U |
| #define | DCAN_NDAT1_ND27_M 0x08000000U |
| #define | DCAN_NDAT1_ND27_S 27U |
| #define | DCAN_NDAT1_ND28 0x10000000U |
| #define | DCAN_NDAT1_ND28_M 0x10000000U |
| #define | DCAN_NDAT1_ND28_S 28U |
| #define | DCAN_NDAT1_ND29 0x20000000U |
| #define | DCAN_NDAT1_ND29_M 0x20000000U |
| #define | DCAN_NDAT1_ND29_S 29U |
| #define | DCAN_NDAT1_ND30 0x40000000U |
| #define | DCAN_NDAT1_ND30_M 0x40000000U |
| #define | DCAN_NDAT1_ND30_S 30U |
| #define | DCAN_NDAT1_ND31 0x80000000U |
| #define | DCAN_NDAT1_ND31_M 0x80000000U |
| #define | DCAN_NDAT1_ND31_S 31U |
| #define | DCAN_NDAT2_ND32 0x00000001U |
| #define | DCAN_NDAT2_ND32_M 0x00000001U |
| #define | DCAN_NDAT2_ND32_S 0U |
| #define | DCAN_NDAT2_ND33 0x00000002U |
| #define | DCAN_NDAT2_ND33_M 0x00000002U |
| #define | DCAN_NDAT2_ND33_S 1U |
| #define | DCAN_NDAT2_ND34 0x00000004U |
| #define | DCAN_NDAT2_ND34_M 0x00000004U |
| #define | DCAN_NDAT2_ND34_S 2U |
| #define | DCAN_NDAT2_ND35 0x00000008U |
| #define | DCAN_NDAT2_ND35_M 0x00000008U |
| #define | DCAN_NDAT2_ND35_S 3U |
| #define | DCAN_NDAT2_ND36 0x00000010U |
| #define | DCAN_NDAT2_ND36_M 0x00000010U |
| #define | DCAN_NDAT2_ND36_S 4U |
| #define | DCAN_NDAT2_ND37 0x00000020U |
| #define | DCAN_NDAT2_ND37_M 0x00000020U |
| #define | DCAN_NDAT2_ND37_S 5U |
| #define | DCAN_NDAT2_ND38 0x00000040U |
| #define | DCAN_NDAT2_ND38_M 0x00000040U |
| #define | DCAN_NDAT2_ND38_S 6U |
| #define | DCAN_NDAT2_ND39 0x00000080U |
| #define | DCAN_NDAT2_ND39_M 0x00000080U |
| #define | DCAN_NDAT2_ND39_S 7U |
| #define | DCAN_NDAT2_ND40 0x00000100U |
| #define | DCAN_NDAT2_ND40_M 0x00000100U |
| #define | DCAN_NDAT2_ND40_S 8U |
| #define | DCAN_NDAT2_ND41 0x00000200U |
| #define | DCAN_NDAT2_ND41_M 0x00000200U |
| #define | DCAN_NDAT2_ND41_S 9U |
| #define | DCAN_NDAT2_ND42 0x00000400U |
| #define | DCAN_NDAT2_ND42_M 0x00000400U |
| #define | DCAN_NDAT2_ND42_S 10U |
| #define | DCAN_NDAT2_ND43 0x00000800U |
| #define | DCAN_NDAT2_ND43_M 0x00000800U |
| #define | DCAN_NDAT2_ND43_S 11U |
| #define | DCAN_NDAT2_ND44 0x00001000U |
| #define | DCAN_NDAT2_ND44_M 0x00001000U |
| #define | DCAN_NDAT2_ND44_S 12U |
| #define | DCAN_NDAT2_ND45 0x00002000U |
| #define | DCAN_NDAT2_ND45_M 0x00002000U |
| #define | DCAN_NDAT2_ND45_S 13U |
| #define | DCAN_NDAT2_ND46 0x00004000U |
| #define | DCAN_NDAT2_ND46_M 0x00004000U |
| #define | DCAN_NDAT2_ND46_S 14U |
| #define | DCAN_NDAT2_ND47 0x00008000U |
| #define | DCAN_NDAT2_ND47_M 0x00008000U |
| #define | DCAN_NDAT2_ND47_S 15U |
| #define | DCAN_NDAT2_ND48 0x00010000U |
| #define | DCAN_NDAT2_ND48_M 0x00010000U |
| #define | DCAN_NDAT2_ND48_S 16U |
| #define | DCAN_NDAT2_ND49 0x00020000U |
| #define | DCAN_NDAT2_ND49_M 0x00020000U |
| #define | DCAN_NDAT2_ND49_S 17U |
| #define | DCAN_NDAT2_ND50 0x00040000U |
| #define | DCAN_NDAT2_ND50_M 0x00040000U |
| #define | DCAN_NDAT2_ND50_S 18U |
| #define | DCAN_NDAT2_ND51 0x00080000U |
| #define | DCAN_NDAT2_ND51_M 0x00080000U |
| #define | DCAN_NDAT2_ND51_S 19U |
| #define | DCAN_NDAT2_ND52 0x00100000U |
| #define | DCAN_NDAT2_ND52_M 0x00100000U |
| #define | DCAN_NDAT2_ND52_S 20U |
| #define | DCAN_NDAT2_ND53 0x00200000U |
| #define | DCAN_NDAT2_ND53_M 0x00200000U |
| #define | DCAN_NDAT2_ND53_S 21U |
| #define | DCAN_NDAT2_ND54 0x00400000U |
| #define | DCAN_NDAT2_ND54_M 0x00400000U |
| #define | DCAN_NDAT2_ND54_S 22U |
| #define | DCAN_NDAT2_ND55 0x00800000U |
| #define | DCAN_NDAT2_ND55_M 0x00800000U |
| #define | DCAN_NDAT2_ND55_S 23U |
| #define | DCAN_NDAT2_ND56 0x01000000U |
| #define | DCAN_NDAT2_ND56_M 0x01000000U |
| #define | DCAN_NDAT2_ND56_S 24U |
| #define | DCAN_NDAT2_ND57 0x02000000U |
| #define | DCAN_NDAT2_ND57_M 0x02000000U |
| #define | DCAN_NDAT2_ND57_S 25U |
| #define | DCAN_NDAT2_ND58 0x04000000U |
| #define | DCAN_NDAT2_ND58_M 0x04000000U |
| #define | DCAN_NDAT2_ND58_S 26U |
| #define | DCAN_NDAT2_ND59 0x08000000U |
| #define | DCAN_NDAT2_ND59_M 0x08000000U |
| #define | DCAN_NDAT2_ND59_S 27U |
| #define | DCAN_NDAT2_ND60 0x10000000U |
| #define | DCAN_NDAT2_ND60_M 0x10000000U |
| #define | DCAN_NDAT2_ND60_S 28U |
| #define | DCAN_NDAT2_ND61 0x20000000U |
| #define | DCAN_NDAT2_ND61_M 0x20000000U |
| #define | DCAN_NDAT2_ND61_S 29U |
| #define | DCAN_NDAT2_ND62 0x40000000U |
| #define | DCAN_NDAT2_ND62_M 0x40000000U |
| #define | DCAN_NDAT2_ND62_S 30U |
| #define | DCAN_NDAT2_ND63 0x80000000U |
| #define | DCAN_NDAT2_ND63_M 0x80000000U |
| #define | DCAN_NDAT2_ND63_S 31U |
| #define | DCAN_RXF0C_F0SA_W 14U |
| #define | DCAN_RXF0C_F0SA_M 0x0000FFFCU |
| #define | DCAN_RXF0C_F0SA_S 2U |
| #define | DCAN_RXF0C_F0S_W 7U |
| #define | DCAN_RXF0C_F0S_M 0x007F0000U |
| #define | DCAN_RXF0C_F0S_S 16U |
| #define | DCAN_RXF0C_F0WM_W 7U |
| #define | DCAN_RXF0C_F0WM_M 0x7F000000U |
| #define | DCAN_RXF0C_F0WM_S 24U |
| #define | DCAN_RXF0C_F0OM 0x80000000U |
| #define | DCAN_RXF0C_F0OM_M 0x80000000U |
| #define | DCAN_RXF0C_F0OM_S 31U |
| #define | DCAN_RXF0S_F0FL_W 7U |
| #define | DCAN_RXF0S_F0FL_M 0x0000007FU |
| #define | DCAN_RXF0S_F0FL_S 0U |
| #define | DCAN_RXF0S_F0GI_W 6U |
| #define | DCAN_RXF0S_F0GI_M 0x00003F00U |
| #define | DCAN_RXF0S_F0GI_S 8U |
| #define | DCAN_RXF0S_F0PI_W 6U |
| #define | DCAN_RXF0S_F0PI_M 0x003F0000U |
| #define | DCAN_RXF0S_F0PI_S 16U |
| #define | DCAN_RXF0S_F0F 0x01000000U |
| #define | DCAN_RXF0S_F0F_M 0x01000000U |
| #define | DCAN_RXF0S_F0F_S 24U |
| #define | DCAN_RXF0S_RF0L 0x02000000U |
| #define | DCAN_RXF0S_RF0L_M 0x02000000U |
| #define | DCAN_RXF0S_RF0L_S 25U |
| #define | DCAN_RXF0A_F0AI_W 6U |
| #define | DCAN_RXF0A_F0AI_M 0x0000003FU |
| #define | DCAN_RXF0A_F0AI_S 0U |
| #define | DCAN_RXBC_RBSA_W 14U |
| #define | DCAN_RXBC_RBSA_M 0x0000FFFCU |
| #define | DCAN_RXBC_RBSA_S 2U |
| #define | DCAN_RXF1C_F1SA_W 14U |
| #define | DCAN_RXF1C_F1SA_M 0x0000FFFCU |
| #define | DCAN_RXF1C_F1SA_S 2U |
| #define | DCAN_RXF1C_F1S_W 7U |
| #define | DCAN_RXF1C_F1S_M 0x007F0000U |
| #define | DCAN_RXF1C_F1S_S 16U |
| #define | DCAN_RXF1C_F1WM_W 7U |
| #define | DCAN_RXF1C_F1WM_M 0x7F000000U |
| #define | DCAN_RXF1C_F1WM_S 24U |
| #define | DCAN_RXF1C_F1OM 0x80000000U |
| #define | DCAN_RXF1C_F1OM_M 0x80000000U |
| #define | DCAN_RXF1C_F1OM_S 31U |
| #define | DCAN_RXF1S_F1FL_W 7U |
| #define | DCAN_RXF1S_F1FL_M 0x0000007FU |
| #define | DCAN_RXF1S_F1FL_S 0U |
| #define | DCAN_RXF1S_F1GI_W 6U |
| #define | DCAN_RXF1S_F1GI_M 0x00003F00U |
| #define | DCAN_RXF1S_F1GI_S 8U |
| #define | DCAN_RXF1S_F1PI_W 6U |
| #define | DCAN_RXF1S_F1PI_M 0x003F0000U |
| #define | DCAN_RXF1S_F1PI_S 16U |
| #define | DCAN_RXF1S_F1F 0x01000000U |
| #define | DCAN_RXF1S_F1F_M 0x01000000U |
| #define | DCAN_RXF1S_F1F_S 24U |
| #define | DCAN_RXF1S_RF1L 0x02000000U |
| #define | DCAN_RXF1S_RF1L_M 0x02000000U |
| #define | DCAN_RXF1S_RF1L_S 25U |
| #define | DCAN_RXF1S_DMS_W 2U |
| #define | DCAN_RXF1S_DMS_M 0xC0000000U |
| #define | DCAN_RXF1S_DMS_S 30U |
| #define | DCAN_RXF1A_F1AI_W 6U |
| #define | DCAN_RXF1A_F1AI_M 0x0000003FU |
| #define | DCAN_RXF1A_F1AI_S 0U |
| #define | DCAN_RXESC_F0DS_W 3U |
| #define | DCAN_RXESC_F0DS_M 0x00000007U |
| #define | DCAN_RXESC_F0DS_S 0U |
| #define | DCAN_RXESC_F1DS_W 3U |
| #define | DCAN_RXESC_F1DS_M 0x00000070U |
| #define | DCAN_RXESC_F1DS_S 4U |
| #define | DCAN_RXESC_RBDS_W 3U |
| #define | DCAN_RXESC_RBDS_M 0x00000700U |
| #define | DCAN_RXESC_RBDS_S 8U |
| #define | DCAN_TXBC_TBSA_W 14U |
| #define | DCAN_TXBC_TBSA_M 0x0000FFFCU |
| #define | DCAN_TXBC_TBSA_S 2U |
| #define | DCAN_TXBC_NDTB_W 6U |
| #define | DCAN_TXBC_NDTB_M 0x003F0000U |
| #define | DCAN_TXBC_NDTB_S 16U |
| #define | DCAN_TXBC_TFQS_W 6U |
| #define | DCAN_TXBC_TFQS_M 0x3F000000U |
| #define | DCAN_TXBC_TFQS_S 24U |
| #define | DCAN_TXBC_TFQM 0x40000000U |
| #define | DCAN_TXBC_TFQM_M 0x40000000U |
| #define | DCAN_TXBC_TFQM_S 30U |
| #define | DCAN_TXFQS_TFFL_W 6U |
| #define | DCAN_TXFQS_TFFL_M 0x0000003FU |
| #define | DCAN_TXFQS_TFFL_S 0U |
| #define | DCAN_TXFQS_TFGI_W 5U |
| #define | DCAN_TXFQS_TFGI_M 0x00001F00U |
| #define | DCAN_TXFQS_TFGI_S 8U |
| #define | DCAN_TXFQS_TFQP_W 5U |
| #define | DCAN_TXFQS_TFQP_M 0x001F0000U |
| #define | DCAN_TXFQS_TFQP_S 16U |
| #define | DCAN_TXFQS_TFQF 0x00200000U |
| #define | DCAN_TXFQS_TFQF_M 0x00200000U |
| #define | DCAN_TXFQS_TFQF_S 21U |
| #define | DCAN_TXESC_TBDS_W 3U |
| #define | DCAN_TXESC_TBDS_M 0x00000007U |
| #define | DCAN_TXESC_TBDS_S 0U |
| #define | DCAN_TXBRPAP_TRP0 0x00000001U |
| #define | DCAN_TXBRPAP_TRP0_M 0x00000001U |
| #define | DCAN_TXBRPAP_TRP0_S 0U |
| #define | DCAN_TXBRPAP_TRP1 0x00000002U |
| #define | DCAN_TXBRPAP_TRP1_M 0x00000002U |
| #define | DCAN_TXBRPAP_TRP1_S 1U |
| #define | DCAN_TXBRPAP_TRP2 0x00000004U |
| #define | DCAN_TXBRPAP_TRP2_M 0x00000004U |
| #define | DCAN_TXBRPAP_TRP2_S 2U |
| #define | DCAN_TXBRPAP_TRP3 0x00000008U |
| #define | DCAN_TXBRPAP_TRP3_M 0x00000008U |
| #define | DCAN_TXBRPAP_TRP3_S 3U |
| #define | DCAN_TXBRPAP_TRP4 0x00000010U |
| #define | DCAN_TXBRPAP_TRP4_M 0x00000010U |
| #define | DCAN_TXBRPAP_TRP4_S 4U |
| #define | DCAN_TXBRPAP_TRP5 0x00000020U |
| #define | DCAN_TXBRPAP_TRP5_M 0x00000020U |
| #define | DCAN_TXBRPAP_TRP5_S 5U |
| #define | DCAN_TXBRPAP_TRP6 0x00000040U |
| #define | DCAN_TXBRPAP_TRP6_M 0x00000040U |
| #define | DCAN_TXBRPAP_TRP6_S 6U |
| #define | DCAN_TXBRPAP_TRP7 0x00000080U |
| #define | DCAN_TXBRPAP_TRP7_M 0x00000080U |
| #define | DCAN_TXBRPAP_TRP7_S 7U |
| #define | DCAN_TXBRPAP_TRP8 0x00000100U |
| #define | DCAN_TXBRPAP_TRP8_M 0x00000100U |
| #define | DCAN_TXBRPAP_TRP8_S 8U |
| #define | DCAN_TXBRPAP_TRP9 0x00000200U |
| #define | DCAN_TXBRPAP_TRP9_M 0x00000200U |
| #define | DCAN_TXBRPAP_TRP9_S 9U |
| #define | DCAN_TXBRPAP_TRP10 0x00000400U |
| #define | DCAN_TXBRPAP_TRP10_M 0x00000400U |
| #define | DCAN_TXBRPAP_TRP10_S 10U |
| #define | DCAN_TXBRPAP_TRP11 0x00000800U |
| #define | DCAN_TXBRPAP_TRP11_M 0x00000800U |
| #define | DCAN_TXBRPAP_TRP11_S 11U |
| #define | DCAN_TXBRPAP_TRP12 0x00001000U |
| #define | DCAN_TXBRPAP_TRP12_M 0x00001000U |
| #define | DCAN_TXBRPAP_TRP12_S 12U |
| #define | DCAN_TXBRPAP_TRP13 0x00002000U |
| #define | DCAN_TXBRPAP_TRP13_M 0x00002000U |
| #define | DCAN_TXBRPAP_TRP13_S 13U |
| #define | DCAN_TXBRPAP_TRP14 0x00004000U |
| #define | DCAN_TXBRPAP_TRP14_M 0x00004000U |
| #define | DCAN_TXBRPAP_TRP14_S 14U |
| #define | DCAN_TXBRPAP_TRP15 0x00008000U |
| #define | DCAN_TXBRPAP_TRP15_M 0x00008000U |
| #define | DCAN_TXBRPAP_TRP15_S 15U |
| #define | DCAN_TXBRPAP_TRP16 0x00010000U |
| #define | DCAN_TXBRPAP_TRP16_M 0x00010000U |
| #define | DCAN_TXBRPAP_TRP16_S 16U |
| #define | DCAN_TXBRPAP_TRP17 0x00020000U |
| #define | DCAN_TXBRPAP_TRP17_M 0x00020000U |
| #define | DCAN_TXBRPAP_TRP17_S 17U |
| #define | DCAN_TXBRPAP_TRP18 0x00040000U |
| #define | DCAN_TXBRPAP_TRP18_M 0x00040000U |
| #define | DCAN_TXBRPAP_TRP18_S 18U |
| #define | DCAN_TXBRPAP_TRP19 0x00080000U |
| #define | DCAN_TXBRPAP_TRP19_M 0x00080000U |
| #define | DCAN_TXBRPAP_TRP19_S 19U |
| #define | DCAN_TXBRPAP_TRP20 0x00100000U |
| #define | DCAN_TXBRPAP_TRP20_M 0x00100000U |
| #define | DCAN_TXBRPAP_TRP20_S 20U |
| #define | DCAN_TXBRPAP_TRP21 0x00200000U |
| #define | DCAN_TXBRPAP_TRP21_M 0x00200000U |
| #define | DCAN_TXBRPAP_TRP21_S 21U |
| #define | DCAN_TXBRPAP_TRP22 0x00400000U |
| #define | DCAN_TXBRPAP_TRP22_M 0x00400000U |
| #define | DCAN_TXBRPAP_TRP22_S 22U |
| #define | DCAN_TXBRPAP_TRP23 0x00800000U |
| #define | DCAN_TXBRPAP_TRP23_M 0x00800000U |
| #define | DCAN_TXBRPAP_TRP23_S 23U |
| #define | DCAN_TXBRPAP_TRP24 0x01000000U |
| #define | DCAN_TXBRPAP_TRP24_M 0x01000000U |
| #define | DCAN_TXBRPAP_TRP24_S 24U |
| #define | DCAN_TXBRPAP_TRP25 0x02000000U |
| #define | DCAN_TXBRPAP_TRP25_M 0x02000000U |
| #define | DCAN_TXBRPAP_TRP25_S 25U |
| #define | DCAN_TXBRPAP_TRP26 0x04000000U |
| #define | DCAN_TXBRPAP_TRP26_M 0x04000000U |
| #define | DCAN_TXBRPAP_TRP26_S 26U |
| #define | DCAN_TXBRPAP_TRP27 0x08000000U |
| #define | DCAN_TXBRPAP_TRP27_M 0x08000000U |
| #define | DCAN_TXBRPAP_TRP27_S 27U |
| #define | DCAN_TXBRPAP_TRP28 0x10000000U |
| #define | DCAN_TXBRPAP_TRP28_M 0x10000000U |
| #define | DCAN_TXBRPAP_TRP28_S 28U |
| #define | DCAN_TXBRPAP_TRP29 0x20000000U |
| #define | DCAN_TXBRPAP_TRP29_M 0x20000000U |
| #define | DCAN_TXBRPAP_TRP29_S 29U |
| #define | DCAN_TXBRPAP_TRP30 0x40000000U |
| #define | DCAN_TXBRPAP_TRP30_M 0x40000000U |
| #define | DCAN_TXBRPAP_TRP30_S 30U |
| #define | DCAN_TXBRPAP_TRP31 0x80000000U |
| #define | DCAN_TXBRPAP_TRP31_M 0x80000000U |
| #define | DCAN_TXBRPAP_TRP31_S 31U |
| #define | DCAN_TXBAR_AR0 0x00000001U |
| #define | DCAN_TXBAR_AR0_M 0x00000001U |
| #define | DCAN_TXBAR_AR0_S 0U |
| #define | DCAN_TXBAR_AR1 0x00000002U |
| #define | DCAN_TXBAR_AR1_M 0x00000002U |
| #define | DCAN_TXBAR_AR1_S 1U |
| #define | DCAN_TXBAR_AR2 0x00000004U |
| #define | DCAN_TXBAR_AR2_M 0x00000004U |
| #define | DCAN_TXBAR_AR2_S 2U |
| #define | DCAN_TXBAR_AR3 0x00000008U |
| #define | DCAN_TXBAR_AR3_M 0x00000008U |
| #define | DCAN_TXBAR_AR3_S 3U |
| #define | DCAN_TXBAR_AR4 0x00000010U |
| #define | DCAN_TXBAR_AR4_M 0x00000010U |
| #define | DCAN_TXBAR_AR4_S 4U |
| #define | DCAN_TXBAR_AR5 0x00000020U |
| #define | DCAN_TXBAR_AR5_M 0x00000020U |
| #define | DCAN_TXBAR_AR5_S 5U |
| #define | DCAN_TXBAR_AR6 0x00000040U |
| #define | DCAN_TXBAR_AR6_M 0x00000040U |
| #define | DCAN_TXBAR_AR6_S 6U |
| #define | DCAN_TXBAR_AR7 0x00000080U |
| #define | DCAN_TXBAR_AR7_M 0x00000080U |
| #define | DCAN_TXBAR_AR7_S 7U |
| #define | DCAN_TXBAR_AR8 0x00000100U |
| #define | DCAN_TXBAR_AR8_M 0x00000100U |
| #define | DCAN_TXBAR_AR8_S 8U |
| #define | DCAN_TXBAR_AR9 0x00000200U |
| #define | DCAN_TXBAR_AR9_M 0x00000200U |
| #define | DCAN_TXBAR_AR9_S 9U |
| #define | DCAN_TXBAR_AR10 0x00000400U |
| #define | DCAN_TXBAR_AR10_M 0x00000400U |
| #define | DCAN_TXBAR_AR10_S 10U |
| #define | DCAN_TXBAR_AR11 0x00000800U |
| #define | DCAN_TXBAR_AR11_M 0x00000800U |
| #define | DCAN_TXBAR_AR11_S 11U |
| #define | DCAN_TXBAR_AR12 0x00001000U |
| #define | DCAN_TXBAR_AR12_M 0x00001000U |
| #define | DCAN_TXBAR_AR12_S 12U |
| #define | DCAN_TXBAR_AR13 0x00002000U |
| #define | DCAN_TXBAR_AR13_M 0x00002000U |
| #define | DCAN_TXBAR_AR13_S 13U |
| #define | DCAN_TXBAR_AR14 0x00004000U |
| #define | DCAN_TXBAR_AR14_M 0x00004000U |
| #define | DCAN_TXBAR_AR14_S 14U |
| #define | DCAN_TXBAR_AR15 0x00008000U |
| #define | DCAN_TXBAR_AR15_M 0x00008000U |
| #define | DCAN_TXBAR_AR15_S 15U |
| #define | DCAN_TXBAR_AR16 0x00010000U |
| #define | DCAN_TXBAR_AR16_M 0x00010000U |
| #define | DCAN_TXBAR_AR16_S 16U |
| #define | DCAN_TXBAR_AR17 0x00020000U |
| #define | DCAN_TXBAR_AR17_M 0x00020000U |
| #define | DCAN_TXBAR_AR17_S 17U |
| #define | DCAN_TXBAR_AR18 0x00040000U |
| #define | DCAN_TXBAR_AR18_M 0x00040000U |
| #define | DCAN_TXBAR_AR18_S 18U |
| #define | DCAN_TXBAR_AR19 0x00080000U |
| #define | DCAN_TXBAR_AR19_M 0x00080000U |
| #define | DCAN_TXBAR_AR19_S 19U |
| #define | DCAN_TXBAR_AR20 0x00100000U |
| #define | DCAN_TXBAR_AR20_M 0x00100000U |
| #define | DCAN_TXBAR_AR20_S 20U |
| #define | DCAN_TXBAR_AR21 0x00200000U |
| #define | DCAN_TXBAR_AR21_M 0x00200000U |
| #define | DCAN_TXBAR_AR21_S 21U |
| #define | DCAN_TXBAR_AR22 0x00400000U |
| #define | DCAN_TXBAR_AR22_M 0x00400000U |
| #define | DCAN_TXBAR_AR22_S 22U |
| #define | DCAN_TXBAR_AR23 0x00800000U |
| #define | DCAN_TXBAR_AR23_M 0x00800000U |
| #define | DCAN_TXBAR_AR23_S 23U |
| #define | DCAN_TXBAR_AR24 0x01000000U |
| #define | DCAN_TXBAR_AR24_M 0x01000000U |
| #define | DCAN_TXBAR_AR24_S 24U |
| #define | DCAN_TXBAR_AR25 0x02000000U |
| #define | DCAN_TXBAR_AR25_M 0x02000000U |
| #define | DCAN_TXBAR_AR25_S 25U |
| #define | DCAN_TXBAR_AR26 0x04000000U |
| #define | DCAN_TXBAR_AR26_M 0x04000000U |
| #define | DCAN_TXBAR_AR26_S 26U |
| #define | DCAN_TXBAR_AR27 0x08000000U |
| #define | DCAN_TXBAR_AR27_M 0x08000000U |
| #define | DCAN_TXBAR_AR27_S 27U |
| #define | DCAN_TXBAR_AR28 0x10000000U |
| #define | DCAN_TXBAR_AR28_M 0x10000000U |
| #define | DCAN_TXBAR_AR28_S 28U |
| #define | DCAN_TXBAR_AR29 0x20000000U |
| #define | DCAN_TXBAR_AR29_M 0x20000000U |
| #define | DCAN_TXBAR_AR29_S 29U |
| #define | DCAN_TXBAR_AR30 0x40000000U |
| #define | DCAN_TXBAR_AR30_M 0x40000000U |
| #define | DCAN_TXBAR_AR30_S 30U |
| #define | DCAN_TXBAR_AR31 0x80000000U |
| #define | DCAN_TXBAR_AR31_M 0x80000000U |
| #define | DCAN_TXBAR_AR31_S 31U |
| #define | DCAN_TXBCR_CR0 0x00000001U |
| #define | DCAN_TXBCR_CR0_M 0x00000001U |
| #define | DCAN_TXBCR_CR0_S 0U |
| #define | DCAN_TXBCR_CR1 0x00000002U |
| #define | DCAN_TXBCR_CR1_M 0x00000002U |
| #define | DCAN_TXBCR_CR1_S 1U |
| #define | DCAN_TXBCR_CR2 0x00000004U |
| #define | DCAN_TXBCR_CR2_M 0x00000004U |
| #define | DCAN_TXBCR_CR2_S 2U |
| #define | DCAN_TXBCR_CR3 0x00000008U |
| #define | DCAN_TXBCR_CR3_M 0x00000008U |
| #define | DCAN_TXBCR_CR3_S 3U |
| #define | DCAN_TXBCR_CR4 0x00000010U |
| #define | DCAN_TXBCR_CR4_M 0x00000010U |
| #define | DCAN_TXBCR_CR4_S 4U |
| #define | DCAN_TXBCR_CR5 0x00000020U |
| #define | DCAN_TXBCR_CR5_M 0x00000020U |
| #define | DCAN_TXBCR_CR5_S 5U |
| #define | DCAN_TXBCR_CR6 0x00000040U |
| #define | DCAN_TXBCR_CR6_M 0x00000040U |
| #define | DCAN_TXBCR_CR6_S 6U |
| #define | DCAN_TXBCR_CR7 0x00000080U |
| #define | DCAN_TXBCR_CR7_M 0x00000080U |
| #define | DCAN_TXBCR_CR7_S 7U |
| #define | DCAN_TXBCR_CR8 0x00000100U |
| #define | DCAN_TXBCR_CR8_M 0x00000100U |
| #define | DCAN_TXBCR_CR8_S 8U |
| #define | DCAN_TXBCR_CR9 0x00000200U |
| #define | DCAN_TXBCR_CR9_M 0x00000200U |
| #define | DCAN_TXBCR_CR9_S 9U |
| #define | DCAN_TXBCR_CR10 0x00000400U |
| #define | DCAN_TXBCR_CR10_M 0x00000400U |
| #define | DCAN_TXBCR_CR10_S 10U |
| #define | DCAN_TXBCR_CR11 0x00000800U |
| #define | DCAN_TXBCR_CR11_M 0x00000800U |
| #define | DCAN_TXBCR_CR11_S 11U |
| #define | DCAN_TXBCR_CR12 0x00001000U |
| #define | DCAN_TXBCR_CR12_M 0x00001000U |
| #define | DCAN_TXBCR_CR12_S 12U |
| #define | DCAN_TXBCR_CR13 0x00002000U |
| #define | DCAN_TXBCR_CR13_M 0x00002000U |
| #define | DCAN_TXBCR_CR13_S 13U |
| #define | DCAN_TXBCR_CR14 0x00004000U |
| #define | DCAN_TXBCR_CR14_M 0x00004000U |
| #define | DCAN_TXBCR_CR14_S 14U |
| #define | DCAN_TXBCR_CR15 0x00008000U |
| #define | DCAN_TXBCR_CR15_M 0x00008000U |
| #define | DCAN_TXBCR_CR15_S 15U |
| #define | DCAN_TXBCR_CR16 0x00010000U |
| #define | DCAN_TXBCR_CR16_M 0x00010000U |
| #define | DCAN_TXBCR_CR16_S 16U |
| #define | DCAN_TXBCR_CR17 0x00020000U |
| #define | DCAN_TXBCR_CR17_M 0x00020000U |
| #define | DCAN_TXBCR_CR17_S 17U |
| #define | DCAN_TXBCR_CR18 0x00040000U |
| #define | DCAN_TXBCR_CR18_M 0x00040000U |
| #define | DCAN_TXBCR_CR18_S 18U |
| #define | DCAN_TXBCR_CR19 0x00080000U |
| #define | DCAN_TXBCR_CR19_M 0x00080000U |
| #define | DCAN_TXBCR_CR19_S 19U |
| #define | DCAN_TXBCR_CR20 0x00100000U |
| #define | DCAN_TXBCR_CR20_M 0x00100000U |
| #define | DCAN_TXBCR_CR20_S 20U |
| #define | DCAN_TXBCR_CR21 0x00200000U |
| #define | DCAN_TXBCR_CR21_M 0x00200000U |
| #define | DCAN_TXBCR_CR21_S 21U |
| #define | DCAN_TXBCR_CR22 0x00400000U |
| #define | DCAN_TXBCR_CR22_M 0x00400000U |
| #define | DCAN_TXBCR_CR22_S 22U |
| #define | DCAN_TXBCR_CR23 0x00800000U |
| #define | DCAN_TXBCR_CR23_M 0x00800000U |
| #define | DCAN_TXBCR_CR23_S 23U |
| #define | DCAN_TXBCR_CR24 0x01000000U |
| #define | DCAN_TXBCR_CR24_M 0x01000000U |
| #define | DCAN_TXBCR_CR24_S 24U |
| #define | DCAN_TXBCR_CR25 0x02000000U |
| #define | DCAN_TXBCR_CR25_M 0x02000000U |
| #define | DCAN_TXBCR_CR25_S 25U |
| #define | DCAN_TXBCR_CR26 0x04000000U |
| #define | DCAN_TXBCR_CR26_M 0x04000000U |
| #define | DCAN_TXBCR_CR26_S 26U |
| #define | DCAN_TXBCR_CR27 0x08000000U |
| #define | DCAN_TXBCR_CR27_M 0x08000000U |
| #define | DCAN_TXBCR_CR27_S 27U |
| #define | DCAN_TXBCR_CR28 0x10000000U |
| #define | DCAN_TXBCR_CR28_M 0x10000000U |
| #define | DCAN_TXBCR_CR28_S 28U |
| #define | DCAN_TXBCR_CR29 0x20000000U |
| #define | DCAN_TXBCR_CR29_M 0x20000000U |
| #define | DCAN_TXBCR_CR29_S 29U |
| #define | DCAN_TXBCR_CR30 0x40000000U |
| #define | DCAN_TXBCR_CR30_M 0x40000000U |
| #define | DCAN_TXBCR_CR30_S 30U |
| #define | DCAN_TXBCR_CR31 0x80000000U |
| #define | DCAN_TXBCR_CR31_M 0x80000000U |
| #define | DCAN_TXBCR_CR31_S 31U |
| #define | DCAN_TXBTO_TO0 0x00000001U |
| #define | DCAN_TXBTO_TO0_M 0x00000001U |
| #define | DCAN_TXBTO_TO0_S 0U |
| #define | DCAN_TXBTO_TO1 0x00000002U |
| #define | DCAN_TXBTO_TO1_M 0x00000002U |
| #define | DCAN_TXBTO_TO1_S 1U |
| #define | DCAN_TXBTO_TO2 0x00000004U |
| #define | DCAN_TXBTO_TO2_M 0x00000004U |
| #define | DCAN_TXBTO_TO2_S 2U |
| #define | DCAN_TXBTO_TO3 0x00000008U |
| #define | DCAN_TXBTO_TO3_M 0x00000008U |
| #define | DCAN_TXBTO_TO3_S 3U |
| #define | DCAN_TXBTO_TO4 0x00000010U |
| #define | DCAN_TXBTO_TO4_M 0x00000010U |
| #define | DCAN_TXBTO_TO4_S 4U |
| #define | DCAN_TXBTO_TO5 0x00000020U |
| #define | DCAN_TXBTO_TO5_M 0x00000020U |
| #define | DCAN_TXBTO_TO5_S 5U |
| #define | DCAN_TXBTO_TO6 0x00000040U |
| #define | DCAN_TXBTO_TO6_M 0x00000040U |
| #define | DCAN_TXBTO_TO6_S 6U |
| #define | DCAN_TXBTO_TO7 0x00000080U |
| #define | DCAN_TXBTO_TO7_M 0x00000080U |
| #define | DCAN_TXBTO_TO7_S 7U |
| #define | DCAN_TXBTO_TO8 0x00000100U |
| #define | DCAN_TXBTO_TO8_M 0x00000100U |
| #define | DCAN_TXBTO_TO8_S 8U |
| #define | DCAN_TXBTO_TO9 0x00000200U |
| #define | DCAN_TXBTO_TO9_M 0x00000200U |
| #define | DCAN_TXBTO_TO9_S 9U |
| #define | DCAN_TXBTO_TO10 0x00000400U |
| #define | DCAN_TXBTO_TO10_M 0x00000400U |
| #define | DCAN_TXBTO_TO10_S 10U |
| #define | DCAN_TXBTO_TO11 0x00000800U |
| #define | DCAN_TXBTO_TO11_M 0x00000800U |
| #define | DCAN_TXBTO_TO11_S 11U |
| #define | DCAN_TXBTO_TO12 0x00001000U |
| #define | DCAN_TXBTO_TO12_M 0x00001000U |
| #define | DCAN_TXBTO_TO12_S 12U |
| #define | DCAN_TXBTO_TO13 0x00002000U |
| #define | DCAN_TXBTO_TO13_M 0x00002000U |
| #define | DCAN_TXBTO_TO13_S 13U |
| #define | DCAN_TXBTO_TO14 0x00004000U |
| #define | DCAN_TXBTO_TO14_M 0x00004000U |
| #define | DCAN_TXBTO_TO14_S 14U |
| #define | DCAN_TXBTO_TO15 0x00008000U |
| #define | DCAN_TXBTO_TO15_M 0x00008000U |
| #define | DCAN_TXBTO_TO15_S 15U |
| #define | DCAN_TXBTO_TO16 0x00010000U |
| #define | DCAN_TXBTO_TO16_M 0x00010000U |
| #define | DCAN_TXBTO_TO16_S 16U |
| #define | DCAN_TXBTO_TO17 0x00020000U |
| #define | DCAN_TXBTO_TO17_M 0x00020000U |
| #define | DCAN_TXBTO_TO17_S 17U |
| #define | DCAN_TXBTO_TO18 0x00040000U |
| #define | DCAN_TXBTO_TO18_M 0x00040000U |
| #define | DCAN_TXBTO_TO18_S 18U |
| #define | DCAN_TXBTO_TO19 0x00080000U |
| #define | DCAN_TXBTO_TO19_M 0x00080000U |
| #define | DCAN_TXBTO_TO19_S 19U |
| #define | DCAN_TXBTO_TO20 0x00100000U |
| #define | DCAN_TXBTO_TO20_M 0x00100000U |
| #define | DCAN_TXBTO_TO20_S 20U |
| #define | DCAN_TXBTO_TO21 0x00200000U |
| #define | DCAN_TXBTO_TO21_M 0x00200000U |
| #define | DCAN_TXBTO_TO21_S 21U |
| #define | DCAN_TXBTO_TO22 0x00400000U |
| #define | DCAN_TXBTO_TO22_M 0x00400000U |
| #define | DCAN_TXBTO_TO22_S 22U |
| #define | DCAN_TXBTO_TO23 0x00800000U |
| #define | DCAN_TXBTO_TO23_M 0x00800000U |
| #define | DCAN_TXBTO_TO23_S 23U |
| #define | DCAN_TXBTO_TO24 0x01000000U |
| #define | DCAN_TXBTO_TO24_M 0x01000000U |
| #define | DCAN_TXBTO_TO24_S 24U |
| #define | DCAN_TXBTO_TO25 0x02000000U |
| #define | DCAN_TXBTO_TO25_M 0x02000000U |
| #define | DCAN_TXBTO_TO25_S 25U |
| #define | DCAN_TXBTO_TO26 0x04000000U |
| #define | DCAN_TXBTO_TO26_M 0x04000000U |
| #define | DCAN_TXBTO_TO26_S 26U |
| #define | DCAN_TXBTO_TO27 0x08000000U |
| #define | DCAN_TXBTO_TO27_M 0x08000000U |
| #define | DCAN_TXBTO_TO27_S 27U |
| #define | DCAN_TXBTO_TO28 0x10000000U |
| #define | DCAN_TXBTO_TO28_M 0x10000000U |
| #define | DCAN_TXBTO_TO28_S 28U |
| #define | DCAN_TXBTO_TO29 0x20000000U |
| #define | DCAN_TXBTO_TO29_M 0x20000000U |
| #define | DCAN_TXBTO_TO29_S 29U |
| #define | DCAN_TXBTO_TO30 0x40000000U |
| #define | DCAN_TXBTO_TO30_M 0x40000000U |
| #define | DCAN_TXBTO_TO30_S 30U |
| #define | DCAN_TXBTO_TO31 0x80000000U |
| #define | DCAN_TXBTO_TO31_M 0x80000000U |
| #define | DCAN_TXBTO_TO31_S 31U |
| #define | DCAN_TXBCF_CF0 0x00000001U |
| #define | DCAN_TXBCF_CF0_M 0x00000001U |
| #define | DCAN_TXBCF_CF0_S 0U |
| #define | DCAN_TXBCF_CF1 0x00000002U |
| #define | DCAN_TXBCF_CF1_M 0x00000002U |
| #define | DCAN_TXBCF_CF1_S 1U |
| #define | DCAN_TXBCF_CF2 0x00000004U |
| #define | DCAN_TXBCF_CF2_M 0x00000004U |
| #define | DCAN_TXBCF_CF2_S 2U |
| #define | DCAN_TXBCF_CF3 0x00000008U |
| #define | DCAN_TXBCF_CF3_M 0x00000008U |
| #define | DCAN_TXBCF_CF3_S 3U |
| #define | DCAN_TXBCF_CF4 0x00000010U |
| #define | DCAN_TXBCF_CF4_M 0x00000010U |
| #define | DCAN_TXBCF_CF4_S 4U |
| #define | DCAN_TXBCF_CF5 0x00000020U |
| #define | DCAN_TXBCF_CF5_M 0x00000020U |
| #define | DCAN_TXBCF_CF5_S 5U |
| #define | DCAN_TXBCF_CF6 0x00000040U |
| #define | DCAN_TXBCF_CF6_M 0x00000040U |
| #define | DCAN_TXBCF_CF6_S 6U |
| #define | DCAN_TXBCF_CF7 0x00000080U |
| #define | DCAN_TXBCF_CF7_M 0x00000080U |
| #define | DCAN_TXBCF_CF7_S 7U |
| #define | DCAN_TXBCF_CF8 0x00000100U |
| #define | DCAN_TXBCF_CF8_M 0x00000100U |
| #define | DCAN_TXBCF_CF8_S 8U |
| #define | DCAN_TXBCF_CF9 0x00000200U |
| #define | DCAN_TXBCF_CF9_M 0x00000200U |
| #define | DCAN_TXBCF_CF9_S 9U |
| #define | DCAN_TXBCF_CF10 0x00000400U |
| #define | DCAN_TXBCF_CF10_M 0x00000400U |
| #define | DCAN_TXBCF_CF10_S 10U |
| #define | DCAN_TXBCF_CF11 0x00000800U |
| #define | DCAN_TXBCF_CF11_M 0x00000800U |
| #define | DCAN_TXBCF_CF11_S 11U |
| #define | DCAN_TXBCF_CF12 0x00001000U |
| #define | DCAN_TXBCF_CF12_M 0x00001000U |
| #define | DCAN_TXBCF_CF12_S 12U |
| #define | DCAN_TXBCF_CF13 0x00002000U |
| #define | DCAN_TXBCF_CF13_M 0x00002000U |
| #define | DCAN_TXBCF_CF13_S 13U |
| #define | DCAN_TXBCF_CF14 0x00004000U |
| #define | DCAN_TXBCF_CF14_M 0x00004000U |
| #define | DCAN_TXBCF_CF14_S 14U |
| #define | DCAN_TXBCF_CF15 0x00008000U |
| #define | DCAN_TXBCF_CF15_M 0x00008000U |
| #define | DCAN_TXBCF_CF15_S 15U |
| #define | DCAN_TXBCF_CF16 0x00010000U |
| #define | DCAN_TXBCF_CF16_M 0x00010000U |
| #define | DCAN_TXBCF_CF16_S 16U |
| #define | DCAN_TXBCF_CF17 0x00020000U |
| #define | DCAN_TXBCF_CF17_M 0x00020000U |
| #define | DCAN_TXBCF_CF17_S 17U |
| #define | DCAN_TXBCF_CF18 0x00040000U |
| #define | DCAN_TXBCF_CF18_M 0x00040000U |
| #define | DCAN_TXBCF_CF18_S 18U |
| #define | DCAN_TXBCF_CF19 0x00080000U |
| #define | DCAN_TXBCF_CF19_M 0x00080000U |
| #define | DCAN_TXBCF_CF19_S 19U |
| #define | DCAN_TXBCF_CF20 0x00100000U |
| #define | DCAN_TXBCF_CF20_M 0x00100000U |
| #define | DCAN_TXBCF_CF20_S 20U |
| #define | DCAN_TXBCF_CF21 0x00200000U |
| #define | DCAN_TXBCF_CF21_M 0x00200000U |
| #define | DCAN_TXBCF_CF21_S 21U |
| #define | DCAN_TXBCF_CF22 0x00400000U |
| #define | DCAN_TXBCF_CF22_M 0x00400000U |
| #define | DCAN_TXBCF_CF22_S 22U |
| #define | DCAN_TXBCF_CF23 0x00800000U |
| #define | DCAN_TXBCF_CF23_M 0x00800000U |
| #define | DCAN_TXBCF_CF23_S 23U |
| #define | DCAN_TXBCF_CF24 0x01000000U |
| #define | DCAN_TXBCF_CF24_M 0x01000000U |
| #define | DCAN_TXBCF_CF24_S 24U |
| #define | DCAN_TXBCF_CF25 0x02000000U |
| #define | DCAN_TXBCF_CF25_M 0x02000000U |
| #define | DCAN_TXBCF_CF25_S 25U |
| #define | DCAN_TXBCF_CF26 0x04000000U |
| #define | DCAN_TXBCF_CF26_M 0x04000000U |
| #define | DCAN_TXBCF_CF26_S 26U |
| #define | DCAN_TXBCF_CF27 0x08000000U |
| #define | DCAN_TXBCF_CF27_M 0x08000000U |
| #define | DCAN_TXBCF_CF27_S 27U |
| #define | DCAN_TXBCF_CF28 0x10000000U |
| #define | DCAN_TXBCF_CF28_M 0x10000000U |
| #define | DCAN_TXBCF_CF28_S 28U |
| #define | DCAN_TXBCF_CF29 0x20000000U |
| #define | DCAN_TXBCF_CF29_M 0x20000000U |
| #define | DCAN_TXBCF_CF29_S 29U |
| #define | DCAN_TXBCF_CF30 0x40000000U |
| #define | DCAN_TXBCF_CF30_M 0x40000000U |
| #define | DCAN_TXBCF_CF30_S 30U |
| #define | DCAN_TXBCF_CF31 0x80000000U |
| #define | DCAN_TXBCF_CF31_M 0x80000000U |
| #define | DCAN_TXBCF_CF31_S 31U |
| #define | DCAN_TXTIE_TIE0 0x00000001U |
| #define | DCAN_TXTIE_TIE0_M 0x00000001U |
| #define | DCAN_TXTIE_TIE0_S 0U |
| #define | DCAN_TXTIE_TIE1 0x00000002U |
| #define | DCAN_TXTIE_TIE1_M 0x00000002U |
| #define | DCAN_TXTIE_TIE1_S 1U |
| #define | DCAN_TXTIE_TIE2 0x00000004U |
| #define | DCAN_TXTIE_TIE2_M 0x00000004U |
| #define | DCAN_TXTIE_TIE2_S 2U |
| #define | DCAN_TXTIE_TIE3 0x00000008U |
| #define | DCAN_TXTIE_TIE3_M 0x00000008U |
| #define | DCAN_TXTIE_TIE3_S 3U |
| #define | DCAN_TXTIE_TIE4 0x00000010U |
| #define | DCAN_TXTIE_TIE4_M 0x00000010U |
| #define | DCAN_TXTIE_TIE4_S 4U |
| #define | DCAN_TXTIE_TIE5 0x00000020U |
| #define | DCAN_TXTIE_TIE5_M 0x00000020U |
| #define | DCAN_TXTIE_TIE5_S 5U |
| #define | DCAN_TXTIE_TIE6 0x00000040U |
| #define | DCAN_TXTIE_TIE6_M 0x00000040U |
| #define | DCAN_TXTIE_TIE6_S 6U |
| #define | DCAN_TXTIE_TIE7 0x00000080U |
| #define | DCAN_TXTIE_TIE7_M 0x00000080U |
| #define | DCAN_TXTIE_TIE7_S 7U |
| #define | DCAN_TXTIE_TIE8 0x00000100U |
| #define | DCAN_TXTIE_TIE8_M 0x00000100U |
| #define | DCAN_TXTIE_TIE8_S 8U |
| #define | DCAN_TXTIE_TIE9 0x00000200U |
| #define | DCAN_TXTIE_TIE9_M 0x00000200U |
| #define | DCAN_TXTIE_TIE9_S 9U |
| #define | DCAN_TXTIE_TIE10 0x00000400U |
| #define | DCAN_TXTIE_TIE10_M 0x00000400U |
| #define | DCAN_TXTIE_TIE10_S 10U |
| #define | DCAN_TXTIE_TIE11 0x00000800U |
| #define | DCAN_TXTIE_TIE11_M 0x00000800U |
| #define | DCAN_TXTIE_TIE11_S 11U |
| #define | DCAN_TXTIE_TIE12 0x00001000U |
| #define | DCAN_TXTIE_TIE12_M 0x00001000U |
| #define | DCAN_TXTIE_TIE12_S 12U |
| #define | DCAN_TXTIE_TIE13 0x00002000U |
| #define | DCAN_TXTIE_TIE13_M 0x00002000U |
| #define | DCAN_TXTIE_TIE13_S 13U |
| #define | DCAN_TXTIE_TIE14 0x00004000U |
| #define | DCAN_TXTIE_TIE14_M 0x00004000U |
| #define | DCAN_TXTIE_TIE14_S 14U |
| #define | DCAN_TXTIE_TIE15 0x00008000U |
| #define | DCAN_TXTIE_TIE15_M 0x00008000U |
| #define | DCAN_TXTIE_TIE15_S 15U |
| #define | DCAN_TXTIE_TIE16 0x00010000U |
| #define | DCAN_TXTIE_TIE16_M 0x00010000U |
| #define | DCAN_TXTIE_TIE16_S 16U |
| #define | DCAN_TXTIE_TIE17 0x00020000U |
| #define | DCAN_TXTIE_TIE17_M 0x00020000U |
| #define | DCAN_TXTIE_TIE17_S 17U |
| #define | DCAN_TXTIE_TIE18 0x00040000U |
| #define | DCAN_TXTIE_TIE18_M 0x00040000U |
| #define | DCAN_TXTIE_TIE18_S 18U |
| #define | DCAN_TXTIE_TIE19 0x00080000U |
| #define | DCAN_TXTIE_TIE19_M 0x00080000U |
| #define | DCAN_TXTIE_TIE19_S 19U |
| #define | DCAN_TXTIE_TIE20 0x00100000U |
| #define | DCAN_TXTIE_TIE20_M 0x00100000U |
| #define | DCAN_TXTIE_TIE20_S 20U |
| #define | DCAN_TXTIE_TIE21 0x00200000U |
| #define | DCAN_TXTIE_TIE21_M 0x00200000U |
| #define | DCAN_TXTIE_TIE21_S 21U |
| #define | DCAN_TXTIE_TIE22 0x00400000U |
| #define | DCAN_TXTIE_TIE22_M 0x00400000U |
| #define | DCAN_TXTIE_TIE22_S 22U |
| #define | DCAN_TXTIE_TIE23 0x00800000U |
| #define | DCAN_TXTIE_TIE23_M 0x00800000U |
| #define | DCAN_TXTIE_TIE23_S 23U |
| #define | DCAN_TXTIE_TIE24 0x01000000U |
| #define | DCAN_TXTIE_TIE24_M 0x01000000U |
| #define | DCAN_TXTIE_TIE24_S 24U |
| #define | DCAN_TXTIE_TIE25 0x02000000U |
| #define | DCAN_TXTIE_TIE25_M 0x02000000U |
| #define | DCAN_TXTIE_TIE25_S 25U |
| #define | DCAN_TXTIE_TIE26 0x04000000U |
| #define | DCAN_TXTIE_TIE26_M 0x04000000U |
| #define | DCAN_TXTIE_TIE26_S 26U |
| #define | DCAN_TXTIE_TIE27 0x08000000U |
| #define | DCAN_TXTIE_TIE27_M 0x08000000U |
| #define | DCAN_TXTIE_TIE27_S 27U |
| #define | DCAN_TXTIE_TIE28 0x10000000U |
| #define | DCAN_TXTIE_TIE28_M 0x10000000U |
| #define | DCAN_TXTIE_TIE28_S 28U |
| #define | DCAN_TXTIE_TIE29 0x20000000U |
| #define | DCAN_TXTIE_TIE29_M 0x20000000U |
| #define | DCAN_TXTIE_TIE29_S 29U |
| #define | DCAN_TXTIE_TIE30 0x40000000U |
| #define | DCAN_TXTIE_TIE30_M 0x40000000U |
| #define | DCAN_TXTIE_TIE30_S 30U |
| #define | DCAN_TXTIE_TIE31 0x80000000U |
| #define | DCAN_TXTIE_TIE31_M 0x80000000U |
| #define | DCAN_TXTIE_TIE31_S 31U |
| #define | DCAN_TXBCIE_CFIE0 0x00000001U |
| #define | DCAN_TXBCIE_CFIE0_M 0x00000001U |
| #define | DCAN_TXBCIE_CFIE0_S 0U |
| #define | DCAN_TXBCIE_CFIE1 0x00000002U |
| #define | DCAN_TXBCIE_CFIE1_M 0x00000002U |
| #define | DCAN_TXBCIE_CFIE1_S 1U |
| #define | DCAN_TXBCIE_CFIE2 0x00000004U |
| #define | DCAN_TXBCIE_CFIE2_M 0x00000004U |
| #define | DCAN_TXBCIE_CFIE2_S 2U |
| #define | DCAN_TXBCIE_CFIE3 0x00000008U |
| #define | DCAN_TXBCIE_CFIE3_M 0x00000008U |
| #define | DCAN_TXBCIE_CFIE3_S 3U |
| #define | DCAN_TXBCIE_CFIE4 0x00000010U |
| #define | DCAN_TXBCIE_CFIE4_M 0x00000010U |
| #define | DCAN_TXBCIE_CFIE4_S 4U |
| #define | DCAN_TXBCIE_CFIE5 0x00000020U |
| #define | DCAN_TXBCIE_CFIE5_M 0x00000020U |
| #define | DCAN_TXBCIE_CFIE5_S 5U |
| #define | DCAN_TXBCIE_CFIE6 0x00000040U |
| #define | DCAN_TXBCIE_CFIE6_M 0x00000040U |
| #define | DCAN_TXBCIE_CFIE6_S 6U |
| #define | DCAN_TXBCIE_CFIE7 0x00000080U |
| #define | DCAN_TXBCIE_CFIE7_M 0x00000080U |
| #define | DCAN_TXBCIE_CFIE7_S 7U |
| #define | DCAN_TXBCIE_CFIE8 0x00000100U |
| #define | DCAN_TXBCIE_CFIE8_M 0x00000100U |
| #define | DCAN_TXBCIE_CFIE8_S 8U |
| #define | DCAN_TXBCIE_CFIE9 0x00000200U |
| #define | DCAN_TXBCIE_CFIE9_M 0x00000200U |
| #define | DCAN_TXBCIE_CFIE9_S 9U |
| #define | DCAN_TXBCIE_CFIE10 0x00000400U |
| #define | DCAN_TXBCIE_CFIE10_M 0x00000400U |
| #define | DCAN_TXBCIE_CFIE10_S 10U |
| #define | DCAN_TXBCIE_CFIE11 0x00000800U |
| #define | DCAN_TXBCIE_CFIE11_M 0x00000800U |
| #define | DCAN_TXBCIE_CFIE11_S 11U |
| #define | DCAN_TXBCIE_CFIE12 0x00001000U |
| #define | DCAN_TXBCIE_CFIE12_M 0x00001000U |
| #define | DCAN_TXBCIE_CFIE12_S 12U |
| #define | DCAN_TXBCIE_CFIE13 0x00002000U |
| #define | DCAN_TXBCIE_CFIE13_M 0x00002000U |
| #define | DCAN_TXBCIE_CFIE13_S 13U |
| #define | DCAN_TXBCIE_CFIE14 0x00004000U |
| #define | DCAN_TXBCIE_CFIE14_M 0x00004000U |
| #define | DCAN_TXBCIE_CFIE14_S 14U |
| #define | DCAN_TXBCIE_CFIE15 0x00008000U |
| #define | DCAN_TXBCIE_CFIE15_M 0x00008000U |
| #define | DCAN_TXBCIE_CFIE15_S 15U |
| #define | DCAN_TXBCIE_CFIE16 0x00010000U |
| #define | DCAN_TXBCIE_CFIE16_M 0x00010000U |
| #define | DCAN_TXBCIE_CFIE16_S 16U |
| #define | DCAN_TXBCIE_CFIE17 0x00020000U |
| #define | DCAN_TXBCIE_CFIE17_M 0x00020000U |
| #define | DCAN_TXBCIE_CFIE17_S 17U |
| #define | DCAN_TXBCIE_CFIE18 0x00040000U |
| #define | DCAN_TXBCIE_CFIE18_M 0x00040000U |
| #define | DCAN_TXBCIE_CFIE18_S 18U |
| #define | DCAN_TXBCIE_CFIE19 0x00080000U |
| #define | DCAN_TXBCIE_CFIE19_M 0x00080000U |
| #define | DCAN_TXBCIE_CFIE19_S 19U |
| #define | DCAN_TXBCIE_CFIE20 0x00100000U |
| #define | DCAN_TXBCIE_CFIE20_M 0x00100000U |
| #define | DCAN_TXBCIE_CFIE20_S 20U |
| #define | DCAN_TXBCIE_CFIE21 0x00200000U |
| #define | DCAN_TXBCIE_CFIE21_M 0x00200000U |
| #define | DCAN_TXBCIE_CFIE21_S 21U |
| #define | DCAN_TXBCIE_CFIE22 0x00400000U |
| #define | DCAN_TXBCIE_CFIE22_M 0x00400000U |
| #define | DCAN_TXBCIE_CFIE22_S 22U |
| #define | DCAN_TXBCIE_CFIE23 0x00800000U |
| #define | DCAN_TXBCIE_CFIE23_M 0x00800000U |
| #define | DCAN_TXBCIE_CFIE23_S 23U |
| #define | DCAN_TXBCIE_CFIE24 0x01000000U |
| #define | DCAN_TXBCIE_CFIE24_M 0x01000000U |
| #define | DCAN_TXBCIE_CFIE24_S 24U |
| #define | DCAN_TXBCIE_CFIE25 0x02000000U |
| #define | DCAN_TXBCIE_CFIE25_M 0x02000000U |
| #define | DCAN_TXBCIE_CFIE25_S 25U |
| #define | DCAN_TXBCIE_CFIE26 0x04000000U |
| #define | DCAN_TXBCIE_CFIE26_M 0x04000000U |
| #define | DCAN_TXBCIE_CFIE26_S 26U |
| #define | DCAN_TXBCIE_CFIE27 0x08000000U |
| #define | DCAN_TXBCIE_CFIE27_M 0x08000000U |
| #define | DCAN_TXBCIE_CFIE27_S 27U |
| #define | DCAN_TXBCIE_CFIE28 0x10000000U |
| #define | DCAN_TXBCIE_CFIE28_M 0x10000000U |
| #define | DCAN_TXBCIE_CFIE28_S 28U |
| #define | DCAN_TXBCIE_CFIE29 0x20000000U |
| #define | DCAN_TXBCIE_CFIE29_M 0x20000000U |
| #define | DCAN_TXBCIE_CFIE29_S 29U |
| #define | DCAN_TXBCIE_CFIE30 0x40000000U |
| #define | DCAN_TXBCIE_CFIE30_M 0x40000000U |
| #define | DCAN_TXBCIE_CFIE30_S 30U |
| #define | DCAN_TXBCIE_CFIE31 0x80000000U |
| #define | DCAN_TXBCIE_CFIE31_M 0x80000000U |
| #define | DCAN_TXBCIE_CFIE31_S 31U |
| #define | DCAN_TXEFC_EFSA_W 14U |
| #define | DCAN_TXEFC_EFSA_M 0x0000FFFCU |
| #define | DCAN_TXEFC_EFSA_S 2U |
| #define | DCAN_TXEFC_EFS_W 6U |
| #define | DCAN_TXEFC_EFS_M 0x003F0000U |
| #define | DCAN_TXEFC_EFS_S 16U |
| #define | DCAN_TXEFC_EFWM_W 6U |
| #define | DCAN_TXEFC_EFWM_M 0x3F000000U |
| #define | DCAN_TXEFC_EFWM_S 24U |
| #define | DCAN_TXEFS_EFFL_W 6U |
| #define | DCAN_TXEFS_EFFL_M 0x0000003FU |
| #define | DCAN_TXEFS_EFFL_S 0U |
| #define | DCAN_TXEFS_EFGI_W 5U |
| #define | DCAN_TXEFS_EFGI_M 0x00001F00U |
| #define | DCAN_TXEFS_EFGI_S 8U |
| #define | DCAN_TXEFS_EFPI_W 5U |
| #define | DCAN_TXEFS_EFPI_M 0x001F0000U |
| #define | DCAN_TXEFS_EFPI_S 16U |
| #define | DCAN_TXEFS_EFF 0x01000000U |
| #define | DCAN_TXEFS_EFF_M 0x01000000U |
| #define | DCAN_TXEFS_EFF_S 24U |
| #define | DCAN_TXEFS_TEFL 0x02000000U |
| #define | DCAN_TXEFS_TEFL_M 0x02000000U |
| #define | DCAN_TXEFS_TEFL_S 25U |
| #define | DCAN_TXEFA_EFAI_W 5U |
| #define | DCAN_TXEFA_EFAI_M 0x0000001FU |
| #define | DCAN_TXEFA_EFAI_S 0U |
| #define | DCAN_SSPID_MINOR_W 6U |
| #define | DCAN_SSPID_MINOR_M 0x0000003FU |
| #define | DCAN_SSPID_MINOR_S 0U |
| #define | DCAN_SSPID_CUSTOM_W 2U |
| #define | DCAN_SSPID_CUSTOM_M 0x000000C0U |
| #define | DCAN_SSPID_CUSTOM_S 6U |
| #define | DCAN_SSPID_MAJOR_W 3U |
| #define | DCAN_SSPID_MAJOR_M 0x00000700U |
| #define | DCAN_SSPID_MAJOR_S 8U |
| #define | DCAN_SSPID_RTL_W 5U |
| #define | DCAN_SSPID_RTL_M 0x0000F800U |
| #define | DCAN_SSPID_RTL_S 11U |
| #define | DCAN_SSPID_MODULEID_W 12U |
| #define | DCAN_SSPID_MODULEID_M 0x0FFF0000U |
| #define | DCAN_SSPID_MODULEID_S 16U |
| #define | DCAN_SSPID_BU_W 2U |
| #define | DCAN_SSPID_BU_M 0x30000000U |
| #define | DCAN_SSPID_BU_S 28U |
| #define | DCAN_SSPID_SCHEME_W 2U |
| #define | DCAN_SSPID_SCHEME_M 0xC0000000U |
| #define | DCAN_SSPID_SCHEME_S 30U |
| #define | DCAN_SSCTL_DBGSF 0x00000008U |
| #define | DCAN_SSCTL_DBGSF_M 0x00000008U |
| #define | DCAN_SSCTL_DBGSF_S 3U |
| #define | DCAN_SSCTL_WUREQEN 0x00000010U |
| #define | DCAN_SSCTL_WUREQEN_M 0x00000010U |
| #define | DCAN_SSCTL_WUREQEN_S 4U |
| #define | DCAN_SSCTL_AUTOWU 0x00000020U |
| #define | DCAN_SSCTL_AUTOWU_M 0x00000020U |
| #define | DCAN_SSCTL_AUTOWU_S 5U |
| #define | DCAN_SSCTL_EXTTSCNTEN 0x00000040U |
| #define | DCAN_SSCTL_EXTTSCNTEN_M 0x00000040U |
| #define | DCAN_SSCTL_EXTTSCNTEN_S 6U |
| #define | DCAN_SSSTA_RESET 0x00000001U |
| #define | DCAN_SSSTA_RESET_M 0x00000001U |
| #define | DCAN_SSSTA_RESET_S 0U |
| #define | DCAN_SSSTA_MEMINITSTA 0x00000002U |
| #define | DCAN_SSSTA_MEMINITSTA_M 0x00000002U |
| #define | DCAN_SSSTA_MEMINITSTA_S 1U |
| #define | DCAN_SSSTA_ENFDOE 0x00000004U |
| #define | DCAN_SSSTA_ENFDOE_M 0x00000004U |
| #define | DCAN_SSSTA_ENFDOE_S 2U |
| #define | DCAN_SSICS_TSCNTOVFL 0x00000001U |
| #define | DCAN_SSICS_TSCNTOVFL_M 0x00000001U |
| #define | DCAN_SSICS_TSCNTOVFL_S 0U |
| #define | DCAN_SSIRS_TSCNTOVFL 0x00000001U |
| #define | DCAN_SSIRS_TSCNTOVFL_M 0x00000001U |
| #define | DCAN_SSIRS_TSCNTOVFL_S 0U |
| #define | DCAN_SSIECS_TSCNTOVFL 0x00000001U |
| #define | DCAN_SSIECS_TSCNTOVFL_M 0x00000001U |
| #define | DCAN_SSIECS_TSCNTOVFL_S 0U |
| #define | DCAN_SSIE_TSCNTOVFL 0x00000001U |
| #define | DCAN_SSIE_TSCNTOVFL_M 0x00000001U |
| #define | DCAN_SSIE_TSCNTOVFL_S 0U |
| #define | DCAN_SSIES_TSCNTOVFL 0x00000001U |
| #define | DCAN_SSIES_TSCNTOVFL_M 0x00000001U |
| #define | DCAN_SSIES_TSCNTOVFL_S 0U |
| #define | DCAN_SSEOI_EOI_W 8U |
| #define | DCAN_SSEOI_EOI_M 0x000000FFU |
| #define | DCAN_SSEOI_EOI_S 0U |
| #define | DCAN_EXTTSPS_PRESCALER_W 24U |
| #define | DCAN_EXTTSPS_PRESCALER_M 0x00FFFFFFU |
| #define | DCAN_EXTTSPS_PRESCALER_S 0U |
| #define | DCAN_EXTTSUSI_INTRCNT_W 5U |
| #define | DCAN_EXTTSUSI_INTRCNT_M 0x0000001FU |
| #define | DCAN_EXTTSUSI_INTRCNT_S 0U |
| #define | DCAN_ERRREV_REVMIN_W 6U |
| #define | DCAN_ERRREV_REVMIN_M 0x0000003FU |
| #define | DCAN_ERRREV_REVMIN_S 0U |
| #define | DCAN_ERRREV_REVCUSTOM_W 2U |
| #define | DCAN_ERRREV_REVCUSTOM_M 0x000000C0U |
| #define | DCAN_ERRREV_REVCUSTOM_S 6U |
| #define | DCAN_ERRREV_REVMAJ_W 3U |
| #define | DCAN_ERRREV_REVMAJ_M 0x00000700U |
| #define | DCAN_ERRREV_REVMAJ_S 8U |
| #define | DCAN_ERRREV_REVRTL_W 5U |
| #define | DCAN_ERRREV_REVRTL_M 0x0000F800U |
| #define | DCAN_ERRREV_REVRTL_S 11U |
| #define | DCAN_ERRREV_MODULEID_W 12U |
| #define | DCAN_ERRREV_MODULEID_M 0x0FFF0000U |
| #define | DCAN_ERRREV_MODULEID_S 16U |
| #define | DCAN_ERRREV_BU_W 2U |
| #define | DCAN_ERRREV_BU_M 0x30000000U |
| #define | DCAN_ERRREV_BU_S 28U |
| #define | DCAN_ERRREV_SCHEME_W 2U |
| #define | DCAN_ERRREV_SCHEME_M 0xC0000000U |
| #define | DCAN_ERRREV_SCHEME_S 30U |
| #define | DCAN_ERRVEC_ECCVEC_W 11U |
| #define | DCAN_ERRVEC_ECCVEC_M 0x000007FFU |
| #define | DCAN_ERRVEC_ECCVEC_S 0U |
| #define | DCAN_ERRVEC_RDSVBUS 0x00008000U |
| #define | DCAN_ERRVEC_RDSVBUS_M 0x00008000U |
| #define | DCAN_ERRVEC_RDSVBUS_S 15U |
| #define | DCAN_ERRVEC_RDSVBUSA_W 8U |
| #define | DCAN_ERRVEC_RDSVBUSA_M 0x00FF0000U |
| #define | DCAN_ERRVEC_RDSVBUSA_S 16U |
| #define | DCAN_ERRVEC_SVBUSDONE 0x01000000U |
| #define | DCAN_ERRVEC_SVBUSDONE_M 0x01000000U |
| #define | DCAN_ERRVEC_SVBUSDONE_S 24U |
| #define | DCAN_ERRSTA_NUMRAMS_W 11U |
| #define | DCAN_ERRSTA_NUMRAMS_M 0x000007FFU |
| #define | DCAN_ERRSTA_NUMRAMS_S 0U |
| #define | DCAN_ERRWRAPREV_REVMIN_W 6U |
| #define | DCAN_ERRWRAPREV_REVMIN_M 0x0000003FU |
| #define | DCAN_ERRWRAPREV_REVMIN_S 0U |
| #define | DCAN_ERRWRAPREV_REVCUSTOM_W 2U |
| #define | DCAN_ERRWRAPREV_REVCUSTOM_M 0x000000C0U |
| #define | DCAN_ERRWRAPREV_REVCUSTOM_S 6U |
| #define | DCAN_ERRWRAPREV_REVMAJ_W 3U |
| #define | DCAN_ERRWRAPREV_REVMAJ_M 0x00000700U |
| #define | DCAN_ERRWRAPREV_REVMAJ_S 8U |
| #define | DCAN_ERRWRAPREV_REVRTL_W 5U |
| #define | DCAN_ERRWRAPREV_REVRTL_M 0x0000F800U |
| #define | DCAN_ERRWRAPREV_REVRTL_S 11U |
| #define | DCAN_ERRWRAPREV_MODULEID_W 12U |
| #define | DCAN_ERRWRAPREV_MODULEID_M 0x0FFF0000U |
| #define | DCAN_ERRWRAPREV_MODULEID_S 16U |
| #define | DCAN_ERRWRAPREV_BU_W 2U |
| #define | DCAN_ERRWRAPREV_BU_M 0x30000000U |
| #define | DCAN_ERRWRAPREV_BU_S 28U |
| #define | DCAN_ERRWRAPREV_SCHEME_W 2U |
| #define | DCAN_ERRWRAPREV_SCHEME_M 0xC0000000U |
| #define | DCAN_ERRWRAPREV_SCHEME_S 30U |
| #define | DCAN_ERRCTL_ECCEN 0x00000001U |
| #define | DCAN_ERRCTL_ECCEN_M 0x00000001U |
| #define | DCAN_ERRCTL_ECCEN_S 0U |
| #define | DCAN_ERRCTL_ECCCHECK 0x00000002U |
| #define | DCAN_ERRCTL_ECCCHECK_M 0x00000002U |
| #define | DCAN_ERRCTL_ECCCHECK_S 1U |
| #define | DCAN_ERRCTL_ENRMW 0x00000004U |
| #define | DCAN_ERRCTL_ENRMW_M 0x00000004U |
| #define | DCAN_ERRCTL_ENRMW_S 2U |
| #define | DCAN_ERRCTL_FRCSEC 0x00000008U |
| #define | DCAN_ERRCTL_FRCSEC_M 0x00000008U |
| #define | DCAN_ERRCTL_FRCSEC_S 3U |
| #define | DCAN_ERRCTL_FRCDED 0x00000010U |
| #define | DCAN_ERRCTL_FRCDED_M 0x00000010U |
| #define | DCAN_ERRCTL_FRCDED_S 4U |
| #define | DCAN_ERRCTL_FRCNROW 0x00000020U |
| #define | DCAN_ERRCTL_FRCNROW_M 0x00000020U |
| #define | DCAN_ERRCTL_FRCNROW_S 5U |
| #define | DCAN_ERRCTL_ERRONCE 0x00000040U |
| #define | DCAN_ERRCTL_ERRONCE_M 0x00000040U |
| #define | DCAN_ERRCTL_ERRONCE_S 6U |
| #define | DCAN_ERRCTL_CHECKPAR 0x00000080U |
| #define | DCAN_ERRCTL_CHECKPAR_M 0x00000080U |
| #define | DCAN_ERRCTL_CHECKPAR_S 7U |
| #define | DCAN_ERRCTL_CHECKSVBTO 0x00000100U |
| #define | DCAN_ERRCTL_CHECKSVBTO_M 0x00000100U |
| #define | DCAN_ERRCTL_CHECKSVBTO_S 8U |
| #define | DCAN_ERRCTL1_ECCROW_W 32U |
| #define | DCAN_ERRCTL1_ECCROW_M 0xFFFFFFFFU |
| #define | DCAN_ERRCTL1_ECCROW_S 0U |
| #define | DCAN_ERRCTL2_ECCB1_W 16U |
| #define | DCAN_ERRCTL2_ECCB1_M 0x0000FFFFU |
| #define | DCAN_ERRCTL2_ECCB1_S 0U |
| #define | DCAN_ERRCTL2_ECCB2_W 16U |
| #define | DCAN_ERRCTL2_ECCB2_M 0xFFFF0000U |
| #define | DCAN_ERRCTL2_ECCB2_S 16U |
| #define | DCAN_ERRSTA1_ECCSEC_W 2U |
| #define | DCAN_ERRSTA1_ECCSEC_M 0x00000003U |
| #define | DCAN_ERRSTA1_ECCSEC_S 0U |
| #define | DCAN_ERRSTA1_ECCDED_W 2U |
| #define | DCAN_ERRSTA1_ECCDED_M 0x0000000CU |
| #define | DCAN_ERRSTA1_ECCDED_S 2U |
| #define | DCAN_ERRSTA1_ECCOTHER 0x00000010U |
| #define | DCAN_ERRSTA1_ECCOTHER_M 0x00000010U |
| #define | DCAN_ERRSTA1_ECCOTHER_S 4U |
| #define | DCAN_ERRSTA1_PARERR_W 2U |
| #define | DCAN_ERRSTA1_PARERR_M 0x00000060U |
| #define | DCAN_ERRSTA1_PARERR_S 5U |
| #define | DCAN_ERRSTA1_CTLERR 0x00000080U |
| #define | DCAN_ERRSTA1_CTLERR_M 0x00000080U |
| #define | DCAN_ERRSTA1_CTLERR_S 7U |
| #define | DCAN_ERRSTA1_CLRECCSEC_W 2U |
| #define | DCAN_ERRSTA1_CLRECCSEC_M 0x00000300U |
| #define | DCAN_ERRSTA1_CLRECCSEC_S 8U |
| #define | DCAN_ERRSTA1_CLRECCDED_W 2U |
| #define | DCAN_ERRSTA1_CLRECCDED_M 0x00000C00U |
| #define | DCAN_ERRSTA1_CLRECCDED_S 10U |
| #define | DCAN_ERRSTA1_CLRECCOT 0x00001000U |
| #define | DCAN_ERRSTA1_CLRECCOT_M 0x00001000U |
| #define | DCAN_ERRSTA1_CLRECCOT_S 12U |
| #define | DCAN_ERRSTA1_CLRPARERR_W 2U |
| #define | DCAN_ERRSTA1_CLRPARERR_M 0x00006000U |
| #define | DCAN_ERRSTA1_CLRPARERR_S 13U |
| #define | DCAN_ERRSTA1_CLRCTLERR 0x00008000U |
| #define | DCAN_ERRSTA1_CLRCTLERR_M 0x00008000U |
| #define | DCAN_ERRSTA1_CLRCTLERR_S 15U |
| #define | DCAN_ERRSTA1_ECCB1_W 16U |
| #define | DCAN_ERRSTA1_ECCB1_M 0xFFFF0000U |
| #define | DCAN_ERRSTA1_ECCB1_S 16U |
| #define | DCAN_ERRSTA2_ECCROW_W 32U |
| #define | DCAN_ERRSTA2_ECCROW_M 0xFFFFFFFFU |
| #define | DCAN_ERRSTA2_ECCROW_S 0U |
| #define | DCAN_ERRSTA3_WBPEND 0x00000001U |
| #define | DCAN_ERRSTA3_WBPEND_M 0x00000001U |
| #define | DCAN_ERRSTA3_WBPEND_S 0U |
| #define | DCAN_ERRSTA3_SVBUSTO 0x00000002U |
| #define | DCAN_ERRSTA3_SVBUSTO_M 0x00000002U |
| #define | DCAN_ERRSTA3_SVBUSTO_S 1U |
| #define | DCAN_ERRSTA3_CLRSVBTO 0x00000200U |
| #define | DCAN_ERRSTA3_CLRSVBTO_M 0x00000200U |
| #define | DCAN_ERRSTA3_CLRSVBTO_S 9U |
| #define | DCAN_SECEOI_EOIWR 0x00000001U |
| #define | DCAN_SECEOI_EOIWR_M 0x00000001U |
| #define | DCAN_SECEOI_EOIWR_S 0U |
| #define | DCAN_SECSTA_MGSPEND 0x00000001U |
| #define | DCAN_SECSTA_MGSPEND_M 0x00000001U |
| #define | DCAN_SECSTA_MGSPEND_S 0U |
| #define | DCAN_SECENSET_MSGENSET 0x00000001U |
| #define | DCAN_SECENSET_MSGENSET_M 0x00000001U |
| #define | DCAN_SECENSET_MSGENSET_S 0U |
| #define | DCAN_SECENCLR_MSGENCLR 0x00000001U |
| #define | DCAN_SECENCLR_MSGENCLR_M 0x00000001U |
| #define | DCAN_SECENCLR_MSGENCLR_S 0U |
| #define | DCAN_DEDEOI_EOIWR 0x00000001U |
| #define | DCAN_DEDEOI_EOIWR_M 0x00000001U |
| #define | DCAN_DEDEOI_EOIWR_S 0U |
| #define | DCAN_DEDSTA_MSGPEND 0x00000001U |
| #define | DCAN_DEDSTA_MSGPEND_M 0x00000001U |
| #define | DCAN_DEDSTA_MSGPEND_S 0U |
| #define | DCAN_DEDSTA_TXREQPEND 0x00000002U |
| #define | DCAN_DEDSTA_TXREQPEND_M 0x00000002U |
| #define | DCAN_DEDSTA_TXREQPEND_S 1U |
| #define | DCAN_DEDENSET_MSGENSET 0x00000001U |
| #define | DCAN_DEDENSET_MSGENSET_M 0x00000001U |
| #define | DCAN_DEDENSET_MSGENSET_S 0U |
| #define | DCAN_DEDENSET_TXREQENSET 0x00000002U |
| #define | DCAN_DEDENSET_TXREQENSET_M 0x00000002U |
| #define | DCAN_DEDENSET_TXREQENSET_S 1U |
| #define | DCAN_DEDENCLR_MSGENCLR 0x00000001U |
| #define | DCAN_DEDENCLR_MSGENCLR_M 0x00000001U |
| #define | DCAN_DEDENCLR_MSGENCLR_S 0U |
| #define | DCAN_DEDENCLR_TXREQENCLR 0x00000002U |
| #define | DCAN_DEDENCLR_TXREQENCLR_M 0x00000002U |
| #define | DCAN_DEDENCLR_TXREQENCLR_S 1U |
| #define | DCAN_AGGRENSET_PARITY 0x00000001U |
| #define | DCAN_AGGRENSET_PARITY_M 0x00000001U |
| #define | DCAN_AGGRENSET_PARITY_S 0U |
| #define | DCAN_AGGRENSET_TIMEOUT 0x00000002U |
| #define | DCAN_AGGRENSET_TIMEOUT_M 0x00000002U |
| #define | DCAN_AGGRENSET_TIMEOUT_S 1U |
| #define | DCAN_AGGRENCLR_PARITY 0x00000001U |
| #define | DCAN_AGGRENCLR_PARITY_M 0x00000001U |
| #define | DCAN_AGGRENCLR_PARITY_S 0U |
| #define | DCAN_AGGRENCLR_TIMEOUT 0x00000002U |
| #define | DCAN_AGGRENCLR_TIMEOUT_M 0x00000002U |
| #define | DCAN_AGGRENCLR_TIMEOUT_S 1U |
| #define | DCAN_AGGRSTASET_PARITY_W 2U |
| #define | DCAN_AGGRSTASET_PARITY_M 0x00000003U |
| #define | DCAN_AGGRSTASET_PARITY_S 0U |
| #define | DCAN_AGGRSTASET_TIMEOUT_W 2U |
| #define | DCAN_AGGRSTASET_TIMEOUT_M 0x0000000CU |
| #define | DCAN_AGGRSTASET_TIMEOUT_S 2U |
| #define | DCAN_AGGRSTACLR_PARITY_W 2U |
| #define | DCAN_AGGRSTACLR_PARITY_M 0x00000003U |
| #define | DCAN_AGGRSTACLR_PARITY_S 0U |
| #define | DCAN_AGGRSTACLR_TIMEOUT_W 2U |
| #define | DCAN_AGGRSTACLR_TIMEOUT_M 0x0000000CU |
| #define | DCAN_AGGRSTACLR_TIMEOUT_S 2U |
| #define | DCAN_DESC_MINREV_W 4U |
| #define | DCAN_DESC_MINREV_M 0x0000000FU |
| #define | DCAN_DESC_MINREV_S 0U |
| #define | DCAN_DESC_MINREV_MINIMUM 0x00000000U |
| #define | DCAN_DESC_MINREV_MAXIMUM 0x0000000FU |
| #define | DCAN_DESC_MAJREV_W 4U |
| #define | DCAN_DESC_MAJREV_M 0x000000F0U |
| #define | DCAN_DESC_MAJREV_S 4U |
| #define | DCAN_DESC_MAJREV_MINIMUM 0x00000000U |
| #define | DCAN_DESC_MAJREV_MAXIMUM 0x000000F0U |
| #define | DCAN_DESC_FEATUREVER_W 4U |
| #define | DCAN_DESC_FEATUREVER_M 0x0000F000U |
| #define | DCAN_DESC_FEATUREVER_S 12U |
| #define | DCAN_DESC_FEATUREVER_VERSION_0 0x00000000U |
| #define | DCAN_DESC_FEATUREVER_VERSION_1 0x00001000U |
| #define | DCAN_DESC_MODULEID_W 16U |
| #define | DCAN_DESC_MODULEID_M 0xFFFF0000U |
| #define | DCAN_DESC_MODULEID_S 16U |
| #define | DCAN_DESC_MODULEID_MINIMUM 0x00000000U |
| #define | DCAN_DESC_MODULEID_MAXIMUM 0xFFFF0000U |
| #define | DCAN_IMASK0_INTL0 0x00000001U |
| #define | DCAN_IMASK0_INTL0_M 0x00000001U |
| #define | DCAN_IMASK0_INTL0_S 0U |
| #define | DCAN_IMASK0_INTL0_CLR 0x00000000U |
| #define | DCAN_IMASK0_INTL0_SET 0x00000001U |
| #define | DCAN_IMASK0_INTL1 0x00000002U |
| #define | DCAN_IMASK0_INTL1_M 0x00000002U |
| #define | DCAN_IMASK0_INTL1_S 1U |
| #define | DCAN_IMASK0_INTL1_CLR 0x00000000U |
| #define | DCAN_IMASK0_INTL1_SET 0x00000002U |
| #define | DCAN_IMASK0_SEC 0x00000004U |
| #define | DCAN_IMASK0_SEC_M 0x00000004U |
| #define | DCAN_IMASK0_SEC_S 2U |
| #define | DCAN_IMASK0_SEC_CLR 0x00000000U |
| #define | DCAN_IMASK0_SEC_SET 0x00000004U |
| #define | DCAN_IMASK0_DED 0x00000008U |
| #define | DCAN_IMASK0_DED_M 0x00000008U |
| #define | DCAN_IMASK0_DED_S 3U |
| #define | DCAN_IMASK0_DED_CLR 0x00000000U |
| #define | DCAN_IMASK0_DED_SET 0x00000008U |
| #define | DCAN_IMASK0_TSORWAKE 0x00000010U |
| #define | DCAN_IMASK0_TSORWAKE_M 0x00000010U |
| #define | DCAN_IMASK0_TSORWAKE_S 4U |
| #define | DCAN_IMASK0_TSORWAKE_CLR 0x00000000U |
| #define | DCAN_IMASK0_TSORWAKE_SET 0x00000010U |
| #define | DCAN_IMASK0_FE2 0x00000020U |
| #define | DCAN_IMASK0_FE2_M 0x00000020U |
| #define | DCAN_IMASK0_FE2_S 5U |
| #define | DCAN_IMASK0_FE2_CLR 0x00000000U |
| #define | DCAN_IMASK0_FE2_SET 0x00000020U |
| #define | DCAN_IMASK0_DMADONE0 0x00000040U |
| #define | DCAN_IMASK0_DMADONE0_M 0x00000040U |
| #define | DCAN_IMASK0_DMADONE0_S 6U |
| #define | DCAN_IMASK0_DMADONE0_CLR 0x00000000U |
| #define | DCAN_IMASK0_DMADONE0_SET 0x00000040U |
| #define | DCAN_IMASK0_DMADONE1 0x00000080U |
| #define | DCAN_IMASK0_DMADONE1_M 0x00000080U |
| #define | DCAN_IMASK0_DMADONE1_S 7U |
| #define | DCAN_IMASK0_DMADONE1_CLR 0x00000000U |
| #define | DCAN_IMASK0_DMADONE1_SET 0x00000080U |
| #define | DCAN_RIS0_INTL0 0x00000001U |
| #define | DCAN_RIS0_INTL0_M 0x00000001U |
| #define | DCAN_RIS0_INTL0_S 0U |
| #define | DCAN_RIS0_INTL0_CLR 0x00000000U |
| #define | DCAN_RIS0_INTL0_SET 0x00000001U |
| #define | DCAN_RIS0_INTL1 0x00000002U |
| #define | DCAN_RIS0_INTL1_M 0x00000002U |
| #define | DCAN_RIS0_INTL1_S 1U |
| #define | DCAN_RIS0_INTL1_CLR 0x00000000U |
| #define | DCAN_RIS0_INTL1_SET 0x00000002U |
| #define | DCAN_RIS0_SEC 0x00000004U |
| #define | DCAN_RIS0_SEC_M 0x00000004U |
| #define | DCAN_RIS0_SEC_S 2U |
| #define | DCAN_RIS0_SEC_CLR 0x00000000U |
| #define | DCAN_RIS0_SEC_SET 0x00000004U |
| #define | DCAN_RIS0_DED 0x00000008U |
| #define | DCAN_RIS0_DED_M 0x00000008U |
| #define | DCAN_RIS0_DED_S 3U |
| #define | DCAN_RIS0_DED_CLR 0x00000000U |
| #define | DCAN_RIS0_DED_SET 0x00000008U |
| #define | DCAN_RIS0_TSORWAKE 0x00000010U |
| #define | DCAN_RIS0_TSORWAKE_M 0x00000010U |
| #define | DCAN_RIS0_TSORWAKE_S 4U |
| #define | DCAN_RIS0_TSORWAKE_CLR 0x00000000U |
| #define | DCAN_RIS0_TSORWAKE_SET 0x00000010U |
| #define | DCAN_RIS0_FE2 0x00000020U |
| #define | DCAN_RIS0_FE2_M 0x00000020U |
| #define | DCAN_RIS0_FE2_S 5U |
| #define | DCAN_RIS0_FE2_CLR 0x00000000U |
| #define | DCAN_RIS0_FE2_SET 0x00000020U |
| #define | DCAN_RIS0_DMADONE0 0x00000040U |
| #define | DCAN_RIS0_DMADONE0_M 0x00000040U |
| #define | DCAN_RIS0_DMADONE0_S 6U |
| #define | DCAN_RIS0_DMADONE0_CLR 0x00000000U |
| #define | DCAN_RIS0_DMADONE0_SET 0x00000040U |
| #define | DCAN_RIS0_DMADONE1 0x00000080U |
| #define | DCAN_RIS0_DMADONE1_M 0x00000080U |
| #define | DCAN_RIS0_DMADONE1_S 7U |
| #define | DCAN_RIS0_DMADONE1_CLR 0x00000000U |
| #define | DCAN_RIS0_DMADONE1_SET 0x00000080U |
| #define | DCAN_MIS0_INTL0 0x00000001U |
| #define | DCAN_MIS0_INTL0_M 0x00000001U |
| #define | DCAN_MIS0_INTL0_S 0U |
| #define | DCAN_MIS0_INTL0_CLR 0x00000000U |
| #define | DCAN_MIS0_INTL0_SET 0x00000001U |
| #define | DCAN_MIS0_INTL1 0x00000002U |
| #define | DCAN_MIS0_INTL1_M 0x00000002U |
| #define | DCAN_MIS0_INTL1_S 1U |
| #define | DCAN_MIS0_INTL1_CLR 0x00000000U |
| #define | DCAN_MIS0_INTL1_SET 0x00000002U |
| #define | DCAN_MIS0_SEC 0x00000004U |
| #define | DCAN_MIS0_SEC_M 0x00000004U |
| #define | DCAN_MIS0_SEC_S 2U |
| #define | DCAN_MIS0_SEC_CLR 0x00000000U |
| #define | DCAN_MIS0_SEC_SET 0x00000004U |
| #define | DCAN_MIS0_DED 0x00000008U |
| #define | DCAN_MIS0_DED_M 0x00000008U |
| #define | DCAN_MIS0_DED_S 3U |
| #define | DCAN_MIS0_DED_CLR 0x00000000U |
| #define | DCAN_MIS0_DED_SET 0x00000008U |
| #define | DCAN_MIS0_TSORWAKE 0x00000010U |
| #define | DCAN_MIS0_TSORWAKE_M 0x00000010U |
| #define | DCAN_MIS0_TSORWAKE_S 4U |
| #define | DCAN_MIS0_TSORWAKE_CLR 0x00000000U |
| #define | DCAN_MIS0_TSORWAKE_SET 0x00000010U |
| #define | DCAN_MIS0_FE2 0x00000020U |
| #define | DCAN_MIS0_FE2_M 0x00000020U |
| #define | DCAN_MIS0_FE2_S 5U |
| #define | DCAN_MIS0_FE2_CLR 0x00000000U |
| #define | DCAN_MIS0_FE2_SET 0x00000020U |
| #define | DCAN_MIS0_DMADONE0 0x00000040U |
| #define | DCAN_MIS0_DMADONE0_M 0x00000040U |
| #define | DCAN_MIS0_DMADONE0_S 6U |
| #define | DCAN_MIS0_DMADONE0_CLR 0x00000000U |
| #define | DCAN_MIS0_DMADONE0_SET 0x00000040U |
| #define | DCAN_MIS0_DMADONE1 0x00000080U |
| #define | DCAN_MIS0_DMADONE1_M 0x00000080U |
| #define | DCAN_MIS0_DMADONE1_S 7U |
| #define | DCAN_MIS0_DMADONE1_CLR 0x00000000U |
| #define | DCAN_MIS0_DMADONE1_SET 0x00000080U |
| #define | DCAN_ISET0_INTL0 0x00000001U |
| #define | DCAN_ISET0_INTL0_M 0x00000001U |
| #define | DCAN_ISET0_INTL0_S 0U |
| #define | DCAN_ISET0_INTL0_NO_EFFECT 0x00000000U |
| #define | DCAN_ISET0_INTL0_SET 0x00000001U |
| #define | DCAN_ISET0_INTL1 0x00000002U |
| #define | DCAN_ISET0_INTL1_M 0x00000002U |
| #define | DCAN_ISET0_INTL1_S 1U |
| #define | DCAN_ISET0_INTL1_NO_EFFECT 0x00000000U |
| #define | DCAN_ISET0_INTL1_SET 0x00000002U |
| #define | DCAN_ISET0_SEC 0x00000004U |
| #define | DCAN_ISET0_SEC_M 0x00000004U |
| #define | DCAN_ISET0_SEC_S 2U |
| #define | DCAN_ISET0_SEC_NO_EFFECT 0x00000000U |
| #define | DCAN_ISET0_SEC_SET 0x00000004U |
| #define | DCAN_ISET0_DED 0x00000008U |
| #define | DCAN_ISET0_DED_M 0x00000008U |
| #define | DCAN_ISET0_DED_S 3U |
| #define | DCAN_ISET0_DED_NO_EFFECT 0x00000000U |
| #define | DCAN_ISET0_DED_SET 0x00000008U |
| #define | DCAN_ISET0_TSORWAKE 0x00000010U |
| #define | DCAN_ISET0_TSORWAKE_M 0x00000010U |
| #define | DCAN_ISET0_TSORWAKE_S 4U |
| #define | DCAN_ISET0_TSORWAKE_NO_EFFECT 0x00000000U |
| #define | DCAN_ISET0_TSORWAKE_SET 0x00000010U |
| #define | DCAN_ISET0_FE2 0x00000020U |
| #define | DCAN_ISET0_FE2_M 0x00000020U |
| #define | DCAN_ISET0_FE2_S 5U |
| #define | DCAN_ISET0_FE2_NO_EFFECT 0x00000000U |
| #define | DCAN_ISET0_FE2_SET 0x00000020U |
| #define | DCAN_ISET0_DMADONE0 0x00000040U |
| #define | DCAN_ISET0_DMADONE0_M 0x00000040U |
| #define | DCAN_ISET0_DMADONE0_S 6U |
| #define | DCAN_ISET0_DMADONE0_NO_EFFECT 0x00000000U |
| #define | DCAN_ISET0_DMADONE0_SET 0x00000040U |
| #define | DCAN_ISET0_DMADONE1 0x00000080U |
| #define | DCAN_ISET0_DMADONE1_M 0x00000080U |
| #define | DCAN_ISET0_DMADONE1_S 7U |
| #define | DCAN_ISET0_DMADONE1_NO_EFFECT 0x00000000U |
| #define | DCAN_ISET0_DMADONE1_SET 0x00000080U |
| #define | DCAN_ICLR0_INTL0 0x00000001U |
| #define | DCAN_ICLR0_INTL0_M 0x00000001U |
| #define | DCAN_ICLR0_INTL0_S 0U |
| #define | DCAN_ICLR0_INTL0_NO_EFFECT 0x00000000U |
| #define | DCAN_ICLR0_INTL0_CLR 0x00000001U |
| #define | DCAN_ICLR0_INTL1 0x00000002U |
| #define | DCAN_ICLR0_INTL1_M 0x00000002U |
| #define | DCAN_ICLR0_INTL1_S 1U |
| #define | DCAN_ICLR0_INTL1_NO_EFFECT 0x00000000U |
| #define | DCAN_ICLR0_INTL1_CLR 0x00000002U |
| #define | DCAN_ICLR0_SEC 0x00000004U |
| #define | DCAN_ICLR0_SEC_M 0x00000004U |
| #define | DCAN_ICLR0_SEC_S 2U |
| #define | DCAN_ICLR0_SEC_NO_EFFECT 0x00000000U |
| #define | DCAN_ICLR0_SEC_CLR 0x00000004U |
| #define | DCAN_ICLR0_DED 0x00000008U |
| #define | DCAN_ICLR0_DED_M 0x00000008U |
| #define | DCAN_ICLR0_DED_S 3U |
| #define | DCAN_ICLR0_DED_NO_EFFECT 0x00000000U |
| #define | DCAN_ICLR0_DED_CLR 0x00000008U |
| #define | DCAN_ICLR0_TSORWAKE 0x00000010U |
| #define | DCAN_ICLR0_TSORWAKE_M 0x00000010U |
| #define | DCAN_ICLR0_TSORWAKE_S 4U |
| #define | DCAN_ICLR0_TSORWAKE_NO_EFFECT 0x00000000U |
| #define | DCAN_ICLR0_TSORWAKE_CLR 0x00000010U |
| #define | DCAN_ICLR0_FE2 0x00000020U |
| #define | DCAN_ICLR0_FE2_M 0x00000020U |
| #define | DCAN_ICLR0_FE2_S 5U |
| #define | DCAN_ICLR0_FE2_NO_EFFECT 0x00000000U |
| #define | DCAN_ICLR0_FE2_CLR 0x00000020U |
| #define | DCAN_ICLR0_DMADONE0 0x00000040U |
| #define | DCAN_ICLR0_DMADONE0_M 0x00000040U |
| #define | DCAN_ICLR0_DMADONE0_S 6U |
| #define | DCAN_ICLR0_DMADONE0_NO_EFFECT 0x00000000U |
| #define | DCAN_ICLR0_DMADONE0_CLR 0x00000040U |
| #define | DCAN_ICLR0_DMADONE1 0x00000080U |
| #define | DCAN_ICLR0_DMADONE1_M 0x00000080U |
| #define | DCAN_ICLR0_DMADONE1_S 7U |
| #define | DCAN_ICLR0_DMADONE1_NO_EFFECT 0x00000000U |
| #define | DCAN_ICLR0_DMADONE1_CLR 0x00000080U |
| #define | DCAN_IMASK1_INTL0 0x00000001U |
| #define | DCAN_IMASK1_INTL0_M 0x00000001U |
| #define | DCAN_IMASK1_INTL0_S 0U |
| #define | DCAN_IMASK1_INTL0_CLR 0x00000000U |
| #define | DCAN_IMASK1_INTL0_SET 0x00000001U |
| #define | DCAN_IMASK1_INTL1 0x00000002U |
| #define | DCAN_IMASK1_INTL1_M 0x00000002U |
| #define | DCAN_IMASK1_INTL1_S 1U |
| #define | DCAN_IMASK1_INTL1_CLR 0x00000000U |
| #define | DCAN_IMASK1_INTL1_SET 0x00000002U |
| #define | DCAN_IMASK1_SEC 0x00000004U |
| #define | DCAN_IMASK1_SEC_M 0x00000004U |
| #define | DCAN_IMASK1_SEC_S 2U |
| #define | DCAN_IMASK1_SEC_CLR 0x00000000U |
| #define | DCAN_IMASK1_SEC_SET 0x00000004U |
| #define | DCAN_IMASK1_DED 0x00000008U |
| #define | DCAN_IMASK1_DED_M 0x00000008U |
| #define | DCAN_IMASK1_DED_S 3U |
| #define | DCAN_IMASK1_DED_CLR 0x00000000U |
| #define | DCAN_IMASK1_DED_SET 0x00000008U |
| #define | DCAN_IMASK1_TSORWAKE 0x00000010U |
| #define | DCAN_IMASK1_TSORWAKE_M 0x00000010U |
| #define | DCAN_IMASK1_TSORWAKE_S 4U |
| #define | DCAN_IMASK1_TSORWAKE_CLR 0x00000000U |
| #define | DCAN_IMASK1_TSORWAKE_SET 0x00000010U |
| #define | DCAN_IMASK1_FE2 0x00000020U |
| #define | DCAN_IMASK1_FE2_M 0x00000020U |
| #define | DCAN_IMASK1_FE2_S 5U |
| #define | DCAN_IMASK1_FE2_CLR 0x00000000U |
| #define | DCAN_IMASK1_FE2_SET 0x00000020U |
| #define | DCAN_IMASK1_DMADONE0 0x00000040U |
| #define | DCAN_IMASK1_DMADONE0_M 0x00000040U |
| #define | DCAN_IMASK1_DMADONE0_S 6U |
| #define | DCAN_IMASK1_DMADONE0_CLR 0x00000000U |
| #define | DCAN_IMASK1_DMADONE0_SET 0x00000040U |
| #define | DCAN_IMASK1_DMADONE1 0x00000080U |
| #define | DCAN_IMASK1_DMADONE1_M 0x00000080U |
| #define | DCAN_IMASK1_DMADONE1_S 7U |
| #define | DCAN_IMASK1_DMADONE1_CLR 0x00000000U |
| #define | DCAN_IMASK1_DMADONE1_SET 0x00000080U |
| #define | DCAN_RIS1_INTL0 0x00000001U |
| #define | DCAN_RIS1_INTL0_M 0x00000001U |
| #define | DCAN_RIS1_INTL0_S 0U |
| #define | DCAN_RIS1_INTL0_CLR 0x00000000U |
| #define | DCAN_RIS1_INTL0_SET 0x00000001U |
| #define | DCAN_RIS1_INTL1 0x00000002U |
| #define | DCAN_RIS1_INTL1_M 0x00000002U |
| #define | DCAN_RIS1_INTL1_S 1U |
| #define | DCAN_RIS1_INTL1_CLR 0x00000000U |
| #define | DCAN_RIS1_INTL1_SET 0x00000002U |
| #define | DCAN_RIS1_SEC 0x00000004U |
| #define | DCAN_RIS1_SEC_M 0x00000004U |
| #define | DCAN_RIS1_SEC_S 2U |
| #define | DCAN_RIS1_SEC_CLR 0x00000000U |
| #define | DCAN_RIS1_SEC_SET 0x00000004U |
| #define | DCAN_RIS1_DED 0x00000008U |
| #define | DCAN_RIS1_DED_M 0x00000008U |
| #define | DCAN_RIS1_DED_S 3U |
| #define | DCAN_RIS1_DED_CLR 0x00000000U |
| #define | DCAN_RIS1_DED_SET 0x00000008U |
| #define | DCAN_RIS1_TSORWAKE 0x00000010U |
| #define | DCAN_RIS1_TSORWAKE_M 0x00000010U |
| #define | DCAN_RIS1_TSORWAKE_S 4U |
| #define | DCAN_RIS1_TSORWAKE_CLR 0x00000000U |
| #define | DCAN_RIS1_TSORWAKE_SET 0x00000010U |
| #define | DCAN_RIS1_FE2 0x00000020U |
| #define | DCAN_RIS1_FE2_M 0x00000020U |
| #define | DCAN_RIS1_FE2_S 5U |
| #define | DCAN_RIS1_FE2_CLR 0x00000000U |
| #define | DCAN_RIS1_FE2_SET 0x00000020U |
| #define | DCAN_RIS1_DMADONE0 0x00000040U |
| #define | DCAN_RIS1_DMADONE0_M 0x00000040U |
| #define | DCAN_RIS1_DMADONE0_S 6U |
| #define | DCAN_RIS1_DMADONE0_CLR 0x00000000U |
| #define | DCAN_RIS1_DMADONE0_SET 0x00000040U |
| #define | DCAN_RIS1_DMADONE1 0x00000080U |
| #define | DCAN_RIS1_DMADONE1_M 0x00000080U |
| #define | DCAN_RIS1_DMADONE1_S 7U |
| #define | DCAN_RIS1_DMADONE1_CLR 0x00000000U |
| #define | DCAN_RIS1_DMADONE1_SET 0x00000080U |
| #define | DCAN_MIS1_INTL0 0x00000001U |
| #define | DCAN_MIS1_INTL0_M 0x00000001U |
| #define | DCAN_MIS1_INTL0_S 0U |
| #define | DCAN_MIS1_INTL0_CLR 0x00000000U |
| #define | DCAN_MIS1_INTL0_SET 0x00000001U |
| #define | DCAN_MIS1_INTL1 0x00000002U |
| #define | DCAN_MIS1_INTL1_M 0x00000002U |
| #define | DCAN_MIS1_INTL1_S 1U |
| #define | DCAN_MIS1_INTL1_CLR 0x00000000U |
| #define | DCAN_MIS1_INTL1_SET 0x00000002U |
| #define | DCAN_MIS1_SEC 0x00000004U |
| #define | DCAN_MIS1_SEC_M 0x00000004U |
| #define | DCAN_MIS1_SEC_S 2U |
| #define | DCAN_MIS1_SEC_CLR 0x00000000U |
| #define | DCAN_MIS1_SEC_SET 0x00000004U |
| #define | DCAN_MIS1_DED 0x00000008U |
| #define | DCAN_MIS1_DED_M 0x00000008U |
| #define | DCAN_MIS1_DED_S 3U |
| #define | DCAN_MIS1_DED_CLR 0x00000000U |
| #define | DCAN_MIS1_DED_SET 0x00000008U |
| #define | DCAN_MIS1_TSORWAKE 0x00000010U |
| #define | DCAN_MIS1_TSORWAKE_M 0x00000010U |
| #define | DCAN_MIS1_TSORWAKE_S 4U |
| #define | DCAN_MIS1_TSORWAKE_CLR 0x00000000U |
| #define | DCAN_MIS1_TSORWAKE_SET 0x00000010U |
| #define | DCAN_MIS1_FE2 0x00000020U |
| #define | DCAN_MIS1_FE2_M 0x00000020U |
| #define | DCAN_MIS1_FE2_S 5U |
| #define | DCAN_MIS1_FE2_CLR 0x00000000U |
| #define | DCAN_MIS1_FE2_SET 0x00000020U |
| #define | DCAN_MIS1_DMADONE0 0x00000040U |
| #define | DCAN_MIS1_DMADONE0_M 0x00000040U |
| #define | DCAN_MIS1_DMADONE0_S 6U |
| #define | DCAN_MIS1_DMADONE0_CLR 0x00000000U |
| #define | DCAN_MIS1_DMADONE0_SET 0x00000040U |
| #define | DCAN_MIS1_DMADONE1 0x00000080U |
| #define | DCAN_MIS1_DMADONE1_M 0x00000080U |
| #define | DCAN_MIS1_DMADONE1_S 7U |
| #define | DCAN_MIS1_DMADONE1_CLR 0x00000000U |
| #define | DCAN_MIS1_DMADONE1_SET 0x00000080U |
| #define | DCAN_ISET1_INTL0 0x00000001U |
| #define | DCAN_ISET1_INTL0_M 0x00000001U |
| #define | DCAN_ISET1_INTL0_S 0U |
| #define | DCAN_ISET1_INTL0_NO_EFFECT 0x00000000U |
| #define | DCAN_ISET1_INTL0_SET 0x00000001U |
| #define | DCAN_ISET1_INTL1 0x00000002U |
| #define | DCAN_ISET1_INTL1_M 0x00000002U |
| #define | DCAN_ISET1_INTL1_S 1U |
| #define | DCAN_ISET1_INTL1_NO_EFFECT 0x00000000U |
| #define | DCAN_ISET1_INTL1_SET 0x00000002U |
| #define | DCAN_ISET1_SEC 0x00000004U |
| #define | DCAN_ISET1_SEC_M 0x00000004U |
| #define | DCAN_ISET1_SEC_S 2U |
| #define | DCAN_ISET1_SEC_NO_EFFECT 0x00000000U |
| #define | DCAN_ISET1_SEC_SET 0x00000004U |
| #define | DCAN_ISET1_DED 0x00000008U |
| #define | DCAN_ISET1_DED_M 0x00000008U |
| #define | DCAN_ISET1_DED_S 3U |
| #define | DCAN_ISET1_DED_NO_EFFECT 0x00000000U |
| #define | DCAN_ISET1_DED_SET 0x00000008U |
| #define | DCAN_ISET1_TSORWAKE 0x00000010U |
| #define | DCAN_ISET1_TSORWAKE_M 0x00000010U |
| #define | DCAN_ISET1_TSORWAKE_S 4U |
| #define | DCAN_ISET1_TSORWAKE_NO_EFFECT 0x00000000U |
| #define | DCAN_ISET1_TSORWAKE_SET 0x00000010U |
| #define | DCAN_ISET1_FE2 0x00000020U |
| #define | DCAN_ISET1_FE2_M 0x00000020U |
| #define | DCAN_ISET1_FE2_S 5U |
| #define | DCAN_ISET1_FE2_NO_EFFECT 0x00000000U |
| #define | DCAN_ISET1_FE2_SET 0x00000020U |
| #define | DCAN_ISET1_DMADONE0 0x00000040U |
| #define | DCAN_ISET1_DMADONE0_M 0x00000040U |
| #define | DCAN_ISET1_DMADONE0_S 6U |
| #define | DCAN_ISET1_DMADONE0_NO_EFFECT 0x00000000U |
| #define | DCAN_ISET1_DMADONE0_SET 0x00000040U |
| #define | DCAN_ISET1_DMADONE1 0x00000080U |
| #define | DCAN_ISET1_DMADONE1_M 0x00000080U |
| #define | DCAN_ISET1_DMADONE1_S 7U |
| #define | DCAN_ISET1_DMADONE1_NO_EFFECT 0x00000000U |
| #define | DCAN_ISET1_DMADONE1_SET 0x00000080U |
| #define | DCAN_ICLR1_INTL0 0x00000001U |
| #define | DCAN_ICLR1_INTL0_M 0x00000001U |
| #define | DCAN_ICLR1_INTL0_S 0U |
| #define | DCAN_ICLR1_INTL0_NO_EFFECT 0x00000000U |
| #define | DCAN_ICLR1_INTL0_CLR 0x00000001U |
| #define | DCAN_ICLR1_INTL1 0x00000002U |
| #define | DCAN_ICLR1_INTL1_M 0x00000002U |
| #define | DCAN_ICLR1_INTL1_S 1U |
| #define | DCAN_ICLR1_INTL1_NO_EFFECT 0x00000000U |
| #define | DCAN_ICLR1_INTL1_CLR 0x00000002U |
| #define | DCAN_ICLR1_SEC 0x00000004U |
| #define | DCAN_ICLR1_SEC_M 0x00000004U |
| #define | DCAN_ICLR1_SEC_S 2U |
| #define | DCAN_ICLR1_SEC_NO_EFFECT 0x00000000U |
| #define | DCAN_ICLR1_SEC_CLR 0x00000004U |
| #define | DCAN_ICLR1_DED 0x00000008U |
| #define | DCAN_ICLR1_DED_M 0x00000008U |
| #define | DCAN_ICLR1_DED_S 3U |
| #define | DCAN_ICLR1_DED_NO_EFFECT 0x00000000U |
| #define | DCAN_ICLR1_DED_CLR 0x00000008U |
| #define | DCAN_ICLR1_TSORWAKE 0x00000010U |
| #define | DCAN_ICLR1_TSORWAKE_M 0x00000010U |
| #define | DCAN_ICLR1_TSORWAKE_S 4U |
| #define | DCAN_ICLR1_TSORWAKE_NO_EFFECT 0x00000000U |
| #define | DCAN_ICLR1_TSORWAKE_CLR 0x00000010U |
| #define | DCAN_ICLR1_FE2 0x00000020U |
| #define | DCAN_ICLR1_FE2_M 0x00000020U |
| #define | DCAN_ICLR1_FE2_S 5U |
| #define | DCAN_ICLR1_FE2_NO_EFFECT 0x00000000U |
| #define | DCAN_ICLR1_FE2_CLR 0x00000020U |
| #define | DCAN_ICLR1_DMADONE0 0x00000040U |
| #define | DCAN_ICLR1_DMADONE0_M 0x00000040U |
| #define | DCAN_ICLR1_DMADONE0_S 6U |
| #define | DCAN_ICLR1_DMADONE0_NO_EFFECT 0x00000000U |
| #define | DCAN_ICLR1_DMADONE0_CLR 0x00000040U |
| #define | DCAN_ICLR1_DMADONE1 0x00000080U |
| #define | DCAN_ICLR1_DMADONE1_M 0x00000080U |
| #define | DCAN_ICLR1_DMADONE1_S 7U |
| #define | DCAN_ICLR1_DMADONE1_NO_EFFECT 0x00000000U |
| #define | DCAN_ICLR1_DMADONE1_CLR 0x00000080U |
| #define | DCAN_CLKDIV_RATIO_W 2U |
| #define | DCAN_CLKDIV_RATIO_M 0x00000003U |
| #define | DCAN_CLKDIV_RATIO_S 0U |
| #define | DCAN_CLKDIV_RATIO_DIV_BY_1_ 0x00000000U |
| #define | DCAN_CLKDIV_RATIO_DIV_BY_2_ 0x00000001U |
| #define | DCAN_CLKDIV_RATIO_DIV_BY_4_ 0x00000002U |
| #define | DCAN_CLKCTL_STOPREQ 0x00000001U |
| #define | DCAN_CLKCTL_STOPREQ_M 0x00000001U |
| #define | DCAN_CLKCTL_STOPREQ_S 0U |
| #define | DCAN_CLKCTL_STOPREQ_DISABLE 0x00000000U |
| #define | DCAN_CLKCTL_STOPREQ_ENABLE 0x00000001U |
| #define | DCAN_CLKCTL_WUINTEN 0x00000010U |
| #define | DCAN_CLKCTL_WUINTEN_M 0x00000010U |
| #define | DCAN_CLKCTL_WUINTEN_S 4U |
| #define | DCAN_CLKCTL_WUINTEN_ENABLE 0x00000010U |
| #define | DCAN_CLKCTL_WUINTEN_DISABLE 0x00000000U |
| #define | DCAN_CLKCTL_WUGLTFLTEN 0x00000100U |
| #define | DCAN_CLKCTL_WUGLTFLTEN_M 0x00000100U |
| #define | DCAN_CLKCTL_WUGLTFLTEN_S 8U |
| #define | DCAN_CLKCTL_WUGLTFLTEN_DISABLE 0x00000000U |
| #define | DCAN_CLKCTL_WUGLTFLTEN_ENABLE 0x00000100U |
| #define | DCAN_CLKSTA_STPACKSTA 0x00000001U |
| #define | DCAN_CLKSTA_STPACKSTA_M 0x00000001U |
| #define | DCAN_CLKSTA_STPACKSTA_S 0U |
| #define | DCAN_CLKSTA_STPACKSTA_RESET 0x00000000U |
| #define | DCAN_CLKSTA_STPACKSTA_SET 0x00000001U |
| #define | DCAN_CLKSTA_STPREQHWOV 0x00000010U |
| #define | DCAN_CLKSTA_STPREQHWOV_M 0x00000010U |
| #define | DCAN_CLKSTA_STPREQHWOV_S 4U |
| #define | DCAN_CLKSTA_STPREQHWOV_RESET 0x00000000U |
| #define | DCAN_CLKSTA_STPREQHWOV_SET 0x00000010U |
| #define | DCAN_DMA0CTL_TRIGEN 0x00000001U |
| #define | DCAN_DMA0CTL_TRIGEN_M 0x00000001U |
| #define | DCAN_DMA0CTL_TRIGEN_S 0U |
| #define | DCAN_DMA0CTL_TRIGEN_DISABLE 0x00000000U |
| #define | DCAN_DMA0CTL_TRIGEN_ENABLE 0x00000001U |
| #define | DCAN_DMA0CTL_TRIGSEL_W 2U |
| #define | DCAN_DMA0CTL_TRIGSEL_M 0x0000000CU |
| #define | DCAN_DMA0CTL_TRIGSEL_S 2U |
| #define | DCAN_DMA0CTL_TRIGSEL_TX_OTO_TRIG 0x00000000U |
| #define | DCAN_DMA0CTL_TRIGSEL_RX_OTO_TRIG 0x00000008U |
| #define | DCAN_DMA0CTL_TRIGSEL_TX_MTO_TRIG 0x00000004U |
| #define | DCAN_DMA0CTL_TRIGSEL_RX_TTO_TRIG 0x0000000CU |
| #define | DCAN_DMA0CTL_BRPOTOSEL_W 5U |
| #define | DCAN_DMA0CTL_BRPOTOSEL_M 0x000001F0U |
| #define | DCAN_DMA0CTL_BRPOTOSEL_S 4U |
| #define | DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_0 0x00000000U |
| #define | DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_2 0x00000020U |
| #define | DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_3 0x00000030U |
| #define | DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_4 0x00000040U |
| #define | DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_5 0x00000050U |
| #define | DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_6 0x00000060U |
| #define | DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_7 0x00000070U |
| #define | DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_8 0x00000080U |
| #define | DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_9 0x00000090U |
| #define | DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_10 0x000000A0U |
| #define | DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_11 0x000000B0U |
| #define | DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_12 0x000000C0U |
| #define | DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_13 0x000000D0U |
| #define | DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_14 0x000000E0U |
| #define | DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_15 0x000000F0U |
| #define | DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_16 0x00000100U |
| #define | DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_1 0x00000010U |
| #define | DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_17 0x00000110U |
| #define | DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_18 0x00000120U |
| #define | DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_19 0x00000130U |
| #define | DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_20 0x00000140U |
| #define | DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_21 0x00000150U |
| #define | DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_22 0x00000160U |
| #define | DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_23 0x00000170U |
| #define | DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_24 0x00000180U |
| #define | DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_25 0x00000190U |
| #define | DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_26 0x000001A0U |
| #define | DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_27 0x000001B0U |
| #define | DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_28 0x000001C0U |
| #define | DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_29 0x000001D0U |
| #define | DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_30 0x000001E0U |
| #define | DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_31 0x000001F0U |
| #define | DCAN_DMA0CTL_BRPMTOOFST_W 5U |
| #define | DCAN_DMA0CTL_BRPMTOOFST_M 0x00007C00U |
| #define | DCAN_DMA0CTL_BRPMTOOFST_S 10U |
| #define | DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_0 0x00000000U |
| #define | DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_1 0x00000400U |
| #define | DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_2 0x00000800U |
| #define | DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_3 0x00000C00U |
| #define | DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_4 0x00001000U |
| #define | DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_5 0x00001400U |
| #define | DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_6 0x00001800U |
| #define | DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_7 0x00001C00U |
| #define | DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_8 0x00002000U |
| #define | DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_9 0x00002400U |
| #define | DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_10 0x00002800U |
| #define | DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_11 0x00002C00U |
| #define | DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_12 0x00003000U |
| #define | DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_13 0x00003400U |
| #define | DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_14 0x00003800U |
| #define | DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_15 0x00003C00U |
| #define | DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_16 0x00004000U |
| #define | DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_17 0x00004400U |
| #define | DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_18 0x00004800U |
| #define | DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_19 0x00004C00U |
| #define | DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_20 0x00005000U |
| #define | DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_21 0x00005400U |
| #define | DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_22 0x00005800U |
| #define | DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_23 0x00005C00U |
| #define | DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_24 0x00006000U |
| #define | DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_25 0x00006400U |
| #define | DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_26 0x00006800U |
| #define | DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_27 0x00006C00U |
| #define | DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_28 0x00007000U |
| #define | DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_29 0x00007400U |
| #define | DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_30 0x00007800U |
| #define | DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_31 0x00007C00U |
| #define | DCAN_DMA0CTL_BRPMTONUM_W 6U |
| #define | DCAN_DMA0CTL_BRPMTONUM_M 0x003F0000U |
| #define | DCAN_DMA0CTL_BRPMTONUM_S 16U |
| #define | DCAN_DMA0CTL_BRPMTONUM_MIN 0x00020000U |
| #define | DCAN_DMA0CTL_BRPMTONUM_MAX 0x00200000U |
| #define | DCAN_DMA0CTL_FEOTOSEL 0x01000000U |
| #define | DCAN_DMA0CTL_FEOTOSEL_M 0x01000000U |
| #define | DCAN_DMA0CTL_FEOTOSEL_S 24U |
| #define | DCAN_DMA0CTL_FEOTOSEL_FE_0 0x00000000U |
| #define | DCAN_DMA0CTL_FEOTOSEL_FE_1 0x01000000U |
| #define | DCAN_DMA0CTL_BUFTTOOFST_W 5U |
| #define | DCAN_DMA0CTL_BUFTTOOFST_M 0xF8000000U |
| #define | DCAN_DMA0CTL_BUFTTOOFST_S 27U |
| #define | DCAN_DMA0CTL_BUFTTOOFST_MIN 0x00000000U |
| #define | DCAN_DMA0CTL_BUFTTOOFST_MAX 0xF0000000U |
| #define | DCAN_DMA1CTL_TRIGEN 0x00000001U |
| #define | DCAN_DMA1CTL_TRIGEN_M 0x00000001U |
| #define | DCAN_DMA1CTL_TRIGEN_S 0U |
| #define | DCAN_DMA1CTL_TRIGEN_DISABLE 0x00000000U |
| #define | DCAN_DMA1CTL_TRIGEN_ENABLE 0x00000001U |
| #define | DCAN_DMA1CTL_TRIGSEL_W 2U |
| #define | DCAN_DMA1CTL_TRIGSEL_M 0x0000000CU |
| #define | DCAN_DMA1CTL_TRIGSEL_S 2U |
| #define | DCAN_DMA1CTL_TRIGSEL_TX_OTO_TRIG 0x00000000U |
| #define | DCAN_DMA1CTL_TRIGSEL_RX_OTO_TRIG 0x00000008U |
| #define | DCAN_DMA1CTL_TRIGSEL_TX_MTO_TRIG 0x00000004U |
| #define | DCAN_DMA1CTL_TRIGSEL_RX_TTO_TRIG 0x0000000CU |
| #define | DCAN_DMA1CTL_BRPOTOSEL_W 5U |
| #define | DCAN_DMA1CTL_BRPOTOSEL_M 0x000001F0U |
| #define | DCAN_DMA1CTL_BRPOTOSEL_S 4U |
| #define | DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_0 0x00000000U |
| #define | DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_2 0x00000020U |
| #define | DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_3 0x00000030U |
| #define | DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_4 0x00000040U |
| #define | DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_5 0x00000050U |
| #define | DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_6 0x00000060U |
| #define | DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_7 0x00000070U |
| #define | DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_8 0x00000080U |
| #define | DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_9 0x00000090U |
| #define | DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_10 0x000000A0U |
| #define | DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_11 0x000000B0U |
| #define | DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_12 0x000000C0U |
| #define | DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_13 0x000000D0U |
| #define | DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_14 0x000000E0U |
| #define | DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_15 0x000000F0U |
| #define | DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_16 0x00000100U |
| #define | DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_1 0x00000010U |
| #define | DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_17 0x00000110U |
| #define | DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_18 0x00000120U |
| #define | DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_19 0x00000130U |
| #define | DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_20 0x00000140U |
| #define | DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_21 0x00000150U |
| #define | DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_22 0x00000160U |
| #define | DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_23 0x00000170U |
| #define | DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_24 0x00000180U |
| #define | DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_25 0x00000190U |
| #define | DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_26 0x000001A0U |
| #define | DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_27 0x000001B0U |
| #define | DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_28 0x000001C0U |
| #define | DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_29 0x000001D0U |
| #define | DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_30 0x000001E0U |
| #define | DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_31 0x000001F0U |
| #define | DCAN_DMA1CTL_BRPMTOOFST_W 5U |
| #define | DCAN_DMA1CTL_BRPMTOOFST_M 0x00007C00U |
| #define | DCAN_DMA1CTL_BRPMTOOFST_S 10U |
| #define | DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_0 0x00000000U |
| #define | DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_1 0x00000400U |
| #define | DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_2 0x00000800U |
| #define | DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_3 0x00000C00U |
| #define | DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_4 0x00001000U |
| #define | DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_5 0x00001400U |
| #define | DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_6 0x00001800U |
| #define | DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_7 0x00001C00U |
| #define | DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_8 0x00002000U |
| #define | DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_9 0x00002400U |
| #define | DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_10 0x00002800U |
| #define | DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_11 0x00002C00U |
| #define | DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_12 0x00003000U |
| #define | DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_13 0x00003400U |
| #define | DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_14 0x00003800U |
| #define | DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_15 0x00003C00U |
| #define | DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_16 0x00004000U |
| #define | DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_17 0x00004400U |
| #define | DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_18 0x00004800U |
| #define | DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_19 0x00004C00U |
| #define | DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_20 0x00005000U |
| #define | DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_21 0x00005400U |
| #define | DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_22 0x00005800U |
| #define | DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_23 0x00005C00U |
| #define | DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_24 0x00006000U |
| #define | DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_25 0x00006400U |
| #define | DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_26 0x00006800U |
| #define | DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_27 0x00006C00U |
| #define | DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_28 0x00007000U |
| #define | DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_29 0x00007400U |
| #define | DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_30 0x00007800U |
| #define | DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_31 0x00007C00U |
| #define | DCAN_DMA1CTL_BRPMTONUM_W 6U |
| #define | DCAN_DMA1CTL_BRPMTONUM_M 0x003F0000U |
| #define | DCAN_DMA1CTL_BRPMTONUM_S 16U |
| #define | DCAN_DMA1CTL_BRPMTONUM_MIN 0x00020000U |
| #define | DCAN_DMA1CTL_BRPMTONUM_MAX 0x00200000U |
| #define | DCAN_DMA1CTL_FEOTOSEL 0x01000000U |
| #define | DCAN_DMA1CTL_FEOTOSEL_M 0x01000000U |
| #define | DCAN_DMA1CTL_FEOTOSEL_S 24U |
| #define | DCAN_DMA1CTL_FEOTOSEL_FE_0 0x00000000U |
| #define | DCAN_DMA1CTL_FEOTOSEL_FE_1 0x01000000U |
| #define | DCAN_DMA1CTL_BUFTTOOFST_W 5U |
| #define | DCAN_DMA1CTL_BUFTTOOFST_M 0xF8000000U |
| #define | DCAN_DMA1CTL_BUFTTOOFST_S 27U |
| #define | DCAN_DMA1CTL_BUFTTOOFST_MIN 0x00000000U |
| #define | DCAN_DMA1CTL_BUFTTOOFST_MAX 0xF0000000U |
| #define | DCAN_TTOFE0_BASEADDR_W 13U |
| #define | DCAN_TTOFE0_BASEADDR_M 0x00007FFCU |
| #define | DCAN_TTOFE0_BASEADDR_S 2U |
| #define | DCAN_TTOFE0_BASEADDR_MIN 0x00000000U |
| #define | DCAN_TTOFE0_BASEADDR_MAX 0x00007FFCU |
| #define | DCAN_TTOFE1_BASEADDR_W 13U |
| #define | DCAN_TTOFE1_BASEADDR_M 0x00007FFCU |
| #define | DCAN_TTOFE1_BASEADDR_S 2U |
| #define | DCAN_TTOFE1_BASEADDR_MIN 0x00000000U |
| #define | DCAN_TTOFE1_BASEADDR_MAX 0x00007FFCU |
| #define | DCAN_TTONDAT1_NDAT1VAL_W 32U |
| #define | DCAN_TTONDAT1_NDAT1VAL_M 0xFFFFFFFFU |
| #define | DCAN_TTONDAT1_NDAT1VAL_S 0U |
| #define | DCAN_TTONDAT1_NDAT1VAL_MIN 0x00000000U |
| #define | DCAN_TTONDAT1_NDAT1VAL_MAX 0x80000000U |
| #define | DCAN_CLKCFG_CLKEN 0x00000001U |
| #define | DCAN_CLKCFG_CLKEN_M 0x00000001U |
| #define | DCAN_CLKCFG_CLKEN_S 0U |
| #define | DCAN_CLKCFG_RAMEN 0x00000010U |
| #define | DCAN_CLKCFG_RAMEN_M 0x00000010U |
| #define | DCAN_CLKCFG_RAMEN_S 4U |
| #define | DCAN_CLKCFG_CLKSEL_W 2U |
| #define | DCAN_CLKCFG_CLKSEL_M 0x00000060U |
| #define | DCAN_CLKCFG_CLKSEL_S 5U |
| #define | DCAN_CLKCFG_CLKSEL_NOCLOCK 0x00000000U |
| #define | DCAN_CLKCFG_CLKSEL_HOST_DIV2_CLK 0x00000020U |
| #define | DCAN_CLKCFG_CLKSEL_HFXT 0x00000040U |
| #define | DCAN_CLKCFG_CLKSEL_HOST_DIV2_PSWL_CLK 0x00000060U |
| #define DCAN_O_CREL 0x00000000U |
| #define DCAN_O_ENDN 0x00000004U |
| #define DCAN_O_DBTP 0x0000000CU |
| #define DCAN_O_TEST 0x00000010U |
| #define DCAN_O_RWD 0x00000014U |
| #define DCAN_O_CCCR 0x00000018U |
| #define DCAN_O_NBTP 0x0000001CU |
| #define DCAN_O_TSCC 0x00000020U |
| #define DCAN_O_TSCV 0x00000024U |
| #define DCAN_O_TOCC 0x00000028U |
| #define DCAN_O_TOCV 0x0000002CU |
| #define DCAN_O_ECR 0x00000040U |
| #define DCAN_O_PSR 0x00000044U |
| #define DCAN_O_TDCR 0x00000048U |
| #define DCAN_O_IR 0x00000050U |
| #define DCAN_O_IE 0x00000054U |
| #define DCAN_O_ILS 0x00000058U |
| #define DCAN_O_ILE 0x0000005CU |
| #define DCAN_O_GFC 0x00000080U |
| #define DCAN_O_SIDFC 0x00000084U |
| #define DCAN_O_XIDFC 0x00000088U |
| #define DCAN_O_XIDAM 0x00000090U |
| #define DCAN_O_HPMS 0x00000094U |
| #define DCAN_O_NDAT1 0x00000098U |
| #define DCAN_O_NDAT2 0x0000009CU |
| #define DCAN_O_RXF0C 0x000000A0U |
| #define DCAN_O_RXF0S 0x000000A4U |
| #define DCAN_O_RXF0A 0x000000A8U |
| #define DCAN_O_RXBC 0x000000ACU |
| #define DCAN_O_RXF1C 0x000000B0U |
| #define DCAN_O_RXF1S 0x000000B4U |
| #define DCAN_O_RXF1A 0x000000B8U |
| #define DCAN_O_RXESC 0x000000BCU |
| #define DCAN_O_TXBC 0x000000C0U |
| #define DCAN_O_TXFQS 0x000000C4U |
| #define DCAN_O_TXESC 0x000000C8U |
| #define DCAN_O_TXBRPAP 0x000000CCU |
| #define DCAN_O_TXBAR 0x000000D0U |
| #define DCAN_O_TXBCR 0x000000D4U |
| #define DCAN_O_TXBTO 0x000000D8U |
| #define DCAN_O_TXBCF 0x000000DCU |
| #define DCAN_O_TXTIE 0x000000E0U |
| #define DCAN_O_TXBCIE 0x000000E4U |
| #define DCAN_O_TXEFC 0x000000F0U |
| #define DCAN_O_TXEFS 0x000000F4U |
| #define DCAN_O_TXEFA 0x000000F8U |
| #define DCAN_O_SSPID 0x00000200U |
| #define DCAN_O_SSCTL 0x00000204U |
| #define DCAN_O_SSSTA 0x00000208U |
| #define DCAN_O_SSICS 0x0000020CU |
| #define DCAN_O_SSIRS 0x00000210U |
| #define DCAN_O_SSIECS 0x00000214U |
| #define DCAN_O_SSIE 0x00000218U |
| #define DCAN_O_SSIES 0x0000021CU |
| #define DCAN_O_SSEOI 0x00000220U |
| #define DCAN_O_EXTTSPS 0x00000224U |
| #define DCAN_O_EXTTSUSI 0x00000228U |
| #define DCAN_O_ERRREV 0x00000400U |
| #define DCAN_O_ERRVEC 0x00000408U |
| #define DCAN_O_ERRSTA 0x0000040CU |
| #define DCAN_O_ERRWRAPREV 0x00000410U |
| #define DCAN_O_ERRCTL 0x00000414U |
| #define DCAN_O_ERRCTL1 0x00000418U |
| #define DCAN_O_ERRCTL2 0x0000041CU |
| #define DCAN_O_ERRSTA1 0x00000420U |
| #define DCAN_O_ERRSTA2 0x00000424U |
| #define DCAN_O_ERRSTA3 0x00000428U |
| #define DCAN_O_SECEOI 0x0000043CU |
| #define DCAN_O_SECSTA 0x00000440U |
| #define DCAN_O_SECENSET 0x00000480U |
| #define DCAN_O_SECENCLR 0x000004C0U |
| #define DCAN_O_DEDEOI 0x0000053CU |
| #define DCAN_O_DEDSTA 0x00000540U |
| #define DCAN_O_DEDENSET 0x00000580U |
| #define DCAN_O_DEDENCLR 0x000005C0U |
| #define DCAN_O_AGGRENSET 0x00000600U |
| #define DCAN_O_AGGRENCLR 0x00000604U |
| #define DCAN_O_AGGRSTASET 0x00000608U |
| #define DCAN_O_AGGRSTACLR 0x0000060CU |
| #define DCAN_O_DESC 0x00000800U |
| #define DCAN_O_IMASK0 0x00000844U |
| #define DCAN_O_RIS0 0x00000848U |
| #define DCAN_O_MIS0 0x0000084CU |
| #define DCAN_O_ISET0 0x00000850U |
| #define DCAN_O_ICLR0 0x00000854U |
| #define DCAN_O_IMASK1 0x00000868U |
| #define DCAN_O_RIS1 0x0000086CU |
| #define DCAN_O_MIS1 0x00000870U |
| #define DCAN_O_ISET1 0x00000874U |
| #define DCAN_O_ICLR1 0x00000878U |
| #define DCAN_O_CLKDIV 0x00000904U |
| #define DCAN_O_CLKCTL 0x00000908U |
| #define DCAN_O_CLKSTA 0x0000090CU |
| #define DCAN_O_DMA0CTL 0x00000924U |
| #define DCAN_O_DMA1CTL 0x0000092CU |
| #define DCAN_O_TTOFE0 0x00000938U |
| #define DCAN_O_TTOFE1 0x00000948U |
| #define DCAN_O_TTONDAT1 0x00000950U |
| #define DCAN_O_SRAM 0x00001000U |
| #define DCAN_O_CLKCFG 0x00002000U |
| #define DCAN_CREL_DAY_W 8U |
| #define DCAN_CREL_DAY_M 0x000000FFU |
| #define DCAN_CREL_DAY_S 0U |
| #define DCAN_CREL_MON_W 8U |
| #define DCAN_CREL_MON_M 0x0000FF00U |
| #define DCAN_CREL_MON_S 8U |
| #define DCAN_CREL_YEAR_W 4U |
| #define DCAN_CREL_YEAR_M 0x000F0000U |
| #define DCAN_CREL_YEAR_S 16U |
| #define DCAN_CREL_SUBSTEP_W 4U |
| #define DCAN_CREL_SUBSTEP_M 0x00F00000U |
| #define DCAN_CREL_SUBSTEP_S 20U |
| #define DCAN_CREL_STEP_W 4U |
| #define DCAN_CREL_STEP_M 0x0F000000U |
| #define DCAN_CREL_STEP_S 24U |
| #define DCAN_CREL_REL_W 4U |
| #define DCAN_CREL_REL_M 0xF0000000U |
| #define DCAN_CREL_REL_S 28U |
| #define DCAN_ENDN_ETV_W 32U |
| #define DCAN_ENDN_ETV_M 0xFFFFFFFFU |
| #define DCAN_ENDN_ETV_S 0U |
| #define DCAN_DBTP_DSJW_W 4U |
| #define DCAN_DBTP_DSJW_M 0x0000000FU |
| #define DCAN_DBTP_DSJW_S 0U |
| #define DCAN_DBTP_DTSEG2_W 4U |
| #define DCAN_DBTP_DTSEG2_M 0x000000F0U |
| #define DCAN_DBTP_DTSEG2_S 4U |
| #define DCAN_DBTP_DTSEG1_W 5U |
| #define DCAN_DBTP_DTSEG1_M 0x00001F00U |
| #define DCAN_DBTP_DTSEG1_S 8U |
| #define DCAN_DBTP_DBRP_W 5U |
| #define DCAN_DBTP_DBRP_M 0x001F0000U |
| #define DCAN_DBTP_DBRP_S 16U |
| #define DCAN_DBTP_TDC 0x00800000U |
| #define DCAN_DBTP_TDC_M 0x00800000U |
| #define DCAN_DBTP_TDC_S 23U |
| #define DCAN_TEST_LBCK 0x00000010U |
| #define DCAN_TEST_LBCK_M 0x00000010U |
| #define DCAN_TEST_LBCK_S 4U |
| #define DCAN_TEST_TX_W 2U |
| #define DCAN_TEST_TX_M 0x00000060U |
| #define DCAN_TEST_TX_S 5U |
| #define DCAN_TEST_RX 0x00000080U |
| #define DCAN_TEST_RX_M 0x00000080U |
| #define DCAN_TEST_RX_S 7U |
| #define DCAN_RWD_WDC_W 8U |
| #define DCAN_RWD_WDC_M 0x000000FFU |
| #define DCAN_RWD_WDC_S 0U |
| #define DCAN_RWD_WDV_W 8U |
| #define DCAN_RWD_WDV_M 0x0000FF00U |
| #define DCAN_RWD_WDV_S 8U |
| #define DCAN_CCCR_INIT 0x00000001U |
| #define DCAN_CCCR_INIT_M 0x00000001U |
| #define DCAN_CCCR_INIT_S 0U |
| #define DCAN_CCCR_CCE 0x00000002U |
| #define DCAN_CCCR_CCE_M 0x00000002U |
| #define DCAN_CCCR_CCE_S 1U |
| #define DCAN_CCCR_ASM 0x00000004U |
| #define DCAN_CCCR_ASM_M 0x00000004U |
| #define DCAN_CCCR_ASM_S 2U |
| #define DCAN_CCCR_CSA 0x00000008U |
| #define DCAN_CCCR_CSA_M 0x00000008U |
| #define DCAN_CCCR_CSA_S 3U |
| #define DCAN_CCCR_CSR 0x00000010U |
| #define DCAN_CCCR_CSR_M 0x00000010U |
| #define DCAN_CCCR_CSR_S 4U |
| #define DCAN_CCCR_MON 0x00000020U |
| #define DCAN_CCCR_MON_M 0x00000020U |
| #define DCAN_CCCR_MON_S 5U |
| #define DCAN_CCCR_DAR 0x00000040U |
| #define DCAN_CCCR_DAR_M 0x00000040U |
| #define DCAN_CCCR_DAR_S 6U |
| #define DCAN_CCCR_TEST 0x00000080U |
| #define DCAN_CCCR_TEST_M 0x00000080U |
| #define DCAN_CCCR_TEST_S 7U |
| #define DCAN_CCCR_FDOE 0x00000100U |
| #define DCAN_CCCR_FDOE_M 0x00000100U |
| #define DCAN_CCCR_FDOE_S 8U |
| #define DCAN_CCCR_BRSE 0x00000200U |
| #define DCAN_CCCR_BRSE_M 0x00000200U |
| #define DCAN_CCCR_BRSE_S 9U |
| #define DCAN_CCCR_PXHD 0x00001000U |
| #define DCAN_CCCR_PXHD_M 0x00001000U |
| #define DCAN_CCCR_PXHD_S 12U |
| #define DCAN_CCCR_EFBI 0x00002000U |
| #define DCAN_CCCR_EFBI_M 0x00002000U |
| #define DCAN_CCCR_EFBI_S 13U |
| #define DCAN_CCCR_TXP 0x00004000U |
| #define DCAN_CCCR_TXP_M 0x00004000U |
| #define DCAN_CCCR_TXP_S 14U |
| #define DCAN_CCCR_NISO 0x00008000U |
| #define DCAN_CCCR_NISO_M 0x00008000U |
| #define DCAN_CCCR_NISO_S 15U |
| #define DCAN_NBTP_NTSEG2_W 7U |
| #define DCAN_NBTP_NTSEG2_M 0x0000007FU |
| #define DCAN_NBTP_NTSEG2_S 0U |
| #define DCAN_NBTP_NTSEG1_W 8U |
| #define DCAN_NBTP_NTSEG1_M 0x0000FF00U |
| #define DCAN_NBTP_NTSEG1_S 8U |
| #define DCAN_NBTP_NBRP_W 9U |
| #define DCAN_NBTP_NBRP_M 0x01FF0000U |
| #define DCAN_NBTP_NBRP_S 16U |
| #define DCAN_NBTP_NSJW_W 7U |
| #define DCAN_NBTP_NSJW_M 0xFE000000U |
| #define DCAN_NBTP_NSJW_S 25U |
| #define DCAN_TSCC_TSS_W 2U |
| #define DCAN_TSCC_TSS_M 0x00000003U |
| #define DCAN_TSCC_TSS_S 0U |
| #define DCAN_TSCC_TCP_W 4U |
| #define DCAN_TSCC_TCP_M 0x000F0000U |
| #define DCAN_TSCC_TCP_S 16U |
| #define DCAN_TSCV_TSC_W 16U |
| #define DCAN_TSCV_TSC_M 0x0000FFFFU |
| #define DCAN_TSCV_TSC_S 0U |
| #define DCAN_TOCC_ETOC 0x00000001U |
| #define DCAN_TOCC_ETOC_M 0x00000001U |
| #define DCAN_TOCC_ETOC_S 0U |
| #define DCAN_TOCC_TOS_W 2U |
| #define DCAN_TOCC_TOS_M 0x00000006U |
| #define DCAN_TOCC_TOS_S 1U |
| #define DCAN_TOCC_TOP_W 16U |
| #define DCAN_TOCC_TOP_M 0xFFFF0000U |
| #define DCAN_TOCC_TOP_S 16U |
| #define DCAN_TOCV_TOC_W 16U |
| #define DCAN_TOCV_TOC_M 0x0000FFFFU |
| #define DCAN_TOCV_TOC_S 0U |
| #define DCAN_ECR_TEC_W 8U |
| #define DCAN_ECR_TEC_M 0x000000FFU |
| #define DCAN_ECR_TEC_S 0U |
| #define DCAN_ECR_REC_W 7U |
| #define DCAN_ECR_REC_M 0x00007F00U |
| #define DCAN_ECR_REC_S 8U |
| #define DCAN_ECR_RP 0x00008000U |
| #define DCAN_ECR_RP_M 0x00008000U |
| #define DCAN_ECR_RP_S 15U |
| #define DCAN_ECR_CEL_W 8U |
| #define DCAN_ECR_CEL_M 0x00FF0000U |
| #define DCAN_ECR_CEL_S 16U |
| #define DCAN_PSR_LEC_W 3U |
| #define DCAN_PSR_LEC_M 0x00000007U |
| #define DCAN_PSR_LEC_S 0U |
| #define DCAN_PSR_ACT_W 2U |
| #define DCAN_PSR_ACT_M 0x00000018U |
| #define DCAN_PSR_ACT_S 3U |
| #define DCAN_PSR_EP 0x00000020U |
| #define DCAN_PSR_EP_M 0x00000020U |
| #define DCAN_PSR_EP_S 5U |
| #define DCAN_PSR_EW 0x00000040U |
| #define DCAN_PSR_EW_M 0x00000040U |
| #define DCAN_PSR_EW_S 6U |
| #define DCAN_PSR_BO 0x00000080U |
| #define DCAN_PSR_BO_M 0x00000080U |
| #define DCAN_PSR_BO_S 7U |
| #define DCAN_PSR_DLEC_W 3U |
| #define DCAN_PSR_DLEC_M 0x00000700U |
| #define DCAN_PSR_DLEC_S 8U |
| #define DCAN_PSR_RESI 0x00000800U |
| #define DCAN_PSR_RESI_M 0x00000800U |
| #define DCAN_PSR_RESI_S 11U |
| #define DCAN_PSR_RBRS 0x00001000U |
| #define DCAN_PSR_RBRS_M 0x00001000U |
| #define DCAN_PSR_RBRS_S 12U |
| #define DCAN_PSR_RFDF 0x00002000U |
| #define DCAN_PSR_RFDF_M 0x00002000U |
| #define DCAN_PSR_RFDF_S 13U |
| #define DCAN_PSR_PXE 0x00004000U |
| #define DCAN_PSR_PXE_M 0x00004000U |
| #define DCAN_PSR_PXE_S 14U |
| #define DCAN_PSR_TDCV_W 7U |
| #define DCAN_PSR_TDCV_M 0x007F0000U |
| #define DCAN_PSR_TDCV_S 16U |
| #define DCAN_TDCR_TDCF_W 7U |
| #define DCAN_TDCR_TDCF_M 0x0000007FU |
| #define DCAN_TDCR_TDCF_S 0U |
| #define DCAN_TDCR_TDCO_W 7U |
| #define DCAN_TDCR_TDCO_M 0x00007F00U |
| #define DCAN_TDCR_TDCO_S 8U |
| #define DCAN_IR_RF0N 0x00000001U |
| #define DCAN_IR_RF0N_M 0x00000001U |
| #define DCAN_IR_RF0N_S 0U |
| #define DCAN_IR_RF0W 0x00000002U |
| #define DCAN_IR_RF0W_M 0x00000002U |
| #define DCAN_IR_RF0W_S 1U |
| #define DCAN_IR_RF0F 0x00000004U |
| #define DCAN_IR_RF0F_M 0x00000004U |
| #define DCAN_IR_RF0F_S 2U |
| #define DCAN_IR_RF0L 0x00000008U |
| #define DCAN_IR_RF0L_M 0x00000008U |
| #define DCAN_IR_RF0L_S 3U |
| #define DCAN_IR_RF1N 0x00000010U |
| #define DCAN_IR_RF1N_M 0x00000010U |
| #define DCAN_IR_RF1N_S 4U |
| #define DCAN_IR_RF1W 0x00000020U |
| #define DCAN_IR_RF1W_M 0x00000020U |
| #define DCAN_IR_RF1W_S 5U |
| #define DCAN_IR_RF1F 0x00000040U |
| #define DCAN_IR_RF1F_M 0x00000040U |
| #define DCAN_IR_RF1F_S 6U |
| #define DCAN_IR_RF1L 0x00000080U |
| #define DCAN_IR_RF1L_M 0x00000080U |
| #define DCAN_IR_RF1L_S 7U |
| #define DCAN_IR_HPM 0x00000100U |
| #define DCAN_IR_HPM_M 0x00000100U |
| #define DCAN_IR_HPM_S 8U |
| #define DCAN_IR_TC 0x00000200U |
| #define DCAN_IR_TC_M 0x00000200U |
| #define DCAN_IR_TC_S 9U |
| #define DCAN_IR_TCF 0x00000400U |
| #define DCAN_IR_TCF_M 0x00000400U |
| #define DCAN_IR_TCF_S 10U |
| #define DCAN_IR_TFE 0x00000800U |
| #define DCAN_IR_TFE_M 0x00000800U |
| #define DCAN_IR_TFE_S 11U |
| #define DCAN_IR_TEFN 0x00001000U |
| #define DCAN_IR_TEFN_M 0x00001000U |
| #define DCAN_IR_TEFN_S 12U |
| #define DCAN_IR_TEFW 0x00002000U |
| #define DCAN_IR_TEFW_M 0x00002000U |
| #define DCAN_IR_TEFW_S 13U |
| #define DCAN_IR_TEFF 0x00004000U |
| #define DCAN_IR_TEFF_M 0x00004000U |
| #define DCAN_IR_TEFF_S 14U |
| #define DCAN_IR_TEFL 0x00008000U |
| #define DCAN_IR_TEFL_M 0x00008000U |
| #define DCAN_IR_TEFL_S 15U |
| #define DCAN_IR_TSW 0x00010000U |
| #define DCAN_IR_TSW_M 0x00010000U |
| #define DCAN_IR_TSW_S 16U |
| #define DCAN_IR_MRAF 0x00020000U |
| #define DCAN_IR_MRAF_M 0x00020000U |
| #define DCAN_IR_MRAF_S 17U |
| #define DCAN_IR_TOO 0x00040000U |
| #define DCAN_IR_TOO_M 0x00040000U |
| #define DCAN_IR_TOO_S 18U |
| #define DCAN_IR_DRX 0x00080000U |
| #define DCAN_IR_DRX_M 0x00080000U |
| #define DCAN_IR_DRX_S 19U |
| #define DCAN_IR_BEU 0x00200000U |
| #define DCAN_IR_BEU_M 0x00200000U |
| #define DCAN_IR_BEU_S 21U |
| #define DCAN_IR_ELO 0x00400000U |
| #define DCAN_IR_ELO_M 0x00400000U |
| #define DCAN_IR_ELO_S 22U |
| #define DCAN_IR_EP 0x00800000U |
| #define DCAN_IR_EP_M 0x00800000U |
| #define DCAN_IR_EP_S 23U |
| #define DCAN_IR_EW 0x01000000U |
| #define DCAN_IR_EW_M 0x01000000U |
| #define DCAN_IR_EW_S 24U |
| #define DCAN_IR_BO 0x02000000U |
| #define DCAN_IR_BO_M 0x02000000U |
| #define DCAN_IR_BO_S 25U |
| #define DCAN_IR_WDI 0x04000000U |
| #define DCAN_IR_WDI_M 0x04000000U |
| #define DCAN_IR_WDI_S 26U |
| #define DCAN_IR_PEA 0x08000000U |
| #define DCAN_IR_PEA_M 0x08000000U |
| #define DCAN_IR_PEA_S 27U |
| #define DCAN_IR_PED 0x10000000U |
| #define DCAN_IR_PED_M 0x10000000U |
| #define DCAN_IR_PED_S 28U |
| #define DCAN_IR_ARA 0x20000000U |
| #define DCAN_IR_ARA_M 0x20000000U |
| #define DCAN_IR_ARA_S 29U |
| #define DCAN_IE_RF0NE 0x00000001U |
| #define DCAN_IE_RF0NE_M 0x00000001U |
| #define DCAN_IE_RF0NE_S 0U |
| #define DCAN_IE_RF0WE 0x00000002U |
| #define DCAN_IE_RF0WE_M 0x00000002U |
| #define DCAN_IE_RF0WE_S 1U |
| #define DCAN_IE_RF0FE 0x00000004U |
| #define DCAN_IE_RF0FE_M 0x00000004U |
| #define DCAN_IE_RF0FE_S 2U |
| #define DCAN_IE_RF0LE 0x00000008U |
| #define DCAN_IE_RF0LE_M 0x00000008U |
| #define DCAN_IE_RF0LE_S 3U |
| #define DCAN_IE_RF1NE 0x00000010U |
| #define DCAN_IE_RF1NE_M 0x00000010U |
| #define DCAN_IE_RF1NE_S 4U |
| #define DCAN_IE_RF1WE 0x00000020U |
| #define DCAN_IE_RF1WE_M 0x00000020U |
| #define DCAN_IE_RF1WE_S 5U |
| #define DCAN_IE_RF1FE 0x00000040U |
| #define DCAN_IE_RF1FE_M 0x00000040U |
| #define DCAN_IE_RF1FE_S 6U |
| #define DCAN_IE_RF1LE 0x00000080U |
| #define DCAN_IE_RF1LE_M 0x00000080U |
| #define DCAN_IE_RF1LE_S 7U |
| #define DCAN_IE_HPME 0x00000100U |
| #define DCAN_IE_HPME_M 0x00000100U |
| #define DCAN_IE_HPME_S 8U |
| #define DCAN_IE_TCE 0x00000200U |
| #define DCAN_IE_TCE_M 0x00000200U |
| #define DCAN_IE_TCE_S 9U |
| #define DCAN_IE_TCFE 0x00000400U |
| #define DCAN_IE_TCFE_M 0x00000400U |
| #define DCAN_IE_TCFE_S 10U |
| #define DCAN_IE_TFEE 0x00000800U |
| #define DCAN_IE_TFEE_M 0x00000800U |
| #define DCAN_IE_TFEE_S 11U |
| #define DCAN_IE_TEFNE 0x00001000U |
| #define DCAN_IE_TEFNE_M 0x00001000U |
| #define DCAN_IE_TEFNE_S 12U |
| #define DCAN_IE_TEFWE 0x00002000U |
| #define DCAN_IE_TEFWE_M 0x00002000U |
| #define DCAN_IE_TEFWE_S 13U |
| #define DCAN_IE_TEFFE 0x00004000U |
| #define DCAN_IE_TEFFE_M 0x00004000U |
| #define DCAN_IE_TEFFE_S 14U |
| #define DCAN_IE_TEFLE 0x00008000U |
| #define DCAN_IE_TEFLE_M 0x00008000U |
| #define DCAN_IE_TEFLE_S 15U |
| #define DCAN_IE_TSWE 0x00010000U |
| #define DCAN_IE_TSWE_M 0x00010000U |
| #define DCAN_IE_TSWE_S 16U |
| #define DCAN_IE_MRAFE 0x00020000U |
| #define DCAN_IE_MRAFE_M 0x00020000U |
| #define DCAN_IE_MRAFE_S 17U |
| #define DCAN_IE_TOOE 0x00040000U |
| #define DCAN_IE_TOOE_M 0x00040000U |
| #define DCAN_IE_TOOE_S 18U |
| #define DCAN_IE_DRXE 0x00080000U |
| #define DCAN_IE_DRXE_M 0x00080000U |
| #define DCAN_IE_DRXE_S 19U |
| #define DCAN_IE_BEUE 0x00200000U |
| #define DCAN_IE_BEUE_M 0x00200000U |
| #define DCAN_IE_BEUE_S 21U |
| #define DCAN_IE_ELOE 0x00400000U |
| #define DCAN_IE_ELOE_M 0x00400000U |
| #define DCAN_IE_ELOE_S 22U |
| #define DCAN_IE_EPE 0x00800000U |
| #define DCAN_IE_EPE_M 0x00800000U |
| #define DCAN_IE_EPE_S 23U |
| #define DCAN_IE_EWE 0x01000000U |
| #define DCAN_IE_EWE_M 0x01000000U |
| #define DCAN_IE_EWE_S 24U |
| #define DCAN_IE_BOE 0x02000000U |
| #define DCAN_IE_BOE_M 0x02000000U |
| #define DCAN_IE_BOE_S 25U |
| #define DCAN_IE_WDIE 0x04000000U |
| #define DCAN_IE_WDIE_M 0x04000000U |
| #define DCAN_IE_WDIE_S 26U |
| #define DCAN_IE_PEAE 0x08000000U |
| #define DCAN_IE_PEAE_M 0x08000000U |
| #define DCAN_IE_PEAE_S 27U |
| #define DCAN_IE_PEDE 0x10000000U |
| #define DCAN_IE_PEDE_M 0x10000000U |
| #define DCAN_IE_PEDE_S 28U |
| #define DCAN_IE_ARAE 0x20000000U |
| #define DCAN_IE_ARAE_M 0x20000000U |
| #define DCAN_IE_ARAE_S 29U |
| #define DCAN_ILS_RF0NL 0x00000001U |
| #define DCAN_ILS_RF0NL_M 0x00000001U |
| #define DCAN_ILS_RF0NL_S 0U |
| #define DCAN_ILS_RF0WL 0x00000002U |
| #define DCAN_ILS_RF0WL_M 0x00000002U |
| #define DCAN_ILS_RF0WL_S 1U |
| #define DCAN_ILS_RF0FL 0x00000004U |
| #define DCAN_ILS_RF0FL_M 0x00000004U |
| #define DCAN_ILS_RF0FL_S 2U |
| #define DCAN_ILS_RF0LL 0x00000008U |
| #define DCAN_ILS_RF0LL_M 0x00000008U |
| #define DCAN_ILS_RF0LL_S 3U |
| #define DCAN_ILS_RF1NL 0x00000010U |
| #define DCAN_ILS_RF1NL_M 0x00000010U |
| #define DCAN_ILS_RF1NL_S 4U |
| #define DCAN_ILS_RF1WL 0x00000020U |
| #define DCAN_ILS_RF1WL_M 0x00000020U |
| #define DCAN_ILS_RF1WL_S 5U |
| #define DCAN_ILS_RF1FL 0x00000040U |
| #define DCAN_ILS_RF1FL_M 0x00000040U |
| #define DCAN_ILS_RF1FL_S 6U |
| #define DCAN_ILS_RF1LL 0x00000080U |
| #define DCAN_ILS_RF1LL_M 0x00000080U |
| #define DCAN_ILS_RF1LL_S 7U |
| #define DCAN_ILS_HPML 0x00000100U |
| #define DCAN_ILS_HPML_M 0x00000100U |
| #define DCAN_ILS_HPML_S 8U |
| #define DCAN_ILS_TCL 0x00000200U |
| #define DCAN_ILS_TCL_M 0x00000200U |
| #define DCAN_ILS_TCL_S 9U |
| #define DCAN_ILS_TCFL 0x00000400U |
| #define DCAN_ILS_TCFL_M 0x00000400U |
| #define DCAN_ILS_TCFL_S 10U |
| #define DCAN_ILS_TFEL 0x00000800U |
| #define DCAN_ILS_TFEL_M 0x00000800U |
| #define DCAN_ILS_TFEL_S 11U |
| #define DCAN_ILS_TEFNL 0x00001000U |
| #define DCAN_ILS_TEFNL_M 0x00001000U |
| #define DCAN_ILS_TEFNL_S 12U |
| #define DCAN_ILS_TEFWL 0x00002000U |
| #define DCAN_ILS_TEFWL_M 0x00002000U |
| #define DCAN_ILS_TEFWL_S 13U |
| #define DCAN_ILS_TEFFL 0x00004000U |
| #define DCAN_ILS_TEFFL_M 0x00004000U |
| #define DCAN_ILS_TEFFL_S 14U |
| #define DCAN_ILS_TEFLL 0x00008000U |
| #define DCAN_ILS_TEFLL_M 0x00008000U |
| #define DCAN_ILS_TEFLL_S 15U |
| #define DCAN_ILS_TSWL 0x00010000U |
| #define DCAN_ILS_TSWL_M 0x00010000U |
| #define DCAN_ILS_TSWL_S 16U |
| #define DCAN_ILS_MRAFL 0x00020000U |
| #define DCAN_ILS_MRAFL_M 0x00020000U |
| #define DCAN_ILS_MRAFL_S 17U |
| #define DCAN_ILS_TOOL 0x00040000U |
| #define DCAN_ILS_TOOL_M 0x00040000U |
| #define DCAN_ILS_TOOL_S 18U |
| #define DCAN_ILS_DRXL 0x00080000U |
| #define DCAN_ILS_DRXL_M 0x00080000U |
| #define DCAN_ILS_DRXL_S 19U |
| #define DCAN_ILS_BECL 0x00100000U |
| #define DCAN_ILS_BECL_M 0x00100000U |
| #define DCAN_ILS_BECL_S 20U |
| #define DCAN_ILS_BEUL 0x00200000U |
| #define DCAN_ILS_BEUL_M 0x00200000U |
| #define DCAN_ILS_BEUL_S 21U |
| #define DCAN_ILS_ELOL 0x00400000U |
| #define DCAN_ILS_ELOL_M 0x00400000U |
| #define DCAN_ILS_ELOL_S 22U |
| #define DCAN_ILS_EPL 0x00800000U |
| #define DCAN_ILS_EPL_M 0x00800000U |
| #define DCAN_ILS_EPL_S 23U |
| #define DCAN_ILS_EWL 0x01000000U |
| #define DCAN_ILS_EWL_M 0x01000000U |
| #define DCAN_ILS_EWL_S 24U |
| #define DCAN_ILS_BOL 0x02000000U |
| #define DCAN_ILS_BOL_M 0x02000000U |
| #define DCAN_ILS_BOL_S 25U |
| #define DCAN_ILS_WDIL 0x04000000U |
| #define DCAN_ILS_WDIL_M 0x04000000U |
| #define DCAN_ILS_WDIL_S 26U |
| #define DCAN_ILS_PEAL 0x08000000U |
| #define DCAN_ILS_PEAL_M 0x08000000U |
| #define DCAN_ILS_PEAL_S 27U |
| #define DCAN_ILS_PEDL 0x10000000U |
| #define DCAN_ILS_PEDL_M 0x10000000U |
| #define DCAN_ILS_PEDL_S 28U |
| #define DCAN_ILS_ARAL 0x20000000U |
| #define DCAN_ILS_ARAL_M 0x20000000U |
| #define DCAN_ILS_ARAL_S 29U |
| #define DCAN_ILE_EINT0 0x00000001U |
| #define DCAN_ILE_EINT0_M 0x00000001U |
| #define DCAN_ILE_EINT0_S 0U |
| #define DCAN_ILE_EINT1 0x00000002U |
| #define DCAN_ILE_EINT1_M 0x00000002U |
| #define DCAN_ILE_EINT1_S 1U |
| #define DCAN_GFC_RRFE 0x00000001U |
| #define DCAN_GFC_RRFE_M 0x00000001U |
| #define DCAN_GFC_RRFE_S 0U |
| #define DCAN_GFC_RRFS 0x00000002U |
| #define DCAN_GFC_RRFS_M 0x00000002U |
| #define DCAN_GFC_RRFS_S 1U |
| #define DCAN_GFC_ANFE_W 2U |
| #define DCAN_GFC_ANFE_M 0x0000000CU |
| #define DCAN_GFC_ANFE_S 2U |
| #define DCAN_GFC_ANFS_W 2U |
| #define DCAN_GFC_ANFS_M 0x00000030U |
| #define DCAN_GFC_ANFS_S 4U |
| #define DCAN_SIDFC_FLSSA_W 14U |
| #define DCAN_SIDFC_FLSSA_M 0x0000FFFCU |
| #define DCAN_SIDFC_FLSSA_S 2U |
| #define DCAN_SIDFC_LSS_W 8U |
| #define DCAN_SIDFC_LSS_M 0x00FF0000U |
| #define DCAN_SIDFC_LSS_S 16U |
| #define DCAN_XIDFC_FLESA_W 14U |
| #define DCAN_XIDFC_FLESA_M 0x0000FFFCU |
| #define DCAN_XIDFC_FLESA_S 2U |
| #define DCAN_XIDFC_LSE_W 7U |
| #define DCAN_XIDFC_LSE_M 0x007F0000U |
| #define DCAN_XIDFC_LSE_S 16U |
| #define DCAN_XIDAM_EIDM_W 29U |
| #define DCAN_XIDAM_EIDM_M 0x1FFFFFFFU |
| #define DCAN_XIDAM_EIDM_S 0U |
| #define DCAN_HPMS_BIDX_W 6U |
| #define DCAN_HPMS_BIDX_M 0x0000003FU |
| #define DCAN_HPMS_BIDX_S 0U |
| #define DCAN_HPMS_MSI_W 2U |
| #define DCAN_HPMS_MSI_M 0x000000C0U |
| #define DCAN_HPMS_MSI_S 6U |
| #define DCAN_HPMS_FIDX_W 7U |
| #define DCAN_HPMS_FIDX_M 0x00007F00U |
| #define DCAN_HPMS_FIDX_S 8U |
| #define DCAN_HPMS_FLST 0x00008000U |
| #define DCAN_HPMS_FLST_M 0x00008000U |
| #define DCAN_HPMS_FLST_S 15U |
| #define DCAN_NDAT1_ND0 0x00000001U |
| #define DCAN_NDAT1_ND0_M 0x00000001U |
| #define DCAN_NDAT1_ND0_S 0U |
| #define DCAN_NDAT1_ND1 0x00000002U |
| #define DCAN_NDAT1_ND1_M 0x00000002U |
| #define DCAN_NDAT1_ND1_S 1U |
| #define DCAN_NDAT1_ND2 0x00000004U |
| #define DCAN_NDAT1_ND2_M 0x00000004U |
| #define DCAN_NDAT1_ND2_S 2U |
| #define DCAN_NDAT1_ND3 0x00000008U |
| #define DCAN_NDAT1_ND3_M 0x00000008U |
| #define DCAN_NDAT1_ND3_S 3U |
| #define DCAN_NDAT1_ND4 0x00000010U |
| #define DCAN_NDAT1_ND4_M 0x00000010U |
| #define DCAN_NDAT1_ND4_S 4U |
| #define DCAN_NDAT1_ND5 0x00000020U |
| #define DCAN_NDAT1_ND5_M 0x00000020U |
| #define DCAN_NDAT1_ND5_S 5U |
| #define DCAN_NDAT1_ND6 0x00000040U |
| #define DCAN_NDAT1_ND6_M 0x00000040U |
| #define DCAN_NDAT1_ND6_S 6U |
| #define DCAN_NDAT1_ND7 0x00000080U |
| #define DCAN_NDAT1_ND7_M 0x00000080U |
| #define DCAN_NDAT1_ND7_S 7U |
| #define DCAN_NDAT1_ND8 0x00000100U |
| #define DCAN_NDAT1_ND8_M 0x00000100U |
| #define DCAN_NDAT1_ND8_S 8U |
| #define DCAN_NDAT1_ND9 0x00000200U |
| #define DCAN_NDAT1_ND9_M 0x00000200U |
| #define DCAN_NDAT1_ND9_S 9U |
| #define DCAN_NDAT1_ND10 0x00000400U |
| #define DCAN_NDAT1_ND10_M 0x00000400U |
| #define DCAN_NDAT1_ND10_S 10U |
| #define DCAN_NDAT1_ND11 0x00000800U |
| #define DCAN_NDAT1_ND11_M 0x00000800U |
| #define DCAN_NDAT1_ND11_S 11U |
| #define DCAN_NDAT1_ND12 0x00001000U |
| #define DCAN_NDAT1_ND12_M 0x00001000U |
| #define DCAN_NDAT1_ND12_S 12U |
| #define DCAN_NDAT1_ND13 0x00002000U |
| #define DCAN_NDAT1_ND13_M 0x00002000U |
| #define DCAN_NDAT1_ND13_S 13U |
| #define DCAN_NDAT1_ND14 0x00004000U |
| #define DCAN_NDAT1_ND14_M 0x00004000U |
| #define DCAN_NDAT1_ND14_S 14U |
| #define DCAN_NDAT1_ND15 0x00008000U |
| #define DCAN_NDAT1_ND15_M 0x00008000U |
| #define DCAN_NDAT1_ND15_S 15U |
| #define DCAN_NDAT1_ND16 0x00010000U |
| #define DCAN_NDAT1_ND16_M 0x00010000U |
| #define DCAN_NDAT1_ND16_S 16U |
| #define DCAN_NDAT1_ND17 0x00020000U |
| #define DCAN_NDAT1_ND17_M 0x00020000U |
| #define DCAN_NDAT1_ND17_S 17U |
| #define DCAN_NDAT1_ND18 0x00040000U |
| #define DCAN_NDAT1_ND18_M 0x00040000U |
| #define DCAN_NDAT1_ND18_S 18U |
| #define DCAN_NDAT1_ND19 0x00080000U |
| #define DCAN_NDAT1_ND19_M 0x00080000U |
| #define DCAN_NDAT1_ND19_S 19U |
| #define DCAN_NDAT1_ND20 0x00100000U |
| #define DCAN_NDAT1_ND20_M 0x00100000U |
| #define DCAN_NDAT1_ND20_S 20U |
| #define DCAN_NDAT1_ND21 0x00200000U |
| #define DCAN_NDAT1_ND21_M 0x00200000U |
| #define DCAN_NDAT1_ND21_S 21U |
| #define DCAN_NDAT1_ND22 0x00400000U |
| #define DCAN_NDAT1_ND22_M 0x00400000U |
| #define DCAN_NDAT1_ND22_S 22U |
| #define DCAN_NDAT1_ND23 0x00800000U |
| #define DCAN_NDAT1_ND23_M 0x00800000U |
| #define DCAN_NDAT1_ND23_S 23U |
| #define DCAN_NDAT1_ND24 0x01000000U |
| #define DCAN_NDAT1_ND24_M 0x01000000U |
| #define DCAN_NDAT1_ND24_S 24U |
| #define DCAN_NDAT1_ND25 0x02000000U |
| #define DCAN_NDAT1_ND25_M 0x02000000U |
| #define DCAN_NDAT1_ND25_S 25U |
| #define DCAN_NDAT1_ND26 0x04000000U |
| #define DCAN_NDAT1_ND26_M 0x04000000U |
| #define DCAN_NDAT1_ND26_S 26U |
| #define DCAN_NDAT1_ND27 0x08000000U |
| #define DCAN_NDAT1_ND27_M 0x08000000U |
| #define DCAN_NDAT1_ND27_S 27U |
| #define DCAN_NDAT1_ND28 0x10000000U |
| #define DCAN_NDAT1_ND28_M 0x10000000U |
| #define DCAN_NDAT1_ND28_S 28U |
| #define DCAN_NDAT1_ND29 0x20000000U |
| #define DCAN_NDAT1_ND29_M 0x20000000U |
| #define DCAN_NDAT1_ND29_S 29U |
| #define DCAN_NDAT1_ND30 0x40000000U |
| #define DCAN_NDAT1_ND30_M 0x40000000U |
| #define DCAN_NDAT1_ND30_S 30U |
| #define DCAN_NDAT1_ND31 0x80000000U |
| #define DCAN_NDAT1_ND31_M 0x80000000U |
| #define DCAN_NDAT1_ND31_S 31U |
| #define DCAN_NDAT2_ND32 0x00000001U |
| #define DCAN_NDAT2_ND32_M 0x00000001U |
| #define DCAN_NDAT2_ND32_S 0U |
| #define DCAN_NDAT2_ND33 0x00000002U |
| #define DCAN_NDAT2_ND33_M 0x00000002U |
| #define DCAN_NDAT2_ND33_S 1U |
| #define DCAN_NDAT2_ND34 0x00000004U |
| #define DCAN_NDAT2_ND34_M 0x00000004U |
| #define DCAN_NDAT2_ND34_S 2U |
| #define DCAN_NDAT2_ND35 0x00000008U |
| #define DCAN_NDAT2_ND35_M 0x00000008U |
| #define DCAN_NDAT2_ND35_S 3U |
| #define DCAN_NDAT2_ND36 0x00000010U |
| #define DCAN_NDAT2_ND36_M 0x00000010U |
| #define DCAN_NDAT2_ND36_S 4U |
| #define DCAN_NDAT2_ND37 0x00000020U |
| #define DCAN_NDAT2_ND37_M 0x00000020U |
| #define DCAN_NDAT2_ND37_S 5U |
| #define DCAN_NDAT2_ND38 0x00000040U |
| #define DCAN_NDAT2_ND38_M 0x00000040U |
| #define DCAN_NDAT2_ND38_S 6U |
| #define DCAN_NDAT2_ND39 0x00000080U |
| #define DCAN_NDAT2_ND39_M 0x00000080U |
| #define DCAN_NDAT2_ND39_S 7U |
| #define DCAN_NDAT2_ND40 0x00000100U |
| #define DCAN_NDAT2_ND40_M 0x00000100U |
| #define DCAN_NDAT2_ND40_S 8U |
| #define DCAN_NDAT2_ND41 0x00000200U |
| #define DCAN_NDAT2_ND41_M 0x00000200U |
| #define DCAN_NDAT2_ND41_S 9U |
| #define DCAN_NDAT2_ND42 0x00000400U |
| #define DCAN_NDAT2_ND42_M 0x00000400U |
| #define DCAN_NDAT2_ND42_S 10U |
| #define DCAN_NDAT2_ND43 0x00000800U |
| #define DCAN_NDAT2_ND43_M 0x00000800U |
| #define DCAN_NDAT2_ND43_S 11U |
| #define DCAN_NDAT2_ND44 0x00001000U |
| #define DCAN_NDAT2_ND44_M 0x00001000U |
| #define DCAN_NDAT2_ND44_S 12U |
| #define DCAN_NDAT2_ND45 0x00002000U |
| #define DCAN_NDAT2_ND45_M 0x00002000U |
| #define DCAN_NDAT2_ND45_S 13U |
| #define DCAN_NDAT2_ND46 0x00004000U |
| #define DCAN_NDAT2_ND46_M 0x00004000U |
| #define DCAN_NDAT2_ND46_S 14U |
| #define DCAN_NDAT2_ND47 0x00008000U |
| #define DCAN_NDAT2_ND47_M 0x00008000U |
| #define DCAN_NDAT2_ND47_S 15U |
| #define DCAN_NDAT2_ND48 0x00010000U |
| #define DCAN_NDAT2_ND48_M 0x00010000U |
| #define DCAN_NDAT2_ND48_S 16U |
| #define DCAN_NDAT2_ND49 0x00020000U |
| #define DCAN_NDAT2_ND49_M 0x00020000U |
| #define DCAN_NDAT2_ND49_S 17U |
| #define DCAN_NDAT2_ND50 0x00040000U |
| #define DCAN_NDAT2_ND50_M 0x00040000U |
| #define DCAN_NDAT2_ND50_S 18U |
| #define DCAN_NDAT2_ND51 0x00080000U |
| #define DCAN_NDAT2_ND51_M 0x00080000U |
| #define DCAN_NDAT2_ND51_S 19U |
| #define DCAN_NDAT2_ND52 0x00100000U |
| #define DCAN_NDAT2_ND52_M 0x00100000U |
| #define DCAN_NDAT2_ND52_S 20U |
| #define DCAN_NDAT2_ND53 0x00200000U |
| #define DCAN_NDAT2_ND53_M 0x00200000U |
| #define DCAN_NDAT2_ND53_S 21U |
| #define DCAN_NDAT2_ND54 0x00400000U |
| #define DCAN_NDAT2_ND54_M 0x00400000U |
| #define DCAN_NDAT2_ND54_S 22U |
| #define DCAN_NDAT2_ND55 0x00800000U |
| #define DCAN_NDAT2_ND55_M 0x00800000U |
| #define DCAN_NDAT2_ND55_S 23U |
| #define DCAN_NDAT2_ND56 0x01000000U |
| #define DCAN_NDAT2_ND56_M 0x01000000U |
| #define DCAN_NDAT2_ND56_S 24U |
| #define DCAN_NDAT2_ND57 0x02000000U |
| #define DCAN_NDAT2_ND57_M 0x02000000U |
| #define DCAN_NDAT2_ND57_S 25U |
| #define DCAN_NDAT2_ND58 0x04000000U |
| #define DCAN_NDAT2_ND58_M 0x04000000U |
| #define DCAN_NDAT2_ND58_S 26U |
| #define DCAN_NDAT2_ND59 0x08000000U |
| #define DCAN_NDAT2_ND59_M 0x08000000U |
| #define DCAN_NDAT2_ND59_S 27U |
| #define DCAN_NDAT2_ND60 0x10000000U |
| #define DCAN_NDAT2_ND60_M 0x10000000U |
| #define DCAN_NDAT2_ND60_S 28U |
| #define DCAN_NDAT2_ND61 0x20000000U |
| #define DCAN_NDAT2_ND61_M 0x20000000U |
| #define DCAN_NDAT2_ND61_S 29U |
| #define DCAN_NDAT2_ND62 0x40000000U |
| #define DCAN_NDAT2_ND62_M 0x40000000U |
| #define DCAN_NDAT2_ND62_S 30U |
| #define DCAN_NDAT2_ND63 0x80000000U |
| #define DCAN_NDAT2_ND63_M 0x80000000U |
| #define DCAN_NDAT2_ND63_S 31U |
| #define DCAN_RXF0C_F0SA_W 14U |
| #define DCAN_RXF0C_F0SA_M 0x0000FFFCU |
| #define DCAN_RXF0C_F0SA_S 2U |
| #define DCAN_RXF0C_F0S_W 7U |
| #define DCAN_RXF0C_F0S_M 0x007F0000U |
| #define DCAN_RXF0C_F0S_S 16U |
| #define DCAN_RXF0C_F0WM_W 7U |
| #define DCAN_RXF0C_F0WM_M 0x7F000000U |
| #define DCAN_RXF0C_F0WM_S 24U |
| #define DCAN_RXF0C_F0OM 0x80000000U |
| #define DCAN_RXF0C_F0OM_M 0x80000000U |
| #define DCAN_RXF0C_F0OM_S 31U |
| #define DCAN_RXF0S_F0FL_W 7U |
| #define DCAN_RXF0S_F0FL_M 0x0000007FU |
| #define DCAN_RXF0S_F0FL_S 0U |
| #define DCAN_RXF0S_F0GI_W 6U |
| #define DCAN_RXF0S_F0GI_M 0x00003F00U |
| #define DCAN_RXF0S_F0GI_S 8U |
| #define DCAN_RXF0S_F0PI_W 6U |
| #define DCAN_RXF0S_F0PI_M 0x003F0000U |
| #define DCAN_RXF0S_F0PI_S 16U |
| #define DCAN_RXF0S_F0F 0x01000000U |
| #define DCAN_RXF0S_F0F_M 0x01000000U |
| #define DCAN_RXF0S_F0F_S 24U |
| #define DCAN_RXF0S_RF0L 0x02000000U |
| #define DCAN_RXF0S_RF0L_M 0x02000000U |
| #define DCAN_RXF0S_RF0L_S 25U |
| #define DCAN_RXF0A_F0AI_W 6U |
| #define DCAN_RXF0A_F0AI_M 0x0000003FU |
| #define DCAN_RXF0A_F0AI_S 0U |
| #define DCAN_RXBC_RBSA_W 14U |
| #define DCAN_RXBC_RBSA_M 0x0000FFFCU |
| #define DCAN_RXBC_RBSA_S 2U |
| #define DCAN_RXF1C_F1SA_W 14U |
| #define DCAN_RXF1C_F1SA_M 0x0000FFFCU |
| #define DCAN_RXF1C_F1SA_S 2U |
| #define DCAN_RXF1C_F1S_W 7U |
| #define DCAN_RXF1C_F1S_M 0x007F0000U |
| #define DCAN_RXF1C_F1S_S 16U |
| #define DCAN_RXF1C_F1WM_W 7U |
| #define DCAN_RXF1C_F1WM_M 0x7F000000U |
| #define DCAN_RXF1C_F1WM_S 24U |
| #define DCAN_RXF1C_F1OM 0x80000000U |
| #define DCAN_RXF1C_F1OM_M 0x80000000U |
| #define DCAN_RXF1C_F1OM_S 31U |
| #define DCAN_RXF1S_F1FL_W 7U |
| #define DCAN_RXF1S_F1FL_M 0x0000007FU |
| #define DCAN_RXF1S_F1FL_S 0U |
| #define DCAN_RXF1S_F1GI_W 6U |
| #define DCAN_RXF1S_F1GI_M 0x00003F00U |
| #define DCAN_RXF1S_F1GI_S 8U |
| #define DCAN_RXF1S_F1PI_W 6U |
| #define DCAN_RXF1S_F1PI_M 0x003F0000U |
| #define DCAN_RXF1S_F1PI_S 16U |
| #define DCAN_RXF1S_F1F 0x01000000U |
| #define DCAN_RXF1S_F1F_M 0x01000000U |
| #define DCAN_RXF1S_F1F_S 24U |
| #define DCAN_RXF1S_RF1L 0x02000000U |
| #define DCAN_RXF1S_RF1L_M 0x02000000U |
| #define DCAN_RXF1S_RF1L_S 25U |
| #define DCAN_RXF1S_DMS_W 2U |
| #define DCAN_RXF1S_DMS_M 0xC0000000U |
| #define DCAN_RXF1S_DMS_S 30U |
| #define DCAN_RXF1A_F1AI_W 6U |
| #define DCAN_RXF1A_F1AI_M 0x0000003FU |
| #define DCAN_RXF1A_F1AI_S 0U |
| #define DCAN_RXESC_F0DS_W 3U |
| #define DCAN_RXESC_F0DS_M 0x00000007U |
| #define DCAN_RXESC_F0DS_S 0U |
| #define DCAN_RXESC_F1DS_W 3U |
| #define DCAN_RXESC_F1DS_M 0x00000070U |
| #define DCAN_RXESC_F1DS_S 4U |
| #define DCAN_RXESC_RBDS_W 3U |
| #define DCAN_RXESC_RBDS_M 0x00000700U |
| #define DCAN_RXESC_RBDS_S 8U |
| #define DCAN_TXBC_TBSA_W 14U |
| #define DCAN_TXBC_TBSA_M 0x0000FFFCU |
| #define DCAN_TXBC_TBSA_S 2U |
| #define DCAN_TXBC_NDTB_W 6U |
| #define DCAN_TXBC_NDTB_M 0x003F0000U |
| #define DCAN_TXBC_NDTB_S 16U |
| #define DCAN_TXBC_TFQS_W 6U |
| #define DCAN_TXBC_TFQS_M 0x3F000000U |
| #define DCAN_TXBC_TFQS_S 24U |
| #define DCAN_TXBC_TFQM 0x40000000U |
| #define DCAN_TXBC_TFQM_M 0x40000000U |
| #define DCAN_TXBC_TFQM_S 30U |
| #define DCAN_TXFQS_TFFL_W 6U |
| #define DCAN_TXFQS_TFFL_M 0x0000003FU |
| #define DCAN_TXFQS_TFFL_S 0U |
| #define DCAN_TXFQS_TFGI_W 5U |
| #define DCAN_TXFQS_TFGI_M 0x00001F00U |
| #define DCAN_TXFQS_TFGI_S 8U |
| #define DCAN_TXFQS_TFQP_W 5U |
| #define DCAN_TXFQS_TFQP_M 0x001F0000U |
| #define DCAN_TXFQS_TFQP_S 16U |
| #define DCAN_TXFQS_TFQF 0x00200000U |
| #define DCAN_TXFQS_TFQF_M 0x00200000U |
| #define DCAN_TXFQS_TFQF_S 21U |
| #define DCAN_TXESC_TBDS_W 3U |
| #define DCAN_TXESC_TBDS_M 0x00000007U |
| #define DCAN_TXESC_TBDS_S 0U |
| #define DCAN_TXBRPAP_TRP0 0x00000001U |
| #define DCAN_TXBRPAP_TRP0_M 0x00000001U |
| #define DCAN_TXBRPAP_TRP0_S 0U |
| #define DCAN_TXBRPAP_TRP1 0x00000002U |
| #define DCAN_TXBRPAP_TRP1_M 0x00000002U |
| #define DCAN_TXBRPAP_TRP1_S 1U |
| #define DCAN_TXBRPAP_TRP2 0x00000004U |
| #define DCAN_TXBRPAP_TRP2_M 0x00000004U |
| #define DCAN_TXBRPAP_TRP2_S 2U |
| #define DCAN_TXBRPAP_TRP3 0x00000008U |
| #define DCAN_TXBRPAP_TRP3_M 0x00000008U |
| #define DCAN_TXBRPAP_TRP3_S 3U |
| #define DCAN_TXBRPAP_TRP4 0x00000010U |
| #define DCAN_TXBRPAP_TRP4_M 0x00000010U |
| #define DCAN_TXBRPAP_TRP4_S 4U |
| #define DCAN_TXBRPAP_TRP5 0x00000020U |
| #define DCAN_TXBRPAP_TRP5_M 0x00000020U |
| #define DCAN_TXBRPAP_TRP5_S 5U |
| #define DCAN_TXBRPAP_TRP6 0x00000040U |
| #define DCAN_TXBRPAP_TRP6_M 0x00000040U |
| #define DCAN_TXBRPAP_TRP6_S 6U |
| #define DCAN_TXBRPAP_TRP7 0x00000080U |
| #define DCAN_TXBRPAP_TRP7_M 0x00000080U |
| #define DCAN_TXBRPAP_TRP7_S 7U |
| #define DCAN_TXBRPAP_TRP8 0x00000100U |
| #define DCAN_TXBRPAP_TRP8_M 0x00000100U |
| #define DCAN_TXBRPAP_TRP8_S 8U |
| #define DCAN_TXBRPAP_TRP9 0x00000200U |
| #define DCAN_TXBRPAP_TRP9_M 0x00000200U |
| #define DCAN_TXBRPAP_TRP9_S 9U |
| #define DCAN_TXBRPAP_TRP10 0x00000400U |
| #define DCAN_TXBRPAP_TRP10_M 0x00000400U |
| #define DCAN_TXBRPAP_TRP10_S 10U |
| #define DCAN_TXBRPAP_TRP11 0x00000800U |
| #define DCAN_TXBRPAP_TRP11_M 0x00000800U |
| #define DCAN_TXBRPAP_TRP11_S 11U |
| #define DCAN_TXBRPAP_TRP12 0x00001000U |
| #define DCAN_TXBRPAP_TRP12_M 0x00001000U |
| #define DCAN_TXBRPAP_TRP12_S 12U |
| #define DCAN_TXBRPAP_TRP13 0x00002000U |
| #define DCAN_TXBRPAP_TRP13_M 0x00002000U |
| #define DCAN_TXBRPAP_TRP13_S 13U |
| #define DCAN_TXBRPAP_TRP14 0x00004000U |
| #define DCAN_TXBRPAP_TRP14_M 0x00004000U |
| #define DCAN_TXBRPAP_TRP14_S 14U |
| #define DCAN_TXBRPAP_TRP15 0x00008000U |
| #define DCAN_TXBRPAP_TRP15_M 0x00008000U |
| #define DCAN_TXBRPAP_TRP15_S 15U |
| #define DCAN_TXBRPAP_TRP16 0x00010000U |
| #define DCAN_TXBRPAP_TRP16_M 0x00010000U |
| #define DCAN_TXBRPAP_TRP16_S 16U |
| #define DCAN_TXBRPAP_TRP17 0x00020000U |
| #define DCAN_TXBRPAP_TRP17_M 0x00020000U |
| #define DCAN_TXBRPAP_TRP17_S 17U |
| #define DCAN_TXBRPAP_TRP18 0x00040000U |
| #define DCAN_TXBRPAP_TRP18_M 0x00040000U |
| #define DCAN_TXBRPAP_TRP18_S 18U |
| #define DCAN_TXBRPAP_TRP19 0x00080000U |
| #define DCAN_TXBRPAP_TRP19_M 0x00080000U |
| #define DCAN_TXBRPAP_TRP19_S 19U |
| #define DCAN_TXBRPAP_TRP20 0x00100000U |
| #define DCAN_TXBRPAP_TRP20_M 0x00100000U |
| #define DCAN_TXBRPAP_TRP20_S 20U |
| #define DCAN_TXBRPAP_TRP21 0x00200000U |
| #define DCAN_TXBRPAP_TRP21_M 0x00200000U |
| #define DCAN_TXBRPAP_TRP21_S 21U |
| #define DCAN_TXBRPAP_TRP22 0x00400000U |
| #define DCAN_TXBRPAP_TRP22_M 0x00400000U |
| #define DCAN_TXBRPAP_TRP22_S 22U |
| #define DCAN_TXBRPAP_TRP23 0x00800000U |
| #define DCAN_TXBRPAP_TRP23_M 0x00800000U |
| #define DCAN_TXBRPAP_TRP23_S 23U |
| #define DCAN_TXBRPAP_TRP24 0x01000000U |
| #define DCAN_TXBRPAP_TRP24_M 0x01000000U |
| #define DCAN_TXBRPAP_TRP24_S 24U |
| #define DCAN_TXBRPAP_TRP25 0x02000000U |
| #define DCAN_TXBRPAP_TRP25_M 0x02000000U |
| #define DCAN_TXBRPAP_TRP25_S 25U |
| #define DCAN_TXBRPAP_TRP26 0x04000000U |
| #define DCAN_TXBRPAP_TRP26_M 0x04000000U |
| #define DCAN_TXBRPAP_TRP26_S 26U |
| #define DCAN_TXBRPAP_TRP27 0x08000000U |
| #define DCAN_TXBRPAP_TRP27_M 0x08000000U |
| #define DCAN_TXBRPAP_TRP27_S 27U |
| #define DCAN_TXBRPAP_TRP28 0x10000000U |
| #define DCAN_TXBRPAP_TRP28_M 0x10000000U |
| #define DCAN_TXBRPAP_TRP28_S 28U |
| #define DCAN_TXBRPAP_TRP29 0x20000000U |
| #define DCAN_TXBRPAP_TRP29_M 0x20000000U |
| #define DCAN_TXBRPAP_TRP29_S 29U |
| #define DCAN_TXBRPAP_TRP30 0x40000000U |
| #define DCAN_TXBRPAP_TRP30_M 0x40000000U |
| #define DCAN_TXBRPAP_TRP30_S 30U |
| #define DCAN_TXBRPAP_TRP31 0x80000000U |
| #define DCAN_TXBRPAP_TRP31_M 0x80000000U |
| #define DCAN_TXBRPAP_TRP31_S 31U |
| #define DCAN_TXBAR_AR0 0x00000001U |
| #define DCAN_TXBAR_AR0_M 0x00000001U |
| #define DCAN_TXBAR_AR0_S 0U |
| #define DCAN_TXBAR_AR1 0x00000002U |
| #define DCAN_TXBAR_AR1_M 0x00000002U |
| #define DCAN_TXBAR_AR1_S 1U |
| #define DCAN_TXBAR_AR2 0x00000004U |
| #define DCAN_TXBAR_AR2_M 0x00000004U |
| #define DCAN_TXBAR_AR2_S 2U |
| #define DCAN_TXBAR_AR3 0x00000008U |
| #define DCAN_TXBAR_AR3_M 0x00000008U |
| #define DCAN_TXBAR_AR3_S 3U |
| #define DCAN_TXBAR_AR4 0x00000010U |
| #define DCAN_TXBAR_AR4_M 0x00000010U |
| #define DCAN_TXBAR_AR4_S 4U |
| #define DCAN_TXBAR_AR5 0x00000020U |
| #define DCAN_TXBAR_AR5_M 0x00000020U |
| #define DCAN_TXBAR_AR5_S 5U |
| #define DCAN_TXBAR_AR6 0x00000040U |
| #define DCAN_TXBAR_AR6_M 0x00000040U |
| #define DCAN_TXBAR_AR6_S 6U |
| #define DCAN_TXBAR_AR7 0x00000080U |
| #define DCAN_TXBAR_AR7_M 0x00000080U |
| #define DCAN_TXBAR_AR7_S 7U |
| #define DCAN_TXBAR_AR8 0x00000100U |
| #define DCAN_TXBAR_AR8_M 0x00000100U |
| #define DCAN_TXBAR_AR8_S 8U |
| #define DCAN_TXBAR_AR9 0x00000200U |
| #define DCAN_TXBAR_AR9_M 0x00000200U |
| #define DCAN_TXBAR_AR9_S 9U |
| #define DCAN_TXBAR_AR10 0x00000400U |
| #define DCAN_TXBAR_AR10_M 0x00000400U |
| #define DCAN_TXBAR_AR10_S 10U |
| #define DCAN_TXBAR_AR11 0x00000800U |
| #define DCAN_TXBAR_AR11_M 0x00000800U |
| #define DCAN_TXBAR_AR11_S 11U |
| #define DCAN_TXBAR_AR12 0x00001000U |
| #define DCAN_TXBAR_AR12_M 0x00001000U |
| #define DCAN_TXBAR_AR12_S 12U |
| #define DCAN_TXBAR_AR13 0x00002000U |
| #define DCAN_TXBAR_AR13_M 0x00002000U |
| #define DCAN_TXBAR_AR13_S 13U |
| #define DCAN_TXBAR_AR14 0x00004000U |
| #define DCAN_TXBAR_AR14_M 0x00004000U |
| #define DCAN_TXBAR_AR14_S 14U |
| #define DCAN_TXBAR_AR15 0x00008000U |
| #define DCAN_TXBAR_AR15_M 0x00008000U |
| #define DCAN_TXBAR_AR15_S 15U |
| #define DCAN_TXBAR_AR16 0x00010000U |
| #define DCAN_TXBAR_AR16_M 0x00010000U |
| #define DCAN_TXBAR_AR16_S 16U |
| #define DCAN_TXBAR_AR17 0x00020000U |
| #define DCAN_TXBAR_AR17_M 0x00020000U |
| #define DCAN_TXBAR_AR17_S 17U |
| #define DCAN_TXBAR_AR18 0x00040000U |
| #define DCAN_TXBAR_AR18_M 0x00040000U |
| #define DCAN_TXBAR_AR18_S 18U |
| #define DCAN_TXBAR_AR19 0x00080000U |
| #define DCAN_TXBAR_AR19_M 0x00080000U |
| #define DCAN_TXBAR_AR19_S 19U |
| #define DCAN_TXBAR_AR20 0x00100000U |
| #define DCAN_TXBAR_AR20_M 0x00100000U |
| #define DCAN_TXBAR_AR20_S 20U |
| #define DCAN_TXBAR_AR21 0x00200000U |
| #define DCAN_TXBAR_AR21_M 0x00200000U |
| #define DCAN_TXBAR_AR21_S 21U |
| #define DCAN_TXBAR_AR22 0x00400000U |
| #define DCAN_TXBAR_AR22_M 0x00400000U |
| #define DCAN_TXBAR_AR22_S 22U |
| #define DCAN_TXBAR_AR23 0x00800000U |
| #define DCAN_TXBAR_AR23_M 0x00800000U |
| #define DCAN_TXBAR_AR23_S 23U |
| #define DCAN_TXBAR_AR24 0x01000000U |
| #define DCAN_TXBAR_AR24_M 0x01000000U |
| #define DCAN_TXBAR_AR24_S 24U |
| #define DCAN_TXBAR_AR25 0x02000000U |
| #define DCAN_TXBAR_AR25_M 0x02000000U |
| #define DCAN_TXBAR_AR25_S 25U |
| #define DCAN_TXBAR_AR26 0x04000000U |
| #define DCAN_TXBAR_AR26_M 0x04000000U |
| #define DCAN_TXBAR_AR26_S 26U |
| #define DCAN_TXBAR_AR27 0x08000000U |
| #define DCAN_TXBAR_AR27_M 0x08000000U |
| #define DCAN_TXBAR_AR27_S 27U |
| #define DCAN_TXBAR_AR28 0x10000000U |
| #define DCAN_TXBAR_AR28_M 0x10000000U |
| #define DCAN_TXBAR_AR28_S 28U |
| #define DCAN_TXBAR_AR29 0x20000000U |
| #define DCAN_TXBAR_AR29_M 0x20000000U |
| #define DCAN_TXBAR_AR29_S 29U |
| #define DCAN_TXBAR_AR30 0x40000000U |
| #define DCAN_TXBAR_AR30_M 0x40000000U |
| #define DCAN_TXBAR_AR30_S 30U |
| #define DCAN_TXBAR_AR31 0x80000000U |
| #define DCAN_TXBAR_AR31_M 0x80000000U |
| #define DCAN_TXBAR_AR31_S 31U |
| #define DCAN_TXBCR_CR0 0x00000001U |
| #define DCAN_TXBCR_CR0_M 0x00000001U |
| #define DCAN_TXBCR_CR0_S 0U |
| #define DCAN_TXBCR_CR1 0x00000002U |
| #define DCAN_TXBCR_CR1_M 0x00000002U |
| #define DCAN_TXBCR_CR1_S 1U |
| #define DCAN_TXBCR_CR2 0x00000004U |
| #define DCAN_TXBCR_CR2_M 0x00000004U |
| #define DCAN_TXBCR_CR2_S 2U |
| #define DCAN_TXBCR_CR3 0x00000008U |
| #define DCAN_TXBCR_CR3_M 0x00000008U |
| #define DCAN_TXBCR_CR3_S 3U |
| #define DCAN_TXBCR_CR4 0x00000010U |
| #define DCAN_TXBCR_CR4_M 0x00000010U |
| #define DCAN_TXBCR_CR4_S 4U |
| #define DCAN_TXBCR_CR5 0x00000020U |
| #define DCAN_TXBCR_CR5_M 0x00000020U |
| #define DCAN_TXBCR_CR5_S 5U |
| #define DCAN_TXBCR_CR6 0x00000040U |
| #define DCAN_TXBCR_CR6_M 0x00000040U |
| #define DCAN_TXBCR_CR6_S 6U |
| #define DCAN_TXBCR_CR7 0x00000080U |
| #define DCAN_TXBCR_CR7_M 0x00000080U |
| #define DCAN_TXBCR_CR7_S 7U |
| #define DCAN_TXBCR_CR8 0x00000100U |
| #define DCAN_TXBCR_CR8_M 0x00000100U |
| #define DCAN_TXBCR_CR8_S 8U |
| #define DCAN_TXBCR_CR9 0x00000200U |
| #define DCAN_TXBCR_CR9_M 0x00000200U |
| #define DCAN_TXBCR_CR9_S 9U |
| #define DCAN_TXBCR_CR10 0x00000400U |
| #define DCAN_TXBCR_CR10_M 0x00000400U |
| #define DCAN_TXBCR_CR10_S 10U |
| #define DCAN_TXBCR_CR11 0x00000800U |
| #define DCAN_TXBCR_CR11_M 0x00000800U |
| #define DCAN_TXBCR_CR11_S 11U |
| #define DCAN_TXBCR_CR12 0x00001000U |
| #define DCAN_TXBCR_CR12_M 0x00001000U |
| #define DCAN_TXBCR_CR12_S 12U |
| #define DCAN_TXBCR_CR13 0x00002000U |
| #define DCAN_TXBCR_CR13_M 0x00002000U |
| #define DCAN_TXBCR_CR13_S 13U |
| #define DCAN_TXBCR_CR14 0x00004000U |
| #define DCAN_TXBCR_CR14_M 0x00004000U |
| #define DCAN_TXBCR_CR14_S 14U |
| #define DCAN_TXBCR_CR15 0x00008000U |
| #define DCAN_TXBCR_CR15_M 0x00008000U |
| #define DCAN_TXBCR_CR15_S 15U |
| #define DCAN_TXBCR_CR16 0x00010000U |
| #define DCAN_TXBCR_CR16_M 0x00010000U |
| #define DCAN_TXBCR_CR16_S 16U |
| #define DCAN_TXBCR_CR17 0x00020000U |
| #define DCAN_TXBCR_CR17_M 0x00020000U |
| #define DCAN_TXBCR_CR17_S 17U |
| #define DCAN_TXBCR_CR18 0x00040000U |
| #define DCAN_TXBCR_CR18_M 0x00040000U |
| #define DCAN_TXBCR_CR18_S 18U |
| #define DCAN_TXBCR_CR19 0x00080000U |
| #define DCAN_TXBCR_CR19_M 0x00080000U |
| #define DCAN_TXBCR_CR19_S 19U |
| #define DCAN_TXBCR_CR20 0x00100000U |
| #define DCAN_TXBCR_CR20_M 0x00100000U |
| #define DCAN_TXBCR_CR20_S 20U |
| #define DCAN_TXBCR_CR21 0x00200000U |
| #define DCAN_TXBCR_CR21_M 0x00200000U |
| #define DCAN_TXBCR_CR21_S 21U |
| #define DCAN_TXBCR_CR22 0x00400000U |
| #define DCAN_TXBCR_CR22_M 0x00400000U |
| #define DCAN_TXBCR_CR22_S 22U |
| #define DCAN_TXBCR_CR23 0x00800000U |
| #define DCAN_TXBCR_CR23_M 0x00800000U |
| #define DCAN_TXBCR_CR23_S 23U |
| #define DCAN_TXBCR_CR24 0x01000000U |
| #define DCAN_TXBCR_CR24_M 0x01000000U |
| #define DCAN_TXBCR_CR24_S 24U |
| #define DCAN_TXBCR_CR25 0x02000000U |
| #define DCAN_TXBCR_CR25_M 0x02000000U |
| #define DCAN_TXBCR_CR25_S 25U |
| #define DCAN_TXBCR_CR26 0x04000000U |
| #define DCAN_TXBCR_CR26_M 0x04000000U |
| #define DCAN_TXBCR_CR26_S 26U |
| #define DCAN_TXBCR_CR27 0x08000000U |
| #define DCAN_TXBCR_CR27_M 0x08000000U |
| #define DCAN_TXBCR_CR27_S 27U |
| #define DCAN_TXBCR_CR28 0x10000000U |
| #define DCAN_TXBCR_CR28_M 0x10000000U |
| #define DCAN_TXBCR_CR28_S 28U |
| #define DCAN_TXBCR_CR29 0x20000000U |
| #define DCAN_TXBCR_CR29_M 0x20000000U |
| #define DCAN_TXBCR_CR29_S 29U |
| #define DCAN_TXBCR_CR30 0x40000000U |
| #define DCAN_TXBCR_CR30_M 0x40000000U |
| #define DCAN_TXBCR_CR30_S 30U |
| #define DCAN_TXBCR_CR31 0x80000000U |
| #define DCAN_TXBCR_CR31_M 0x80000000U |
| #define DCAN_TXBCR_CR31_S 31U |
| #define DCAN_TXBTO_TO0 0x00000001U |
| #define DCAN_TXBTO_TO0_M 0x00000001U |
| #define DCAN_TXBTO_TO0_S 0U |
| #define DCAN_TXBTO_TO1 0x00000002U |
| #define DCAN_TXBTO_TO1_M 0x00000002U |
| #define DCAN_TXBTO_TO1_S 1U |
| #define DCAN_TXBTO_TO2 0x00000004U |
| #define DCAN_TXBTO_TO2_M 0x00000004U |
| #define DCAN_TXBTO_TO2_S 2U |
| #define DCAN_TXBTO_TO3 0x00000008U |
| #define DCAN_TXBTO_TO3_M 0x00000008U |
| #define DCAN_TXBTO_TO3_S 3U |
| #define DCAN_TXBTO_TO4 0x00000010U |
| #define DCAN_TXBTO_TO4_M 0x00000010U |
| #define DCAN_TXBTO_TO4_S 4U |
| #define DCAN_TXBTO_TO5 0x00000020U |
| #define DCAN_TXBTO_TO5_M 0x00000020U |
| #define DCAN_TXBTO_TO5_S 5U |
| #define DCAN_TXBTO_TO6 0x00000040U |
| #define DCAN_TXBTO_TO6_M 0x00000040U |
| #define DCAN_TXBTO_TO6_S 6U |
| #define DCAN_TXBTO_TO7 0x00000080U |
| #define DCAN_TXBTO_TO7_M 0x00000080U |
| #define DCAN_TXBTO_TO7_S 7U |
| #define DCAN_TXBTO_TO8 0x00000100U |
| #define DCAN_TXBTO_TO8_M 0x00000100U |
| #define DCAN_TXBTO_TO8_S 8U |
| #define DCAN_TXBTO_TO9 0x00000200U |
| #define DCAN_TXBTO_TO9_M 0x00000200U |
| #define DCAN_TXBTO_TO9_S 9U |
| #define DCAN_TXBTO_TO10 0x00000400U |
| #define DCAN_TXBTO_TO10_M 0x00000400U |
| #define DCAN_TXBTO_TO10_S 10U |
| #define DCAN_TXBTO_TO11 0x00000800U |
| #define DCAN_TXBTO_TO11_M 0x00000800U |
| #define DCAN_TXBTO_TO11_S 11U |
| #define DCAN_TXBTO_TO12 0x00001000U |
| #define DCAN_TXBTO_TO12_M 0x00001000U |
| #define DCAN_TXBTO_TO12_S 12U |
| #define DCAN_TXBTO_TO13 0x00002000U |
| #define DCAN_TXBTO_TO13_M 0x00002000U |
| #define DCAN_TXBTO_TO13_S 13U |
| #define DCAN_TXBTO_TO14 0x00004000U |
| #define DCAN_TXBTO_TO14_M 0x00004000U |
| #define DCAN_TXBTO_TO14_S 14U |
| #define DCAN_TXBTO_TO15 0x00008000U |
| #define DCAN_TXBTO_TO15_M 0x00008000U |
| #define DCAN_TXBTO_TO15_S 15U |
| #define DCAN_TXBTO_TO16 0x00010000U |
| #define DCAN_TXBTO_TO16_M 0x00010000U |
| #define DCAN_TXBTO_TO16_S 16U |
| #define DCAN_TXBTO_TO17 0x00020000U |
| #define DCAN_TXBTO_TO17_M 0x00020000U |
| #define DCAN_TXBTO_TO17_S 17U |
| #define DCAN_TXBTO_TO18 0x00040000U |
| #define DCAN_TXBTO_TO18_M 0x00040000U |
| #define DCAN_TXBTO_TO18_S 18U |
| #define DCAN_TXBTO_TO19 0x00080000U |
| #define DCAN_TXBTO_TO19_M 0x00080000U |
| #define DCAN_TXBTO_TO19_S 19U |
| #define DCAN_TXBTO_TO20 0x00100000U |
| #define DCAN_TXBTO_TO20_M 0x00100000U |
| #define DCAN_TXBTO_TO20_S 20U |
| #define DCAN_TXBTO_TO21 0x00200000U |
| #define DCAN_TXBTO_TO21_M 0x00200000U |
| #define DCAN_TXBTO_TO21_S 21U |
| #define DCAN_TXBTO_TO22 0x00400000U |
| #define DCAN_TXBTO_TO22_M 0x00400000U |
| #define DCAN_TXBTO_TO22_S 22U |
| #define DCAN_TXBTO_TO23 0x00800000U |
| #define DCAN_TXBTO_TO23_M 0x00800000U |
| #define DCAN_TXBTO_TO23_S 23U |
| #define DCAN_TXBTO_TO24 0x01000000U |
| #define DCAN_TXBTO_TO24_M 0x01000000U |
| #define DCAN_TXBTO_TO24_S 24U |
| #define DCAN_TXBTO_TO25 0x02000000U |
| #define DCAN_TXBTO_TO25_M 0x02000000U |
| #define DCAN_TXBTO_TO25_S 25U |
| #define DCAN_TXBTO_TO26 0x04000000U |
| #define DCAN_TXBTO_TO26_M 0x04000000U |
| #define DCAN_TXBTO_TO26_S 26U |
| #define DCAN_TXBTO_TO27 0x08000000U |
| #define DCAN_TXBTO_TO27_M 0x08000000U |
| #define DCAN_TXBTO_TO27_S 27U |
| #define DCAN_TXBTO_TO28 0x10000000U |
| #define DCAN_TXBTO_TO28_M 0x10000000U |
| #define DCAN_TXBTO_TO28_S 28U |
| #define DCAN_TXBTO_TO29 0x20000000U |
| #define DCAN_TXBTO_TO29_M 0x20000000U |
| #define DCAN_TXBTO_TO29_S 29U |
| #define DCAN_TXBTO_TO30 0x40000000U |
| #define DCAN_TXBTO_TO30_M 0x40000000U |
| #define DCAN_TXBTO_TO30_S 30U |
| #define DCAN_TXBTO_TO31 0x80000000U |
| #define DCAN_TXBTO_TO31_M 0x80000000U |
| #define DCAN_TXBTO_TO31_S 31U |
| #define DCAN_TXBCF_CF0 0x00000001U |
| #define DCAN_TXBCF_CF0_M 0x00000001U |
| #define DCAN_TXBCF_CF0_S 0U |
| #define DCAN_TXBCF_CF1 0x00000002U |
| #define DCAN_TXBCF_CF1_M 0x00000002U |
| #define DCAN_TXBCF_CF1_S 1U |
| #define DCAN_TXBCF_CF2 0x00000004U |
| #define DCAN_TXBCF_CF2_M 0x00000004U |
| #define DCAN_TXBCF_CF2_S 2U |
| #define DCAN_TXBCF_CF3 0x00000008U |
| #define DCAN_TXBCF_CF3_M 0x00000008U |
| #define DCAN_TXBCF_CF3_S 3U |
| #define DCAN_TXBCF_CF4 0x00000010U |
| #define DCAN_TXBCF_CF4_M 0x00000010U |
| #define DCAN_TXBCF_CF4_S 4U |
| #define DCAN_TXBCF_CF5 0x00000020U |
| #define DCAN_TXBCF_CF5_M 0x00000020U |
| #define DCAN_TXBCF_CF5_S 5U |
| #define DCAN_TXBCF_CF6 0x00000040U |
| #define DCAN_TXBCF_CF6_M 0x00000040U |
| #define DCAN_TXBCF_CF6_S 6U |
| #define DCAN_TXBCF_CF7 0x00000080U |
| #define DCAN_TXBCF_CF7_M 0x00000080U |
| #define DCAN_TXBCF_CF7_S 7U |
| #define DCAN_TXBCF_CF8 0x00000100U |
| #define DCAN_TXBCF_CF8_M 0x00000100U |
| #define DCAN_TXBCF_CF8_S 8U |
| #define DCAN_TXBCF_CF9 0x00000200U |
| #define DCAN_TXBCF_CF9_M 0x00000200U |
| #define DCAN_TXBCF_CF9_S 9U |
| #define DCAN_TXBCF_CF10 0x00000400U |
| #define DCAN_TXBCF_CF10_M 0x00000400U |
| #define DCAN_TXBCF_CF10_S 10U |
| #define DCAN_TXBCF_CF11 0x00000800U |
| #define DCAN_TXBCF_CF11_M 0x00000800U |
| #define DCAN_TXBCF_CF11_S 11U |
| #define DCAN_TXBCF_CF12 0x00001000U |
| #define DCAN_TXBCF_CF12_M 0x00001000U |
| #define DCAN_TXBCF_CF12_S 12U |
| #define DCAN_TXBCF_CF13 0x00002000U |
| #define DCAN_TXBCF_CF13_M 0x00002000U |
| #define DCAN_TXBCF_CF13_S 13U |
| #define DCAN_TXBCF_CF14 0x00004000U |
| #define DCAN_TXBCF_CF14_M 0x00004000U |
| #define DCAN_TXBCF_CF14_S 14U |
| #define DCAN_TXBCF_CF15 0x00008000U |
| #define DCAN_TXBCF_CF15_M 0x00008000U |
| #define DCAN_TXBCF_CF15_S 15U |
| #define DCAN_TXBCF_CF16 0x00010000U |
| #define DCAN_TXBCF_CF16_M 0x00010000U |
| #define DCAN_TXBCF_CF16_S 16U |
| #define DCAN_TXBCF_CF17 0x00020000U |
| #define DCAN_TXBCF_CF17_M 0x00020000U |
| #define DCAN_TXBCF_CF17_S 17U |
| #define DCAN_TXBCF_CF18 0x00040000U |
| #define DCAN_TXBCF_CF18_M 0x00040000U |
| #define DCAN_TXBCF_CF18_S 18U |
| #define DCAN_TXBCF_CF19 0x00080000U |
| #define DCAN_TXBCF_CF19_M 0x00080000U |
| #define DCAN_TXBCF_CF19_S 19U |
| #define DCAN_TXBCF_CF20 0x00100000U |
| #define DCAN_TXBCF_CF20_M 0x00100000U |
| #define DCAN_TXBCF_CF20_S 20U |
| #define DCAN_TXBCF_CF21 0x00200000U |
| #define DCAN_TXBCF_CF21_M 0x00200000U |
| #define DCAN_TXBCF_CF21_S 21U |
| #define DCAN_TXBCF_CF22 0x00400000U |
| #define DCAN_TXBCF_CF22_M 0x00400000U |
| #define DCAN_TXBCF_CF22_S 22U |
| #define DCAN_TXBCF_CF23 0x00800000U |
| #define DCAN_TXBCF_CF23_M 0x00800000U |
| #define DCAN_TXBCF_CF23_S 23U |
| #define DCAN_TXBCF_CF24 0x01000000U |
| #define DCAN_TXBCF_CF24_M 0x01000000U |
| #define DCAN_TXBCF_CF24_S 24U |
| #define DCAN_TXBCF_CF25 0x02000000U |
| #define DCAN_TXBCF_CF25_M 0x02000000U |
| #define DCAN_TXBCF_CF25_S 25U |
| #define DCAN_TXBCF_CF26 0x04000000U |
| #define DCAN_TXBCF_CF26_M 0x04000000U |
| #define DCAN_TXBCF_CF26_S 26U |
| #define DCAN_TXBCF_CF27 0x08000000U |
| #define DCAN_TXBCF_CF27_M 0x08000000U |
| #define DCAN_TXBCF_CF27_S 27U |
| #define DCAN_TXBCF_CF28 0x10000000U |
| #define DCAN_TXBCF_CF28_M 0x10000000U |
| #define DCAN_TXBCF_CF28_S 28U |
| #define DCAN_TXBCF_CF29 0x20000000U |
| #define DCAN_TXBCF_CF29_M 0x20000000U |
| #define DCAN_TXBCF_CF29_S 29U |
| #define DCAN_TXBCF_CF30 0x40000000U |
| #define DCAN_TXBCF_CF30_M 0x40000000U |
| #define DCAN_TXBCF_CF30_S 30U |
| #define DCAN_TXBCF_CF31 0x80000000U |
| #define DCAN_TXBCF_CF31_M 0x80000000U |
| #define DCAN_TXBCF_CF31_S 31U |
| #define DCAN_TXTIE_TIE0 0x00000001U |
| #define DCAN_TXTIE_TIE0_M 0x00000001U |
| #define DCAN_TXTIE_TIE0_S 0U |
| #define DCAN_TXTIE_TIE1 0x00000002U |
| #define DCAN_TXTIE_TIE1_M 0x00000002U |
| #define DCAN_TXTIE_TIE1_S 1U |
| #define DCAN_TXTIE_TIE2 0x00000004U |
| #define DCAN_TXTIE_TIE2_M 0x00000004U |
| #define DCAN_TXTIE_TIE2_S 2U |
| #define DCAN_TXTIE_TIE3 0x00000008U |
| #define DCAN_TXTIE_TIE3_M 0x00000008U |
| #define DCAN_TXTIE_TIE3_S 3U |
| #define DCAN_TXTIE_TIE4 0x00000010U |
| #define DCAN_TXTIE_TIE4_M 0x00000010U |
| #define DCAN_TXTIE_TIE4_S 4U |
| #define DCAN_TXTIE_TIE5 0x00000020U |
| #define DCAN_TXTIE_TIE5_M 0x00000020U |
| #define DCAN_TXTIE_TIE5_S 5U |
| #define DCAN_TXTIE_TIE6 0x00000040U |
| #define DCAN_TXTIE_TIE6_M 0x00000040U |
| #define DCAN_TXTIE_TIE6_S 6U |
| #define DCAN_TXTIE_TIE7 0x00000080U |
| #define DCAN_TXTIE_TIE7_M 0x00000080U |
| #define DCAN_TXTIE_TIE7_S 7U |
| #define DCAN_TXTIE_TIE8 0x00000100U |
| #define DCAN_TXTIE_TIE8_M 0x00000100U |
| #define DCAN_TXTIE_TIE8_S 8U |
| #define DCAN_TXTIE_TIE9 0x00000200U |
| #define DCAN_TXTIE_TIE9_M 0x00000200U |
| #define DCAN_TXTIE_TIE9_S 9U |
| #define DCAN_TXTIE_TIE10 0x00000400U |
| #define DCAN_TXTIE_TIE10_M 0x00000400U |
| #define DCAN_TXTIE_TIE10_S 10U |
| #define DCAN_TXTIE_TIE11 0x00000800U |
| #define DCAN_TXTIE_TIE11_M 0x00000800U |
| #define DCAN_TXTIE_TIE11_S 11U |
| #define DCAN_TXTIE_TIE12 0x00001000U |
| #define DCAN_TXTIE_TIE12_M 0x00001000U |
| #define DCAN_TXTIE_TIE12_S 12U |
| #define DCAN_TXTIE_TIE13 0x00002000U |
| #define DCAN_TXTIE_TIE13_M 0x00002000U |
| #define DCAN_TXTIE_TIE13_S 13U |
| #define DCAN_TXTIE_TIE14 0x00004000U |
| #define DCAN_TXTIE_TIE14_M 0x00004000U |
| #define DCAN_TXTIE_TIE14_S 14U |
| #define DCAN_TXTIE_TIE15 0x00008000U |
| #define DCAN_TXTIE_TIE15_M 0x00008000U |
| #define DCAN_TXTIE_TIE15_S 15U |
| #define DCAN_TXTIE_TIE16 0x00010000U |
| #define DCAN_TXTIE_TIE16_M 0x00010000U |
| #define DCAN_TXTIE_TIE16_S 16U |
| #define DCAN_TXTIE_TIE17 0x00020000U |
| #define DCAN_TXTIE_TIE17_M 0x00020000U |
| #define DCAN_TXTIE_TIE17_S 17U |
| #define DCAN_TXTIE_TIE18 0x00040000U |
| #define DCAN_TXTIE_TIE18_M 0x00040000U |
| #define DCAN_TXTIE_TIE18_S 18U |
| #define DCAN_TXTIE_TIE19 0x00080000U |
| #define DCAN_TXTIE_TIE19_M 0x00080000U |
| #define DCAN_TXTIE_TIE19_S 19U |
| #define DCAN_TXTIE_TIE20 0x00100000U |
| #define DCAN_TXTIE_TIE20_M 0x00100000U |
| #define DCAN_TXTIE_TIE20_S 20U |
| #define DCAN_TXTIE_TIE21 0x00200000U |
| #define DCAN_TXTIE_TIE21_M 0x00200000U |
| #define DCAN_TXTIE_TIE21_S 21U |
| #define DCAN_TXTIE_TIE22 0x00400000U |
| #define DCAN_TXTIE_TIE22_M 0x00400000U |
| #define DCAN_TXTIE_TIE22_S 22U |
| #define DCAN_TXTIE_TIE23 0x00800000U |
| #define DCAN_TXTIE_TIE23_M 0x00800000U |
| #define DCAN_TXTIE_TIE23_S 23U |
| #define DCAN_TXTIE_TIE24 0x01000000U |
| #define DCAN_TXTIE_TIE24_M 0x01000000U |
| #define DCAN_TXTIE_TIE24_S 24U |
| #define DCAN_TXTIE_TIE25 0x02000000U |
| #define DCAN_TXTIE_TIE25_M 0x02000000U |
| #define DCAN_TXTIE_TIE25_S 25U |
| #define DCAN_TXTIE_TIE26 0x04000000U |
| #define DCAN_TXTIE_TIE26_M 0x04000000U |
| #define DCAN_TXTIE_TIE26_S 26U |
| #define DCAN_TXTIE_TIE27 0x08000000U |
| #define DCAN_TXTIE_TIE27_M 0x08000000U |
| #define DCAN_TXTIE_TIE27_S 27U |
| #define DCAN_TXTIE_TIE28 0x10000000U |
| #define DCAN_TXTIE_TIE28_M 0x10000000U |
| #define DCAN_TXTIE_TIE28_S 28U |
| #define DCAN_TXTIE_TIE29 0x20000000U |
| #define DCAN_TXTIE_TIE29_M 0x20000000U |
| #define DCAN_TXTIE_TIE29_S 29U |
| #define DCAN_TXTIE_TIE30 0x40000000U |
| #define DCAN_TXTIE_TIE30_M 0x40000000U |
| #define DCAN_TXTIE_TIE30_S 30U |
| #define DCAN_TXTIE_TIE31 0x80000000U |
| #define DCAN_TXTIE_TIE31_M 0x80000000U |
| #define DCAN_TXTIE_TIE31_S 31U |
| #define DCAN_TXBCIE_CFIE0 0x00000001U |
| #define DCAN_TXBCIE_CFIE0_M 0x00000001U |
| #define DCAN_TXBCIE_CFIE0_S 0U |
| #define DCAN_TXBCIE_CFIE1 0x00000002U |
| #define DCAN_TXBCIE_CFIE1_M 0x00000002U |
| #define DCAN_TXBCIE_CFIE1_S 1U |
| #define DCAN_TXBCIE_CFIE2 0x00000004U |
| #define DCAN_TXBCIE_CFIE2_M 0x00000004U |
| #define DCAN_TXBCIE_CFIE2_S 2U |
| #define DCAN_TXBCIE_CFIE3 0x00000008U |
| #define DCAN_TXBCIE_CFIE3_M 0x00000008U |
| #define DCAN_TXBCIE_CFIE3_S 3U |
| #define DCAN_TXBCIE_CFIE4 0x00000010U |
| #define DCAN_TXBCIE_CFIE4_M 0x00000010U |
| #define DCAN_TXBCIE_CFIE4_S 4U |
| #define DCAN_TXBCIE_CFIE5 0x00000020U |
| #define DCAN_TXBCIE_CFIE5_M 0x00000020U |
| #define DCAN_TXBCIE_CFIE5_S 5U |
| #define DCAN_TXBCIE_CFIE6 0x00000040U |
| #define DCAN_TXBCIE_CFIE6_M 0x00000040U |
| #define DCAN_TXBCIE_CFIE6_S 6U |
| #define DCAN_TXBCIE_CFIE7 0x00000080U |
| #define DCAN_TXBCIE_CFIE7_M 0x00000080U |
| #define DCAN_TXBCIE_CFIE7_S 7U |
| #define DCAN_TXBCIE_CFIE8 0x00000100U |
| #define DCAN_TXBCIE_CFIE8_M 0x00000100U |
| #define DCAN_TXBCIE_CFIE8_S 8U |
| #define DCAN_TXBCIE_CFIE9 0x00000200U |
| #define DCAN_TXBCIE_CFIE9_M 0x00000200U |
| #define DCAN_TXBCIE_CFIE9_S 9U |
| #define DCAN_TXBCIE_CFIE10 0x00000400U |
| #define DCAN_TXBCIE_CFIE10_M 0x00000400U |
| #define DCAN_TXBCIE_CFIE10_S 10U |
| #define DCAN_TXBCIE_CFIE11 0x00000800U |
| #define DCAN_TXBCIE_CFIE11_M 0x00000800U |
| #define DCAN_TXBCIE_CFIE11_S 11U |
| #define DCAN_TXBCIE_CFIE12 0x00001000U |
| #define DCAN_TXBCIE_CFIE12_M 0x00001000U |
| #define DCAN_TXBCIE_CFIE12_S 12U |
| #define DCAN_TXBCIE_CFIE13 0x00002000U |
| #define DCAN_TXBCIE_CFIE13_M 0x00002000U |
| #define DCAN_TXBCIE_CFIE13_S 13U |
| #define DCAN_TXBCIE_CFIE14 0x00004000U |
| #define DCAN_TXBCIE_CFIE14_M 0x00004000U |
| #define DCAN_TXBCIE_CFIE14_S 14U |
| #define DCAN_TXBCIE_CFIE15 0x00008000U |
| #define DCAN_TXBCIE_CFIE15_M 0x00008000U |
| #define DCAN_TXBCIE_CFIE15_S 15U |
| #define DCAN_TXBCIE_CFIE16 0x00010000U |
| #define DCAN_TXBCIE_CFIE16_M 0x00010000U |
| #define DCAN_TXBCIE_CFIE16_S 16U |
| #define DCAN_TXBCIE_CFIE17 0x00020000U |
| #define DCAN_TXBCIE_CFIE17_M 0x00020000U |
| #define DCAN_TXBCIE_CFIE17_S 17U |
| #define DCAN_TXBCIE_CFIE18 0x00040000U |
| #define DCAN_TXBCIE_CFIE18_M 0x00040000U |
| #define DCAN_TXBCIE_CFIE18_S 18U |
| #define DCAN_TXBCIE_CFIE19 0x00080000U |
| #define DCAN_TXBCIE_CFIE19_M 0x00080000U |
| #define DCAN_TXBCIE_CFIE19_S 19U |
| #define DCAN_TXBCIE_CFIE20 0x00100000U |
| #define DCAN_TXBCIE_CFIE20_M 0x00100000U |
| #define DCAN_TXBCIE_CFIE20_S 20U |
| #define DCAN_TXBCIE_CFIE21 0x00200000U |
| #define DCAN_TXBCIE_CFIE21_M 0x00200000U |
| #define DCAN_TXBCIE_CFIE21_S 21U |
| #define DCAN_TXBCIE_CFIE22 0x00400000U |
| #define DCAN_TXBCIE_CFIE22_M 0x00400000U |
| #define DCAN_TXBCIE_CFIE22_S 22U |
| #define DCAN_TXBCIE_CFIE23 0x00800000U |
| #define DCAN_TXBCIE_CFIE23_M 0x00800000U |
| #define DCAN_TXBCIE_CFIE23_S 23U |
| #define DCAN_TXBCIE_CFIE24 0x01000000U |
| #define DCAN_TXBCIE_CFIE24_M 0x01000000U |
| #define DCAN_TXBCIE_CFIE24_S 24U |
| #define DCAN_TXBCIE_CFIE25 0x02000000U |
| #define DCAN_TXBCIE_CFIE25_M 0x02000000U |
| #define DCAN_TXBCIE_CFIE25_S 25U |
| #define DCAN_TXBCIE_CFIE26 0x04000000U |
| #define DCAN_TXBCIE_CFIE26_M 0x04000000U |
| #define DCAN_TXBCIE_CFIE26_S 26U |
| #define DCAN_TXBCIE_CFIE27 0x08000000U |
| #define DCAN_TXBCIE_CFIE27_M 0x08000000U |
| #define DCAN_TXBCIE_CFIE27_S 27U |
| #define DCAN_TXBCIE_CFIE28 0x10000000U |
| #define DCAN_TXBCIE_CFIE28_M 0x10000000U |
| #define DCAN_TXBCIE_CFIE28_S 28U |
| #define DCAN_TXBCIE_CFIE29 0x20000000U |
| #define DCAN_TXBCIE_CFIE29_M 0x20000000U |
| #define DCAN_TXBCIE_CFIE29_S 29U |
| #define DCAN_TXBCIE_CFIE30 0x40000000U |
| #define DCAN_TXBCIE_CFIE30_M 0x40000000U |
| #define DCAN_TXBCIE_CFIE30_S 30U |
| #define DCAN_TXBCIE_CFIE31 0x80000000U |
| #define DCAN_TXBCIE_CFIE31_M 0x80000000U |
| #define DCAN_TXBCIE_CFIE31_S 31U |
| #define DCAN_TXEFC_EFSA_W 14U |
| #define DCAN_TXEFC_EFSA_M 0x0000FFFCU |
| #define DCAN_TXEFC_EFSA_S 2U |
| #define DCAN_TXEFC_EFS_W 6U |
| #define DCAN_TXEFC_EFS_M 0x003F0000U |
| #define DCAN_TXEFC_EFS_S 16U |
| #define DCAN_TXEFC_EFWM_W 6U |
| #define DCAN_TXEFC_EFWM_M 0x3F000000U |
| #define DCAN_TXEFC_EFWM_S 24U |
| #define DCAN_TXEFS_EFFL_W 6U |
| #define DCAN_TXEFS_EFFL_M 0x0000003FU |
| #define DCAN_TXEFS_EFFL_S 0U |
| #define DCAN_TXEFS_EFGI_W 5U |
| #define DCAN_TXEFS_EFGI_M 0x00001F00U |
| #define DCAN_TXEFS_EFGI_S 8U |
| #define DCAN_TXEFS_EFPI_W 5U |
| #define DCAN_TXEFS_EFPI_M 0x001F0000U |
| #define DCAN_TXEFS_EFPI_S 16U |
| #define DCAN_TXEFS_EFF 0x01000000U |
| #define DCAN_TXEFS_EFF_M 0x01000000U |
| #define DCAN_TXEFS_EFF_S 24U |
| #define DCAN_TXEFS_TEFL 0x02000000U |
| #define DCAN_TXEFS_TEFL_M 0x02000000U |
| #define DCAN_TXEFS_TEFL_S 25U |
| #define DCAN_TXEFA_EFAI_W 5U |
| #define DCAN_TXEFA_EFAI_M 0x0000001FU |
| #define DCAN_TXEFA_EFAI_S 0U |
| #define DCAN_SSPID_MINOR_W 6U |
| #define DCAN_SSPID_MINOR_M 0x0000003FU |
| #define DCAN_SSPID_MINOR_S 0U |
| #define DCAN_SSPID_CUSTOM_W 2U |
| #define DCAN_SSPID_CUSTOM_M 0x000000C0U |
| #define DCAN_SSPID_CUSTOM_S 6U |
| #define DCAN_SSPID_MAJOR_W 3U |
| #define DCAN_SSPID_MAJOR_M 0x00000700U |
| #define DCAN_SSPID_MAJOR_S 8U |
| #define DCAN_SSPID_RTL_W 5U |
| #define DCAN_SSPID_RTL_M 0x0000F800U |
| #define DCAN_SSPID_RTL_S 11U |
| #define DCAN_SSPID_MODULEID_W 12U |
| #define DCAN_SSPID_MODULEID_M 0x0FFF0000U |
| #define DCAN_SSPID_MODULEID_S 16U |
| #define DCAN_SSPID_BU_W 2U |
| #define DCAN_SSPID_BU_M 0x30000000U |
| #define DCAN_SSPID_BU_S 28U |
| #define DCAN_SSPID_SCHEME_W 2U |
| #define DCAN_SSPID_SCHEME_M 0xC0000000U |
| #define DCAN_SSPID_SCHEME_S 30U |
| #define DCAN_SSCTL_DBGSF 0x00000008U |
| #define DCAN_SSCTL_DBGSF_M 0x00000008U |
| #define DCAN_SSCTL_DBGSF_S 3U |
| #define DCAN_SSCTL_WUREQEN 0x00000010U |
| #define DCAN_SSCTL_WUREQEN_M 0x00000010U |
| #define DCAN_SSCTL_WUREQEN_S 4U |
| #define DCAN_SSCTL_AUTOWU 0x00000020U |
| #define DCAN_SSCTL_AUTOWU_M 0x00000020U |
| #define DCAN_SSCTL_AUTOWU_S 5U |
| #define DCAN_SSCTL_EXTTSCNTEN 0x00000040U |
| #define DCAN_SSCTL_EXTTSCNTEN_M 0x00000040U |
| #define DCAN_SSCTL_EXTTSCNTEN_S 6U |
| #define DCAN_SSSTA_RESET 0x00000001U |
| #define DCAN_SSSTA_RESET_M 0x00000001U |
| #define DCAN_SSSTA_RESET_S 0U |
| #define DCAN_SSSTA_MEMINITSTA 0x00000002U |
| #define DCAN_SSSTA_MEMINITSTA_M 0x00000002U |
| #define DCAN_SSSTA_MEMINITSTA_S 1U |
| #define DCAN_SSSTA_ENFDOE 0x00000004U |
| #define DCAN_SSSTA_ENFDOE_M 0x00000004U |
| #define DCAN_SSSTA_ENFDOE_S 2U |
| #define DCAN_SSICS_TSCNTOVFL 0x00000001U |
| #define DCAN_SSICS_TSCNTOVFL_M 0x00000001U |
| #define DCAN_SSICS_TSCNTOVFL_S 0U |
| #define DCAN_SSIRS_TSCNTOVFL 0x00000001U |
| #define DCAN_SSIRS_TSCNTOVFL_M 0x00000001U |
| #define DCAN_SSIRS_TSCNTOVFL_S 0U |
| #define DCAN_SSIECS_TSCNTOVFL 0x00000001U |
| #define DCAN_SSIECS_TSCNTOVFL_M 0x00000001U |
| #define DCAN_SSIECS_TSCNTOVFL_S 0U |
| #define DCAN_SSIE_TSCNTOVFL 0x00000001U |
| #define DCAN_SSIE_TSCNTOVFL_M 0x00000001U |
| #define DCAN_SSIE_TSCNTOVFL_S 0U |
| #define DCAN_SSIES_TSCNTOVFL 0x00000001U |
| #define DCAN_SSIES_TSCNTOVFL_M 0x00000001U |
| #define DCAN_SSIES_TSCNTOVFL_S 0U |
| #define DCAN_SSEOI_EOI_W 8U |
| #define DCAN_SSEOI_EOI_M 0x000000FFU |
| #define DCAN_SSEOI_EOI_S 0U |
| #define DCAN_EXTTSPS_PRESCALER_W 24U |
| #define DCAN_EXTTSPS_PRESCALER_M 0x00FFFFFFU |
| #define DCAN_EXTTSPS_PRESCALER_S 0U |
| #define DCAN_EXTTSUSI_INTRCNT_W 5U |
| #define DCAN_EXTTSUSI_INTRCNT_M 0x0000001FU |
| #define DCAN_EXTTSUSI_INTRCNT_S 0U |
| #define DCAN_ERRREV_REVMIN_W 6U |
| #define DCAN_ERRREV_REVMIN_M 0x0000003FU |
| #define DCAN_ERRREV_REVMIN_S 0U |
| #define DCAN_ERRREV_REVCUSTOM_W 2U |
| #define DCAN_ERRREV_REVCUSTOM_M 0x000000C0U |
| #define DCAN_ERRREV_REVCUSTOM_S 6U |
| #define DCAN_ERRREV_REVMAJ_W 3U |
| #define DCAN_ERRREV_REVMAJ_M 0x00000700U |
| #define DCAN_ERRREV_REVMAJ_S 8U |
| #define DCAN_ERRREV_REVRTL_W 5U |
| #define DCAN_ERRREV_REVRTL_M 0x0000F800U |
| #define DCAN_ERRREV_REVRTL_S 11U |
| #define DCAN_ERRREV_MODULEID_W 12U |
| #define DCAN_ERRREV_MODULEID_M 0x0FFF0000U |
| #define DCAN_ERRREV_MODULEID_S 16U |
| #define DCAN_ERRREV_BU_W 2U |
| #define DCAN_ERRREV_BU_M 0x30000000U |
| #define DCAN_ERRREV_BU_S 28U |
| #define DCAN_ERRREV_SCHEME_W 2U |
| #define DCAN_ERRREV_SCHEME_M 0xC0000000U |
| #define DCAN_ERRREV_SCHEME_S 30U |
| #define DCAN_ERRVEC_ECCVEC_W 11U |
| #define DCAN_ERRVEC_ECCVEC_M 0x000007FFU |
| #define DCAN_ERRVEC_ECCVEC_S 0U |
| #define DCAN_ERRVEC_RDSVBUS 0x00008000U |
| #define DCAN_ERRVEC_RDSVBUS_M 0x00008000U |
| #define DCAN_ERRVEC_RDSVBUS_S 15U |
| #define DCAN_ERRVEC_RDSVBUSA_W 8U |
| #define DCAN_ERRVEC_RDSVBUSA_M 0x00FF0000U |
| #define DCAN_ERRVEC_RDSVBUSA_S 16U |
| #define DCAN_ERRVEC_SVBUSDONE 0x01000000U |
| #define DCAN_ERRVEC_SVBUSDONE_M 0x01000000U |
| #define DCAN_ERRVEC_SVBUSDONE_S 24U |
| #define DCAN_ERRSTA_NUMRAMS_W 11U |
| #define DCAN_ERRSTA_NUMRAMS_M 0x000007FFU |
| #define DCAN_ERRSTA_NUMRAMS_S 0U |
| #define DCAN_ERRWRAPREV_REVMIN_W 6U |
| #define DCAN_ERRWRAPREV_REVMIN_M 0x0000003FU |
| #define DCAN_ERRWRAPREV_REVMIN_S 0U |
| #define DCAN_ERRWRAPREV_REVCUSTOM_W 2U |
| #define DCAN_ERRWRAPREV_REVCUSTOM_M 0x000000C0U |
| #define DCAN_ERRWRAPREV_REVCUSTOM_S 6U |
| #define DCAN_ERRWRAPREV_REVMAJ_W 3U |
| #define DCAN_ERRWRAPREV_REVMAJ_M 0x00000700U |
| #define DCAN_ERRWRAPREV_REVMAJ_S 8U |
| #define DCAN_ERRWRAPREV_REVRTL_W 5U |
| #define DCAN_ERRWRAPREV_REVRTL_M 0x0000F800U |
| #define DCAN_ERRWRAPREV_REVRTL_S 11U |
| #define DCAN_ERRWRAPREV_MODULEID_W 12U |
| #define DCAN_ERRWRAPREV_MODULEID_M 0x0FFF0000U |
| #define DCAN_ERRWRAPREV_MODULEID_S 16U |
| #define DCAN_ERRWRAPREV_BU_W 2U |
| #define DCAN_ERRWRAPREV_BU_M 0x30000000U |
| #define DCAN_ERRWRAPREV_BU_S 28U |
| #define DCAN_ERRWRAPREV_SCHEME_W 2U |
| #define DCAN_ERRWRAPREV_SCHEME_M 0xC0000000U |
| #define DCAN_ERRWRAPREV_SCHEME_S 30U |
| #define DCAN_ERRCTL_ECCEN 0x00000001U |
| #define DCAN_ERRCTL_ECCEN_M 0x00000001U |
| #define DCAN_ERRCTL_ECCEN_S 0U |
| #define DCAN_ERRCTL_ECCCHECK 0x00000002U |
| #define DCAN_ERRCTL_ECCCHECK_M 0x00000002U |
| #define DCAN_ERRCTL_ECCCHECK_S 1U |
| #define DCAN_ERRCTL_ENRMW 0x00000004U |
| #define DCAN_ERRCTL_ENRMW_M 0x00000004U |
| #define DCAN_ERRCTL_ENRMW_S 2U |
| #define DCAN_ERRCTL_FRCSEC 0x00000008U |
| #define DCAN_ERRCTL_FRCSEC_M 0x00000008U |
| #define DCAN_ERRCTL_FRCSEC_S 3U |
| #define DCAN_ERRCTL_FRCDED 0x00000010U |
| #define DCAN_ERRCTL_FRCDED_M 0x00000010U |
| #define DCAN_ERRCTL_FRCDED_S 4U |
| #define DCAN_ERRCTL_FRCNROW 0x00000020U |
| #define DCAN_ERRCTL_FRCNROW_M 0x00000020U |
| #define DCAN_ERRCTL_FRCNROW_S 5U |
| #define DCAN_ERRCTL_ERRONCE 0x00000040U |
| #define DCAN_ERRCTL_ERRONCE_M 0x00000040U |
| #define DCAN_ERRCTL_ERRONCE_S 6U |
| #define DCAN_ERRCTL_CHECKPAR 0x00000080U |
| #define DCAN_ERRCTL_CHECKPAR_M 0x00000080U |
| #define DCAN_ERRCTL_CHECKPAR_S 7U |
| #define DCAN_ERRCTL_CHECKSVBTO 0x00000100U |
| #define DCAN_ERRCTL_CHECKSVBTO_M 0x00000100U |
| #define DCAN_ERRCTL_CHECKSVBTO_S 8U |
| #define DCAN_ERRCTL1_ECCROW_W 32U |
| #define DCAN_ERRCTL1_ECCROW_M 0xFFFFFFFFU |
| #define DCAN_ERRCTL1_ECCROW_S 0U |
| #define DCAN_ERRCTL2_ECCB1_W 16U |
| #define DCAN_ERRCTL2_ECCB1_M 0x0000FFFFU |
| #define DCAN_ERRCTL2_ECCB1_S 0U |
| #define DCAN_ERRCTL2_ECCB2_W 16U |
| #define DCAN_ERRCTL2_ECCB2_M 0xFFFF0000U |
| #define DCAN_ERRCTL2_ECCB2_S 16U |
| #define DCAN_ERRSTA1_ECCSEC_W 2U |
| #define DCAN_ERRSTA1_ECCSEC_M 0x00000003U |
| #define DCAN_ERRSTA1_ECCSEC_S 0U |
| #define DCAN_ERRSTA1_ECCDED_W 2U |
| #define DCAN_ERRSTA1_ECCDED_M 0x0000000CU |
| #define DCAN_ERRSTA1_ECCDED_S 2U |
| #define DCAN_ERRSTA1_ECCOTHER 0x00000010U |
| #define DCAN_ERRSTA1_ECCOTHER_M 0x00000010U |
| #define DCAN_ERRSTA1_ECCOTHER_S 4U |
| #define DCAN_ERRSTA1_PARERR_W 2U |
| #define DCAN_ERRSTA1_PARERR_M 0x00000060U |
| #define DCAN_ERRSTA1_PARERR_S 5U |
| #define DCAN_ERRSTA1_CTLERR 0x00000080U |
| #define DCAN_ERRSTA1_CTLERR_M 0x00000080U |
| #define DCAN_ERRSTA1_CTLERR_S 7U |
| #define DCAN_ERRSTA1_CLRECCSEC_W 2U |
| #define DCAN_ERRSTA1_CLRECCSEC_M 0x00000300U |
| #define DCAN_ERRSTA1_CLRECCSEC_S 8U |
| #define DCAN_ERRSTA1_CLRECCDED_W 2U |
| #define DCAN_ERRSTA1_CLRECCDED_M 0x00000C00U |
| #define DCAN_ERRSTA1_CLRECCDED_S 10U |
| #define DCAN_ERRSTA1_CLRECCOT 0x00001000U |
| #define DCAN_ERRSTA1_CLRECCOT_M 0x00001000U |
| #define DCAN_ERRSTA1_CLRECCOT_S 12U |
| #define DCAN_ERRSTA1_CLRPARERR_W 2U |
| #define DCAN_ERRSTA1_CLRPARERR_M 0x00006000U |
| #define DCAN_ERRSTA1_CLRPARERR_S 13U |
| #define DCAN_ERRSTA1_CLRCTLERR 0x00008000U |
| #define DCAN_ERRSTA1_CLRCTLERR_M 0x00008000U |
| #define DCAN_ERRSTA1_CLRCTLERR_S 15U |
| #define DCAN_ERRSTA1_ECCB1_W 16U |
| #define DCAN_ERRSTA1_ECCB1_M 0xFFFF0000U |
| #define DCAN_ERRSTA1_ECCB1_S 16U |
| #define DCAN_ERRSTA2_ECCROW_W 32U |
| #define DCAN_ERRSTA2_ECCROW_M 0xFFFFFFFFU |
| #define DCAN_ERRSTA2_ECCROW_S 0U |
| #define DCAN_ERRSTA3_WBPEND 0x00000001U |
| #define DCAN_ERRSTA3_WBPEND_M 0x00000001U |
| #define DCAN_ERRSTA3_WBPEND_S 0U |
| #define DCAN_ERRSTA3_SVBUSTO 0x00000002U |
| #define DCAN_ERRSTA3_SVBUSTO_M 0x00000002U |
| #define DCAN_ERRSTA3_SVBUSTO_S 1U |
| #define DCAN_ERRSTA3_CLRSVBTO 0x00000200U |
| #define DCAN_ERRSTA3_CLRSVBTO_M 0x00000200U |
| #define DCAN_ERRSTA3_CLRSVBTO_S 9U |
| #define DCAN_SECEOI_EOIWR 0x00000001U |
| #define DCAN_SECEOI_EOIWR_M 0x00000001U |
| #define DCAN_SECEOI_EOIWR_S 0U |
| #define DCAN_SECSTA_MGSPEND 0x00000001U |
| #define DCAN_SECSTA_MGSPEND_M 0x00000001U |
| #define DCAN_SECSTA_MGSPEND_S 0U |
| #define DCAN_SECENSET_MSGENSET 0x00000001U |
| #define DCAN_SECENSET_MSGENSET_M 0x00000001U |
| #define DCAN_SECENSET_MSGENSET_S 0U |
| #define DCAN_SECENCLR_MSGENCLR 0x00000001U |
| #define DCAN_SECENCLR_MSGENCLR_M 0x00000001U |
| #define DCAN_SECENCLR_MSGENCLR_S 0U |
| #define DCAN_DEDEOI_EOIWR 0x00000001U |
| #define DCAN_DEDEOI_EOIWR_M 0x00000001U |
| #define DCAN_DEDEOI_EOIWR_S 0U |
| #define DCAN_DEDSTA_MSGPEND 0x00000001U |
| #define DCAN_DEDSTA_MSGPEND_M 0x00000001U |
| #define DCAN_DEDSTA_MSGPEND_S 0U |
| #define DCAN_DEDSTA_TXREQPEND 0x00000002U |
| #define DCAN_DEDSTA_TXREQPEND_M 0x00000002U |
| #define DCAN_DEDSTA_TXREQPEND_S 1U |
| #define DCAN_DEDENSET_MSGENSET 0x00000001U |
| #define DCAN_DEDENSET_MSGENSET_M 0x00000001U |
| #define DCAN_DEDENSET_MSGENSET_S 0U |
| #define DCAN_DEDENSET_TXREQENSET 0x00000002U |
| #define DCAN_DEDENSET_TXREQENSET_M 0x00000002U |
| #define DCAN_DEDENSET_TXREQENSET_S 1U |
| #define DCAN_DEDENCLR_MSGENCLR 0x00000001U |
| #define DCAN_DEDENCLR_MSGENCLR_M 0x00000001U |
| #define DCAN_DEDENCLR_MSGENCLR_S 0U |
| #define DCAN_DEDENCLR_TXREQENCLR 0x00000002U |
| #define DCAN_DEDENCLR_TXREQENCLR_M 0x00000002U |
| #define DCAN_DEDENCLR_TXREQENCLR_S 1U |
| #define DCAN_AGGRENSET_PARITY 0x00000001U |
| #define DCAN_AGGRENSET_PARITY_M 0x00000001U |
| #define DCAN_AGGRENSET_PARITY_S 0U |
| #define DCAN_AGGRENSET_TIMEOUT 0x00000002U |
| #define DCAN_AGGRENSET_TIMEOUT_M 0x00000002U |
| #define DCAN_AGGRENSET_TIMEOUT_S 1U |
| #define DCAN_AGGRENCLR_PARITY 0x00000001U |
| #define DCAN_AGGRENCLR_PARITY_M 0x00000001U |
| #define DCAN_AGGRENCLR_PARITY_S 0U |
| #define DCAN_AGGRENCLR_TIMEOUT 0x00000002U |
| #define DCAN_AGGRENCLR_TIMEOUT_M 0x00000002U |
| #define DCAN_AGGRENCLR_TIMEOUT_S 1U |
| #define DCAN_AGGRSTASET_PARITY_W 2U |
| #define DCAN_AGGRSTASET_PARITY_M 0x00000003U |
| #define DCAN_AGGRSTASET_PARITY_S 0U |
| #define DCAN_AGGRSTASET_TIMEOUT_W 2U |
| #define DCAN_AGGRSTASET_TIMEOUT_M 0x0000000CU |
| #define DCAN_AGGRSTASET_TIMEOUT_S 2U |
| #define DCAN_AGGRSTACLR_PARITY_W 2U |
| #define DCAN_AGGRSTACLR_PARITY_M 0x00000003U |
| #define DCAN_AGGRSTACLR_PARITY_S 0U |
| #define DCAN_AGGRSTACLR_TIMEOUT_W 2U |
| #define DCAN_AGGRSTACLR_TIMEOUT_M 0x0000000CU |
| #define DCAN_AGGRSTACLR_TIMEOUT_S 2U |
| #define DCAN_DESC_MINREV_W 4U |
| #define DCAN_DESC_MINREV_M 0x0000000FU |
| #define DCAN_DESC_MINREV_S 0U |
| #define DCAN_DESC_MINREV_MINIMUM 0x00000000U |
| #define DCAN_DESC_MINREV_MAXIMUM 0x0000000FU |
| #define DCAN_DESC_MAJREV_W 4U |
| #define DCAN_DESC_MAJREV_M 0x000000F0U |
| #define DCAN_DESC_MAJREV_S 4U |
| #define DCAN_DESC_MAJREV_MINIMUM 0x00000000U |
| #define DCAN_DESC_MAJREV_MAXIMUM 0x000000F0U |
| #define DCAN_DESC_FEATUREVER_W 4U |
| #define DCAN_DESC_FEATUREVER_M 0x0000F000U |
| #define DCAN_DESC_FEATUREVER_S 12U |
| #define DCAN_DESC_FEATUREVER_VERSION_0 0x00000000U |
| #define DCAN_DESC_FEATUREVER_VERSION_1 0x00001000U |
| #define DCAN_DESC_MODULEID_W 16U |
| #define DCAN_DESC_MODULEID_M 0xFFFF0000U |
| #define DCAN_DESC_MODULEID_S 16U |
| #define DCAN_DESC_MODULEID_MINIMUM 0x00000000U |
| #define DCAN_DESC_MODULEID_MAXIMUM 0xFFFF0000U |
| #define DCAN_IMASK0_INTL0 0x00000001U |
| #define DCAN_IMASK0_INTL0_M 0x00000001U |
| #define DCAN_IMASK0_INTL0_S 0U |
| #define DCAN_IMASK0_INTL0_CLR 0x00000000U |
| #define DCAN_IMASK0_INTL0_SET 0x00000001U |
| #define DCAN_IMASK0_INTL1 0x00000002U |
| #define DCAN_IMASK0_INTL1_M 0x00000002U |
| #define DCAN_IMASK0_INTL1_S 1U |
| #define DCAN_IMASK0_INTL1_CLR 0x00000000U |
| #define DCAN_IMASK0_INTL1_SET 0x00000002U |
| #define DCAN_IMASK0_SEC 0x00000004U |
| #define DCAN_IMASK0_SEC_M 0x00000004U |
| #define DCAN_IMASK0_SEC_S 2U |
| #define DCAN_IMASK0_SEC_CLR 0x00000000U |
| #define DCAN_IMASK0_SEC_SET 0x00000004U |
| #define DCAN_IMASK0_DED 0x00000008U |
| #define DCAN_IMASK0_DED_M 0x00000008U |
| #define DCAN_IMASK0_DED_S 3U |
| #define DCAN_IMASK0_DED_CLR 0x00000000U |
| #define DCAN_IMASK0_DED_SET 0x00000008U |
| #define DCAN_IMASK0_TSORWAKE 0x00000010U |
| #define DCAN_IMASK0_TSORWAKE_M 0x00000010U |
| #define DCAN_IMASK0_TSORWAKE_S 4U |
| #define DCAN_IMASK0_TSORWAKE_CLR 0x00000000U |
| #define DCAN_IMASK0_TSORWAKE_SET 0x00000010U |
| #define DCAN_IMASK0_FE2 0x00000020U |
| #define DCAN_IMASK0_FE2_M 0x00000020U |
| #define DCAN_IMASK0_FE2_S 5U |
| #define DCAN_IMASK0_FE2_CLR 0x00000000U |
| #define DCAN_IMASK0_FE2_SET 0x00000020U |
| #define DCAN_IMASK0_DMADONE0 0x00000040U |
| #define DCAN_IMASK0_DMADONE0_M 0x00000040U |
| #define DCAN_IMASK0_DMADONE0_S 6U |
| #define DCAN_IMASK0_DMADONE0_CLR 0x00000000U |
| #define DCAN_IMASK0_DMADONE0_SET 0x00000040U |
| #define DCAN_IMASK0_DMADONE1 0x00000080U |
| #define DCAN_IMASK0_DMADONE1_M 0x00000080U |
| #define DCAN_IMASK0_DMADONE1_S 7U |
| #define DCAN_IMASK0_DMADONE1_CLR 0x00000000U |
| #define DCAN_IMASK0_DMADONE1_SET 0x00000080U |
| #define DCAN_RIS0_INTL0 0x00000001U |
| #define DCAN_RIS0_INTL0_M 0x00000001U |
| #define DCAN_RIS0_INTL0_S 0U |
| #define DCAN_RIS0_INTL0_CLR 0x00000000U |
| #define DCAN_RIS0_INTL0_SET 0x00000001U |
| #define DCAN_RIS0_INTL1 0x00000002U |
| #define DCAN_RIS0_INTL1_M 0x00000002U |
| #define DCAN_RIS0_INTL1_S 1U |
| #define DCAN_RIS0_INTL1_CLR 0x00000000U |
| #define DCAN_RIS0_INTL1_SET 0x00000002U |
| #define DCAN_RIS0_SEC 0x00000004U |
| #define DCAN_RIS0_SEC_M 0x00000004U |
| #define DCAN_RIS0_SEC_S 2U |
| #define DCAN_RIS0_SEC_CLR 0x00000000U |
| #define DCAN_RIS0_SEC_SET 0x00000004U |
| #define DCAN_RIS0_DED 0x00000008U |
| #define DCAN_RIS0_DED_M 0x00000008U |
| #define DCAN_RIS0_DED_S 3U |
| #define DCAN_RIS0_DED_CLR 0x00000000U |
| #define DCAN_RIS0_DED_SET 0x00000008U |
| #define DCAN_RIS0_TSORWAKE 0x00000010U |
| #define DCAN_RIS0_TSORWAKE_M 0x00000010U |
| #define DCAN_RIS0_TSORWAKE_S 4U |
| #define DCAN_RIS0_TSORWAKE_CLR 0x00000000U |
| #define DCAN_RIS0_TSORWAKE_SET 0x00000010U |
| #define DCAN_RIS0_FE2 0x00000020U |
| #define DCAN_RIS0_FE2_M 0x00000020U |
| #define DCAN_RIS0_FE2_S 5U |
| #define DCAN_RIS0_FE2_CLR 0x00000000U |
| #define DCAN_RIS0_FE2_SET 0x00000020U |
| #define DCAN_RIS0_DMADONE0 0x00000040U |
| #define DCAN_RIS0_DMADONE0_M 0x00000040U |
| #define DCAN_RIS0_DMADONE0_S 6U |
| #define DCAN_RIS0_DMADONE0_CLR 0x00000000U |
| #define DCAN_RIS0_DMADONE0_SET 0x00000040U |
| #define DCAN_RIS0_DMADONE1 0x00000080U |
| #define DCAN_RIS0_DMADONE1_M 0x00000080U |
| #define DCAN_RIS0_DMADONE1_S 7U |
| #define DCAN_RIS0_DMADONE1_CLR 0x00000000U |
| #define DCAN_RIS0_DMADONE1_SET 0x00000080U |
| #define DCAN_MIS0_INTL0 0x00000001U |
| #define DCAN_MIS0_INTL0_M 0x00000001U |
| #define DCAN_MIS0_INTL0_S 0U |
| #define DCAN_MIS0_INTL0_CLR 0x00000000U |
| #define DCAN_MIS0_INTL0_SET 0x00000001U |
| #define DCAN_MIS0_INTL1 0x00000002U |
| #define DCAN_MIS0_INTL1_M 0x00000002U |
| #define DCAN_MIS0_INTL1_S 1U |
| #define DCAN_MIS0_INTL1_CLR 0x00000000U |
| #define DCAN_MIS0_INTL1_SET 0x00000002U |
| #define DCAN_MIS0_SEC 0x00000004U |
| #define DCAN_MIS0_SEC_M 0x00000004U |
| #define DCAN_MIS0_SEC_S 2U |
| #define DCAN_MIS0_SEC_CLR 0x00000000U |
| #define DCAN_MIS0_SEC_SET 0x00000004U |
| #define DCAN_MIS0_DED 0x00000008U |
| #define DCAN_MIS0_DED_M 0x00000008U |
| #define DCAN_MIS0_DED_S 3U |
| #define DCAN_MIS0_DED_CLR 0x00000000U |
| #define DCAN_MIS0_DED_SET 0x00000008U |
| #define DCAN_MIS0_TSORWAKE 0x00000010U |
| #define DCAN_MIS0_TSORWAKE_M 0x00000010U |
| #define DCAN_MIS0_TSORWAKE_S 4U |
| #define DCAN_MIS0_TSORWAKE_CLR 0x00000000U |
| #define DCAN_MIS0_TSORWAKE_SET 0x00000010U |
| #define DCAN_MIS0_FE2 0x00000020U |
| #define DCAN_MIS0_FE2_M 0x00000020U |
| #define DCAN_MIS0_FE2_S 5U |
| #define DCAN_MIS0_FE2_CLR 0x00000000U |
| #define DCAN_MIS0_FE2_SET 0x00000020U |
| #define DCAN_MIS0_DMADONE0 0x00000040U |
| #define DCAN_MIS0_DMADONE0_M 0x00000040U |
| #define DCAN_MIS0_DMADONE0_S 6U |
| #define DCAN_MIS0_DMADONE0_CLR 0x00000000U |
| #define DCAN_MIS0_DMADONE0_SET 0x00000040U |
| #define DCAN_MIS0_DMADONE1 0x00000080U |
| #define DCAN_MIS0_DMADONE1_M 0x00000080U |
| #define DCAN_MIS0_DMADONE1_S 7U |
| #define DCAN_MIS0_DMADONE1_CLR 0x00000000U |
| #define DCAN_MIS0_DMADONE1_SET 0x00000080U |
| #define DCAN_ISET0_INTL0 0x00000001U |
| #define DCAN_ISET0_INTL0_M 0x00000001U |
| #define DCAN_ISET0_INTL0_S 0U |
| #define DCAN_ISET0_INTL0_NO_EFFECT 0x00000000U |
| #define DCAN_ISET0_INTL0_SET 0x00000001U |
| #define DCAN_ISET0_INTL1 0x00000002U |
| #define DCAN_ISET0_INTL1_M 0x00000002U |
| #define DCAN_ISET0_INTL1_S 1U |
| #define DCAN_ISET0_INTL1_NO_EFFECT 0x00000000U |
| #define DCAN_ISET0_INTL1_SET 0x00000002U |
| #define DCAN_ISET0_SEC 0x00000004U |
| #define DCAN_ISET0_SEC_M 0x00000004U |
| #define DCAN_ISET0_SEC_S 2U |
| #define DCAN_ISET0_SEC_NO_EFFECT 0x00000000U |
| #define DCAN_ISET0_SEC_SET 0x00000004U |
| #define DCAN_ISET0_DED 0x00000008U |
| #define DCAN_ISET0_DED_M 0x00000008U |
| #define DCAN_ISET0_DED_S 3U |
| #define DCAN_ISET0_DED_NO_EFFECT 0x00000000U |
| #define DCAN_ISET0_DED_SET 0x00000008U |
| #define DCAN_ISET0_TSORWAKE 0x00000010U |
| #define DCAN_ISET0_TSORWAKE_M 0x00000010U |
| #define DCAN_ISET0_TSORWAKE_S 4U |
| #define DCAN_ISET0_TSORWAKE_NO_EFFECT 0x00000000U |
| #define DCAN_ISET0_TSORWAKE_SET 0x00000010U |
| #define DCAN_ISET0_FE2 0x00000020U |
| #define DCAN_ISET0_FE2_M 0x00000020U |
| #define DCAN_ISET0_FE2_S 5U |
| #define DCAN_ISET0_FE2_NO_EFFECT 0x00000000U |
| #define DCAN_ISET0_FE2_SET 0x00000020U |
| #define DCAN_ISET0_DMADONE0 0x00000040U |
| #define DCAN_ISET0_DMADONE0_M 0x00000040U |
| #define DCAN_ISET0_DMADONE0_S 6U |
| #define DCAN_ISET0_DMADONE0_NO_EFFECT 0x00000000U |
| #define DCAN_ISET0_DMADONE0_SET 0x00000040U |
| #define DCAN_ISET0_DMADONE1 0x00000080U |
| #define DCAN_ISET0_DMADONE1_M 0x00000080U |
| #define DCAN_ISET0_DMADONE1_S 7U |
| #define DCAN_ISET0_DMADONE1_NO_EFFECT 0x00000000U |
| #define DCAN_ISET0_DMADONE1_SET 0x00000080U |
| #define DCAN_ICLR0_INTL0 0x00000001U |
| #define DCAN_ICLR0_INTL0_M 0x00000001U |
| #define DCAN_ICLR0_INTL0_S 0U |
| #define DCAN_ICLR0_INTL0_NO_EFFECT 0x00000000U |
| #define DCAN_ICLR0_INTL0_CLR 0x00000001U |
| #define DCAN_ICLR0_INTL1 0x00000002U |
| #define DCAN_ICLR0_INTL1_M 0x00000002U |
| #define DCAN_ICLR0_INTL1_S 1U |
| #define DCAN_ICLR0_INTL1_NO_EFFECT 0x00000000U |
| #define DCAN_ICLR0_INTL1_CLR 0x00000002U |
| #define DCAN_ICLR0_SEC 0x00000004U |
| #define DCAN_ICLR0_SEC_M 0x00000004U |
| #define DCAN_ICLR0_SEC_S 2U |
| #define DCAN_ICLR0_SEC_NO_EFFECT 0x00000000U |
| #define DCAN_ICLR0_SEC_CLR 0x00000004U |
| #define DCAN_ICLR0_DED 0x00000008U |
| #define DCAN_ICLR0_DED_M 0x00000008U |
| #define DCAN_ICLR0_DED_S 3U |
| #define DCAN_ICLR0_DED_NO_EFFECT 0x00000000U |
| #define DCAN_ICLR0_DED_CLR 0x00000008U |
| #define DCAN_ICLR0_TSORWAKE 0x00000010U |
| #define DCAN_ICLR0_TSORWAKE_M 0x00000010U |
| #define DCAN_ICLR0_TSORWAKE_S 4U |
| #define DCAN_ICLR0_TSORWAKE_NO_EFFECT 0x00000000U |
| #define DCAN_ICLR0_TSORWAKE_CLR 0x00000010U |
| #define DCAN_ICLR0_FE2 0x00000020U |
| #define DCAN_ICLR0_FE2_M 0x00000020U |
| #define DCAN_ICLR0_FE2_S 5U |
| #define DCAN_ICLR0_FE2_NO_EFFECT 0x00000000U |
| #define DCAN_ICLR0_FE2_CLR 0x00000020U |
| #define DCAN_ICLR0_DMADONE0 0x00000040U |
| #define DCAN_ICLR0_DMADONE0_M 0x00000040U |
| #define DCAN_ICLR0_DMADONE0_S 6U |
| #define DCAN_ICLR0_DMADONE0_NO_EFFECT 0x00000000U |
| #define DCAN_ICLR0_DMADONE0_CLR 0x00000040U |
| #define DCAN_ICLR0_DMADONE1 0x00000080U |
| #define DCAN_ICLR0_DMADONE1_M 0x00000080U |
| #define DCAN_ICLR0_DMADONE1_S 7U |
| #define DCAN_ICLR0_DMADONE1_NO_EFFECT 0x00000000U |
| #define DCAN_ICLR0_DMADONE1_CLR 0x00000080U |
| #define DCAN_IMASK1_INTL0 0x00000001U |
| #define DCAN_IMASK1_INTL0_M 0x00000001U |
| #define DCAN_IMASK1_INTL0_S 0U |
| #define DCAN_IMASK1_INTL0_CLR 0x00000000U |
| #define DCAN_IMASK1_INTL0_SET 0x00000001U |
| #define DCAN_IMASK1_INTL1 0x00000002U |
| #define DCAN_IMASK1_INTL1_M 0x00000002U |
| #define DCAN_IMASK1_INTL1_S 1U |
| #define DCAN_IMASK1_INTL1_CLR 0x00000000U |
| #define DCAN_IMASK1_INTL1_SET 0x00000002U |
| #define DCAN_IMASK1_SEC 0x00000004U |
| #define DCAN_IMASK1_SEC_M 0x00000004U |
| #define DCAN_IMASK1_SEC_S 2U |
| #define DCAN_IMASK1_SEC_CLR 0x00000000U |
| #define DCAN_IMASK1_SEC_SET 0x00000004U |
| #define DCAN_IMASK1_DED 0x00000008U |
| #define DCAN_IMASK1_DED_M 0x00000008U |
| #define DCAN_IMASK1_DED_S 3U |
| #define DCAN_IMASK1_DED_CLR 0x00000000U |
| #define DCAN_IMASK1_DED_SET 0x00000008U |
| #define DCAN_IMASK1_TSORWAKE 0x00000010U |
| #define DCAN_IMASK1_TSORWAKE_M 0x00000010U |
| #define DCAN_IMASK1_TSORWAKE_S 4U |
| #define DCAN_IMASK1_TSORWAKE_CLR 0x00000000U |
| #define DCAN_IMASK1_TSORWAKE_SET 0x00000010U |
| #define DCAN_IMASK1_FE2 0x00000020U |
| #define DCAN_IMASK1_FE2_M 0x00000020U |
| #define DCAN_IMASK1_FE2_S 5U |
| #define DCAN_IMASK1_FE2_CLR 0x00000000U |
| #define DCAN_IMASK1_FE2_SET 0x00000020U |
| #define DCAN_IMASK1_DMADONE0 0x00000040U |
| #define DCAN_IMASK1_DMADONE0_M 0x00000040U |
| #define DCAN_IMASK1_DMADONE0_S 6U |
| #define DCAN_IMASK1_DMADONE0_CLR 0x00000000U |
| #define DCAN_IMASK1_DMADONE0_SET 0x00000040U |
| #define DCAN_IMASK1_DMADONE1 0x00000080U |
| #define DCAN_IMASK1_DMADONE1_M 0x00000080U |
| #define DCAN_IMASK1_DMADONE1_S 7U |
| #define DCAN_IMASK1_DMADONE1_CLR 0x00000000U |
| #define DCAN_IMASK1_DMADONE1_SET 0x00000080U |
| #define DCAN_RIS1_INTL0 0x00000001U |
| #define DCAN_RIS1_INTL0_M 0x00000001U |
| #define DCAN_RIS1_INTL0_S 0U |
| #define DCAN_RIS1_INTL0_CLR 0x00000000U |
| #define DCAN_RIS1_INTL0_SET 0x00000001U |
| #define DCAN_RIS1_INTL1 0x00000002U |
| #define DCAN_RIS1_INTL1_M 0x00000002U |
| #define DCAN_RIS1_INTL1_S 1U |
| #define DCAN_RIS1_INTL1_CLR 0x00000000U |
| #define DCAN_RIS1_INTL1_SET 0x00000002U |
| #define DCAN_RIS1_SEC 0x00000004U |
| #define DCAN_RIS1_SEC_M 0x00000004U |
| #define DCAN_RIS1_SEC_S 2U |
| #define DCAN_RIS1_SEC_CLR 0x00000000U |
| #define DCAN_RIS1_SEC_SET 0x00000004U |
| #define DCAN_RIS1_DED 0x00000008U |
| #define DCAN_RIS1_DED_M 0x00000008U |
| #define DCAN_RIS1_DED_S 3U |
| #define DCAN_RIS1_DED_CLR 0x00000000U |
| #define DCAN_RIS1_DED_SET 0x00000008U |
| #define DCAN_RIS1_TSORWAKE 0x00000010U |
| #define DCAN_RIS1_TSORWAKE_M 0x00000010U |
| #define DCAN_RIS1_TSORWAKE_S 4U |
| #define DCAN_RIS1_TSORWAKE_CLR 0x00000000U |
| #define DCAN_RIS1_TSORWAKE_SET 0x00000010U |
| #define DCAN_RIS1_FE2 0x00000020U |
| #define DCAN_RIS1_FE2_M 0x00000020U |
| #define DCAN_RIS1_FE2_S 5U |
| #define DCAN_RIS1_FE2_CLR 0x00000000U |
| #define DCAN_RIS1_FE2_SET 0x00000020U |
| #define DCAN_RIS1_DMADONE0 0x00000040U |
| #define DCAN_RIS1_DMADONE0_M 0x00000040U |
| #define DCAN_RIS1_DMADONE0_S 6U |
| #define DCAN_RIS1_DMADONE0_CLR 0x00000000U |
| #define DCAN_RIS1_DMADONE0_SET 0x00000040U |
| #define DCAN_RIS1_DMADONE1 0x00000080U |
| #define DCAN_RIS1_DMADONE1_M 0x00000080U |
| #define DCAN_RIS1_DMADONE1_S 7U |
| #define DCAN_RIS1_DMADONE1_CLR 0x00000000U |
| #define DCAN_RIS1_DMADONE1_SET 0x00000080U |
| #define DCAN_MIS1_INTL0 0x00000001U |
| #define DCAN_MIS1_INTL0_M 0x00000001U |
| #define DCAN_MIS1_INTL0_S 0U |
| #define DCAN_MIS1_INTL0_CLR 0x00000000U |
| #define DCAN_MIS1_INTL0_SET 0x00000001U |
| #define DCAN_MIS1_INTL1 0x00000002U |
| #define DCAN_MIS1_INTL1_M 0x00000002U |
| #define DCAN_MIS1_INTL1_S 1U |
| #define DCAN_MIS1_INTL1_CLR 0x00000000U |
| #define DCAN_MIS1_INTL1_SET 0x00000002U |
| #define DCAN_MIS1_SEC 0x00000004U |
| #define DCAN_MIS1_SEC_M 0x00000004U |
| #define DCAN_MIS1_SEC_S 2U |
| #define DCAN_MIS1_SEC_CLR 0x00000000U |
| #define DCAN_MIS1_SEC_SET 0x00000004U |
| #define DCAN_MIS1_DED 0x00000008U |
| #define DCAN_MIS1_DED_M 0x00000008U |
| #define DCAN_MIS1_DED_S 3U |
| #define DCAN_MIS1_DED_CLR 0x00000000U |
| #define DCAN_MIS1_DED_SET 0x00000008U |
| #define DCAN_MIS1_TSORWAKE 0x00000010U |
| #define DCAN_MIS1_TSORWAKE_M 0x00000010U |
| #define DCAN_MIS1_TSORWAKE_S 4U |
| #define DCAN_MIS1_TSORWAKE_CLR 0x00000000U |
| #define DCAN_MIS1_TSORWAKE_SET 0x00000010U |
| #define DCAN_MIS1_FE2 0x00000020U |
| #define DCAN_MIS1_FE2_M 0x00000020U |
| #define DCAN_MIS1_FE2_S 5U |
| #define DCAN_MIS1_FE2_CLR 0x00000000U |
| #define DCAN_MIS1_FE2_SET 0x00000020U |
| #define DCAN_MIS1_DMADONE0 0x00000040U |
| #define DCAN_MIS1_DMADONE0_M 0x00000040U |
| #define DCAN_MIS1_DMADONE0_S 6U |
| #define DCAN_MIS1_DMADONE0_CLR 0x00000000U |
| #define DCAN_MIS1_DMADONE0_SET 0x00000040U |
| #define DCAN_MIS1_DMADONE1 0x00000080U |
| #define DCAN_MIS1_DMADONE1_M 0x00000080U |
| #define DCAN_MIS1_DMADONE1_S 7U |
| #define DCAN_MIS1_DMADONE1_CLR 0x00000000U |
| #define DCAN_MIS1_DMADONE1_SET 0x00000080U |
| #define DCAN_ISET1_INTL0 0x00000001U |
| #define DCAN_ISET1_INTL0_M 0x00000001U |
| #define DCAN_ISET1_INTL0_S 0U |
| #define DCAN_ISET1_INTL0_NO_EFFECT 0x00000000U |
| #define DCAN_ISET1_INTL0_SET 0x00000001U |
| #define DCAN_ISET1_INTL1 0x00000002U |
| #define DCAN_ISET1_INTL1_M 0x00000002U |
| #define DCAN_ISET1_INTL1_S 1U |
| #define DCAN_ISET1_INTL1_NO_EFFECT 0x00000000U |
| #define DCAN_ISET1_INTL1_SET 0x00000002U |
| #define DCAN_ISET1_SEC 0x00000004U |
| #define DCAN_ISET1_SEC_M 0x00000004U |
| #define DCAN_ISET1_SEC_S 2U |
| #define DCAN_ISET1_SEC_NO_EFFECT 0x00000000U |
| #define DCAN_ISET1_SEC_SET 0x00000004U |
| #define DCAN_ISET1_DED 0x00000008U |
| #define DCAN_ISET1_DED_M 0x00000008U |
| #define DCAN_ISET1_DED_S 3U |
| #define DCAN_ISET1_DED_NO_EFFECT 0x00000000U |
| #define DCAN_ISET1_DED_SET 0x00000008U |
| #define DCAN_ISET1_TSORWAKE 0x00000010U |
| #define DCAN_ISET1_TSORWAKE_M 0x00000010U |
| #define DCAN_ISET1_TSORWAKE_S 4U |
| #define DCAN_ISET1_TSORWAKE_NO_EFFECT 0x00000000U |
| #define DCAN_ISET1_TSORWAKE_SET 0x00000010U |
| #define DCAN_ISET1_FE2 0x00000020U |
| #define DCAN_ISET1_FE2_M 0x00000020U |
| #define DCAN_ISET1_FE2_S 5U |
| #define DCAN_ISET1_FE2_NO_EFFECT 0x00000000U |
| #define DCAN_ISET1_FE2_SET 0x00000020U |
| #define DCAN_ISET1_DMADONE0 0x00000040U |
| #define DCAN_ISET1_DMADONE0_M 0x00000040U |
| #define DCAN_ISET1_DMADONE0_S 6U |
| #define DCAN_ISET1_DMADONE0_NO_EFFECT 0x00000000U |
| #define DCAN_ISET1_DMADONE0_SET 0x00000040U |
| #define DCAN_ISET1_DMADONE1 0x00000080U |
| #define DCAN_ISET1_DMADONE1_M 0x00000080U |
| #define DCAN_ISET1_DMADONE1_S 7U |
| #define DCAN_ISET1_DMADONE1_NO_EFFECT 0x00000000U |
| #define DCAN_ISET1_DMADONE1_SET 0x00000080U |
| #define DCAN_ICLR1_INTL0 0x00000001U |
| #define DCAN_ICLR1_INTL0_M 0x00000001U |
| #define DCAN_ICLR1_INTL0_S 0U |
| #define DCAN_ICLR1_INTL0_NO_EFFECT 0x00000000U |
| #define DCAN_ICLR1_INTL0_CLR 0x00000001U |
| #define DCAN_ICLR1_INTL1 0x00000002U |
| #define DCAN_ICLR1_INTL1_M 0x00000002U |
| #define DCAN_ICLR1_INTL1_S 1U |
| #define DCAN_ICLR1_INTL1_NO_EFFECT 0x00000000U |
| #define DCAN_ICLR1_INTL1_CLR 0x00000002U |
| #define DCAN_ICLR1_SEC 0x00000004U |
| #define DCAN_ICLR1_SEC_M 0x00000004U |
| #define DCAN_ICLR1_SEC_S 2U |
| #define DCAN_ICLR1_SEC_NO_EFFECT 0x00000000U |
| #define DCAN_ICLR1_SEC_CLR 0x00000004U |
| #define DCAN_ICLR1_DED 0x00000008U |
| #define DCAN_ICLR1_DED_M 0x00000008U |
| #define DCAN_ICLR1_DED_S 3U |
| #define DCAN_ICLR1_DED_NO_EFFECT 0x00000000U |
| #define DCAN_ICLR1_DED_CLR 0x00000008U |
| #define DCAN_ICLR1_TSORWAKE 0x00000010U |
| #define DCAN_ICLR1_TSORWAKE_M 0x00000010U |
| #define DCAN_ICLR1_TSORWAKE_S 4U |
| #define DCAN_ICLR1_TSORWAKE_NO_EFFECT 0x00000000U |
| #define DCAN_ICLR1_TSORWAKE_CLR 0x00000010U |
| #define DCAN_ICLR1_FE2 0x00000020U |
| #define DCAN_ICLR1_FE2_M 0x00000020U |
| #define DCAN_ICLR1_FE2_S 5U |
| #define DCAN_ICLR1_FE2_NO_EFFECT 0x00000000U |
| #define DCAN_ICLR1_FE2_CLR 0x00000020U |
| #define DCAN_ICLR1_DMADONE0 0x00000040U |
| #define DCAN_ICLR1_DMADONE0_M 0x00000040U |
| #define DCAN_ICLR1_DMADONE0_S 6U |
| #define DCAN_ICLR1_DMADONE0_NO_EFFECT 0x00000000U |
| #define DCAN_ICLR1_DMADONE0_CLR 0x00000040U |
| #define DCAN_ICLR1_DMADONE1 0x00000080U |
| #define DCAN_ICLR1_DMADONE1_M 0x00000080U |
| #define DCAN_ICLR1_DMADONE1_S 7U |
| #define DCAN_ICLR1_DMADONE1_NO_EFFECT 0x00000000U |
| #define DCAN_ICLR1_DMADONE1_CLR 0x00000080U |
| #define DCAN_CLKDIV_RATIO_W 2U |
| #define DCAN_CLKDIV_RATIO_M 0x00000003U |
| #define DCAN_CLKDIV_RATIO_S 0U |
| #define DCAN_CLKDIV_RATIO_DIV_BY_1_ 0x00000000U |
| #define DCAN_CLKDIV_RATIO_DIV_BY_2_ 0x00000001U |
| #define DCAN_CLKDIV_RATIO_DIV_BY_4_ 0x00000002U |
| #define DCAN_CLKCTL_STOPREQ 0x00000001U |
| #define DCAN_CLKCTL_STOPREQ_M 0x00000001U |
| #define DCAN_CLKCTL_STOPREQ_S 0U |
| #define DCAN_CLKCTL_STOPREQ_DISABLE 0x00000000U |
| #define DCAN_CLKCTL_STOPREQ_ENABLE 0x00000001U |
| #define DCAN_CLKCTL_WUINTEN 0x00000010U |
| #define DCAN_CLKCTL_WUINTEN_M 0x00000010U |
| #define DCAN_CLKCTL_WUINTEN_S 4U |
| #define DCAN_CLKCTL_WUINTEN_ENABLE 0x00000010U |
| #define DCAN_CLKCTL_WUINTEN_DISABLE 0x00000000U |
| #define DCAN_CLKCTL_WUGLTFLTEN 0x00000100U |
| #define DCAN_CLKCTL_WUGLTFLTEN_M 0x00000100U |
| #define DCAN_CLKCTL_WUGLTFLTEN_S 8U |
| #define DCAN_CLKCTL_WUGLTFLTEN_DISABLE 0x00000000U |
| #define DCAN_CLKCTL_WUGLTFLTEN_ENABLE 0x00000100U |
| #define DCAN_CLKSTA_STPACKSTA 0x00000001U |
| #define DCAN_CLKSTA_STPACKSTA_M 0x00000001U |
| #define DCAN_CLKSTA_STPACKSTA_S 0U |
| #define DCAN_CLKSTA_STPACKSTA_RESET 0x00000000U |
| #define DCAN_CLKSTA_STPACKSTA_SET 0x00000001U |
| #define DCAN_CLKSTA_STPREQHWOV 0x00000010U |
| #define DCAN_CLKSTA_STPREQHWOV_M 0x00000010U |
| #define DCAN_CLKSTA_STPREQHWOV_S 4U |
| #define DCAN_CLKSTA_STPREQHWOV_RESET 0x00000000U |
| #define DCAN_CLKSTA_STPREQHWOV_SET 0x00000010U |
| #define DCAN_DMA0CTL_TRIGEN 0x00000001U |
| #define DCAN_DMA0CTL_TRIGEN_M 0x00000001U |
| #define DCAN_DMA0CTL_TRIGEN_S 0U |
| #define DCAN_DMA0CTL_TRIGEN_DISABLE 0x00000000U |
| #define DCAN_DMA0CTL_TRIGEN_ENABLE 0x00000001U |
| #define DCAN_DMA0CTL_TRIGSEL_W 2U |
| #define DCAN_DMA0CTL_TRIGSEL_M 0x0000000CU |
| #define DCAN_DMA0CTL_TRIGSEL_S 2U |
| #define DCAN_DMA0CTL_TRIGSEL_TX_OTO_TRIG 0x00000000U |
| #define DCAN_DMA0CTL_TRIGSEL_RX_OTO_TRIG 0x00000008U |
| #define DCAN_DMA0CTL_TRIGSEL_TX_MTO_TRIG 0x00000004U |
| #define DCAN_DMA0CTL_TRIGSEL_RX_TTO_TRIG 0x0000000CU |
| #define DCAN_DMA0CTL_BRPOTOSEL_W 5U |
| #define DCAN_DMA0CTL_BRPOTOSEL_M 0x000001F0U |
| #define DCAN_DMA0CTL_BRPOTOSEL_S 4U |
| #define DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_0 0x00000000U |
| #define DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_2 0x00000020U |
| #define DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_3 0x00000030U |
| #define DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_4 0x00000040U |
| #define DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_5 0x00000050U |
| #define DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_6 0x00000060U |
| #define DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_7 0x00000070U |
| #define DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_8 0x00000080U |
| #define DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_9 0x00000090U |
| #define DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_10 0x000000A0U |
| #define DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_11 0x000000B0U |
| #define DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_12 0x000000C0U |
| #define DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_13 0x000000D0U |
| #define DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_14 0x000000E0U |
| #define DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_15 0x000000F0U |
| #define DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_16 0x00000100U |
| #define DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_1 0x00000010U |
| #define DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_17 0x00000110U |
| #define DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_18 0x00000120U |
| #define DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_19 0x00000130U |
| #define DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_20 0x00000140U |
| #define DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_21 0x00000150U |
| #define DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_22 0x00000160U |
| #define DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_23 0x00000170U |
| #define DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_24 0x00000180U |
| #define DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_25 0x00000190U |
| #define DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_26 0x000001A0U |
| #define DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_27 0x000001B0U |
| #define DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_28 0x000001C0U |
| #define DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_29 0x000001D0U |
| #define DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_30 0x000001E0U |
| #define DCAN_DMA0CTL_BRPOTOSEL_TX_BRP_31 0x000001F0U |
| #define DCAN_DMA0CTL_BRPMTOOFST_W 5U |
| #define DCAN_DMA0CTL_BRPMTOOFST_M 0x00007C00U |
| #define DCAN_DMA0CTL_BRPMTOOFST_S 10U |
| #define DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_0 0x00000000U |
| #define DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_1 0x00000400U |
| #define DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_2 0x00000800U |
| #define DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_3 0x00000C00U |
| #define DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_4 0x00001000U |
| #define DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_5 0x00001400U |
| #define DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_6 0x00001800U |
| #define DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_7 0x00001C00U |
| #define DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_8 0x00002000U |
| #define DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_9 0x00002400U |
| #define DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_10 0x00002800U |
| #define DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_11 0x00002C00U |
| #define DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_12 0x00003000U |
| #define DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_13 0x00003400U |
| #define DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_14 0x00003800U |
| #define DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_15 0x00003C00U |
| #define DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_16 0x00004000U |
| #define DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_17 0x00004400U |
| #define DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_18 0x00004800U |
| #define DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_19 0x00004C00U |
| #define DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_20 0x00005000U |
| #define DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_21 0x00005400U |
| #define DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_22 0x00005800U |
| #define DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_23 0x00005C00U |
| #define DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_24 0x00006000U |
| #define DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_25 0x00006400U |
| #define DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_26 0x00006800U |
| #define DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_27 0x00006C00U |
| #define DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_28 0x00007000U |
| #define DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_29 0x00007400U |
| #define DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_30 0x00007800U |
| #define DCAN_DMA0CTL_BRPMTOOFST_TX_BRP_31 0x00007C00U |
| #define DCAN_DMA0CTL_BRPMTONUM_W 6U |
| #define DCAN_DMA0CTL_BRPMTONUM_M 0x003F0000U |
| #define DCAN_DMA0CTL_BRPMTONUM_S 16U |
| #define DCAN_DMA0CTL_BRPMTONUM_MIN 0x00020000U |
| #define DCAN_DMA0CTL_BRPMTONUM_MAX 0x00200000U |
| #define DCAN_DMA0CTL_FEOTOSEL 0x01000000U |
| #define DCAN_DMA0CTL_FEOTOSEL_M 0x01000000U |
| #define DCAN_DMA0CTL_FEOTOSEL_S 24U |
| #define DCAN_DMA0CTL_FEOTOSEL_FE_0 0x00000000U |
| #define DCAN_DMA0CTL_FEOTOSEL_FE_1 0x01000000U |
| #define DCAN_DMA0CTL_BUFTTOOFST_W 5U |
| #define DCAN_DMA0CTL_BUFTTOOFST_M 0xF8000000U |
| #define DCAN_DMA0CTL_BUFTTOOFST_S 27U |
| #define DCAN_DMA0CTL_BUFTTOOFST_MIN 0x00000000U |
| #define DCAN_DMA0CTL_BUFTTOOFST_MAX 0xF0000000U |
| #define DCAN_DMA1CTL_TRIGEN 0x00000001U |
| #define DCAN_DMA1CTL_TRIGEN_M 0x00000001U |
| #define DCAN_DMA1CTL_TRIGEN_S 0U |
| #define DCAN_DMA1CTL_TRIGEN_DISABLE 0x00000000U |
| #define DCAN_DMA1CTL_TRIGEN_ENABLE 0x00000001U |
| #define DCAN_DMA1CTL_TRIGSEL_W 2U |
| #define DCAN_DMA1CTL_TRIGSEL_M 0x0000000CU |
| #define DCAN_DMA1CTL_TRIGSEL_S 2U |
| #define DCAN_DMA1CTL_TRIGSEL_TX_OTO_TRIG 0x00000000U |
| #define DCAN_DMA1CTL_TRIGSEL_RX_OTO_TRIG 0x00000008U |
| #define DCAN_DMA1CTL_TRIGSEL_TX_MTO_TRIG 0x00000004U |
| #define DCAN_DMA1CTL_TRIGSEL_RX_TTO_TRIG 0x0000000CU |
| #define DCAN_DMA1CTL_BRPOTOSEL_W 5U |
| #define DCAN_DMA1CTL_BRPOTOSEL_M 0x000001F0U |
| #define DCAN_DMA1CTL_BRPOTOSEL_S 4U |
| #define DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_0 0x00000000U |
| #define DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_2 0x00000020U |
| #define DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_3 0x00000030U |
| #define DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_4 0x00000040U |
| #define DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_5 0x00000050U |
| #define DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_6 0x00000060U |
| #define DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_7 0x00000070U |
| #define DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_8 0x00000080U |
| #define DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_9 0x00000090U |
| #define DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_10 0x000000A0U |
| #define DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_11 0x000000B0U |
| #define DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_12 0x000000C0U |
| #define DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_13 0x000000D0U |
| #define DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_14 0x000000E0U |
| #define DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_15 0x000000F0U |
| #define DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_16 0x00000100U |
| #define DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_1 0x00000010U |
| #define DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_17 0x00000110U |
| #define DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_18 0x00000120U |
| #define DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_19 0x00000130U |
| #define DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_20 0x00000140U |
| #define DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_21 0x00000150U |
| #define DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_22 0x00000160U |
| #define DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_23 0x00000170U |
| #define DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_24 0x00000180U |
| #define DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_25 0x00000190U |
| #define DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_26 0x000001A0U |
| #define DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_27 0x000001B0U |
| #define DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_28 0x000001C0U |
| #define DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_29 0x000001D0U |
| #define DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_30 0x000001E0U |
| #define DCAN_DMA1CTL_BRPOTOSEL_TX_BRP_31 0x000001F0U |
| #define DCAN_DMA1CTL_BRPMTOOFST_W 5U |
| #define DCAN_DMA1CTL_BRPMTOOFST_M 0x00007C00U |
| #define DCAN_DMA1CTL_BRPMTOOFST_S 10U |
| #define DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_0 0x00000000U |
| #define DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_1 0x00000400U |
| #define DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_2 0x00000800U |
| #define DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_3 0x00000C00U |
| #define DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_4 0x00001000U |
| #define DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_5 0x00001400U |
| #define DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_6 0x00001800U |
| #define DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_7 0x00001C00U |
| #define DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_8 0x00002000U |
| #define DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_9 0x00002400U |
| #define DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_10 0x00002800U |
| #define DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_11 0x00002C00U |
| #define DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_12 0x00003000U |
| #define DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_13 0x00003400U |
| #define DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_14 0x00003800U |
| #define DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_15 0x00003C00U |
| #define DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_16 0x00004000U |
| #define DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_17 0x00004400U |
| #define DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_18 0x00004800U |
| #define DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_19 0x00004C00U |
| #define DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_20 0x00005000U |
| #define DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_21 0x00005400U |
| #define DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_22 0x00005800U |
| #define DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_23 0x00005C00U |
| #define DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_24 0x00006000U |
| #define DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_25 0x00006400U |
| #define DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_26 0x00006800U |
| #define DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_27 0x00006C00U |
| #define DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_28 0x00007000U |
| #define DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_29 0x00007400U |
| #define DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_30 0x00007800U |
| #define DCAN_DMA1CTL_BRPMTOOFST_TX_BRP_31 0x00007C00U |
| #define DCAN_DMA1CTL_BRPMTONUM_W 6U |
| #define DCAN_DMA1CTL_BRPMTONUM_M 0x003F0000U |
| #define DCAN_DMA1CTL_BRPMTONUM_S 16U |
| #define DCAN_DMA1CTL_BRPMTONUM_MIN 0x00020000U |
| #define DCAN_DMA1CTL_BRPMTONUM_MAX 0x00200000U |
| #define DCAN_DMA1CTL_FEOTOSEL 0x01000000U |
| #define DCAN_DMA1CTL_FEOTOSEL_M 0x01000000U |
| #define DCAN_DMA1CTL_FEOTOSEL_S 24U |
| #define DCAN_DMA1CTL_FEOTOSEL_FE_0 0x00000000U |
| #define DCAN_DMA1CTL_FEOTOSEL_FE_1 0x01000000U |
| #define DCAN_DMA1CTL_BUFTTOOFST_W 5U |
| #define DCAN_DMA1CTL_BUFTTOOFST_M 0xF8000000U |
| #define DCAN_DMA1CTL_BUFTTOOFST_S 27U |
| #define DCAN_DMA1CTL_BUFTTOOFST_MIN 0x00000000U |
| #define DCAN_DMA1CTL_BUFTTOOFST_MAX 0xF0000000U |
| #define DCAN_TTOFE0_BASEADDR_W 13U |
| #define DCAN_TTOFE0_BASEADDR_M 0x00007FFCU |
| #define DCAN_TTOFE0_BASEADDR_S 2U |
| #define DCAN_TTOFE0_BASEADDR_MIN 0x00000000U |
| #define DCAN_TTOFE0_BASEADDR_MAX 0x00007FFCU |
| #define DCAN_TTOFE1_BASEADDR_W 13U |
| #define DCAN_TTOFE1_BASEADDR_M 0x00007FFCU |
| #define DCAN_TTOFE1_BASEADDR_S 2U |
| #define DCAN_TTOFE1_BASEADDR_MIN 0x00000000U |
| #define DCAN_TTOFE1_BASEADDR_MAX 0x00007FFCU |
| #define DCAN_TTONDAT1_NDAT1VAL_W 32U |
| #define DCAN_TTONDAT1_NDAT1VAL_M 0xFFFFFFFFU |
| #define DCAN_TTONDAT1_NDAT1VAL_S 0U |
| #define DCAN_TTONDAT1_NDAT1VAL_MIN 0x00000000U |
| #define DCAN_TTONDAT1_NDAT1VAL_MAX 0x80000000U |
| #define DCAN_CLKCFG_CLKEN 0x00000001U |
| #define DCAN_CLKCFG_CLKEN_M 0x00000001U |
| #define DCAN_CLKCFG_CLKEN_S 0U |
| #define DCAN_CLKCFG_RAMEN 0x00000010U |
| #define DCAN_CLKCFG_RAMEN_M 0x00000010U |
| #define DCAN_CLKCFG_RAMEN_S 4U |
| #define DCAN_CLKCFG_CLKSEL_W 2U |
| #define DCAN_CLKCFG_CLKSEL_M 0x00000060U |
| #define DCAN_CLKCFG_CLKSEL_S 5U |
| #define DCAN_CLKCFG_CLKSEL_NOCLOCK 0x00000000U |
| #define DCAN_CLKCFG_CLKSEL_HOST_DIV2_CLK 0x00000020U |
| #define DCAN_CLKCFG_CLKSEL_HFXT 0x00000040U |
| #define DCAN_CLKCFG_CLKSEL_HOST_DIV2_PSWL_CLK 0x00000060U |