Collaboration diagram for [ospi.h] External Serial Peripheral Interface:

Data Structures
struct	OSPISTIGConfig_t

Macros
#define	OSPI_STIG_READ_DATA_LOWER OSPI_O_FLASH_RD_DATA_LOWER
	Flash Read Data Register (Lower) More...

#define	OSPI_STIG_READ_DATA_UPPER OSPI_O_FLASH_RD_DATA_UPPER
	Flash Read Data Register (Upper) More...

#define	OSPI_STIG_MEMORY_BANK_TRANSFER_ENABLE OSPI_FLASH_CMD_CTRL_STIG_MEM_BANK_EN_ENABLE
	Memory Bank should only be enabled when triggering Flash Rd/Wr commands with Memory Bank transfer. More...

#define	OSPI_STIG_MEMORY_BANK_TRANSFER_DISABLE OSPI_FLASH_CMD_CTRL_STIG_MEM_BANK_EN_DISABLE
	Memory Bank should be disabled before triggering any operation that not use Memory Bank transfer. More...

#define	OSPI_STIG_WRITE_DATA_ENABLE OSPI_FLASH_CMD_CTRL_ENB_WRITE_DATA_ENABLE
	Enable write data transfer if flash command requires write data bytes to be sent to the device. More...

#define	OSPI_STIG_WRITE_DATA_DISABLE OSPI_FLASH_CMD_CTRL_ENB_MODE_BIT_DISABLE
	Disable write data transfer if flash command do not requires write data to the device. More...

#define	OSPI_STIG_MODE_BIT_ENABLE OSPI_FLASH_CMD_CTRL_ENB_MODE_BIT_ENABLE

#define	OSPI_STIG_MODE_BIT_DISABLE OSPI_FLASH_CMD_CTRL_ENB_MODE_BIT_DISABLE
	Disable Mode bit if not required by the flash command. More...

#define	OSPI_STIG_COMMAND_ADDRESS_ENABLE OSPI_FLASH_CMD_CTRL_ENB_COMD_ADDR_ENABLE
	Enable Address if flash command requires an address. More...

#define	OSPI_STIG_COMMAND_ADDRESS_DISABLE OSPI_FLASH_CMD_CTRL_ENB_COMD_ADDR_DISABLE
	Disable Address if flash command not requires an address. (e.g WEN command 0x6) More...

#define	OSPI_STIG_READ_DATA_ENABLE OSPI_FLASH_CMD_CTRL_ENB_READ_DATA_ENABLE
	Enable read data if flash command expect response data bytes received from the device. More...

#define	OSPI_STIG_READ_DATA_DISABLE OSPI_FLASH_CMD_CTRL_ENB_READ_DATA_DISABLE
	Disable read data if flash command not expected data bytes received from the device. More...

Enumerations
enum	OSPIFlashStatusRegister { OSPI_FLASH_STA_REG_WIP = 0x01, OSPI_FLASH_STA_REG_WEL = 0x02, OSPI_FLASH_STA_REG_BP0 = 0x04, OSPI_FLASH_STA_REG_BP1 = 0x08, OSPI_FLASH_STA_REG_BP2 = 0x10, OSPI_FLASH_STA_REG_BP3 = 0x20, OSPI_FLASH_STA_REG_QE = 0x40, OSPI_FLASH_STA_REG_SRWD = 0x80 }
	OSPI flash status register bit indication. More...

enum	OSPISTIGCommand { OSPI_COMMAND_WRSR = 0x01, OSPI_COMMAND_WRITE = 0x02, OSPI_COMMAND_READ = 0x03, OSPI_COMMAND_FAST_READ = 0x0B, OSPI_COMMAND_RDSR = 0x05, OSPI_COMMAND_WREN = 0x06, OSPI_COMMAND_SE = 0x20, OSPI_COMMAND_CE = 0x60, OSPI_COMMAND_QEN = 0x35, OSPI_COMMAND_QDIS = 0xF5, OSPI_COMMAND_RSTEN = 0x66, OSPI_COMMAND_RST = 0x99 }
	Sub group of used JEDEC commands. More...

enum	OSPIInstructionType { OSPI_INSTR_TYPE_SPI = 0, OSPI_INSTR_TYPE_DUAL_SPI = 1, OSPI_INSTR_TYPE_QUAD_IO_SPI = 2, OSPI_INSTR_TYPE_OCTAL_IO_SPI = 3 }

Functions
uint32_t	OSPIGetSTIGDataRegister (uint32_t regSelect)
	Returns the read data or status register value. More...

void	OSPIExecuteSTIGWriteCommand (OSPISTIGConfig_t OspiStigCommand)
	Configure and execute the STIG command. More...

void	OSPIStartSTIGCommand (uint32_t configReg)
	Execute the STIG command. More...

void	OSPISetCommandAddress (uint32_t address)
	Set the address for the STIG write/read command. More...

Detailed Description

Macro Definition Documentation

§ OSPI_STIG_READ_DATA_LOWER

#define OSPI_STIG_READ_DATA_LOWER OSPI_O_FLASH_RD_DATA_LOWER

Flash Read Data Register (Lower)

§ OSPI_STIG_READ_DATA_UPPER

#define OSPI_STIG_READ_DATA_UPPER OSPI_O_FLASH_RD_DATA_UPPER

Flash Read Data Register (Upper)

§ OSPI_STIG_MEMORY_BANK_TRANSFER_ENABLE

#define OSPI_STIG_MEMORY_BANK_TRANSFER_ENABLE OSPI_FLASH_CMD_CTRL_STIG_MEM_BANK_EN_ENABLE

Memory Bank should only be enabled when triggering Flash Rd/Wr commands with Memory Bank transfer.

§ OSPI_STIG_MEMORY_BANK_TRANSFER_DISABLE

#define OSPI_STIG_MEMORY_BANK_TRANSFER_DISABLE OSPI_FLASH_CMD_CTRL_STIG_MEM_BANK_EN_DISABLE

Memory Bank should be disabled before triggering any operation that not use Memory Bank transfer.

§ OSPI_STIG_WRITE_DATA_ENABLE

#define OSPI_STIG_WRITE_DATA_ENABLE OSPI_FLASH_CMD_CTRL_ENB_WRITE_DATA_ENABLE

Enable write data transfer if flash command requires write data bytes to be sent to the device.

§ OSPI_STIG_WRITE_DATA_DISABLE

#define OSPI_STIG_WRITE_DATA_DISABLE OSPI_FLASH_CMD_CTRL_ENB_MODE_BIT_DISABLE

Disable write data transfer if flash command do not requires write data to the device.

§ OSPI_STIG_MODE_BIT_ENABLE

#define OSPI_STIG_MODE_BIT_ENABLE OSPI_FLASH_CMD_CTRL_ENB_MODE_BIT_ENABLE

Enable Mode bit if required by the flash command and Ensure the mode bits as defined in the Mode Bit Configuration Register (OSPI_O_MODE_BIT_CONFIG[7:0]) are sent following the address bytes.

§ OSPI_STIG_MODE_BIT_DISABLE

#define OSPI_STIG_MODE_BIT_DISABLE OSPI_FLASH_CMD_CTRL_ENB_MODE_BIT_DISABLE

Disable Mode bit if not required by the flash command.

§ OSPI_STIG_COMMAND_ADDRESS_ENABLE

#define OSPI_STIG_COMMAND_ADDRESS_ENABLE OSPI_FLASH_CMD_CTRL_ENB_COMD_ADDR_ENABLE

Enable Address if flash command requires an address.

§ OSPI_STIG_COMMAND_ADDRESS_DISABLE

#define OSPI_STIG_COMMAND_ADDRESS_DISABLE OSPI_FLASH_CMD_CTRL_ENB_COMD_ADDR_DISABLE

Disable Address if flash command not requires an address. (e.g WEN command 0x6)

§ OSPI_STIG_READ_DATA_ENABLE

#define OSPI_STIG_READ_DATA_ENABLE OSPI_FLASH_CMD_CTRL_ENB_READ_DATA_ENABLE

Enable read data if flash command expect response data bytes received from the device.

§ OSPI_STIG_READ_DATA_DISABLE

#define OSPI_STIG_READ_DATA_DISABLE OSPI_FLASH_CMD_CTRL_ENB_READ_DATA_DISABLE

Disable read data if flash command not expected data bytes received from the device.

Enumeration Type Documentation

§ OSPIFlashStatusRegister

enum OSPIFlashStatusRegister

OSPI flash status register bit indication.

Enumerator
OSPI_FLASH_STA_REG_WIP	Write in progress bit.
OSPI_FLASH_STA_REG_WEL	Write enable latch.
OSPI_FLASH_STA_REG_BP0	Level of protected block.
OSPI_FLASH_STA_REG_BP1	Level of protected block.
OSPI_FLASH_STA_REG_BP2	Level of protected block.
OSPI_FLASH_STA_REG_BP3	level of protected block
OSPI_FLASH_STA_REG_QE	Quad SPI mode Enable.
OSPI_FLASH_STA_REG_SRWD	Status register write protect.

§ OSPISTIGCommand

enum OSPISTIGCommand

Sub group of used JEDEC commands.

Enumerator
OSPI_COMMAND_WRSR	Write status/configuration register.
OSPI_COMMAND_WRITE	Normal write.
OSPI_COMMAND_READ	Normal read.
OSPI_COMMAND_FAST_READ	Fast read.
OSPI_COMMAND_RDSR	Read status register.
OSPI_COMMAND_WREN	Write enable.
OSPI_COMMAND_SE	Sector erase.
OSPI_COMMAND_CE	Chip erase (60h or C7h)
OSPI_COMMAND_QEN	Quad SPI en (35h or 38h)
OSPI_COMMAND_QDIS	Quad disable (0xf5 or ffh)
OSPI_COMMAND_RSTEN	Reset Enable.
OSPI_COMMAND_RST	Reset Memory.

§ OSPIInstructionType

enum OSPIInstructionType

Enumerator
OSPI_INSTR_TYPE_SPI	Standard SPI mode (instruction always shifted into the device on DQ0 only)
OSPI_INSTR_TYPE_DUAL_SPI	DIO-SPI mode (Instruction sent on DQ0 and DQ1)
OSPI_INSTR_TYPE_QUAD_IO_SPI	QIO-SPI mode (Instruction sent on DQ0,DQ1,DQ2 and DQ3)
OSPI_INSTR_TYPE_OCTAL_IO_SPI	OIO-SPI mode (Instruction sent on DQ[7:0].

Function Documentation

§ OSPIGetSTIGDataRegister()

uint32_t OSPIGetSTIGDataRegister ( uint32_t regSelect )

Returns the read data or status register value.

This function called when using STIG for read data from specific address or read status register. This function called following the calls of OSPISetSTIGDataRegister() (together with OSPISetCommandAddress()) and/or

OSPIExecuteSTIGWriteCommand().

Parameters

regSelect

is the selected register for the return data. The parameter can have one of these three values:

Returns: Returns the value of the status register or required address.

Note: this function must be placed in RAM by the linker (ref. TI.ramfunc), as execution for flash must be disabled in order to take control on OSPI IP.

§ OSPIExecuteSTIGWriteCommand()

void OSPIExecuteSTIGWriteCommand ( OSPISTIGConfig_t OspiStigCommand )

Configure and execute the STIG command.

This function configures the relevant parameters for the STIG command.

Parameters

OspiStigCommand

is the selected STIG command struct.

OSPISTIGConfig_t struct is a combination of parameters to obtain STIG command.

Note: this function must be placed in RAM by the linker (ref. TI.ramfunc), as execution for flash must be disabled in order to take control on OSPI IP.

Referenced by OSPISetSTIGDataRegister().

§ OSPIStartSTIGCommand()

void OSPIStartSTIGCommand ( uint32_t configReg )

Execute the STIG command.

This function include protection check of the STIG and the xSPI before and after the STIG command kick.

Parameters

configReg is the value of the configurations process from OSPIExecuteSTIGWriteCommand().

Note: this function must be placed in RAM by the linker (ref. TI.ramfunc), as execution for flash must be disabled in order to take control on OSPI IP.

Referenced by OSPISetSTIGDataRegister().

§ OSPISetCommandAddress()

void OSPISetCommandAddress ( uint32_t address )

Set the address for the STIG write/read command.

Parameters

address is the 32 bit address to be write/read.

Note: this function must be placed in RAM by the linker (ref. TI.ramfunc), as execution for flash must be disabled in order to take control on OSPI IP.

Referenced by OSPISetSTIGDataRegister().

Data Structures

Macros

Enumerations

Functions

Detailed Description

Macro Definition Documentation

§ OSPI_STIG_READ_DATA_LOWER

§ OSPI_STIG_READ_DATA_UPPER

§ OSPI_STIG_MEMORY_BANK_TRANSFER_ENABLE

§ OSPI_STIG_MEMORY_BANK_TRANSFER_DISABLE

§ OSPI_STIG_WRITE_DATA_ENABLE

§ OSPI_STIG_WRITE_DATA_DISABLE

§ OSPI_STIG_MODE_BIT_ENABLE

§ OSPI_STIG_MODE_BIT_DISABLE

§ OSPI_STIG_COMMAND_ADDRESS_ENABLE

§ OSPI_STIG_COMMAND_ADDRESS_DISABLE

§ OSPI_STIG_READ_DATA_ENABLE

§ OSPI_STIG_READ_DATA_DISABLE

Enumeration Type Documentation

§ OSPIFlashStatusRegister

§ OSPISTIGCommand

§ OSPIInstructionType

Function Documentation

§ OSPIGetSTIGDataRegister()

§ OSPIExecuteSTIGWriteCommand()

§ OSPIStartSTIGCommand()

§ OSPISetCommandAddress()