Collaboration diagram for [dma.h] Direct Memory Access:

Macros
#define	DMA_NUM_CHANNELS 12
	Number of available DMA channels. More...

#define	DMA_CH_OFFSET 0x1000
	DMA channel memory map offset, in bytes. More...

#define	DMA_CHCTL_FIELD_WIDTH HOST_DMA_CHCTL0_CH0_W
	DMA channel control field width, in number of bits (CHCTL register) More...

#define	DMA_CHCTRL_NUMBER_OF_FIELDS (32 / DMA_CHCTL_FIELD_WIDTH)
	Number of fields in CHCTL register. More...

#define	DMA_CONFIG_SRC_PTR_WRAP HOST_DMA_CH0JCTL_BLKMODESRC

#define	DMA_CONFIG_DST_PTR_WRAP HOST_DMA_CH0JCTL_BLKMODEDST

#define	DMA_CONFIG_FORCE_REQ HOST_DMA_CH0JCTL_DMASIGBPS

#define	DMA_CONFIG_SRC_PTR_FIFO HOST_DMA_CH0JCTL_FIFOMODS
	Source pointer (FIFO mode) More...

#define	DMA_CONFIG_DST_PTR_FIFO HOST_DMA_CH0JCTL_FIFOMODD
	Destination pointer (FIFO mode) More...

#define	DMA_CONFIG_RX 0x00000000U
	Link DMA channel to RX port of peripheral. More...

#define	DMA_CONFIG_TX HOST_DMA_CH0JCTL_SRCDSTCFG
	Link DMA channel to TX port of peripheral. More...

#define	DMA_CONFIG_CLEAR_AT_JOB_START HOST_DMA_CH0JCTL_ENCLR
	Enable DMA to set a rd/wr clear pulse at the beginning of a job (one cycle after run cmd) More...

#define	DMA_CONFIG_ALLOWED_MASK
	Bitmask of allowed flags passed to DMAConfigureChannel() and DMAConfigureChannelFlags(). More...

#define	DMA_WORD_SIZE_1B 2
	Word size is 1 byte. More...

#define	DMA_WORD_SIZE_2B 1
	Word size is 2 bytes. More...

#define	DMA_WORD_SIZE_4B 0
	Word size is 4 bytes. More...

Enumerations
enum	DMAPeripheral { DMA_PERIPH_UARTLIN_0 = 0, DMA_PERIPH_UARTLIN_1 = 1, DMA_PERIPH_SPI_0 = 2, DMA_PERIPH_SPI_1 = 3, DMA_PERIPH_I2C_0 = 4, DMA_PERIPH_I2C_1 = 5, DMA_PERIPH_SDMMC = 6, DMA_PERIPH_SDIO = 7, DMA_PERIPH_MCAN = 8, DMA_PERIPH_ADC = 9, DMA_PERIPH_PDM = 10, DMA_PERIPH_HIF = 11, DMA_PERIPH_UARTLIN_2 = 12, DMA_NUM_PERIPHS = 13 }
	DMA peripheral ports enumerations for use with DMAInitChannel(). More...

enum	DMAChannelStatus { DMA_HW_EVT_NO_EVENT = 0, DMA_HW_EVT_TRANS_DONE = 1, DMA_HW_EVT_ABORTED = 2, DMA_HW_EVT_EXC = 4 }

enum	DMACommand { DMA_CMD_RUN = 1, DMA_CMD_ABORT = 2, DMA_CMD_INIT = 4 }

Functions
void	DMAInitChannel (uint32_t channel, DMAPeripheral peripheral)
	Initialize DMA channel by mapping it to a peripheral. More...

void	DMAConfigureChannel (uint32_t channel, uint8_t blockSize, uint8_t wordSize, uint32_t config)
	Configure job for the specified channel. More...

void	DMAStartTransaction (uint32_t channel, const uint32_t srcStartAddr, uint32_t dstStartAddr, uint16_t transLenByte, bool remainingBytesBurst)
	Start job for the specified channel. More...

uint32_t	DMAGetChannelStatus (uint32_t channel)
	Returns the status of the specified channel. More...

uint32_t	DMAGetChannelDirection (uint32_t channel)
	Returns the direction of the specified channel. More...

__STATIC_INLINE void	DMAEnableInt (uint32_t channelMask)
	Enables DMA interrupt sources. More...

__STATIC_INLINE void	DMADisableInt (uint32_t channelMask)
	Disables DMA channel interrupts. More...

__STATIC_INLINE void	DMAClearInt (uint32_t channelMask)
	Clears DMA interrupt sources. More...

__STATIC_INLINE uint32_t	DMAIntStatus (bool masked)
	Gets the current interrupt status. More...

__STATIC_INLINE void	DMAConfigureChannelFlags (uint32_t channel, uint32_t config)
	Clear all flags and set the specified channel flags. More...

__STATIC_INLINE void	DMAEnableDestinationFifoMode (uint32_t channel)
	Enable FIFO mode behavior for the destination pointer. More...

__STATIC_INLINE void	DMADisableDestinationFifoMode (uint32_t channel)
	Disable FIFO mode behavior for the destination pointer. More...

__STATIC_INLINE uint32_t	DMAGetChannelPeripheral (uint32_t channel)
	Get channel linked peripheral. More...

Detailed Description

Macro Definition Documentation

§ DMA_NUM_CHANNELS

#define DMA_NUM_CHANNELS 12

Number of available DMA channels.

Referenced by DMAConfigureChannel(), DMAConfigureChannelFlags(), DMADisableDestinationFifoMode(), DMAEnableDestinationFifoMode(), DMAGetChannelDirection(), DMAGetChannelStatus(), DMAInitChannel(), and DMAStartTransaction().

§ DMA_CH_OFFSET

#define DMA_CH_OFFSET 0x1000

DMA channel memory map offset, in bytes.

Referenced by DMAConfigureChannel(), DMAConfigureChannelFlags(), DMADisableDestinationFifoMode(), DMAEnableDestinationFifoMode(), DMAGetChannelDirection(), DMAGetChannelStatus(), and DMAStartTransaction().

§ DMA_CHCTL_FIELD_WIDTH

#define DMA_CHCTL_FIELD_WIDTH HOST_DMA_CHCTL0_CH0_W

DMA channel control field width, in number of bits (CHCTL register)

Referenced by DMAGetChannelPeripheral(), and DMAInitChannel().

§ DMA_CHCTRL_NUMBER_OF_FIELDS

#define DMA_CHCTRL_NUMBER_OF_FIELDS (32 / DMA_CHCTL_FIELD_WIDTH)

Number of fields in CHCTL register.

Referenced by DMAGetChannelPeripheral(), and DMAInitChannel().

§ DMA_CONFIG_SRC_PTR_WRAP

#define DMA_CONFIG_SRC_PTR_WRAP HOST_DMA_CH0JCTL_BLKMODESRC

Source pointer wraps around (block mode) (non-block mode by default - incremental)

§ DMA_CONFIG_DST_PTR_WRAP

#define DMA_CONFIG_DST_PTR_WRAP HOST_DMA_CH0JCTL_BLKMODEDST

Destination pointer wraps around (block mode) (non-block mode by default - incremental)

§ DMA_CONFIG_FORCE_REQ

#define DMA_CONFIG_FORCE_REQ HOST_DMA_CH0JCTL_DMASIGBPS

Tie DMA request signal high. This indicates to DMA arbiter that both source and destination is ready for transaction. Set this bit when doing memory-to-memory transactions.

§ DMA_CONFIG_SRC_PTR_FIFO

#define DMA_CONFIG_SRC_PTR_FIFO HOST_DMA_CH0JCTL_FIFOMODS

Source pointer (FIFO mode)

§ DMA_CONFIG_DST_PTR_FIFO

#define DMA_CONFIG_DST_PTR_FIFO HOST_DMA_CH0JCTL_FIFOMODD

Destination pointer (FIFO mode)

§ DMA_CONFIG_RX

#define DMA_CONFIG_RX 0x00000000U

Link DMA channel to RX port of peripheral.

§ DMA_CONFIG_TX

#define DMA_CONFIG_TX HOST_DMA_CH0JCTL_SRCDSTCFG

Link DMA channel to TX port of peripheral.

§ DMA_CONFIG_CLEAR_AT_JOB_START

#define DMA_CONFIG_CLEAR_AT_JOB_START HOST_DMA_CH0JCTL_ENCLR

Enable DMA to set a rd/wr clear pulse at the beginning of a job (one cycle after run cmd)

§ DMA_CONFIG_ALLOWED_MASK

#define DMA_CONFIG_ALLOWED_MASK

Value:

(DMA_CONFIG_SRC_PTR_WRAP | DMA_CONFIG_DST_PTR_WRAP | DMA_CONFIG_FORCE_REQ | DMA_CONFIG_SRC_PTR_FIFO | \

DMA_CONFIG_DST_PTR_FIFO | DMA_CONFIG_TX | DMA_CONFIG_CLEAR_AT_JOB_START)

DMA_CONFIG_SRC_PTR_FIFO

#define DMA_CONFIG_SRC_PTR_FIFO

Source pointer (FIFO mode)

Definition: dma.h:89

DMA_CONFIG_FORCE_REQ

#define DMA_CONFIG_FORCE_REQ

Definition: dma.h:87

DMA_CONFIG_SRC_PTR_WRAP

#define DMA_CONFIG_SRC_PTR_WRAP

Definition: dma.h:81

DMA_CONFIG_DST_PTR_WRAP

#define DMA_CONFIG_DST_PTR_WRAP

Definition: dma.h:84

DMA_CONFIG_CLEAR_AT_JOB_START

#define DMA_CONFIG_CLEAR_AT_JOB_START

Enable DMA to set a rd/wr clear pulse at the beginning of a job (one cycle after run cmd) ...

Definition: dma.h:97

DMA_CONFIG_TX

#define DMA_CONFIG_TX

Link DMA channel to TX port of peripheral.

Definition: dma.h:95

Bitmask of allowed flags passed to DMAConfigureChannel() and DMAConfigureChannelFlags().

Referenced by DMAConfigureChannel(), and DMAConfigureChannelFlags().

§ DMA_WORD_SIZE_1B

#define DMA_WORD_SIZE_1B 2

Word size is 1 byte.

§ DMA_WORD_SIZE_2B

#define DMA_WORD_SIZE_2B 1

Word size is 2 bytes.

§ DMA_WORD_SIZE_4B

#define DMA_WORD_SIZE_4B 0

Word size is 4 bytes.

Enumeration Type Documentation

§ DMAPeripheral

enum DMAPeripheral

DMA peripheral ports enumerations for use with DMAInitChannel().

Enumerator
DMA_PERIPH_UARTLIN_0	UARTLIN0.
DMA_PERIPH_UARTLIN_1	UARTLIN1.
DMA_PERIPH_SPI_0	SPI0.
DMA_PERIPH_SPI_1	SPI1.
DMA_PERIPH_I2C_0	I2C0.
DMA_PERIPH_I2C_1	I2C1.
DMA_PERIPH_SDMMC	SDMMC.
DMA_PERIPH_SDIO	SDIO.
DMA_PERIPH_MCAN	MCAN.
DMA_PERIPH_ADC	ADC.
DMA_PERIPH_PDM	PDM.
DMA_PERIPH_HIF	HIF.
DMA_PERIPH_UARTLIN_2	UARTLIN2.
DMA_NUM_PERIPHS	Number of different DMA peripherals supported.

§ DMAChannelStatus

enum DMAChannelStatus

Enumerator
DMA_HW_EVT_NO_EVENT	No pending event // TODO: hw_ doc calls this "processing".
DMA_HW_EVT_TRANS_DONE	Transaction done.
DMA_HW_EVT_ABORTED	Transaction aborted by SW.
DMA_HW_EVT_EXC	An error has occurred.

§ DMACommand

enum DMACommand

Enumerator
DMA_CMD_RUN
DMA_CMD_ABORT
DMA_CMD_INIT

Function Documentation

§ DMAInitChannel()

void DMAInitChannel	(	uint32_t	channel,
		DMAPeripheral	peripheral
	)

Initialize DMA channel by mapping it to a peripheral.

Note: For memory-to-memory transactions (for example RAM to RAM), it is not necessary to initialize the DMA channel. In those cases, call DMAConfigureChannel() directly.

Parameters

channel	is the DMA channel to configure.
peripheral	is the peripheral (see DMAPeripheral).

References ASSERT, DMA_CHCTL_FIELD_WIDTH, DMA_CHCTRL_NUMBER_OF_FIELDS, DMA_NUM_CHANNELS, DMA_NUM_PERIPHS, HOST_DMA_CHCTL0_CH0_M, HOST_DMA_O_CHCTL0, HOST_DMA_TGT_BASE, and HWREG.

§ DMAConfigureChannel()

void DMAConfigureChannel	(	uint32_t	channel,
		uint8_t	blockSize,
		uint8_t	wordSize,
		uint32_t	config
	)

Configure job for the specified channel.

This function must be called after DMAInitChannel().

Parameters

channel	is the DMA channel to configure.
blockSize	is size of the block in words (up to 64 words). If block mode is enabled, defines the address wrap around. Since channel arbitration decisions are made every block, this also effect how much bandwidth is given to a specific channel.
wordSize	is the word size. The parameter can have one of these three values: DMA_WORD_SIZE_1B DMA_WORD_SIZE_2B DMA_WORD_SIZE_4B
config	is the DMA channel configuration for the peripheral. The parameter is the bitwise OR of five values (all values set to 0 by default): Source pointer block mode behavior DMA_CONFIG_SRC_PTR_WRAP Destination pointer block mode behavior DMA_CONFIG_DST_PTR_WRAP Force request bit high. Use to indicate to DMA arbiter that source and destination is ready for the transaction. Must be used, for example, when using DMA for memory-to-memory transactions. DMA_CONFIG_FORCE_REQ Source pointer FIFO mode behavior DMA_CONFIG_SRC_PTR_FIFO Destination pointer FIFO mode behavior DMA_CONFIG_DST_PTR_FIFO Link DMA channel to RX or TX port of peripheral DMA_CONFIG_RX DMA_CONFIG_TX Enable DMA to set a rd/wr clear pulse at the beginning of a job (one cycle after run cmd) DMA_CONFIG_CLEAR_AT_JOB_START

References ASSERT, DMA_BLOCK_SIZE_MAX, DMA_BLOCK_SIZE_MIN, DMA_CH_OFFSET, DMA_CONFIG_ALLOWED_MASK, DMA_NUM_CHANNELS, HOST_DMA_CH0JCTL_BLKSIZE_M, HOST_DMA_CH0JCTL_BLKSIZE_S, HOST_DMA_CH0JCTL_WORDSIZE_M, HOST_DMA_CH0JCTL_WORDSIZE_S, HOST_DMA_O_CH0JCTL, HOST_DMA_TGT_BASE, and HWREG.

§ DMAStartTransaction()

void DMAStartTransaction	(	uint32_t	channel,
		const uint32_t *	srcStartAddr,
		uint32_t *	dstStartAddr,
		uint16_t	transLenByte,
		bool	remainingBytesBurst
	)

Start job for the specified channel.

This function must be called after DMAConfigureChannel().

Parameters

channel	is the DMA channel to start.
srcStartAddr	is a pointer to the source data.
dstStartAddr	is a pointer to the destination data.
transLenByte	is the number of bytes to transfer
remainingBytesBurst	enables transaction optimization in specific cases.

Warning: Parameter remainingBytesBurst can only be used with the DMA_PERIPH_HIF peripheral!

When blockSize ( DMAConfigureChannel()) is not a multiple of transLenByte, the last transaction will be less than blockSize. By default, this last copy will execute word by word. When multiple DMA channels work parallel the DMA round-robin algorithm will move to other channels between every word. When setting this flag to true, the behavior will change to copy the all remaining bytes at once, BUT only after the destination peripheral asserts the request signal to the DMA. For example, UART TX will assert the request flag once the TX buffer is empty.

Note: Not every destination peripheral supports asserting will assert the request signal. If remainingBytesBurst is true and the request signal is not asserted the transaction will not complete!

References ASSERT, DMA_CH_OFFSET, DMA_CMD_RUN, DMA_MAX_TRANSACTION_BYTES, DMA_NUM_CHANNELS, HOST_DMA_CH0OPTR_OPTR_M, HOST_DMA_CH0OPTR_OPTR_S, HOST_DMA_CH0TCTL2_CMD_M, HOST_DMA_CH0TCTL2_CMD_S, HOST_DMA_CH0TCTL_BURSTREQ, HOST_DMA_CH0TCTL_TRANSB_M, HOST_DMA_CH0TCTL_TRANSB_S, HOST_DMA_CH0TIPTR_IPTR_M, HOST_DMA_CH0TIPTR_IPTR_S, HOST_DMA_O_CH0OPTR, HOST_DMA_O_CH0TCTL, HOST_DMA_O_CH0TCTL2, HOST_DMA_O_CH0TIPTR, HOST_DMA_TGT_BASE, and HWREG.

§ DMAGetChannelStatus()

uint32_t DMAGetChannelStatus ( uint32_t channel )

Returns the status of the specified channel.

Parameters

channel is the DMA channel.

Returns: Returns a bitwise OR of one or more DMAChannelStatus values.

References ASSERT, DMA_CH_OFFSET, DMA_NUM_CHANNELS, HOST_DMA_CH0STA_HWEVENT_M, HOST_DMA_CH0STA_HWEVENT_S, HOST_DMA_O_CH0STA, HOST_DMA_TGT_BASE, and HWREG.

§ DMAGetChannelDirection()

uint32_t DMAGetChannelDirection ( uint32_t channel )

Returns the direction of the specified channel.

Parameters

channel is the DMA channel.

Returns: Returns DMA_CONFIG_TX or DMA_CONFIG_RX.

References ASSERT, DMA_CH_OFFSET, DMA_NUM_CHANNELS, HOST_DMA_CH0JCTL_SRCDSTCFG_M, HOST_DMA_O_CH0JCTL, HOST_DMA_TGT_BASE, and HWREG.

§ DMAEnableInt()

__STATIC_INLINE void DMAEnableInt ( uint32_t channelMask )

Enables DMA interrupt sources.

This function enables the indicated DMA interrupt sources. Only the sources that are enabled can be reflected to the processor interrupt; disabled sources have no effect on the processor.

Note: This function must be called from secure context.

Parameters

channelMask is the bit mask of the DMA channel interrupts to be enabled. Bit 0 enables channel 0, bit 1 channel 1, and so on.

Returns: None

References HWREG, SOC_AAON_BASE, and SOC_AAON_O_DMASIMASK.

§ DMADisableInt()

__STATIC_INLINE void DMADisableInt ( uint32_t channelMask )

Disables DMA channel interrupts.

This function disables the indicated DMA interrupt sources. Only the sources that are enabled can be reflected to the processor interrupt; disabled sources have no effect on the processor.

Note: This function must be called from secure context.

Parameters

channelMask is the bit mask of the DMA channel interrupts to disable. Bit 0 disables channel 0, bit 1 channel 1, and so on.

Returns: None

References HWREG, SOC_AAON_BASE, and SOC_AAON_O_DMASIMASK.

§ DMAClearInt()

__STATIC_INLINE void DMAClearInt ( uint32_t channelMask )

Clears DMA interrupt sources.

The specified DMA interrupt sources are cleared, so that they no longer assert. This function must be called in the interrupt handler to keep the interrupt from being recognized again immediately upon exit.

Note: This function must be called from secure context.

Parameters

channelMask is a bit mask of the channel interrupts to be cleared.

Returns: None

References HWREG, SOC_AAON_BASE, and SOC_AAON_O_DMASICLR.

§ DMAIntStatus()

__STATIC_INLINE uint32_t DMAIntStatus ( bool masked )

Gets the current interrupt status.

This function returns the interrupt status for the DMA. Either the raw interrupt status or the status of interrupts that are allowed to reflect to the processor can be returned.

Note: This function must be called from secure context.

Parameters

masked

selects either raw or masked interrupt.

true : Masked interrupt status is required.
false : Raw interrupt status is required.

Returns: Returns the current interrupt status

References HWREG, SOC_AAON_BASE, SOC_AAON_O_DMASICLR, and SOC_AAON_O_DMASMIS.

§ DMAConfigureChannelFlags()

__STATIC_INLINE void DMAConfigureChannelFlags	(	uint32_t	channel,
		uint32_t	config
	)

Clear all flags and set the specified channel flags.

This function can be called after DMAConfigureChannel() when need to set specific flags. As a first step. the function clear all flags and then set the specified channel flags.

Note: It is not allow to you this fuction during channel operation

Parameters

channel is the DMA channel to configure.

config

is the DMA channel configuration for the peripheral. The parameter is the bitwise OR of five values:

Source pointer block mode behavior
- DMA_CONFIG_SRC_PTR_WRAP
Destination pointer block mode behavior
- DMA_CONFIG_DST_PTR_WRAP
Force request bit high. Use to indicate to DMA arbiter that source and destination is ready for the transaction. Must be used, for example, when using DMA for memory-to-memory transactions.
- DMA_CONFIG_FORCE_REQ
Source pointer FIFO mode behavior
- DMA_CONFIG_SRC_PTR_FIFO
Destination pointer FIFO mode behavior
- DMA_CONFIG_DST_PTR_FIFO
Link DMA channel to RX or TX port of peripheral
- DMA_CONFIG_RX
- DMA_CONFIG_TX
Enable DMA to set a rd/wr clear pulse at the beginning of a job (one cycle after run cmd)
- DMA_CONFIG_CLEAR_AT_JOB_START

References ASSERT, DMA_CH_OFFSET, DMA_CONFIG_ALLOWED_MASK, DMA_NUM_CHANNELS, HOST_DMA_O_CH0JCTL, HOST_DMA_TGT_BASE, and HWREG.

§ DMAEnableDestinationFifoMode()

__STATIC_INLINE void DMAEnableDestinationFifoMode ( uint32_t channel )

Enable FIFO mode behavior for the destination pointer.

When FIFO mode is enabled, the destination pointer is not incremented.

This function can be called after DMAInitChannel().

Parameters

channel is the DMA channel to configure.

References ASSERT, DMA_CH_OFFSET, DMA_NUM_CHANNELS, HOST_DMA_CH0JCTL_FIFOMODD, HOST_DMA_O_CH0JCTL, HOST_DMA_TGT_BASE, and HWREG.

§ DMADisableDestinationFifoMode()

__STATIC_INLINE void DMADisableDestinationFifoMode ( uint32_t channel )

Disable FIFO mode behavior for the destination pointer.

When FIFO mode is disabled, the destination pointer will be incremented after every transfer according to the word size.

This function can be called after DMAInitChannel().

Parameters

channel is the DMA channel to configure.

References ASSERT, DMA_CH_OFFSET, DMA_NUM_CHANNELS, HOST_DMA_CH0JCTL_FIFOMODD, HOST_DMA_O_CH0JCTL, HOST_DMA_TGT_BASE, and HWREG.

§ DMAGetChannelPeripheral()

__STATIC_INLINE uint32_t DMAGetChannelPeripheral ( uint32_t channel )

Get channel linked peripheral.

This function can be called after DMAInitChannel() when need to get the linked peripheral to specific channel.

Parameters

channel is the DMA channel to get linked peripheral.

Returns: Returns the peripheral linked to the specified channel, one of DMAPeripheral enum values.

References DMA_CHCTL_FIELD_WIDTH, DMA_CHCTRL_NUMBER_OF_FIELDS, HOST_DMA_O_CHCTL0, HOST_DMA_TGT_BASE, and HWREG.

Macros

Enumerations

Functions

Detailed Description

Macro Definition Documentation

§ DMA_NUM_CHANNELS

§ DMA_CH_OFFSET

§ DMA_CHCTL_FIELD_WIDTH

§ DMA_CHCTRL_NUMBER_OF_FIELDS

§ DMA_CONFIG_SRC_PTR_WRAP

§ DMA_CONFIG_DST_PTR_WRAP

§ DMA_CONFIG_FORCE_REQ

§ DMA_CONFIG_SRC_PTR_FIFO

§ DMA_CONFIG_DST_PTR_FIFO

§ DMA_CONFIG_RX

§ DMA_CONFIG_TX

§ DMA_CONFIG_CLEAR_AT_JOB_START

§ DMA_CONFIG_ALLOWED_MASK

§ DMA_WORD_SIZE_1B

§ DMA_WORD_SIZE_2B

§ DMA_WORD_SIZE_4B

Enumeration Type Documentation

§ DMAPeripheral

§ DMAChannelStatus

§ DMACommand

Function Documentation

§ DMAInitChannel()

§ DMAConfigureChannel()

§ DMAStartTransaction()

§ DMAGetChannelStatus()

§ DMAGetChannelDirection()

§ DMAEnableInt()

§ DMADisableInt()

§ DMAClearInt()

§ DMAIntStatus()

§ DMAConfigureChannelFlags()

§ DMAEnableDestinationFifoMode()

§ DMADisableDestinationFifoMode()

§ DMAGetChannelPeripheral()