AM261x MCU+ SDK: EPWM HR duty cycle SFO

| AM261x MCU+ SDK 26.00.00 |

EPWM HR duty cycle SFO

# Introduction

This example modifies the MEP control registers to show edge displacement for high-resolution duty cycle with ePWM in Up count mode due to the HRPWM control extension of the respective ePWM module.

Block diagram

# External Connections

- EPWM0_A/B (EPWM1_A/B in case of AM261x-LP) pin can be connected to an oscilloscope to view the waveform.

## AM263X-CC or AM263PX-CC or AM261X-SOM

When using AM263x-CC or AM263Px-CC or AM261x-SOM with TMDSHSECDOCK (HSEC180 controlCARD Baseboard Docking Station)

- Connect HSEC 49 for epwm0_A
- Connect HSEC 51 for epwm0_B

## AM261X-LP

When using AM261x-LP

- Connect J5/J7 Pin 69 for epwm1_A
- Connect J5/J7 Pin 63 for epwm1_B

# Supported Combinations

Parameter | Value
--- | ---
CPU + OS | r5fss0-0 nortos
Toolchain | ti-arm-clang
Board | am261x-som, am261x-lp
Example folder | examples/drivers/epwm/hrpwm_duty_cycle_sfo/

# Steps to Run the Example

- When using CCS projects to build, import the CCS project for the required combination and build it using the CCS project menu (see Using SDK with CCS Projects).
- When using makefiles to build, note the required combination and build using make command (see Using SDK with Makefiles)
- Establish connections as mentioned in External Connections section
- Launch a CCS debug session and run the executable, see CCS Launch, Load and Run

# See Also

EPWM

# Sample Output

Shown below is a sample output when the application is run,

EPWM High Resolution Duty Cycle Test Started ...
Please observe pins HSEC 49 and HSEC 51.
High Resolution duty cycle 4.00 percent. (positive width = 20.000 nanoseconds)
EPWM0 CMP = 4, CMPHR = 0
Calibration... Running...
High Resolution duty cycle 4.15 percent. (positive width = 20.750 nanoseconds)
EPWM0 CMP = 4, CMPHR = 38
Calibration... Running...
High Resolution duty cycle 4.30 percent. (positive width = 21.500 nanoseconds)
EPWM0 CMP = 4, CMPHR = 76
Calibration... Running...
High Resolution duty cycle 4.45 percent. (positive width = 22.250 nanoseconds)
EPWM0 CMP = 4, CMPHR = 115
Calibration... Running...
High Resolution duty cycle 4.60 percent. (positive width = 23.000 nanoseconds)
EPWM0 CMP = 4, CMPHR = 153
Calibration... Complete
SFO status=1 , MEP_ScaleFactor=45
High Resolution duty cycle 4.75 percent. (positive width = 23.750 nanoseconds)
EPWM0 CMP = 4, CMPHR = 192
Calibration... Running...
High Resolution duty cycle 4.90 percent. (positive width = 24.500 nanoseconds)
EPWM0 CMP = 4, CMPHR = 230
…

Expected output