AM261x MCU+ SDK: lin.h Source File

| AM261x MCU+ SDK 26.00.00 |

lin/v0/lin.h
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1 /*
2 * Copyright (C) 2021 Texas Instruments Incorporated
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 *
8 * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 *
11 * Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the
14 * distribution.
15 *
16 * Neither the name of Texas Instruments Incorporated nor the names of
17 * its contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
48 #ifndef LIN_V0_H_
49 #define LIN_V0_H_
50
51 /* ========================================================================== */
52 /* Include Files */
53 /* ========================================================================== */
54
55 #include <stdint.h>
56 #include <kernel/dpl/SystemP.h>
57 #include <kernel/dpl/SemaphoreP.h>
58 #include <kernel/dpl/HwiP.h>
59 #include <drivers/hw_include/cslr.h>
60 #include <drivers/hw_include/cslr_soc.h>
61 #include <drivers/hw_include/cslr_lin.h>
62 #include <drivers/hw_include/hw_types.h>
63
64 #ifdef __cplusplus
65 extern "C" {
66 #endif
67
68 /* ========================================================================== */
69 /* Macros & Typedefs */
70 /* ========================================================================== */
71
74 #define LIN_IO_DFT_KEY (0xAU)
75
78 #define LIN_WAKEUP_KEY (0xF0U)
79
88 #define LIN_ID0 (0x1U)
89 #define LIN_ID1 (0x2U)
90 #define LIN_ID2 (0x4U)
91 #define LIN_ID3 (0x8U)
92 #define LIN_ID4 (0x10U)
93 #define LIN_ID5 (0x20U)
94
106 #define LIN_INT_WAKEUP (0x00000002U) /* Wakeup */
107 #define LIN_INT_TO (0x00000010U) /* Time out */
108 #define LIN_INT_TOAWUS (0x00000040U) /* Time out after wakeup signal */
109 #define LIN_INT_TOA3WUS (0x00000080U) /* Time out after 3 wakeup signals */
110 #define LIN_INT_TX (0x00000100U) /* Transmit buffer ready */
111 #define LIN_INT_RX (0x00000200U) /* Receive buffer ready */
112 #define LIN_INT_ID (0x00002000U) /* Received matching identifier */
113 #define LIN_INT_PE (0x01000000U) /* Parity error */
114 #define LIN_INT_OE (0x02000000U) /* Overrun error */
115 #define LIN_INT_FE (0x04000000U) /* Framing error */
116 #define LIN_INT_NRE (0x08000000U) /* No response error */
117 #define LIN_INT_ISFE (0x10000000U) /* Inconsistent sync field error */
118 #define LIN_INT_CE (0x20000000U) /* Checksum error */
119 #define LIN_INT_PBE (0x40000000U) /* Physical bus error */
120 #define LIN_INT_BE (0x80000000U) /* Bit error */
121 #define LIN_INT_ALL (0xFF0023D2U) /* All interrupts */
122
132 #define LIN_FLAG_BREAK (CSL_LIN_SCIFLR_BRKDT_MASK)
133 #define LIN_FLAG_WAKEUP (CSL_LIN_SCIFLR_WAKEUP_MASK)
134 #define LIN_FLAG_IDLE (CSL_LIN_SCIFLR_IDLE_MASK)
135 #define LIN_FLAG_BUSY (CSL_LIN_SCIFLR_BUSY_MASK)
136 #define LIN_FLAG_TO (CSL_LIN_SCIFLR_TIMEOUT_MASK)
137 #define LIN_FLAG_TOAWUS (CSL_LIN_SCIFLR_TOAWUS_MASK)
138 #define LIN_FLAG_TOA3WUS (CSL_LIN_SCIFLR_TOA3WUS_MASK)
139 #define LIN_FLAG_TXRDY (CSL_LIN_SCIFLR_TXRDY_MASK)
140 #define LIN_FLAG_RXRDY (CSL_LIN_SCIFLR_RXRDY_MASK)
141 #define LIN_FLAG_TXWAKE (CSL_LIN_SCIFLR_TXWAKE_MASK)
142 #define LIN_FLAG_TXEMPTY (CSL_LIN_SCIFLR_TXEMPTY_MASK)
143 #define LIN_FLAG_RXWAKE (CSL_LIN_SCIFLR_RXWAKE_MASK)
144 #define LIN_FLAG_TXID (CSL_LIN_SCIFLR_IDTXFLAG_MASK)
145 #define LIN_FLAG_RXID (CSL_LIN_SCIFLR_IDRXFLAG_MASK)
146 #define LIN_FLAG_PE (CSL_LIN_SCIFLR_PE_MASK)
147 #define LIN_FLAG_OE (CSL_LIN_SCIFLR_OE_MASK)
148 #define LIN_FLAG_FE (CSL_LIN_SCIFLR_FE_MASK)
149 #define LIN_FLAG_NRE (CSL_LIN_SCIFLR_NRE_MASK)
150 #define LIN_FLAG_ISFE (CSL_LIN_SCIFLR_ISFE_MASK)
151 #define LIN_FLAG_CE (CSL_LIN_SCIFLR_CE_MASK)
152 #define LIN_FLAG_PBE (CSL_LIN_SCIFLR_PBE_MASK)
153 #define LIN_FLAG_BE (CSL_LIN_SCIFLR_BE_MASK)
154
165 #define LIN_VECT_NONE (0x00)
166 #define LIN_VECT_WAKEUP (0x01)
167 #define LIN_VECT_ISFE (0x02)
168 #define LIN_VECT_PE (0x03)
169 #define LIN_VECT_ID (0x04)
170 #define LIN_VECT_PBE (0x05)
171 #define LIN_VECT_FE (0x06)
172 #define LIN_VECT_BREAK (0x07)
173 #define LIN_VECT_CE (0x08)
174 #define LIN_VECT_OE (0x09)
175 #define LIN_VECT_BE (0x0A)
176 #define LIN_VECT_RX (0x0B)
177 #define LIN_VECT_TX (0x0C)
178 #define LIN_VECT_NRE (0x0D)
179 #define LIN_VECT_TOAWUS (0x0E)
180 #define LIN_VECT_TOA3WUS (0x0F)
181 #define LIN_VECT_TO (0x10)
182
193 #define LIN_ALL_ERRORS (0xF0000000U)
194 #define LIN_BIT_ERROR (0x80000000U)
195 #define LIN_BUS_ERROR (0x40000000U)
196 #define LIN_CHECKSUM_ERROR (0x20000000U)
197 #define LIN_ISF_ERROR (0x10000000U)
198
209 #define LIN_SCI_ALL_ERRORS (0x7000000U)
210 #define LIN_SCI_FRAME_ERROR (0x4000000U)
211 #define LIN_SCI_PARITY_ERROR (0x2000000U)
212 #define LIN_SCI_BREAK_ERROR (0x1000000U)
213
225 #define LIN_SCI_INT_BREAK (0x1U)
226 #define LIN_SCI_INT_WAKEUP (0x2U)
227 #define LIN_SCI_INT_TX (0x100U)
228 #define LIN_SCI_INT_RX (0x200U)
229 #define LIN_SCI_INT_TX_DMA (0x10000U)
230 #define LIN_SCI_INT_RX_DMA (0x20000U)
231 #define LIN_SCI_INT_PARITY (0x1000000U)
232 #define LIN_SCI_INT_OVERRUN (0x2000000U)
233 #define LIN_SCI_INT_FRAME (0x4000000U)
234 #define LIN_SCI_INT_ALL (0x7000303U)
235
237 /* ========================================================================== */
238 /* Structures and Enums */
239 /* ========================================================================== */
240
243 typedef enum
244 {
245 LIN_LOOPBACK_DIGITAL = 0U,
246 LIN_LOOPBACK_ANALOG = 1U
247 } LIN_LoopbackType;
248
251 typedef enum
252 {
253 LIN_ANALOG_LOOP_NONE = 0U,
254 LIN_ANALOG_LOOP_TX = 0U,
255 LIN_ANALOG_LOOP_RX = 1U
256 } LIN_AnalogLoopback;
257
260 typedef enum
261 {
262 LIN_COMM_LIN_USELENGTHVAL = 0x0000U,
263 LIN_COMM_LIN_ID4ID5LENCTL = 0x0001U
264 } LIN_CommMode;
265
268 typedef enum
269 {
270 LIN_COMM_SCI_IDLELINE = 0x0000U,
271 LIN_COMM_SCI_ADDRBIT = 0x0001U
272 } LIN_SCICommMode;
273
276 typedef enum
277 {
278 LIN_MODE_LIN_RESPONDER = 0x0U,
279 LIN_MODE_LIN_COMMANDER = 0x1U
280 } LIN_LINMode;
281
286 typedef enum
287 {
288 LIN_INTERRUPT_LINE0 = 0x0U,
289 LIN_INTERRUPT_LINE1 = 0x1U
290 } LIN_InterruptLine;
291
294 typedef enum
295 {
296 LIN_MSG_FILTER_IDBYTE = 0x0U,
297 LIN_MSG_FILTER_IDRESPONDER = 0x1U
298 } LIN_MessageFilter;
299
302 typedef enum
303 {
304 LIN_CHECKSUM_CLASSIC = 0x0U,
305 LIN_CHECKSUM_ENHANCED = 0x1U
306 } LIN_ChecksumType;
307
310 typedef enum
311 {
312 LIN_DEBUG_FROZEN = 0x0U,
313 LIN_DEBUG_COMPLETE = 0x1U
314 } LIN_DebugMode;
315
318 typedef enum
319 {
320 LIN_PINMASK_NONE = 0x0U,
321 LIN_PINMASK_CENTER = 0x1U,
322 LIN_PINMASK_CENTER_SCLK = 0x2U,
323 LIN_PINMASK_CENTER_2SCLK = 0x3U
324 } LIN_PinSampleMask;
325
328 typedef enum
329 {
330 LIN_SCI_PAR_ODD = 0x0U,
331 LIN_SCI_PAR_EVEN = 0x1U
332 } LIN_SCIParityType;
333
336 typedef enum
337 {
338 LIN_SCI_STOP_ONE = 0x0U,
339 LIN_SCI_STOP_TWO = 0x1U
340 } LIN_SCIStopBits;
341
344 typedef enum
345 {
346 LIN_PINTYPE_TX = 0x4U,
347 LIN_PINTYPE_RX = 0x2U
348 } LIN_PinType;
349
350 /* ========================================================================== */
351 /* Internal/Private Structure Declarations */
352 /* ========================================================================== */
353
354 /* None */
355
356 /* ========================================================================== */
357 /* Global Variables Declarations */
358 /* ========================================================================== */
359
360 /* None */
361
362 /* ========================================================================== */
363 /* Function Declarations */
364 /* ========================================================================== */
365
373 void LIN_initModule(uint32_t base);
374
383 void LIN_getData(uint32_t base, uint16_t * const data);
384
393 void LIN_sendData(uint32_t base, uint16_t *data);
394
395 /* ========================================================================== */
396 /* Static Function Definitions */
397 /* ========================================================================== */
398
410 static inline Bool
411 LIN_isBaseValid(uint32_t base)
412 {
413 #if defined (SOC_AM263X)
414 return(
415 (base == CSL_LIN0_U_BASE) ||
416 (base == CSL_LIN1_U_BASE) ||
417 (base == CSL_LIN2_U_BASE) ||
418 (base == CSL_LIN3_U_BASE) ||
419 (base == CSL_LIN4_U_BASE)
420 );
421 #else
422 return TRUE;
423 #endif /* defined (SOC_AM263X) */
424 }
425
438 static inline void
439 LIN_setLINMode(uint32_t base, LIN_LINMode mode)
440 {
441 /* Paramter Validation */
442 DebugP_assert(LIN_isBaseValid(base));
443
444 /* Program LIN Mode */
445 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIGCR1), CSL_LIN_SCIGCR1_CLK_MASTER_MASK, CSL_LIN_SCIGCR1_CLK_MASTER_SHIFT, mode);
446 }
447
465 static inline void
466 LIN_setMaximumBaudRate(uint32_t base, uint32_t clockVal, uint32_t baudrate)
467 {
468 /* Parameter Validation */
469 DebugP_assert(LIN_isBaseValid(base));
470
471 /* Calculate maximum baud rate prescaler
472 * MBR = (0.9 * clockVal / baudrate)
473 * where:
474 * - `clockVal` is the clock frequency driving the LIN module.
475 * - `baudrate` is the desired communication baud rate.
476 */
477 HW_WR_FIELD32_RAW((base + CSL_LIN_MBRSR), CSL_LIN_MBRSR_MBR_MASK, CSL_LIN_MBRSR_MBR_SHIFT, (uint32_t)( 0.9 * clockVal / baudrate));
478 }
479
492 static inline void
493 LIN_setMessageFiltering(uint32_t base, LIN_MessageFilter type)
494 {
495 /* Parameter Validation */
496 DebugP_assert(LIN_isBaseValid(base));
497
498 /* Sets the message filtering type */
499 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIGCR1), CSL_LIN_SCIGCR1_HGENCTRL_MASK, CSL_LIN_SCIGCR1_HGENCTRL_SHIFT, type);
500 }
501
510 static inline void
511 LIN_enableParity(uint32_t base)
512 {
513 /* Parameter Validation */
514 DebugP_assert(LIN_isBaseValid(base));
515
516 /* Enable the parity mode */
517 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIGCR1), CSL_LIN_SCIGCR1_PARITYENA_MASK, CSL_LIN_SCIGCR1_PARITYENA_SHIFT, CSL_TRUE);
518 }
519
528 static inline void
529 LIN_disableParity(uint32_t base)
530 {
531 /* Parameter Validation */
532 DebugP_assert(LIN_isBaseValid(base));
533
534 /* Enable the parity mode */
535 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIGCR1), CSL_LIN_SCIGCR1_PARITYENA_MASK, CSL_LIN_SCIGCR1_PARITYENA_SHIFT, CSL_FALSE);
536 }
537
553 static inline uint16_t
554 LIN_generateParityID(uint16_t identifier)
555 {
556 uint16_t p0, p1, parityIdentifier;
557
558 /* Calculate parity bits and generate updated identifier */
559 p0 = ((identifier & LIN_ID0) ^ ((identifier & LIN_ID1) >> 1U) ^
560 ((identifier & LIN_ID2) >> 2U) ^ ((identifier & LIN_ID4) >> 4U));
561 p1 = !(((identifier & LIN_ID1) >> 1U) ^ ((identifier & LIN_ID3) >> 3U) ^
562 ((identifier & LIN_ID4) >> 4U) ^ ((identifier & LIN_ID5) >> 5U));
563 parityIdentifier = identifier | ((p0 << 6U) | (p1 << 7U));
564
565 return(parityIdentifier);
566 }
567
579 static inline void
580 LIN_setIDByte(uint32_t base, uint16_t identifier)
581 {
582 /* Parameter Validation */
583 DebugP_assert(LIN_isBaseValid(base));
584
585 HW_WR_FIELD32_RAW((base + CSL_LIN_LINID), CSL_LIN_LINID_IDBYTE_MASK, CSL_LIN_LINID_IDBYTE_SHIFT, identifier);
586 }
587
599 static inline void
600 LIN_setIDResponderTask(uint32_t base, uint16_t identifier)
601 {
602 /* Parameter Validation */
603 DebugP_assert(LIN_isBaseValid(base));
604
605 HW_WR_FIELD32_RAW((base + CSL_LIN_LINID), CSL_LIN_LINID_IDSLAVETASKBYTE_MASK, CSL_LIN_LINID_IDSLAVETASKBYTE_SHIFT, identifier);
606 }
607
617 static inline void
618 LIN_sendWakeupSignal(uint32_t base)
619 {
620 /* Parameter Validation */
621 DebugP_assert(LIN_isBaseValid(base));
622
623 /* Set key in Byte 0 (MSB) of transmit buffer 0 register */
624 HW_WR_FIELD32_RAW((base + CSL_LIN_LINTD0), CSL_LIN_LINTD0_TD0_MASK, CSL_LIN_LINTD0_TD0_SHIFT, (uint16_t)LIN_WAKEUP_KEY);
625
626 /* Set the powerdown mask */
627 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIGCR2), CSL_LIN_SCIGCR2_POWERDOWN_MASK,
628 CSL_LIN_SCIGCR2_POWERDOWN_SHIFT, CSL_TRUE);
629
630 /* Transmit TDO for wakeup */
631 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIGCR2), CSL_LIN_SCIGCR2_GENWU_MASK, CSL_LIN_SCIGCR2_GENWU_SHIFT, CSL_TRUE);
632
633 /* Set the powerdown mask */
634 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIGCR2), CSL_LIN_SCIGCR2_POWERDOWN_MASK,
635 CSL_LIN_SCIGCR2_POWERDOWN_SHIFT, CSL_FALSE);
636 }
637
652 static inline void
653 LIN_enterSleep(uint32_t base)
654 {
655 /* Parameter Validation */
656 DebugP_assert(LIN_isBaseValid(base));
657
658 /* Entering Powerdown */
659 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIGCR2), CSL_LIN_SCIGCR2_POWERDOWN_MASK, CSL_LIN_SCIGCR2_POWERDOWN_SHIFT, CSL_TRUE);
660 }
661
671 static inline void
672 LIN_sendChecksum(uint32_t base)
673 {
674 /* Parameter Validation */
675 DebugP_assert(LIN_isBaseValid(base));
676
677 /* Setting the Check Sum */
678 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIGCR2), CSL_LIN_SCIGCR2_SC_MASK, CSL_LIN_SCIGCR2_SC_SHIFT, CSL_TRUE);
679 }
680
690 static inline void
691 LIN_triggerChecksumCompare(uint32_t base)
692 {
693 /* Parameter Validation */
694 DebugP_assert(LIN_isBaseValid(base));
695
696 /* Comparing the Check Sum */
697 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIGCR2), CSL_LIN_SCIGCR2_CC_MASK, CSL_LIN_SCIGCR2_CC_SHIFT, CSL_TRUE);
698 }
699
711 static inline Bool
712 LIN_isTxReady(uint32_t base)
713 {
714 /* Parameter Validation */
715 DebugP_assert(LIN_isBaseValid(base));
716
717 /* Check TXRDY BIT */
718 return((HW_RD_REG32_RAW(base + CSL_LIN_SCIFLR) & CSL_LIN_SCIFLR_TXRDY_MASK) ==
719 CSL_LIN_SCIFLR_TXRDY_MASK);
720 }
721
734 static inline void
735 LIN_setFrameLength(uint32_t base, uint16_t length)
736 {
737 /* Parameter Validation */
738 DebugP_assert(LIN_isBaseValid(base));
739 DebugP_assert((length > 0U) && (length < 9U));
740
741 /* Clear and set frame length value */
742 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIFORMAT), CSL_LIN_SCIFORMAT_LENGTH_MASK, CSL_LIN_SCIFORMAT_LENGTH_SHIFT, ((uint32_t)length - (uint32_t)1U));
743 }
744
759 static inline void
760 LIN_setCommMode(uint32_t base, LIN_CommMode mode)
761 {
762 /* Parameter Validation */
763 DebugP_assert(LIN_isBaseValid(base));
764
765 /* Write communication mode selection to the appropriate bit. */
766 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIGCR1), CSL_LIN_SCIGCR1_COMMMODE_MASK, CSL_LIN_SCIGCR1_COMMMODE_SHIFT, (uint16_t)mode);
767 }
768
779 static inline void
780 LIN_setTxMask(uint32_t base, uint16_t mask)
781 {
782 /* Parameter Validation */
783 DebugP_assert(LIN_isBaseValid(base));
784
785 /* Clear previous mask value and set new mask */
786 HW_WR_FIELD32_RAW((base + CSL_LIN_LINMASK), CSL_LIN_LINMASK_TXIDMASK_MASK, CSL_LIN_LINMASK_TXIDMASK_SHIFT, mask);
787 }
788
799 static inline void
800 LIN_setRxMask(uint32_t base, uint16_t mask)
801 {
802 /* Parameter Validation */
803 DebugP_assert(LIN_isBaseValid(base));
804
805 /* Clear previous mask value and set new mask */
806 HW_WR_FIELD32_RAW((base + CSL_LIN_LINMASK), CSL_LIN_LINMASK_RXIDMASK_MASK, CSL_LIN_LINMASK_RXIDMASK_SHIFT, (uint32_t)mask);
807 }
808
818 static inline uint16_t
819 LIN_getTxMask(uint32_t base)
820 {
821 /* Parameter Validation */
822 DebugP_assert(LIN_isBaseValid(base));
823
824 /* Get Tx Mask status */
825 return(HW_RD_FIELD32_RAW((base + CSL_LIN_LINMASK), CSL_LIN_LINMASK_TXIDMASK_MASK, CSL_LIN_LINMASK_TXIDMASK_SHIFT));
826 }
827
839 static inline uint16_t
840 LIN_getRxMask(uint32_t base)
841 {
842 /* Parameter Validation */
843 DebugP_assert(LIN_isBaseValid(base));
844
845 /* Get Tx Mask status */
846 return(HW_RD_FIELD32_RAW((base + CSL_LIN_LINMASK), CSL_LIN_LINMASK_RXIDMASK_MASK, CSL_LIN_LINMASK_RXIDMASK_SHIFT));
847 }
848
860 static inline Bool
861 LIN_isRxReady(uint32_t base)
862 {
863 /* Parameter Validation */
864 DebugP_assert(LIN_isBaseValid(base));
865
866 /* Ready Rx ready flag and return status */
867 return(HW_RD_FIELD32_RAW((base + CSL_LIN_SCIFLR), CSL_LIN_SCIFLR_RXRDY_MASK, CSL_LIN_SCIFLR_RXRDY_SHIFT));
868 }
869
880 static inline uint16_t
881 LIN_getRxIdentifier(uint32_t base)
882 {
883 /* Parameter Validation */
884 DebugP_assert(LIN_isBaseValid(base));
885
886 /* Ready Rx ready flag and return status */
887 return(HW_RD_FIELD32_RAW((base + CSL_LIN_LINID), CSL_LIN_LINID_RECEIVEDID_MASK, CSL_LIN_LINID_RECEIVEDID_SHIFT));
888 }
889
901 static inline Bool
902 LIN_isTxMatch(uint32_t base)
903 {
904 /* Parameter Validation */
905 DebugP_assert(LIN_isBaseValid(base));
906
907 /* Read Tx ID flag and return status */
908 return(HW_RD_FIELD32_RAW((base + CSL_LIN_SCIFLR), CSL_LIN_SCIFLR_IDTXFLAG_MASK, CSL_LIN_SCIFLR_IDTXFLAG_SHIFT));
909 }
910
922 static inline Bool
923 LIN_isRxMatch(uint32_t base)
924 {
925 /* Parameter Validation */
926 DebugP_assert(LIN_isBaseValid(base));
927
928 /* Read Tx ID flag and return status */
929 return(HW_RD_FIELD32_RAW((base + CSL_LIN_SCIFLR), CSL_LIN_SCIFLR_IDRXFLAG_MASK, CSL_LIN_SCIFLR_IDRXFLAG_SHIFT));
930 }
931
965 static inline void
966 LIN_enableInterrupt(uint32_t base, uint32_t intFlags)
967 {
968 /* Parameter Validation */
969 DebugP_assert(LIN_isBaseValid(base));
970
971 /* Set Interrupt Flags */
972 HW_WR_REG32_RAW((base + CSL_LIN_SCISETINT), HW_RD_REG32_RAW(base + CSL_LIN_SCISETINT)|intFlags);
973 }
974
1008 static inline void
1009 LIN_disableInterrupt(uint32_t base, uint32_t intFlags)
1010 {
1011 /* Parameter Validation */
1012 DebugP_assert(LIN_isBaseValid(base));
1013
1014 /* Clear Interrupt Flags */
1015 HW_WR_REG32_RAW((base + CSL_LIN_SCICLEARINT), intFlags);
1016 }
1017
1050 static inline void
1051 LIN_clearInterruptStatus(uint32_t base, uint32_t intFlags)
1052 {
1053 /* Parameter Validation */
1054 DebugP_assert(LIN_isBaseValid(base));
1055
1056 /* Clear Status Flags */
1057 HW_WR_REG32_RAW((base + CSL_LIN_SCIFLR), intFlags);
1058 }
1059
1093 static inline void
1094 LIN_setInterruptLevel0(uint32_t base, uint32_t intFlags)
1095 {
1096 /* Check the arguments. */
1097 DebugP_assert(LIN_isBaseValid(base));
1098
1099 /* Clear Status Flags */
1100 HW_WR_REG32_RAW((base + CSL_LIN_SCICLEARINTLVL), intFlags);
1101 }
1102
1136 static inline void
1137 LIN_setInterruptLevel1(uint32_t base, uint32_t intFlags)
1138 {
1139 /* Check the arguments. */
1140 DebugP_assert(LIN_isBaseValid(base));
1141
1142 /* Set interrupt levels to 1 */
1143 HW_WR_REG32_RAW((base + CSL_LIN_SCISETINTLVL), HW_RD_REG32_RAW(base + CSL_LIN_SCISETINTLVL)|intFlags);
1144 }
1145
1163 static inline void
1164 LIN_enableModuleErrors(uint32_t base, uint32_t errors)
1165 {
1166 /* Check the arguments. */
1167 DebugP_assert(LIN_isBaseValid(base));
1168
1169 /* Clear the IO DFT Enable Key & Enable write access*/
1170 HW_WR_FIELD32_RAW((base + CSL_LIN_IODFTCTRL), CSL_LIN_IODFTCTRL_IODFTENA_MASK, CSL_LIN_IODFTCTRL_IODFTENA_SHIFT, (uint32_t)LIN_IO_DFT_KEY);
1171
1172 /* Enable specified error bits */
1173 HW_WR_REG32_RAW((base + CSL_LIN_IODFTCTRL), HW_RD_REG32_RAW(base + CSL_LIN_IODFTCTRL)|errors);
1174
1175 /* Clear the IO DFT Enable Key */
1176 HW_WR_FIELD32_RAW((base + CSL_LIN_IODFTCTRL), CSL_LIN_IODFTCTRL_IODFTENA_MASK, CSL_LIN_IODFTCTRL_IODFTENA_SHIFT, (uint32_t)CSL_FALSE);
1177 }
1178
1194 static inline void
1195 LIN_disableModuleErrors(uint32_t base, uint32_t errors)
1196 {
1197 /* Check the arguments. */
1198 DebugP_assert(LIN_isBaseValid(base));
1199
1200 /* Clear the IO DFT Enable Key & Enable write access */
1201 HW_WR_FIELD32_RAW((base + CSL_LIN_IODFTCTRL), CSL_LIN_IODFTCTRL_IODFTENA_MASK, CSL_LIN_IODFTCTRL_IODFTENA_SHIFT, (uint32_t)LIN_IO_DFT_KEY);
1202
1203 /* Disable specified error bits */
1204 HW_WR_REG32_RAW((base + CSL_LIN_IODFTCTRL), HW_RD_REG32_RAW(base + CSL_LIN_IODFTCTRL)&~(errors));
1205
1206 /* Clear the IO DFT Enable Key */
1207 HW_WR_FIELD32_RAW((base + CSL_LIN_IODFTCTRL), CSL_LIN_IODFTCTRL_IODFTENA_MASK, CSL_LIN_IODFTCTRL_IODFTENA_SHIFT, (uint32_t)CSL_FALSE);
1208 }
1209
1222 static inline void
1223 LIN_enableAutomaticBaudrate(uint32_t base)
1224 {
1225 /* Check the arguments. */
1226 DebugP_assert(LIN_isBaseValid(base));
1227
1228 /* Specified error bits */
1229 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIGCR1), CSL_LIN_SCIGCR1_ADAPT_MASK, CSL_LIN_SCIGCR1_ADAPT_SHIFT, CSL_TRUE);
1230 }
1231
1241 static inline void
1242 LIN_disableAutomaticBaudrate(uint32_t base)
1243 {
1244 /* Check the arguments. */
1245 DebugP_assert(LIN_isBaseValid(base));
1246
1247 /* Specified error bits */
1248 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIGCR1), CSL_LIN_SCIGCR1_ADAPT_MASK, CSL_LIN_SCIGCR1_ADAPT_SHIFT, CSL_FALSE);
1249 }
1250
1262 static inline void
1263 LIN_stopExtendedFrame(uint32_t base)
1264 {
1265 /* Check the arguments. */
1266 DebugP_assert(LIN_isBaseValid(base));
1267
1268 /* Set stop bit. */
1269 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIGCR1), CSL_LIN_SCIGCR1_STOPEXTFRAME_MASK, CSL_LIN_SCIGCR1_STOPEXTFRAME_SHIFT, CSL_TRUE);
1270 }
1271
1284 static inline void
1285 LIN_setChecksumType(uint32_t base, LIN_ChecksumType type)
1286 {
1287 /* Check the arguments. */
1288 DebugP_assert(LIN_isBaseValid(base));
1289
1290 /* Set stop bit. */
1291 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIGCR1), CSL_LIN_SCIGCR1_CTYPE_MASK, CSL_LIN_SCIGCR1_CTYPE_SHIFT, type);
1292 }
1293
1317 static inline void
1318 LIN_setSyncFields(uint32_t base, uint16_t syncBreak, uint16_t delimiter)
1319 {
1320 /* Check the arguments. */
1321 DebugP_assert(LIN_isBaseValid(base));
1322 DebugP_assert(syncBreak < 8U);
1323 DebugP_assert((delimiter >= 1U) && (delimiter < 5U));
1324
1325 /* Clear sync values and set new values */
1326 HW_WR_FIELD32_RAW((base + CSL_LIN_LINCOMP), CSL_LIN_LINCOMP_SDEL_MASK,
1327 CSL_LIN_LINCOMP_SDEL_SHIFT, (delimiter - 1U));
1328 HW_WR_FIELD32_RAW((base + CSL_LIN_LINCOMP), CSL_LIN_LINCOMP_SBREAK_MASK,
1329 CSL_LIN_LINCOMP_SBREAK_SHIFT, syncBreak);
1330 }
1331
1340 static inline void
1341 LIN_enableSCIMode(uint32_t base)
1342 {
1343 /* Check the arguments. */
1344 DebugP_assert(LIN_isBaseValid(base));
1345
1346 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIGCR1), CSL_LIN_SCIGCR1_LINMODE_MASK,
1347 CSL_LIN_SCIGCR1_LINMODE_SHIFT, CSL_FALSE);
1348
1349 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIGCR1), CSL_LIN_SCIGCR1_CLK_MASTER_MASK,
1350 CSL_LIN_SCIGCR1_CLK_MASTER_SHIFT, CSL_TRUE);
1351
1352 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIGCR1), CSL_LIN_SCIGCR1_TIMINGMODE_MASK,
1353 CSL_LIN_SCIGCR1_TIMINGMODE_SHIFT, CSL_TRUE);
1354 }
1355
1364 static inline void
1365 LIN_disableSCIMode(uint32_t base)
1366 {
1367 /* Check the arguments. */
1368 DebugP_assert(LIN_isBaseValid(base));
1369
1370 /* Disable SCI communications mode */
1371 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIGCR1), CSL_LIN_SCIGCR1_CLK_MASTER_MASK,
1372 CSL_LIN_SCIGCR1_CLK_MASTER_SHIFT, CSL_FALSE);
1373
1374 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIGCR1), CSL_LIN_SCIGCR1_TIMINGMODE_MASK,
1375 CSL_LIN_SCIGCR1_TIMINGMODE_SHIFT, CSL_FALSE);
1376
1377 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIGCR1), CSL_LIN_SCIGCR1_LINMODE_MASK,
1378 CSL_LIN_SCIGCR1_LINMODE_SHIFT, CSL_TRUE);
1379 }
1380
1394 static inline void
1395 LIN_setSCICommMode(uint32_t base, LIN_SCICommMode mode)
1396 {
1397 /* Check the arguments. */
1398 DebugP_assert(LIN_isBaseValid(base));
1399 DebugP_assert((HW_RD_REG32_RAW(base + CSL_LIN_SCIGCR1) & CSL_LIN_SCIGCR1_LINMODE_MASK) ==
1400 0U);
1401
1402 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIGCR1), CSL_LIN_SCIGCR1_COMMMODE_MASK,
1403 CSL_LIN_SCIGCR1_COMMMODE_SHIFT, mode);
1404 }
1405
1418 static inline void
1419 LIN_enableSCIParity(uint32_t base, LIN_SCIParityType parity)
1420 {
1421 /* Check the arguments. */
1422 DebugP_assert(LIN_isBaseValid(base));
1423 DebugP_assert((HW_RD_REG32_RAW(base + CSL_LIN_SCIGCR1) & CSL_LIN_SCIGCR1_LINMODE_MASK) ==
1424 0U);
1425
1426 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIGCR1), CSL_LIN_SCIGCR1_PARITYENA_MASK,
1427 CSL_LIN_SCIGCR1_PARITYENA_SHIFT, 1U);
1428
1429 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIGCR1), CSL_LIN_SCIGCR1_PARITY_MASK,
1430 CSL_LIN_SCIGCR1_PARITY_SHIFT, parity);
1431 }
1432
1441 static inline void
1442 LIN_disableSCIParity(uint32_t base)
1443 {
1444 /* Check the arguments. */
1445 DebugP_assert(LIN_isBaseValid(base));
1446 DebugP_assert((HW_RD_REG32_RAW(base + CSL_LIN_SCIGCR1) & CSL_LIN_SCIGCR1_LINMODE_MASK) ==
1447 0U);
1448
1449 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIGCR1), CSL_LIN_SCIGCR1_PARITYENA_MASK,
1450 CSL_LIN_SCIGCR1_PARITYENA_SHIFT, 0U);
1451 }
1452
1465 static inline void
1466 LIN_setSCIStopBits(uint32_t base, LIN_SCIStopBits number)
1467 {
1468 /* Check the arguments. */
1469 DebugP_assert(LIN_isBaseValid(base));
1470 DebugP_assert((HW_RD_REG32_RAW(base + CSL_LIN_SCIGCR1) & CSL_LIN_SCIGCR1_LINMODE_MASK) ==
1471 0U);
1472
1473 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIGCR1), CSL_LIN_SCIGCR1_STOP_MASK,
1474 CSL_LIN_SCIGCR1_STOP_SHIFT, number);
1475 }
1476
1490 static inline void
1491 LIN_enableSCISleepMode(uint32_t base)
1492 {
1493 /* Check the arguments. */
1494 DebugP_assert(LIN_isBaseValid(base));
1495 DebugP_assert((HW_RD_REG32_RAW(base + CSL_LIN_SCIGCR1) & CSL_LIN_SCIGCR1_LINMODE_MASK) ==
1496 0U);
1497
1498 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIGCR1), CSL_LIN_SCIGCR1_SLEEP_MASK,
1499 CSL_LIN_SCIGCR1_SLEEP_SHIFT, CSL_TRUE);
1500 }
1501
1511 static inline void
1512 LIN_disableSCISleepMode(uint32_t base)
1513 {
1514 /* Check the arguments. */
1515 DebugP_assert(LIN_isBaseValid(base));
1516 DebugP_assert((HW_RD_REG32_RAW(base + CSL_LIN_SCIGCR1) & CSL_LIN_SCIGCR1_LINMODE_MASK) ==
1517 0U);
1518
1519 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIGCR1), CSL_LIN_SCIGCR1_SLEEP_MASK,
1520 CSL_LIN_SCIGCR1_SLEEP_SHIFT, CSL_FALSE);
1521 }
1522
1535 static inline void
1536 LIN_enterSCILowPower(uint32_t base)
1537 {
1538 /* Check the arguments. */
1539 DebugP_assert(LIN_isBaseValid(base));
1540 DebugP_assert((HW_RD_REG32_RAW(base + CSL_LIN_SCIGCR1) & CSL_LIN_SCIGCR1_LINMODE_MASK) ==
1541 0U);
1542
1543 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIGCR2), CSL_LIN_SCIGCR2_POWERDOWN_MASK,
1544 CSL_LIN_SCIGCR2_POWERDOWN_SHIFT, CSL_TRUE);
1545 }
1546
1555 static inline void
1556 LIN_exitSCILowPower(uint32_t base)
1557 {
1558 /* Check the arguments. */
1559 DebugP_assert(LIN_isBaseValid(base));
1560 DebugP_assert((HW_RD_REG32_RAW(base + CSL_LIN_SCIGCR1) & CSL_LIN_SCIGCR1_LINMODE_MASK) ==
1561 0U);
1562
1563 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIGCR2), CSL_LIN_SCIGCR2_POWERDOWN_MASK,
1564 CSL_LIN_SCIGCR2_POWERDOWN_SHIFT, CSL_FALSE);
1565 }
1566
1578 static inline void
1579 LIN_setSCICharLength(uint32_t base, uint16_t numBits)
1580 {
1581 /* Check the arguments. */
1582 DebugP_assert(LIN_isBaseValid(base));
1583 DebugP_assert((HW_RD_REG32_RAW(base + CSL_LIN_SCIGCR1) & CSL_LIN_SCIGCR1_LINMODE_MASK) ==
1584 0U);
1585 DebugP_assert((numBits > 0U) && (numBits < 9U));
1586
1587 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIFORMAT), CSL_LIN_SCIFORMAT_CHAR_MASK,
1588 CSL_LIN_SCIFORMAT_CHAR_SHIFT, (uint32_t)(numBits - 1U));
1589 }
1590
1603 static inline void
1604 LIN_setSCIFrameLength(uint32_t base, uint16_t length)
1605 {
1606 /* Check the arguments. */
1607 DebugP_assert(LIN_isBaseValid(base));
1608 DebugP_assert((HW_RD_REG32_RAW(base + CSL_LIN_SCIGCR1) & CSL_LIN_SCIGCR1_LINMODE_MASK) ==
1609 0U);
1610 DebugP_assert((length > 0U) && (length < 9U));
1611
1612 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIFORMAT), CSL_LIN_SCIFORMAT_LENGTH_MASK,
1613 CSL_LIN_SCIFORMAT_LENGTH_SHIFT, (uint32_t)(length - 1U));
1614 }
1615
1627 static inline Bool
1628 LIN_isSCIDataAvailable(uint32_t base)
1629 {
1630 /* Check the arguments. */
1631 DebugP_assert(LIN_isBaseValid(base));
1632 DebugP_assert((HW_RD_REG32_RAW(base + CSL_LIN_SCIGCR1) & CSL_LIN_SCIGCR1_LINMODE_MASK) ==
1633 0U);
1634
1635 return((HW_RD_REG32_RAW(base + CSL_LIN_SCIFLR) & CSL_LIN_SCIFLR_RXRDY_MASK) == CSL_LIN_SCIFLR_RXRDY_MASK);
1636 }
1637
1649 static inline Bool
1650 LIN_isSCISpaceAvailable(uint32_t base)
1651 {
1652 /* Check the arguments. */
1653 DebugP_assert(LIN_isBaseValid(base));
1654 DebugP_assert((HW_RD_REG32_RAW(base + CSL_LIN_SCIGCR1) & CSL_LIN_SCIGCR1_LINMODE_MASK) ==
1655 0U);
1656
1657 return((HW_RD_REG32_RAW(base + CSL_LIN_SCIFLR) & CSL_LIN_SCIFLR_TXRDY_MASK) == CSL_LIN_SCIFLR_TXRDY_MASK);
1658 }
1659
1681 static inline uint16_t
1682 LIN_readSCICharNonBlocking(uint32_t base, Bool emulation)
1683 {
1684 /* Check the arguments. */
1685 DebugP_assert(LIN_isBaseValid(base));
1686 DebugP_assert((HW_RD_REG32_RAW(base + CSL_LIN_SCIGCR1) & CSL_LIN_SCIGCR1_LINMODE_MASK) ==
1687 0U);
1688
1689 /* Read specific data register */
1690 return(emulation ? (HW_RD_REG32_RAW(base + CSL_LIN_SCIED) & CSL_LIN_SCIED_ED_MASK) :
1691 (HW_RD_REG32_RAW(base + CSL_LIN_SCIRD) & CSL_LIN_SCIRD_RD_MASK));
1692 }
1693
1713 static inline uint16_t
1714 LIN_readSCICharBlocking(uint32_t base, Bool emulation)
1715 {
1716 /* Check the arguments. */
1717 DebugP_assert(LIN_isBaseValid(base));
1718 DebugP_assert((HW_RD_REG32_RAW(base + CSL_LIN_SCIGCR1) & CSL_LIN_SCIGCR1_LINMODE_MASK) ==
1719 0U);
1720
1721 /* Wait until a character is available in buffer. */
1722 while(!LIN_isSCIDataAvailable(base))
1723 {
1724 }
1725
1726 /* Read specific data register */
1727 return(emulation ? (HW_RD_REG32_RAW(base + CSL_LIN_SCIED) & CSL_LIN_SCIED_ED_MASK) :
1728 (HW_RD_REG32_RAW(base + CSL_LIN_SCIRD) & CSL_LIN_SCIRD_RD_MASK));
1729 }
1730
1745 static inline void
1746 LIN_writeSCICharNonBlocking(uint32_t base, uint16_t data)
1747 {
1748 /* Check the arguments. */
1749 DebugP_assert(LIN_isBaseValid(base));
1750 DebugP_assert((HW_RD_REG32_RAW(base + CSL_LIN_SCIGCR1) & CSL_LIN_SCIGCR1_LINMODE_MASK) ==
1751 0U);
1752 DebugP_assert(data <= CSL_LIN_SCITD_TD_MASK);
1753
1754 /* Set the Tx Data */
1755 HW_WR_FIELD32_RAW((base + CSL_LIN_SCITD), CSL_LIN_SCITD_TD_MASK, CSL_LIN_SCITD_TD_SHIFT, data);
1756 }
1757
1769 static inline void
1770 LIN_writeSCICharBlocking(uint32_t base, uint16_t data)
1771 {
1772 /* Check the arguments. */
1773 DebugP_assert(LIN_isBaseValid(base));
1774 DebugP_assert((HW_RD_REG32_RAW(base + CSL_LIN_SCIGCR1) & CSL_LIN_SCIGCR1_LINMODE_MASK) ==
1775 0U);
1776 DebugP_assert(data <= CSL_LIN_SCITD_TD_MASK);
1777
1778 /* Wait until space is available in the transmit buffer. */
1779 while(!LIN_isSCISpaceAvailable(base))
1780 {
1781 }
1782
1783 /* Set the Tx Data */
1784 HW_WR_FIELD32_RAW((base + CSL_LIN_SCITD), CSL_LIN_SCITD_TD_MASK, CSL_LIN_SCITD_TD_SHIFT, data);
1785 }
1786
1805 static inline void
1806 LIN_enableSCIModuleErrors(uint32_t base, uint32_t errors)
1807 {
1808 /* Check the arguments. */
1809 DebugP_assert(LIN_isBaseValid(base));
1810 DebugP_assert((HW_RD_REG32_RAW(base + CSL_LIN_SCIGCR1) & CSL_LIN_SCIGCR1_LINMODE_MASK) ==
1811 0U);
1812
1813 /* Clear the IO DFT Enable Key & Enable write access */
1814 HW_WR_FIELD32_RAW((base + CSL_LIN_IODFTCTRL), CSL_LIN_IODFTCTRL_IODFTENA_MASK, CSL_LIN_IODFTCTRL_IODFTENA_SHIFT, LIN_IO_DFT_KEY);
1815
1816 /* Enable specified error bits */
1817 HW_WR_REG32_RAW((base + CSL_LIN_IODFTCTRL), (HW_RD_REG32_RAW(base + CSL_LIN_IODFTCTRL)|errors));
1818
1819 /* Clear the IO DFT Enable Key & Enable write access */
1820 HW_WR_FIELD32_RAW((base + CSL_LIN_IODFTCTRL), CSL_LIN_IODFTCTRL_IODFTENA_MASK, CSL_LIN_IODFTCTRL_IODFTENA_SHIFT, CSL_FALSE);
1821 }
1822
1838 static inline void
1839 LIN_disableSCIModuleErrors(uint32_t base, uint32_t errors)
1840 {
1841 /* Check the arguments. */
1842 DebugP_assert(LIN_isBaseValid(base));
1843 DebugP_assert((HW_RD_REG32_RAW(base + CSL_LIN_SCIGCR1) & CSL_LIN_SCIGCR1_LINMODE_MASK) ==
1844 0U);
1845
1846 /* Clear the IO DFT Enable Key & Enable write access */
1847 HW_WR_FIELD32_RAW((base + CSL_LIN_IODFTCTRL), CSL_LIN_IODFTCTRL_IODFTENA_MASK, CSL_LIN_IODFTCTRL_IODFTENA_SHIFT, LIN_IO_DFT_KEY);
1848
1849 /* Disable specified error bits */
1850 HW_WR_FIELD32_RAW((base + CSL_LIN_IODFTCTRL), errors, 0U, CSL_FALSE);
1851
1852 /* Clear the IO DFT Enable Key & Enable write access */
1853 HW_WR_FIELD32_RAW((base + CSL_LIN_IODFTCTRL), CSL_LIN_IODFTCTRL_IODFTENA_MASK, CSL_LIN_IODFTCTRL_IODFTENA_SHIFT, CSL_FALSE);
1854 }
1855
1883 static inline void
1884 LIN_enableSCIInterrupt(uint32_t base, uint32_t intFlags)
1885 {
1886 /* Check the arguments. */
1887 DebugP_assert(LIN_isBaseValid(base));
1888 DebugP_assert((HW_RD_REG32_RAW(base + CSL_LIN_SCIGCR1) & CSL_LIN_SCIGCR1_LINMODE_MASK) ==
1889 0U);
1890
1891 /* Set specified interrupts */
1892 HW_WR_REG32_RAW((base + CSL_LIN_SCISETINT), (HW_RD_REG32_RAW(base + CSL_LIN_SCISETINT)|intFlags));
1893 }
1894
1922 static inline void
1923 LIN_disableSCIInterrupt(uint32_t base, uint32_t intFlags)
1924 {
1925 /* Check the arguments. */
1926 DebugP_assert(LIN_isBaseValid(base));
1927 DebugP_assert((HW_RD_REG32_RAW(base + CSL_LIN_SCIGCR1) & CSL_LIN_SCIGCR1_LINMODE_MASK) ==
1928 0U);
1929
1930 /* Set specified interrupts */
1931 HW_WR_REG32_RAW((base + CSL_LIN_SCICLEARINT), (HW_RD_REG32_RAW(base + CSL_LIN_SCICLEARINT)|intFlags));
1932 }
1933
1960 static inline void
1961 LIN_clearSCIInterruptStatus(uint32_t base, uint32_t intFlags)
1962 {
1963 /* Check the arguments. */
1964 DebugP_assert(LIN_isBaseValid(base));
1965 DebugP_assert((HW_RD_REG32_RAW(base + CSL_LIN_SCIGCR1) & CSL_LIN_SCIGCR1_LINMODE_MASK) ==
1966 0U);
1967
1968 /* Set specified interrupts */
1969 HW_WR_REG32_RAW((base + CSL_LIN_SCIFLR), (HW_RD_REG32_RAW(base + CSL_LIN_SCIFLR)|intFlags));
1970 }
1971
1999 static inline void
2000 LIN_setSCIInterruptLevel0(uint32_t base, uint32_t intFlags)
2001 {
2002 /* Check the arguments. */
2003 DebugP_assert(LIN_isBaseValid(base));
2004 DebugP_assert((HW_RD_REG32_RAW(base + CSL_LIN_SCIGCR1) & CSL_LIN_SCIGCR1_LINMODE_MASK) ==
2005 0U);
2006
2007 /* Clear Status Flags */
2008 HW_WR_REG32_RAW((base + CSL_LIN_SCICLEARINTLVL), (HW_RD_REG32_RAW(base + CSL_LIN_SCICLEARINTLVL)|intFlags));
2009 }
2010
2037 static inline void
2038 LIN_setSCIInterruptLevel1(uint32_t base, uint32_t intFlags)
2039 {
2040 /* Check the arguments. */
2041 DebugP_assert(LIN_isBaseValid(base));
2042 DebugP_assert((HW_RD_REG32_RAW(base + CSL_LIN_SCIGCR1) & CSL_LIN_SCIGCR1_LINMODE_MASK) ==
2043 0U);
2044
2045 /* Set interrupt levels to 1 */
2046 HW_WR_REG32_RAW((base + CSL_LIN_SCISETINTLVL), HW_RD_REG32_RAW(base + CSL_LIN_SCISETINTLVL)|intFlags);
2047 }
2048
2060 static inline Bool
2061 LIN_isSCIReceiverIdle(uint32_t base)
2062 {
2063 /* Check the arguments. */
2064 DebugP_assert(LIN_isBaseValid(base));
2065 DebugP_assert((HW_RD_REG32_RAW(base + CSL_LIN_SCIGCR1) & CSL_LIN_SCIGCR1_LINMODE_MASK) ==
2066 0U);
2067
2068 /* Read Rx Idle flag and return status */
2069 return((HW_RD_REG32_RAW(base + CSL_LIN_SCIFLR) & CSL_LIN_SCIFLR_IDLE_MASK) == 0U);
2070 }
2071
2084 static inline Bool
2085 LIN_getSCITxFrameType(uint32_t base)
2086 {
2087 /* Check the arguments. */
2088 DebugP_assert(LIN_isBaseValid(base));
2089 DebugP_assert((HW_RD_REG32_RAW(base + CSL_LIN_SCIGCR1) & CSL_LIN_SCIGCR1_LINMODE_MASK) ==
2090 0U);
2091
2092 /* Read Rx Idle flag and return status */
2093 return((HW_RD_REG32_RAW(base + CSL_LIN_SCIFLR) & CSL_LIN_SCIFLR_WAKEUP_MASK) == CSL_LIN_SCIFLR_WAKEUP_MASK);
2094 }
2095
2108 static inline Bool
2109 LIN_getSCIRxFrameType(uint32_t base)
2110 {
2111 /* Check the arguments. */
2112 DebugP_assert(LIN_isBaseValid(base));
2113 DebugP_assert((HW_RD_REG32_RAW(base + CSL_LIN_SCIGCR1) & CSL_LIN_SCIGCR1_LINMODE_MASK) ==
2114 0U);
2115
2116 /* Read Rx Idle flag and return status */
2117 return((HW_RD_REG32_RAW(base + CSL_LIN_SCIFLR) & CSL_LIN_SCIFLR_RXWAKE_MASK) == CSL_LIN_SCIFLR_RXWAKE_MASK);
2118 }
2119
2131 static inline Bool
2132 LIN_isSCIBreakDetected(uint32_t base)
2133 {
2134 /* Check the arguments. */
2135 DebugP_assert(LIN_isBaseValid(base));
2136 DebugP_assert((HW_RD_REG32_RAW(base + CSL_LIN_SCIGCR1) & CSL_LIN_SCIGCR1_LINMODE_MASK) ==
2137 0U);
2138
2139 /* Read Rx Idle flag and return status */
2140 return((HW_RD_REG32_RAW(base + CSL_LIN_SCIFLR) & CSL_LIN_SCIFLR_BRKDT_MASK) == CSL_LIN_SCIFLR_BRKDT_MASK);
2141 }
2142
2154 static inline void
2155 LIN_enableModule(uint32_t base)
2156 {
2157 /* Check the arguments. */
2158 DebugP_assert(LIN_isBaseValid(base));
2159
2160 /* Set reset bit. */
2161 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIGCR0), CSL_LIN_SCIGCR0_RESET_MASK, CSL_LIN_SCIGCR0_RESET_SHIFT, CSL_TRUE);
2162
2163 /* Enable TX and RX pin control functionality. */
2164 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIPIO0), CSL_LIN_SCIPIO0_RXFUNC_MASK, CSL_LIN_SCIPIO0_RXFUNC_SHIFT, CSL_TRUE);
2165 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIPIO0), CSL_LIN_SCIPIO0_TXFUNC_MASK, CSL_LIN_SCIPIO0_TXFUNC_SHIFT, CSL_TRUE);
2166 }
2167
2179 static inline void
2180 LIN_disableModule(uint32_t base)
2181 {
2182 /* Check the arguments. */
2183 DebugP_assert(LIN_isBaseValid(base));
2184
2185 /* Disable TX and RX pin control functionality. */
2186 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIPIO0), CSL_LIN_SCIPIO0_RXFUNC_MASK, CSL_LIN_SCIPIO0_RXFUNC_SHIFT, CSL_FALSE);
2187 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIPIO0), CSL_LIN_SCIPIO0_TXFUNC_MASK, CSL_LIN_SCIPIO0_TXFUNC_SHIFT, CSL_FALSE);
2188
2189 /* Reset reset bit. */
2190 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIGCR0), CSL_LIN_SCIGCR0_RESET_MASK, CSL_LIN_SCIGCR0_RESET_SHIFT, CSL_FALSE);
2191 }
2192
2208 static inline void
2209 LIN_setBaudRatePrescaler(uint32_t base, uint32_t prescaler,
2210 uint32_t divider)
2211 {
2212 /* Check the arguments. */
2213 DebugP_assert(LIN_isBaseValid(base));
2214 DebugP_assert(prescaler <= (CSL_LIN_BRSR_SCI_LIN_PSL_MASK | CSL_LIN_BRSR_SCI_LIN_PSH_MASK));
2215 DebugP_assert(divider <= (CSL_LIN_BRSR_M_MASK >> CSL_LIN_BRSR_M_SHIFT));
2216
2217 /* Set baud rate prescaler and divider. */
2218 HW_WR_REG32_RAW((base + CSL_LIN_BRSR), (prescaler | (divider << CSL_LIN_BRSR_M_SHIFT)));
2219 }
2220
2230 static inline void
2231 LIN_enableDataTransmitter(uint32_t base)
2232 {
2233 /* Check the arguments. */
2234 DebugP_assert(LIN_isBaseValid(base));
2235
2236 /* Enable transmit bit. */
2237 HW_WR_REG32_RAW((base + CSL_LIN_SCIGCR1), HW_RD_REG32_RAW(base + CSL_LIN_SCIGCR1)|CSL_LIN_SCIGCR1_TXENA_MASK);
2238 }
2239
2249 static inline void
2250 LIN_disableDataTransmitter(uint32_t base)
2251 {
2252 /* Check the arguments. */
2253 DebugP_assert(LIN_isBaseValid(base));
2254
2255 /* Enable transmit bit. */
2256 HW_WR_REG32_RAW((base + CSL_LIN_SCIGCR1), HW_RD_REG32_RAW(base + CSL_LIN_SCIGCR1)&~(CSL_LIN_SCIGCR1_TXENA_MASK));
2257 }
2258
2268 static inline void
2269 LIN_enableDataReceiver(uint32_t base)
2270 {
2271 /* Check the arguments. */
2272 DebugP_assert(LIN_isBaseValid(base));
2273
2274 /* Enable receive bit. */
2275 HW_WR_REG32_RAW((base + CSL_LIN_SCIGCR1), HW_RD_REG32_RAW(base + CSL_LIN_SCIGCR1)|CSL_LIN_SCIGCR1_RXENA_MASK);
2276 }
2277
2287 static inline void
2288 LIN_disableDataReceiver(uint32_t base)
2289 {
2290 /* Check the arguments. */
2291 DebugP_assert(LIN_isBaseValid(base));
2292
2293 /* Disable receive bit. */
2294 HW_WR_REG32_RAW((base + CSL_LIN_SCIGCR1), HW_RD_REG32_RAW(base + CSL_LIN_SCIGCR1)&~(CSL_LIN_SCIGCR1_RXENA_MASK));
2295 }
2296
2310 static inline void
2311 LIN_performSoftwareReset(uint32_t base)
2312 {
2313 /* Check the arguments. */
2314 DebugP_assert(LIN_isBaseValid(base));
2315
2316 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIGCR1), CSL_LIN_SCIGCR1_SWNRST_MASK, CSL_LIN_SCIGCR1_SWNRST_SHIFT, CSL_TRUE);
2317 }
2318
2333 static inline void
2334 LIN_enterSoftwareReset(uint32_t base)
2335 {
2336 /* Check the arguments. */
2337 DebugP_assert(LIN_isBaseValid(base));
2338
2339 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIGCR1), CSL_LIN_SCIGCR1_SWNRST_MASK, CSL_LIN_SCIGCR1_SWNRST_SHIFT, CSL_FALSE);
2340 }
2341
2354 static inline void
2355 LIN_exitSoftwareReset(uint32_t base)
2356 {
2357 /* Check the arguments. */
2358 DebugP_assert(LIN_isBaseValid(base));
2359
2360 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIGCR1), CSL_LIN_SCIGCR1_SWNRST_MASK, CSL_LIN_SCIGCR1_SWNRST_SHIFT, CSL_TRUE);
2361 }
2362
2374 static inline Bool
2375 LIN_isBusBusy(uint32_t base)
2376 {
2377 /* Check the arguments. */
2378 DebugP_assert(LIN_isBaseValid(base));
2379
2380 return((HW_RD_REG32_RAW(base + CSL_LIN_SCIFLR) & CSL_LIN_SCIFLR_BUSY_MASK) == CSL_LIN_SCIFLR_BUSY_MASK);
2381 }
2382
2394 static inline Bool
2395 LIN_isTxBufferEmpty(uint32_t base)
2396 {
2397 /* Check the arguments. */
2398 DebugP_assert(LIN_isBaseValid(base));
2399
2400 return((HW_RD_REG32_RAW(base + CSL_LIN_SCIFLR) & CSL_LIN_SCIFLR_TXEMPTY_MASK) == CSL_LIN_SCIFLR_TXEMPTY_MASK);
2401 }
2402
2424 static inline void
2425 LIN_enableExtLoopback(uint32_t base, LIN_LoopbackType loopbackType,
2426 LIN_AnalogLoopback path)
2427 {
2428 /* Check the arguments. */
2429 DebugP_assert(LIN_isBaseValid(base));
2430
2431 /* Clear the IO DFT Enable Key */
2432 HW_WR_FIELD32_RAW((base + CSL_LIN_IODFTCTRL), CSL_LIN_IODFTCTRL_IODFTENA_MASK, CSL_LIN_IODFTCTRL_IODFTENA_SHIFT, LIN_IO_DFT_KEY);
2433
2434 /* Set loopback Type */
2435 HW_WR_FIELD32_RAW((base + CSL_LIN_IODFTCTRL), CSL_LIN_IODFTCTRL_LPBENA_MASK, CSL_LIN_IODFTCTRL_LPBENA_SHIFT, loopbackType);
2436
2437 /* Set Analog Loopback Path */
2438 HW_WR_FIELD32_RAW((base + CSL_LIN_IODFTCTRL), CSL_LIN_IODFTCTRL_RXPENA_MASK, CSL_LIN_IODFTCTRL_RXPENA_SHIFT, path);
2439 }
2440
2452 static inline void
2453 LIN_disableExtLoopback(uint32_t base)
2454 {
2455 /* Check the arguments. */
2456 DebugP_assert(LIN_isBaseValid(base));
2457
2458 /* Set loopback Type */
2459 HW_WR_FIELD32_RAW((base + CSL_LIN_IODFTCTRL), CSL_LIN_IODFTCTRL_LPBENA_MASK, CSL_LIN_IODFTCTRL_LPBENA_SHIFT, CSL_FALSE);
2460
2461 /* Set Analog Loopback Path */
2462 HW_WR_FIELD32_RAW((base + CSL_LIN_IODFTCTRL), CSL_LIN_IODFTCTRL_RXPENA_MASK, CSL_LIN_IODFTCTRL_RXPENA_SHIFT, CSL_FALSE);
2463 }
2464
2474 static inline void
2475 LIN_enableIntLoopback(uint32_t base)
2476 {
2477 /* Check the arguments. */
2478 DebugP_assert(LIN_isBaseValid(base));
2479
2480 /* Set loopback Type */
2481 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIGCR1), CSL_LIN_SCIGCR1_LOOPBACK_MASK, CSL_LIN_SCIGCR1_LOOPBACK_SHIFT, CSL_TRUE);
2482 }
2483
2493 static inline void
2494 LIN_disableIntLoopback(uint32_t base)
2495 {
2496 /* Check the arguments. */
2497 DebugP_assert(LIN_isBaseValid(base));
2498
2499 /* Set loopback Type */
2500 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIGCR1), CSL_LIN_SCIGCR1_LOOPBACK_MASK, CSL_LIN_SCIGCR1_LOOPBACK_SHIFT, CSL_FALSE);
2501 }
2502
2536 static inline uint32_t
2537 LIN_getInterruptStatus(uint32_t base)
2538 {
2539 /* Check the arguments. */
2540 DebugP_assert(LIN_isBaseValid(base));
2541
2542 /* Read and return the flag register */
2543 return(HW_RD_REG32_RAW(base + CSL_LIN_SCIFLR));
2544 }
2545
2557 static inline uint32_t
2558 LIN_getInterruptLevel(uint32_t base)
2559 {
2560 /* Check the arguments. */
2561 DebugP_assert(LIN_isBaseValid(base));
2562
2563 /* Read and return the flag register */
2564 return(HW_RD_REG32_RAW(base + CSL_LIN_SCISETINTLVL));
2565 }
2566
2602 static inline uint16_t
2603 LIN_getInterruptLine0Offset(uint32_t base)
2604 {
2605 /* Check the arguments. */
2606 DebugP_assert(LIN_isBaseValid(base));
2607
2608 /* Read and return the flag register */
2609 return(HW_RD_REG32_RAW(base + CSL_LIN_SCIINTVECT0) & CSL_LIN_SCIINTVECT0_INTVECT0_MASK);
2610 }
2611
2647 static inline uint16_t
2648 LIN_getInterruptLine1Offset(uint32_t base)
2649 {
2650 /* Check the arguments. */
2651 DebugP_assert(LIN_isBaseValid(base));
2652
2653 /* Read and return the flag register */
2654 return(HW_RD_REG32_RAW(base + CSL_LIN_SCIINTVECT1) & CSL_LIN_SCIINTVECT1_INTVECT1_MASK);
2655 }
2656
2665 static inline void
2666 LIN_enableMultibufferMode(uint32_t base)
2667 {
2668 /* Check the arguments. */
2669 DebugP_assert(LIN_isBaseValid(base));
2670
2671 /* Read and return the flag register */
2672 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIGCR1), CSL_LIN_SCIGCR1_MBUFMODE_MASK, CSL_LIN_SCIGCR1_MBUFMODE_SHIFT, CSL_TRUE);
2673 }
2674
2683 static inline void
2684 LIN_disableMultibufferMode(uint32_t base)
2685 {
2686 /* Check the arguments. */
2687 DebugP_assert(LIN_isBaseValid(base));
2688
2689 /* Read and return the flag register */
2690 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIGCR1), CSL_LIN_SCIGCR1_MBUFMODE_MASK, CSL_LIN_SCIGCR1_MBUFMODE_SHIFT, CSL_FALSE);
2691 }
2692
2706 static inline void
2707 LIN_setTransmitDelay(uint32_t base, uint16_t delay)
2708 {
2709 /* Check the arguments. */
2710 DebugP_assert(LIN_isBaseValid(base));
2711 DebugP_assert(delay < 8U);
2712
2713 /* Clear and Set the IO DFT Enable Key */
2714 HW_WR_FIELD32_RAW((base + CSL_LIN_IODFTCTRL), CSL_LIN_IODFTCTRL_IODFTENA_MASK, CSL_LIN_IODFTCTRL_IODFTENA_SHIFT, LIN_IO_DFT_KEY);
2715
2716 /* Set the delay value */
2717 HW_WR_FIELD32_RAW((base + CSL_LIN_IODFTCTRL), CSL_LIN_IODFTCTRL_TXSHIFT_MASK, CSL_LIN_IODFTCTRL_TXSHIFT_SHIFT, delay);
2718
2719 /* Clear the IO DFT Enable Key */
2720 HW_WR_FIELD32_RAW((base + CSL_LIN_IODFTCTRL), CSL_LIN_IODFTCTRL_IODFTENA_MASK, CSL_LIN_IODFTCTRL_IODFTENA_SHIFT, CSL_FALSE);
2721 }
2722
2739 static inline void
2740 LIN_setPinSampleMask(uint32_t base, LIN_PinSampleMask mask)
2741 {
2742 /* Check the arguments. */
2743 DebugP_assert(LIN_isBaseValid(base));
2744
2745 /* Clear and Set the IO DFT Enable Key */
2746 HW_WR_FIELD32_RAW((base + CSL_LIN_IODFTCTRL), CSL_LIN_IODFTCTRL_IODFTENA_MASK, CSL_LIN_IODFTCTRL_IODFTENA_SHIFT, LIN_IO_DFT_KEY);
2747
2748 /* Set the delay value */
2749 HW_WR_FIELD32_RAW((base + CSL_LIN_IODFTCTRL), CSL_LIN_IODFTCTRL_PINSAMPLEMASK_MASK, CSL_LIN_IODFTCTRL_PINSAMPLEMASK_SHIFT, mask);
2750
2751 /* Clear the IO DFT Enable Key */
2752 HW_WR_FIELD32_RAW((base + CSL_LIN_IODFTCTRL), CSL_LIN_IODFTCTRL_IODFTENA_MASK, CSL_LIN_IODFTCTRL_IODFTENA_SHIFT, CSL_FALSE);
2753 }
2754
2770 static inline void
2771 LIN_setDebugSuspendMode(uint32_t base, LIN_DebugMode mode)
2772 {
2773 /* Check the arguments. */
2774 DebugP_assert(LIN_isBaseValid(base));
2775
2776 /* Clear and Set the IO DFT Enable Key */
2777 HW_WR_FIELD32_RAW((base + CSL_LIN_SCIGCR1), CSL_LIN_SCIGCR1_CONT_MASK, CSL_LIN_SCIGCR1_CONT_SHIFT, mode);
2778 }
2779
2794 static inline void
2795 LIN_enableGlobalInterrupt(uint32_t base, LIN_InterruptLine line)
2796 {
2797 /* Check the arguments. */
2798 DebugP_assert(LIN_isBaseValid(base));
2799
2800 HW_WR_REG32_RAW((base + CSL_LIN_LIN_GLB_INT_EN), HW_RD_REG32_RAW(base + CSL_LIN_LIN_GLB_INT_EN)|(CSL_LIN_LIN_GLB_INT_FLG_INT0_FLG_MASK<<(uint16_t)line));
2801 }
2802
2817 static inline void
2818 LIN_disableGlobalInterrupt(uint32_t base, LIN_InterruptLine line)
2819 {
2820 /* Check the arguments. */
2821 DebugP_assert(LIN_isBaseValid(base));
2822
2823 HW_WR_REG32_RAW((base + CSL_LIN_LIN_GLB_INT_EN), HW_RD_REG32_RAW(base + CSL_LIN_LIN_GLB_INT_EN)&(~(CSL_LIN_LIN_GLB_INT_FLG_INT0_FLG_MASK<<(uint16_t)line)));
2824 }
2825
2840 static inline void
2841 LIN_clearGlobalInterruptStatus(uint32_t base, LIN_InterruptLine line)
2842 {
2843 /* Check the arguments. */
2844 DebugP_assert(LIN_isBaseValid(base));
2845
2846 HW_WR_REG32_RAW((base + CSL_LIN_LIN_GLB_INT_CLR), (CSL_LIN_LIN_GLB_INT_FLG_INT0_FLG_MASK<<(uint16_t)line));
2847 }
2848
2865 static inline Bool
2866 LIN_getGlobalInterruptStatus(uint32_t base, LIN_InterruptLine line)
2867 {
2868 /* Check the arguments. */
2869 DebugP_assert(LIN_isBaseValid(base));
2870
2871 return((HW_RD_REG32_RAW(base + CSL_LIN_LIN_GLB_INT_FLG) & (CSL_LIN_LIN_GLB_INT_FLG_INT0_FLG_MASK<<(uint16_t)line))
2872 == (CSL_LIN_LIN_GLB_INT_FLG_INT0_FLG_MASK<<(uint16_t)line));
2873 }
2874
2888 static inline Bool
2889 LIN_getPinStatus(uint32_t base, LIN_PinType pin)
2890 {
2891 /* Check the arguments. */
2892 DebugP_assert(LIN_isBaseValid(base));
2893
2894 return((HW_RD_REG32_RAW(base + CSL_LIN_SCIPIO2) & pin) == pin);
2895 }
2896
2897 #ifdef __cplusplus
2898 }
2899 #endif
2900
2901 #endif /* #ifndef LIN_V0_H_ */
2902
LIN_MSG_FILTER_IDBYTE
@ LIN_MSG_FILTER_IDBYTE
Definition: lin/v0/lin.h:296
LIN_sendData
void LIN_sendData(uint32_t base, uint16_t *data)
This function sends the data.
LIN_MessageFilter
LIN_MessageFilter
The following are defines for the type parameter of the LIN_setMessageFiltering() function.
Definition: lin/v0/lin.h:295
LIN_LOOPBACK_DIGITAL
@ LIN_LOOPBACK_DIGITAL
Digital Loopback Mode.
Definition: lin/v0/lin.h:245
LIN_disableParity
static void LIN_disableParity(uint32_t base)
Disable Parity mode.
Definition: lin/v0/lin.h:529
LIN_enableInterrupt
static void LIN_enableInterrupt(uint32_t base, uint32_t intFlags)
Enable interrupts.
Definition: lin/v0/lin.h:966
LIN_disableModule
static void LIN_disableModule(uint32_t base)
Disable the LIN module.
Definition: lin/v0/lin.h:2180
LIN_isSCISpaceAvailable
static Bool LIN_isSCISpaceAvailable(uint32_t base)
Check if Space is available in SCI Transmit Buffer.
Definition: lin/v0/lin.h:1650
LIN_DebugMode
LIN_DebugMode
The following are defines for the mode parameter of the LIN_setDebugSuspendMode() function.
Definition: lin/v0/lin.h:311
LIN_COMM_LIN_USELENGTHVAL
@ LIN_COMM_LIN_USELENGTHVAL
Definition: lin/v0/lin.h:262
LIN_setSyncFields
static void LIN_setSyncFields(uint32_t base, uint16_t syncBreak, uint16_t delimiter)
Set Sync Break Extend and Delimiter.
Definition: lin/v0/lin.h:1318
LIN_enterSCILowPower
static void LIN_enterSCILowPower(uint32_t base)
Enter SCI Local Low-Power Mode.
Definition: lin/v0/lin.h:1536
LIN_disableModuleErrors
static void LIN_disableModuleErrors(uint32_t base, uint32_t errors)
Disable Module Errors for Testing.
Definition: lin/v0/lin.h:1195
LIN_triggerChecksumCompare
static void LIN_triggerChecksumCompare(uint32_t base)
Trigger Checksum Compare.
Definition: lin/v0/lin.h:691
LIN_disableExtLoopback
static void LIN_disableExtLoopback(uint32_t base)
Disable External Loopback mode for self test.
Definition: lin/v0/lin.h:2453
LIN_setMessageFiltering
static void LIN_setMessageFiltering(uint32_t base, LIN_MessageFilter type)
Set Message filtering Type.
Definition: lin/v0/lin.h:493
LIN_disableAutomaticBaudrate
static void LIN_disableAutomaticBaudrate(uint32_t base)
Disable Automatic Baudrate Adjustment.
Definition: lin/v0/lin.h:1242
LIN_isBaseValid
static Bool LIN_isBaseValid(uint32_t base)
Checks a LIN base address.
Definition: lin/v0/lin.h:411
LIN_enableIntLoopback
static void LIN_enableIntLoopback(uint32_t base)
Enable Internal Loopback mode for self test.
Definition: lin/v0/lin.h:2475
LIN_ChecksumType
LIN_ChecksumType
The following are defines for the type parameter of the LIN_setChecksumType() function.
Definition: lin/v0/lin.h:303
LIN_performSoftwareReset
static void LIN_performSoftwareReset(uint32_t base)
Perform software reset.
Definition: lin/v0/lin.h:2311
LIN_SCI_PAR_ODD
@ LIN_SCI_PAR_ODD
Definition: lin/v0/lin.h:330
LIN_LOOPBACK_ANALOG
@ LIN_LOOPBACK_ANALOG
Analog Loopback Mode.
Definition: lin/v0/lin.h:246
LIN_getTxMask
static uint16_t LIN_getTxMask(uint32_t base)
Gets the transmit ID mask.
Definition: lin/v0/lin.h:819
LIN_IO_DFT_KEY
#define LIN_IO_DFT_KEY
LIN IO DFT Key which when written in IODFTENA enables the User and Previledge mode Writes.
Definition: lin/v0/lin.h:74
LIN_MSG_FILTER_IDRESPONDER
@ LIN_MSG_FILTER_IDRESPONDER
Definition: lin/v0/lin.h:297
LIN_enableDataReceiver
static void LIN_enableDataReceiver(uint32_t base)
Enable Receive Data Transfer.
Definition: lin/v0/lin.h:2269
SystemP.h
LIN_setTxMask
static void LIN_setTxMask(uint32_t base, uint16_t mask)
Sets the transmit ID mask.
Definition: lin/v0/lin.h:780
LIN_sendChecksum
static void LIN_sendChecksum(uint32_t base)
Send Checksum Byte.
Definition: lin/v0/lin.h:672
LIN_PinSampleMask
LIN_PinSampleMask
The following are defines for the mask parameter of the LIN_setPinSampleMask() function.
Definition: lin/v0/lin.h:319
LIN_setSCIStopBits
static void LIN_setSCIStopBits(uint32_t base, LIN_SCIStopBits number)
Set the number of stop bits for SCI.
Definition: lin/v0/lin.h:1466
LIN_SCIParityType
LIN_SCIParityType
The following are defines for the parity parameter of the LIN_enableSCIParity() function.
Definition: lin/v0/lin.h:329
LIN_enableModuleErrors
static void LIN_enableModuleErrors(uint32_t base, uint32_t errors)
Enable Module Errors for Testing.
Definition: lin/v0/lin.h:1164
LIN_COMM_SCI_IDLELINE
@ LIN_COMM_SCI_IDLELINE
Definition: lin/v0/lin.h:270
LIN_setIDResponderTask
static void LIN_setIDResponderTask(uint32_t base, uint16_t identifier)
Set ID-ResponderTask.
Definition: lin/v0/lin.h:600
LIN_InterruptLine
LIN_InterruptLine
The following are defines for the line parameter of the LIN_enableGlobalInterrupt(),...
Definition: lin/v0/lin.h:287
LIN_isRxMatch
static Bool LIN_isRxMatch(uint32_t base)
Checks for Rx ID Match Received.
Definition: lin/v0/lin.h:923
LIN_isSCIBreakDetected
static Bool LIN_isSCIBreakDetected(uint32_t base)
Check if SCI Detected a Break Condition.
Definition: lin/v0/lin.h:2132
LIN_setTransmitDelay
static void LIN_setTransmitDelay(uint32_t base, uint16_t delay)
Set Transmit Pin Delay.
Definition: lin/v0/lin.h:2707
LIN_setRxMask
static void LIN_setRxMask(uint32_t base, uint16_t mask)
Sets the receive ID mask.
Definition: lin/v0/lin.h:800
LIN_setInterruptLevel0
static void LIN_setInterruptLevel0(uint32_t base, uint32_t intFlags)
Set interrupt level to 0.
Definition: lin/v0/lin.h:1094
LIN_readSCICharBlocking
static uint16_t LIN_readSCICharBlocking(uint32_t base, Bool emulation)
Reads a SCI character with Blocking.
Definition: lin/v0/lin.h:1714
LIN_SCI_PAR_EVEN
@ LIN_SCI_PAR_EVEN
Definition: lin/v0/lin.h:331
LIN_setSCIInterruptLevel1
static void LIN_setSCIInterruptLevel1(uint32_t base, uint32_t intFlags)
Set interrupt level to 1.
Definition: lin/v0/lin.h:2038
LIN_SCIStopBits
LIN_SCIStopBits
The following are defines for the number parameter of the LIN_setSCIStopBits() function.
Definition: lin/v0/lin.h:337
LIN_DEBUG_FROZEN
@ LIN_DEBUG_FROZEN
Freeze module during debug.
Definition: lin/v0/lin.h:312
LIN_disableSCIMode
static void LIN_disableSCIMode(uint32_t base)
Disable SCI Mode.
Definition: lin/v0/lin.h:1365
LIN_disableMultibufferMode
static void LIN_disableMultibufferMode(uint32_t base)
Disable Multi-buffer Mode.
Definition: lin/v0/lin.h:2684
LIN_enterSleep
static void LIN_enterSleep(uint32_t base)
Entering LIN sleep signal.
Definition: lin/v0/lin.h:653
LIN_LINMode
LIN_LINMode
The following are defines for the mode parameter of the LIN_setLINMode() function.
Definition: lin/v0/lin.h:277
LIN_ID5
#define LIN_ID5
Definition: lin/v0/lin.h:93
SemaphoreP.h
LIN_setSCICharLength
static void LIN_setSCICharLength(uint32_t base, uint16_t numBits)
Set SCI character length.
Definition: lin/v0/lin.h:1579
LIN_disableIntLoopback
static void LIN_disableIntLoopback(uint32_t base)
Disable Internal Loopback mode for self test.
Definition: lin/v0/lin.h:2494
LIN_CommMode
LIN_CommMode
The following are defines for the mode parameter of the LIN_setCommMode() function.
Definition: lin/v0/lin.h:261
LIN_getRxIdentifier
static uint16_t LIN_getRxIdentifier(uint32_t base)
Get last received identifier.
Definition: lin/v0/lin.h:881
LIN_setBaudRatePrescaler
static void LIN_setBaudRatePrescaler(uint32_t base, uint32_t prescaler, uint32_t divider)
Set Baud Rate Prescaler.
Definition: lin/v0/lin.h:2209
LIN_setSCIInterruptLevel0
static void LIN_setSCIInterruptLevel0(uint32_t base, uint32_t intFlags)
Set interrupt level to 0.
Definition: lin/v0/lin.h:2000
LIN_enableExtLoopback
static void LIN_enableExtLoopback(uint32_t base, LIN_LoopbackType loopbackType, LIN_AnalogLoopback path)
Enable External Loopback mode for self test.
Definition: lin/v0/lin.h:2425
LIN_ANALOG_LOOP_RX
@ LIN_ANALOG_LOOP_RX
Analog loopback through receive pin.
Definition: lin/v0/lin.h:255
LIN_INTERRUPT_LINE1
@ LIN_INTERRUPT_LINE1
Definition: lin/v0/lin.h:289
LIN_PINTYPE_TX
@ LIN_PINTYPE_TX
Definition: lin/v0/lin.h:346
LIN_isRxReady
static Bool LIN_isRxReady(uint32_t base)
Gets the receive ID mask.
Definition: lin/v0/lin.h:861
LIN_enableMultibufferMode
static void LIN_enableMultibufferMode(uint32_t base)
Enable Multi-buffer Mode.
Definition: lin/v0/lin.h:2666
LIN_disableGlobalInterrupt
static void LIN_disableGlobalInterrupt(uint32_t base, LIN_InterruptLine line)
Disables a LIN global interrupt.
Definition: lin/v0/lin.h:2818
LIN_disableSCISleepMode
static void LIN_disableSCISleepMode(uint32_t base)
Disable SCI Sleep mode.
Definition: lin/v0/lin.h:1512
LIN_ANALOG_LOOP_NONE
@ LIN_ANALOG_LOOP_NONE
Default path for digital loopback mode.
Definition: lin/v0/lin.h:253
LIN_MODE_LIN_COMMANDER
@ LIN_MODE_LIN_COMMANDER
Definition: lin/v0/lin.h:279
LIN_enableSCIParity
static void LIN_enableSCIParity(uint32_t base, LIN_SCIParityType parity)
Enable SCI Parity mode.
Definition: lin/v0/lin.h:1419
LIN_disableInterrupt
static void LIN_disableInterrupt(uint32_t base, uint32_t intFlags)
Disable interrupts.
Definition: lin/v0/lin.h:1009
LIN_clearSCIInterruptStatus
static void LIN_clearSCIInterruptStatus(uint32_t base, uint32_t intFlags)
Clear SCI interrupt status.
Definition: lin/v0/lin.h:1961
LIN_disableDataTransmitter
static void LIN_disableDataTransmitter(uint32_t base)
Disable Transmit Data Transfer.
Definition: lin/v0/lin.h:2250
LIN_isTxMatch
static Bool LIN_isTxMatch(uint32_t base)
Checks for Tx ID Match Received.
Definition: lin/v0/lin.h:902
LIN_readSCICharNonBlocking
static uint16_t LIN_readSCICharNonBlocking(uint32_t base, Bool emulation)
Reads a SCI character without Blocking.
Definition: lin/v0/lin.h:1682
LIN_MODE_LIN_RESPONDER
@ LIN_MODE_LIN_RESPONDER
Definition: lin/v0/lin.h:278
LIN_stopExtendedFrame
static void LIN_stopExtendedFrame(uint32_t base)
Stops LIN Extended Frame Communication.
Definition: lin/v0/lin.h:1263
LIN_disableSCIParity
static void LIN_disableSCIParity(uint32_t base)
Disable SCI Parity mode.
Definition: lin/v0/lin.h:1442
LIN_getRxMask
static uint16_t LIN_getRxMask(uint32_t base)
Gets the receive ID mask.
Definition: lin/v0/lin.h:840
LIN_getData
void LIN_getData(uint32_t base, uint16_t *const data)
This function reads the received data.
LIN_isSCIReceiverIdle
static Bool LIN_isSCIReceiverIdle(uint32_t base)
Check if SCI Receiver is Idle.
Definition: lin/v0/lin.h:2061
LIN_setSCICommMode
static void LIN_setSCICommMode(uint32_t base, LIN_SCICommMode mode)
Set SCI communication mode.
Definition: lin/v0/lin.h:1395
HwiP.h
LIN_getSCITxFrameType
static Bool LIN_getSCITxFrameType(uint32_t base)
Gets the SCI Transmit Frame Type.
Definition: lin/v0/lin.h:2085
LIN_isTxReady
static Bool LIN_isTxReady(uint32_t base)
Check Tx buffer ready flag.
Definition: lin/v0/lin.h:712
LIN_clearGlobalInterruptStatus
static void LIN_clearGlobalInterruptStatus(uint32_t base, LIN_InterruptLine line)
Clears a LIN global interrupt flag.
Definition: lin/v0/lin.h:2841
LIN_ID2
#define LIN_ID2
Definition: lin/v0/lin.h:90
LIN_generateParityID
static uint16_t LIN_generateParityID(uint16_t identifier)
Generate Parity Identifier.
Definition: lin/v0/lin.h:554
LIN_setSCIFrameLength
static void LIN_setSCIFrameLength(uint32_t base, uint16_t length)
Set SCI Frame Length.
Definition: lin/v0/lin.h:1604
LIN_INTERRUPT_LINE0
@ LIN_INTERRUPT_LINE0
Definition: lin/v0/lin.h:288
LIN_LoopbackType
LIN_LoopbackType
The following are defines for the type parameter of the LIN_enableExtLoopback() function.
Definition: lin/v0/lin.h:244
LIN_enableParity
static void LIN_enableParity(uint32_t base)
Enable Parity mode.
Definition: lin/v0/lin.h:511
LIN_PINMASK_NONE
@ LIN_PINMASK_NONE
Definition: lin/v0/lin.h:320
LIN_getGlobalInterruptStatus
static Bool LIN_getGlobalInterruptStatus(uint32_t base, LIN_InterruptLine line)
Returns a LIN global interrupt flag status.
Definition: lin/v0/lin.h:2866
LIN_ID4
#define LIN_ID4
Definition: lin/v0/lin.h:92
LIN_isTxBufferEmpty
static Bool LIN_isTxBufferEmpty(uint32_t base)
Check if the Transmit Buffer is Empty.
Definition: lin/v0/lin.h:2395
LIN_enableSCIMode
static void LIN_enableSCIMode(uint32_t base)
Enable SCI Mode.
Definition: lin/v0/lin.h:1341
LIN_enterSoftwareReset
static void LIN_enterSoftwareReset(uint32_t base)
Put LIN into its reset state.
Definition: lin/v0/lin.h:2334
LIN_setMaximumBaudRate
static void LIN_setMaximumBaudRate(uint32_t base, uint32_t clockVal, uint32_t baudrate)
Set Maximum Baud Rate Prescaler.
Definition: lin/v0/lin.h:466
LIN_enableGlobalInterrupt
static void LIN_enableGlobalInterrupt(uint32_t base, LIN_InterruptLine line)
Enables a LIN global interrupt.
Definition: lin/v0/lin.h:2795
LIN_setPinSampleMask
static void LIN_setPinSampleMask(uint32_t base, LIN_PinSampleMask mask)
Set Pin Sample Mask.
Definition: lin/v0/lin.h:2740
LIN_getInterruptLine1Offset
static uint16_t LIN_getInterruptLine1Offset(uint32_t base)
Gets the Interrupt Vector Offset for Line 1.
Definition: lin/v0/lin.h:2648
LIN_disableDataReceiver
static void LIN_disableDataReceiver(uint32_t base)
Disable Receive Data Transfer.
Definition: lin/v0/lin.h:2288
LIN_enableSCIInterrupt
static void LIN_enableSCIInterrupt(uint32_t base, uint32_t intFlags)
Enable SCI interrupts.
Definition: lin/v0/lin.h:1884
LIN_CHECKSUM_ENHANCED
@ LIN_CHECKSUM_ENHANCED
Definition: lin/v0/lin.h:305
LIN_COMM_SCI_ADDRBIT
@ LIN_COMM_SCI_ADDRBIT
Definition: lin/v0/lin.h:271
LIN_writeSCICharBlocking
static void LIN_writeSCICharBlocking(uint32_t base, uint16_t data)
Sends a SCI character with blocking.
Definition: lin/v0/lin.h:1770
LIN_WAKEUP_KEY
#define LIN_WAKEUP_KEY
LIN/SCI Wakeup signal is sent by sending an byte with value 0xF0.
Definition: lin/v0/lin.h:78
LIN_ID1
#define LIN_ID1
Definition: lin/v0/lin.h:89
LIN_setLINMode
static void LIN_setLINMode(uint32_t base, LIN_LINMode mode)
Sets the LIN mode.
Definition: lin/v0/lin.h:439
LIN_enableDataTransmitter
static void LIN_enableDataTransmitter(uint32_t base)
Enable Transmit Data Transfer.
Definition: lin/v0/lin.h:2231
LIN_setCommMode
static void LIN_setCommMode(uint32_t base, LIN_CommMode mode)
Set LIN communication mode.
Definition: lin/v0/lin.h:760
LIN_setIDByte
static void LIN_setIDByte(uint32_t base, uint16_t identifier)
Set ID Byte.
Definition: lin/v0/lin.h:580
LIN_isBusBusy
static Bool LIN_isBusBusy(uint32_t base)
Check if Bus is Busy.
Definition: lin/v0/lin.h:2375
LIN_exitSCILowPower
static void LIN_exitSCILowPower(uint32_t base)
Exit SCI Local Low-Power Mode.
Definition: lin/v0/lin.h:1556
LIN_getInterruptStatus
static uint32_t LIN_getInterruptStatus(uint32_t base)
Get Interrupt Flags Status.
Definition: lin/v0/lin.h:2537
LIN_getInterruptLine0Offset
static uint16_t LIN_getInterruptLine0Offset(uint32_t base)
Gets the Interrupt Vector Offset for Line 0.
Definition: lin/v0/lin.h:2603
LIN_SCI_STOP_ONE
@ LIN_SCI_STOP_ONE
Definition: lin/v0/lin.h:338
LIN_COMM_LIN_ID4ID5LENCTL
@ LIN_COMM_LIN_ID4ID5LENCTL
Definition: lin/v0/lin.h:263
LIN_writeSCICharNonBlocking
static void LIN_writeSCICharNonBlocking(uint32_t base, uint16_t data)
Sends a SCI character without Blocking.
Definition: lin/v0/lin.h:1746
LIN_SCICommMode
LIN_SCICommMode
The following are defines for the mode parameter of the LIN_setSCICommMode() function.
Definition: lin/v0/lin.h:269
LIN_exitSoftwareReset
static void LIN_exitSoftwareReset(uint32_t base)
Put LIN into its ready state.
Definition: lin/v0/lin.h:2355
TRUE
#define TRUE
Definition: os_defs.h:29
LIN_getPinStatus
static Bool LIN_getPinStatus(uint32_t base, LIN_PinType pin)
Get the Status of LIN TX/RX Pin status.
Definition: lin/v0/lin.h:2889
LIN_CHECKSUM_CLASSIC
@ LIN_CHECKSUM_CLASSIC
Definition: lin/v0/lin.h:304
LIN_setChecksumType
static void LIN_setChecksumType(uint32_t base, LIN_ChecksumType type)
Set Checksum Type.
Definition: lin/v0/lin.h:1285
LIN_ID3
#define LIN_ID3
Definition: lin/v0/lin.h:91
LIN_SCI_STOP_TWO
@ LIN_SCI_STOP_TWO
Definition: lin/v0/lin.h:339
LIN_ID0
#define LIN_ID0
Definition: lin/v0/lin.h:88
LIN_AnalogLoopback
LIN_AnalogLoopback
The following are defines for the path parameter of the LIN_enableExtLoopback() function.
Definition: lin/v0/lin.h:252
LIN_enableAutomaticBaudrate
static void LIN_enableAutomaticBaudrate(uint32_t base)
Enable Automatic Baudrate Adjustment.
Definition: lin/v0/lin.h:1223
LIN_PINTYPE_RX
@ LIN_PINTYPE_RX
Definition: lin/v0/lin.h:347
LIN_getSCIRxFrameType
static Bool LIN_getSCIRxFrameType(uint32_t base)
Gets the SCI Receiver Frame Type.
Definition: lin/v0/lin.h:2109
DebugP_assert
#define DebugP_assert(expression)
Function to call for assert check.
Definition: DebugP.h:187
LIN_disableSCIModuleErrors
static void LIN_disableSCIModuleErrors(uint32_t base, uint32_t errors)
Disable SCI Module Errors for Testing.
Definition: lin/v0/lin.h:1839
LIN_getInterruptLevel
static uint32_t LIN_getInterruptLevel(uint32_t base)
Get the Interrupt Level.
Definition: lin/v0/lin.h:2558
LIN_isSCIDataAvailable
static Bool LIN_isSCIDataAvailable(uint32_t base)
Check if new SCI data is ready to be read.
Definition: lin/v0/lin.h:1628
LIN_clearInterruptStatus
static void LIN_clearInterruptStatus(uint32_t base, uint32_t intFlags)
Clear interrupt status.
Definition: lin/v0/lin.h:1051
LIN_setDebugSuspendMode
static void LIN_setDebugSuspendMode(uint32_t base, LIN_DebugMode mode)
Set the Debug Suspended Mode.
Definition: lin/v0/lin.h:2771
LIN_sendWakeupSignal
static void LIN_sendWakeupSignal(uint32_t base)
Send LIN wakeup signal.
Definition: lin/v0/lin.h:618
LIN_PINMASK_CENTER_SCLK
@ LIN_PINMASK_CENTER_SCLK
Definition: lin/v0/lin.h:322
LIN_PINMASK_CENTER_2SCLK
@ LIN_PINMASK_CENTER_2SCLK
Definition: lin/v0/lin.h:323
LIN_ANALOG_LOOP_TX
@ LIN_ANALOG_LOOP_TX
Analog loopback through transmit pin.
Definition: lin/v0/lin.h:254
LIN_setInterruptLevel1
static void LIN_setInterruptLevel1(uint32_t base, uint32_t intFlags)
Set interrupt level to 1.
Definition: lin/v0/lin.h:1137
LIN_PINMASK_CENTER
@ LIN_PINMASK_CENTER
Definition: lin/v0/lin.h:321
LIN_enableSCISleepMode
static void LIN_enableSCISleepMode(uint32_t base)
Enable SCI Sleep mode.
Definition: lin/v0/lin.h:1491
LIN_initModule
void LIN_initModule(uint32_t base)
This function initializes the LIN module.
LIN_disableSCIInterrupt
static void LIN_disableSCIInterrupt(uint32_t base, uint32_t intFlags)
Disable SCI interrupts.
Definition: lin/v0/lin.h:1923
LIN_setFrameLength
static void LIN_setFrameLength(uint32_t base, uint16_t length)
Set LIN Frame Length.
Definition: lin/v0/lin.h:735
LIN_DEBUG_COMPLETE
@ LIN_DEBUG_COMPLETE
Complete Tx/Rx before Freezing.
Definition: lin/v0/lin.h:313
LIN_enableModule
static void LIN_enableModule(uint32_t base)
Enables the LIN module.
Definition: lin/v0/lin.h:2155
LIN_enableSCIModuleErrors
static void LIN_enableSCIModuleErrors(uint32_t base, uint32_t errors)
Enable SCI Module Errors for Testing.
Definition: lin/v0/lin.h:1806
LIN_PinType
LIN_PinType
The following are defines for the pin parameter of the LIN_getPinStatus() function.
Definition: lin/v0/lin.h:345