AM261x MCU+ SDK: enet_rm.h Source File

| AM261x MCU+ SDK 26.00.00 |

enet_rm.h
Go to the documentation of this file.
1 /*
2 * Copyright (c) Texas Instruments Incorporated 2020
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 *
8 * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 *
11 * Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the
14 * distribution.
15 *
16 * Neither the name of Texas Instruments Incorporated nor the names of
17 * its contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
46 #ifndef ENET_RM_H_
47 #define ENET_RM_H_
48
49 /* ========================================================================== */
50 /* Include Files */
51 /* ========================================================================== */
52
53 #include <include/core/enet_types.h>
54
55 #ifdef __cplusplus
56 extern "C" {
57 #endif
58
59 /* ========================================================================== */
60 /* Macros */
61 /* ========================================================================== */
62
64 #define ENET_RM_PUBLIC_IOCTL(x) (ENET_IOCTL_TYPE_PUBLIC | \
65 ENET_IOCTL_RM_BASE | \
66 ENET_IOCTL_PER_GENERIC | \
67 ENET_IOCTL_MIN(x))
68
77 #define ENET_RM_TXCHNUM_INVALID (0xABCDABCDU)
78
80 #define ENET_RM_RXFLOWIDX_INVALID (0xABCDABCDU)
81
83 #define ENET_RM_INVALIDCORE (0x5562AEFEU)
84
88 #define ENET_RM_NUM_IOCTL_PERM_ENTRY_MAX (16U)
89
91 #define ENET_RM_NUM_MACADDR_MAX (10U)
92
100 #define ENET_RM_NUM_RXCHAN_MAX (2U)
101
102 /* ========================================================================== */
103 /* Structures and Enums */
104 /* ========================================================================== */
105
109 typedef enum EnetRm_Ioctls_e
110 {
118 ENET_RM_IOCTL_ALLOC_MAC_ADDR = ENET_RM_PUBLIC_IOCTL(0U),
119
127 ENET_RM_IOCTL_FREE_MAC_ADDR = ENET_RM_PUBLIC_IOCTL(1U),
128
136 ENET_RM_IOCTL_ALLOC_RX_FLOW = ENET_RM_PUBLIC_IOCTL(2U),
137
145 ENET_RM_IOCTL_FREE_RX_FLOW = ENET_RM_PUBLIC_IOCTL(3U),
146
154 ENET_RM_IOCTL_ALLOC_TX_CH_PEERID = ENET_RM_PUBLIC_IOCTL(4U),
155
163 ENET_RM_IOCTL_FREE_TX_CH_PEERID = ENET_RM_PUBLIC_IOCTL(5U),
164
172 ENET_RM_IOCTL_ALLOC_HW_PUSH_INST = ENET_RM_PUBLIC_IOCTL(6U),
173
181 ENET_RM_IOCTL_FREE_HW_PUSH_INST = ENET_RM_PUBLIC_IOCTL(7U),
182 } EnetRm_Ioctls;
183
189 typedef enum EnetRm_TxCh_e
190 {
192 ENET_RM_TX_CH_0 = 0U,
193
195 ENET_RM_TX_CH_1,
196
198 ENET_RM_TX_CH_2,
199
201 ENET_RM_TX_CH_3,
202
204 ENET_RM_TX_CH_4,
205
207 ENET_RM_TX_CH_5,
208
210 ENET_RM_TX_CH_6,
211
213 ENET_RM_TX_CH_7,
214
216 ENET_RM_TX_CH_LAST = ENET_RM_TX_CH_7,
217
219 ENET_RM_TX_CH_ANY = 0xFF,
220 } EnetRm_TxCh;
221
228 typedef struct EnetRm_ResourceInfo_s
229 {
231 uint32_t coreId;
232
234 uint32_t numTxCh;
235
237 EnetRm_TxCh txCh[ENET_CFG_RM_TX_CH_MAX];
238
240 uint32_t numRxCh;
241
248 uint32_t numRxFlows;
249
251 uint32_t numMacAddress;
252
254 uint32_t numHwPush;
255 } EnetRm_ResourceInfo;
256
263 typedef struct EnetRm_ResPrms_s
264 {
266 uint32_t numCores;
267
269 EnetRm_ResourceInfo coreResInfo[ENET_CFG_REMOTE_CLIENT_CORES_MAX];
270
272 bool isStaticTxChanAllocated;
273 } EnetRm_ResPrms;
274
281 typedef struct EnetRm_IoctlPermissionEntry_s
282 {
284 uint32_t cmd;
285
288 uint32_t permittedCoreMask;
289 } EnetRm_IoctlPermissionEntry;
290
297 typedef struct EnetRm_IoctlPermissionTable_s
298 {
301 uint32_t defaultPermittedCoreMask;
302
304 uint32_t numEntries;
305
307 EnetRm_IoctlPermissionEntry entry[ENET_RM_NUM_IOCTL_PERM_ENTRY_MAX];
308 } EnetRm_IoctlPermissionTable;
309
315 typedef struct EnetRm_MacAddressPool_s
316 {
318 uint32_t numMacAddress;
319
321 uint8_t macAddress[ENET_RM_NUM_MACADDR_MAX][ENET_MAC_ADDR_LEN];
322 } EnetRm_MacAddressPool;
323
327 typedef struct EnetRm_AllocRxFlowInArgs_s
328 {
330 uint32_t coreKey;
331
333 uint32_t chIdx;
334 } EnetRm_AllocRxFlowInArgs;
335
339 typedef struct EnetRm_AllocRxFlow_s
340 {
342 uint32_t startIdx;
343
345 uint32_t flowIdx;
346 } EnetRm_AllocRxFlow;
347
351 typedef struct EnetRm_AllocMacAddrOutArgs_s
352 {
354 uint8_t macAddr[ENET_MAC_ADDR_LEN];
355 } EnetRm_AllocMacAddrOutArgs;
356
360 typedef struct EnetRm_FreeTxChInArgs_s
361 {
363 uint32_t coreKey;
364
366 uint32_t txChNum;
367 } EnetRm_FreeTxChInArgs;
368
372 typedef struct EnetRm_FreeRxFlowInArgs_s
373 {
375 uint32_t coreKey;
376
378 uint32_t chIdx;
379
381 uint32_t flowIdx;
382 } EnetRm_FreeRxFlowInArgs;
383
387 typedef struct EnetRm_FreeMacAddrInArgs_s
388 {
390 uint32_t coreKey;
391
393 uint8_t macAddr[ENET_MAC_ADDR_LEN];
394 } EnetRm_FreeMacAddrInArgs;
395
401 typedef struct EnetRm_ResCfg_s
402 {
404 uint32_t selfCoreId;
405
407 EnetRm_ResPrms resPartInfo;
408
410 EnetRm_IoctlPermissionTable ioctlPermissionInfo;
411
413 EnetRm_MacAddressPool macList;
414 } EnetRm_ResCfg;
415
416
420 typedef struct EnetRm_AllocHwPushOutArgs_s
421 {
423 uint32_t hwPushNum;
424 } EnetRm_AllocHwPushOutArgs;
425
429 typedef struct EnetRm_FreeHwPushInArgs_s
430 {
432 uint32_t coreKey;
433
435 uint32_t hwPushNum;
436 } EnetRm_FreeHwPushInArgs;
437
438 /* ========================================================================== */
439 /* Global Variables Declarations */
440 /* ========================================================================== */
441
442 /* None */
443
444 /* ========================================================================== */
445 /* Function Declarations */
446 /* ========================================================================== */
447
448 /* None */
449
450 /* ========================================================================== */
451 /* Deprecated Function Declarations */
452 /* ========================================================================== */
453
454 /* None */
455
456 /* ========================================================================== */
457 /* Static Function Definitions */
458 /* ========================================================================== */
459
460 /* None */
461
462 #ifdef __cplusplus
463 }
464 #endif
465
466 #endif /* ENET_RM_H_ */
467
ENET_RM_TX_CH_3
@ ENET_RM_TX_CH_3
Definition: enet_rm.h:201
EnetRm_AllocRxFlow::flowIdx
uint32_t flowIdx
Definition: enet_rm.h:345
EnetRm_IoctlPermissionEntry::cmd
uint32_t cmd
Definition: enet_rm.h:284
ENET_CFG_REMOTE_CLIENT_CORES_MAX
#define ENET_CFG_REMOTE_CLIENT_CORES_MAX
Maximum number of remote clients cores.
Definition: enet_soc_cfg.h:106
EnetRm_IoctlPermissionTable::defaultPermittedCoreMask
uint32_t defaultPermittedCoreMask
Definition: enet_rm.h:301
ENET_RM_IOCTL_ALLOC_HW_PUSH_INST
@ ENET_RM_IOCTL_ALLOC_HW_PUSH_INST
Alloc HW Push instance.
Definition: enet_rm.h:172
EnetRm_ResourceInfo::numTxCh
uint32_t numTxCh
Definition: enet_rm.h:234
ENET_RM_TX_CH_4
@ ENET_RM_TX_CH_4
Definition: enet_rm.h:204
EnetRm_ResourceInfo::numHwPush
uint32_t numHwPush
Definition: enet_rm.h:254
EnetRm_FreeRxFlowInArgs::flowIdx
uint32_t flowIdx
Definition: enet_rm.h:381
EnetRm_ResCfg::macList
EnetRm_MacAddressPool macList
Definition: enet_rm.h:413
ENET_RM_TX_CH_2
@ ENET_RM_TX_CH_2
Definition: enet_rm.h:198
ENET_RM_TX_CH_6
@ ENET_RM_TX_CH_6
Definition: enet_rm.h:210
EnetRm_MacAddressPool
Enet RM MAC address pool.
Definition: enet_rm.h:316
EnetRm_ResPrms
Enet RM resource parameters.
Definition: enet_rm.h:264
EnetRm_ResPrms::isStaticTxChanAllocated
bool isStaticTxChanAllocated
Definition: enet_rm.h:272
EnetRm_ResourceInfo::coreId
uint32_t coreId
Definition: enet_rm.h:231
enet_types.h
This file contains the basic types using across the Enet driver.
EnetRm_ResourceInfo::numMacAddress
uint32_t numMacAddress
Definition: enet_rm.h:251
ENET_RM_PUBLIC_IOCTL
#define ENET_RM_PUBLIC_IOCTL(x)
Helper macro to create IOCTL commands for Enet RM module.
Definition: enet_rm.h:64
EnetRm_AllocRxFlow
Output args for ENET_RM_IOCTL_ALLOC_RX_FLOW command.
Definition: enet_rm.h:340
ENET_RM_TX_CH_0
@ ENET_RM_TX_CH_0
Definition: enet_rm.h:192
EnetRm_FreeRxFlowInArgs
Input args for ENET_RM_IOCTL_FREE_RX_FLOW command.
Definition: enet_rm.h:373
ENET_RM_IOCTL_ALLOC_TX_CH_PEERID
@ ENET_RM_IOCTL_ALLOC_TX_CH_PEERID
Alloc TX channel peer id.
Definition: enet_rm.h:154
EnetRm_ResCfg::ioctlPermissionInfo
EnetRm_IoctlPermissionTable ioctlPermissionInfo
Definition: enet_rm.h:410
EnetRm_ResCfg
Resource manager configuration parameters.
Definition: enet_rm.h:402
ENET_RM_TX_CH_7
@ ENET_RM_TX_CH_7
Definition: enet_rm.h:213
EnetRm_AllocRxFlowInArgs::coreKey
uint32_t coreKey
Definition: enet_rm.h:330
EnetRm_FreeTxChInArgs::coreKey
uint32_t coreKey
Definition: enet_rm.h:363
EnetRm_Ioctls
EnetRm_Ioctls
Enet RM IOCTL commands.
Definition: enet_rm.h:110
EnetRm_FreeTxChInArgs::txChNum
uint32_t txChNum
Definition: enet_rm.h:366
EnetRm_FreeRxFlowInArgs::coreKey
uint32_t coreKey
Definition: enet_rm.h:375
EnetRm_FreeHwPushInArgs::hwPushNum
uint32_t hwPushNum
Definition: enet_rm.h:435
EnetRm_IoctlPermissionTable::numEntries
uint32_t numEntries
Definition: enet_rm.h:304
ENET_RM_IOCTL_FREE_HW_PUSH_INST
@ ENET_RM_IOCTL_FREE_HW_PUSH_INST
Free HW Push instance.
Definition: enet_rm.h:181
EnetRm_AllocRxFlow::startIdx
uint32_t startIdx
Definition: enet_rm.h:342
EnetRm_ResCfg::resPartInfo
EnetRm_ResPrms resPartInfo
Definition: enet_rm.h:407
EnetRm_AllocHwPushOutArgs
Output args for ENET_RM_IOCTL_ALLOC_HW_PUSH_INST command.
Definition: enet_rm.h:421
ENET_RM_IOCTL_ALLOC_RX_FLOW
@ ENET_RM_IOCTL_ALLOC_RX_FLOW
Alloc RX flow.
Definition: enet_rm.h:136
EnetRm_TxCh
EnetRm_TxCh
RM tx channel.
Definition: enet_rm.h:190
EnetRm_FreeHwPushInArgs
Input args for ENET_RM_IOCTL_FREE_HW_PUSH_INST command.
Definition: enet_rm.h:430
EnetRm_IoctlPermissionEntry
Enet RM IOCTL permission entry.
Definition: enet_rm.h:282
EnetRm_FreeMacAddrInArgs
Input args for ENET_RM_IOCTL_FREE_MAC_ADDR command.
Definition: enet_rm.h:388
ENET_RM_NUM_MACADDR_MAX
#define ENET_RM_NUM_MACADDR_MAX
Maximum number of macaddress to be managed by RM.
Definition: enet_rm.h:91
ENET_RM_TX_CH_LAST
@ ENET_RM_TX_CH_LAST
Definition: enet_rm.h:216
ENET_RM_IOCTL_FREE_RX_FLOW
@ ENET_RM_IOCTL_FREE_RX_FLOW
Free RX flow.
Definition: enet_rm.h:145
EnetRm_FreeRxFlowInArgs::chIdx
uint32_t chIdx
Definition: enet_rm.h:378
EnetRm_ResCfg::selfCoreId
uint32_t selfCoreId
Definition: enet_rm.h:404
EnetRm_IoctlPermissionEntry::permittedCoreMask
uint32_t permittedCoreMask
Definition: enet_rm.h:288
ENET_CFG_RM_TX_CH_MAX
#define ENET_CFG_RM_TX_CH_MAX
Maximum number of TX channels allocated for Resource Manager.
Definition: enet_soc_cfg.h:125
ENET_RM_IOCTL_ALLOC_MAC_ADDR
@ ENET_RM_IOCTL_ALLOC_MAC_ADDR
Alloc MAC address.
Definition: enet_rm.h:118
EnetRm_AllocRxFlowInArgs::chIdx
uint32_t chIdx
Definition: enet_rm.h:333
EnetRm_AllocRxFlowInArgs
Input args for ENET_RM_IOCTL_ALLOC_RX_FLOW command.
Definition: enet_rm.h:328
EnetRm_AllocMacAddrOutArgs
Input args for ENET_RM_IOCTL_ALLOC_MAC_ADDR command.
Definition: enet_rm.h:352
EnetRm_ResourceInfo
Enet RM resource information.
Definition: enet_rm.h:229
EnetRm_ResourceInfo::numRxFlows
uint32_t numRxFlows
Definition: enet_rm.h:248
EnetRm_MacAddressPool::numMacAddress
uint32_t numMacAddress
Definition: enet_rm.h:318
EnetRm_ResPrms::numCores
uint32_t numCores
Definition: enet_rm.h:266
ENET_RM_IOCTL_FREE_TX_CH_PEERID
@ ENET_RM_IOCTL_FREE_TX_CH_PEERID
Free TX channel peer id.
Definition: enet_rm.h:163
EnetRm_AllocHwPushOutArgs::hwPushNum
uint32_t hwPushNum
Definition: enet_rm.h:423
EnetRm_FreeHwPushInArgs::coreKey
uint32_t coreKey
Definition: enet_rm.h:432
ENET_RM_TX_CH_ANY
@ ENET_RM_TX_CH_ANY
Definition: enet_rm.h:219
EnetRm_FreeTxChInArgs
Input args for ENET_RM_IOCTL_FREE_TX_CH_PEERID command.
Definition: enet_rm.h:361
ENET_MAC_ADDR_LEN
#define ENET_MAC_ADDR_LEN
MAC address length in bytes/octets.
Definition: enet_types.h:153
ENET_RM_IOCTL_FREE_MAC_ADDR
@ ENET_RM_IOCTL_FREE_MAC_ADDR
Free MAC address.
Definition: enet_rm.h:127
ENET_RM_NUM_IOCTL_PERM_ENTRY_MAX
#define ENET_RM_NUM_IOCTL_PERM_ENTRY_MAX
Maximum number of entries for IOCTL permission.
Definition: enet_rm.h:88
ENET_RM_TX_CH_1
@ ENET_RM_TX_CH_1
Definition: enet_rm.h:195
EnetRm_ResourceInfo::numRxCh
uint32_t numRxCh
Definition: enet_rm.h:240
ENET_RM_TX_CH_5
@ ENET_RM_TX_CH_5
Definition: enet_rm.h:207
EnetRm_IoctlPermissionTable
Enet RM IOCTL permission table.
Definition: enet_rm.h:298
EnetRm_FreeMacAddrInArgs::coreKey
uint32_t coreKey
Definition: enet_rm.h:390