AM261x MCU+ SDK: gpmc.h Source File

| AM261x MCU+ SDK 26.00.00 |

gpmc.h
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1 /*
2 * Copyright (C) 2024-2025 Texas Instruments Incorporated
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 *
8 * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 *
11 * Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the
14 * distribution.
15 *
16 * Neither the name of Texas Instruments Incorporated nor the names of
17 * its contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
53 #ifndef _GPMC__H_
54 #define _GPMC__H_
55
56
57 /* ========================================================================== */
58 /* Include Files */
59 /* ========================================================================== */
60
61 #include <stdint.h>
62 #include <kernel/dpl/SystemP.h>
63 #include <kernel/dpl/SemaphoreP.h>
64 #include <kernel/dpl/CacheP.h>
65 #include <kernel/dpl/HwiP.h>
66 #include <drivers/hw_include/csl_types.h>
67 #include <drivers/hw_include/cslr_gpmc.h>
68 #include <drivers/gpmc/v0/dma/gpmc_dma.h>
69
70 #ifdef __cplusplus
71 extern "C" {
72 #endif
73
74 /* ========================================================================== */
75 /* Macros & Typedefs */
76 /* ========================================================================== */
84 #define GPMC_CHIP_SELECT_CS0 (0U)
85 #define GPMC_CHIP_SELECT_CS1 (1U)
86 #define GPMC_CHIP_SELECT_CS2 (2U)
87 #define GPMC_CHIP_SELECT_CS3 (3U)
88
98 #define GPMC_FIFOEVENT_STATUS (0U)
99 #define GPMC_TERMINALCOUNT_STATUS (1U)
100 #define GPMC_WAIT0EDGEDETECTION_STATUS (2U)
101 #define GPMC_WAIT1EDGEDETECTION_STATUS (3U)
102
112 #define GPMC_FIFOEVENT_INT (0U)
113 #define GPMC_TERMINALCOUNT_INT (1U)
114 #define GPMC_WAIT0EDGEDETECTION_INT (2U)
115 #define GPMC_WAIT1EDGEDETECTION_INT (3U)
116
126 #define GPMC_PREFETCH_ACCESSMODE_READ (0U)
127 #define GPMC_PREFETCH_ACCESSMODE_WRITE (1U)
128
138 #define GPMC_ECC_ALGORITHM_HAMMINGCODE (0U)
139 #define GPMC_ECC_ALGORITHM_BCH (1U)
140
149 #define GPMC_ECC_BCH_ERRCORRCAP_UPTO_4BITS (0U)
150 #define GPMC_ECC_BCH_ERRCORRCAP_UPTO_8BITS (1U)
151 #define GPMC_ECC_BCH_ERRCORRCAP_UPTO_16BITS (2U)
152
162 #define GPMC_ECCPOINTER_RESULT_1 (1U)
163 #define GPMC_ECCPOINTER_RESULT_2 (2U)
164 #define GPMC_ECCPOINTER_RESULT_3 (3U)
165 #define GPMC_ECCPOINTER_RESULT_4 (4U)
166 #define GPMC_ECCPOINTER_RESULT_5 (5U)
167 #define GPMC_ECCPOINTER_RESULT_6 (6U)
168 #define GPMC_ECCPOINTER_RESULT_7 (7U)
169 #define GPMC_ECCPOINTER_RESULT_8 (8U)
170 #define GPMC_ECCPOINTER_RESULT_9 (9U)
171
179 #define GPMC_ECC_SIZE_0 (0U)
180 #define GPMC_ECC_SIZE_1 (1U)
181
189 #define GPMC_ECC_RESULT_1 (1U)
190 #define GPMC_ECC_RESULT_2 (2U)
191 #define GPMC_ECC_RESULT_3 (3U)
192 #define GPMC_ECC_RESULT_4 (4U)
193 #define GPMC_ECC_RESULT_5 (5U)
194 #define GPMC_ECC_RESULT_6 (6U)
195 #define GPMC_ECC_RESULT_7 (7U)
196 #define GPMC_ECC_RESULT_8 (8U)
197 #define GPMC_ECC_RESULT_9 (9U)
198
206 #define GPMC_BCH_RESULT0 (0U)
207 #define GPMC_BCH_RESULT1 (1U)
208 #define GPMC_BCH_RESULT2 (2U)
209 #define GPMC_BCH_RESULT3 (3U)
210 #define GPMC_BCH_RESULT4 (4U)
211 #define GPMC_BCH_RESULT5 (5U)
212 #define GPMC_BCH_RESULT6 (6U)
213
221 #define GPMC_CS_MASK_ADDR_SIZE_256MB (0x00U)
222 #define GPMC_CS_MASK_ADDR_SIZE_128MB (0x08U)
223 #define GPMC_CS_MASK_ADDR_SIZE_64MB (0x0cU)
224 #define GPMC_CS_MASK_ADDR_SIZE_32MB (0x0eU)
225 #define GPMC_CS_MASK_ADDR_SIZE_16MB (0x0fU)
226
251 #define GPMC_CS_TIMING_CONFIG(CSWrOffTime, CSRdOffTime, CSExtDelayFlag, \
252 CSOnTime) \
253 ((uint32_t) (((CSWrOffTime) << CSL_GPMC_CONFIG2_CSWROFFTIME_SHIFT) \
254 & CSL_GPMC_CONFIG2_CSWROFFTIME_MASK) | \
255 (((CSRdOffTime) << CSL_GPMC_CONFIG2_CSRDOFFTIME_SHIFT) \
256 & CSL_GPMC_CONFIG2_CSRDOFFTIME_MASK) | \
257 (((CSExtDelayFlag) << CSL_GPMC_CONFIG2_CSEXTRADELAY_SHIFT) \
258 & CSL_GPMC_CONFIG2_CSEXTRADELAY_MASK) | \
259 (((CSOnTime) << CSL_GPMC_CONFIG2_CSONTIME_SHIFT) \
260 & CSL_GPMC_CONFIG2_CSONTIME_MASK))
261
262
298 #define GPMC_ADV_TIMING_CONFIG(ADVAADMuxWrOffTime, ADVAADMuxRdOffTime, \
299 ADVWrOffTime, ADVRdOffTime, ADVExtDelayFlag, \
300 ADVAADMuxOnTime, \
301 ADVOnTime) \
302 ((uint32_t) (((ADVAADMuxWrOffTime) << \
303 CSL_GPMC_CONFIG3_ADVAADMUXWROFFTIME_SHIFT) & \
304 CSL_GPMC_CONFIG3_ADVAADMUXWROFFTIME_MASK) | \
305 (((ADVAADMuxRdOffTime) << CSL_GPMC_CONFIG3_ADVAADMUXRDOFFTIME_SHIFT) & \
306 CSL_GPMC_CONFIG3_ADVAADMUXRDOFFTIME_MASK) | \
307 (((ADVWrOffTime) << CSL_GPMC_CONFIG3_ADVWROFFTIME_SHIFT) & \
308 CSL_GPMC_CONFIG3_ADVWROFFTIME_MASK) | \
309 (((ADVRdOffTime) << CSL_GPMC_CONFIG3_ADVRDOFFTIME_SHIFT) & \
310 CSL_GPMC_CONFIG3_ADVRDOFFTIME_MASK) | \
311 (((ADVExtDelayFlag) << CSL_GPMC_CONFIG3_ADVEXTRADELAY_SHIFT) & \
312 CSL_GPMC_CONFIG3_ADVEXTRADELAY_MASK) | \
313 (((ADVAADMuxOnTime) << CSL_GPMC_CONFIG3_ADVAADMUXONTIME_SHIFT) & \
314 CSL_GPMC_CONFIG3_ADVAADMUXONTIME_MASK) | \
315 (((ADVOnTime) << CSL_GPMC_CONFIG3_ADVONTIME_SHIFT) & \
316 CSL_GPMC_CONFIG3_ADVONTIME_MASK))
317
318
362 #define GPMC_WE_OE_TIMING_CONFIG(WEOffTime, WEExtDelayFlag, WEOnTime, \
363 OEAADMuxOffTime, OEOffTime, OEExtDelayFlag, \
364 OEAADMuxOnTime, OEOnTime) \
365 ((uint32_t) (((WEOffTime) << \
366 CSL_GPMC_CONFIG4_WEOFFTIME_SHIFT) & \
367 CSL_GPMC_CONFIG4_WEOFFTIME_MASK) | \
368 (((WEExtDelayFlag) << \
369 CSL_GPMC_CONFIG4_WEEXTRADELAY_SHIFT) & CSL_GPMC_CONFIG4_WEEXTRADELAY_MASK) | \
370 (((WEOnTime) << \
371 CSL_GPMC_CONFIG4_WEONTIME_SHIFT) & CSL_GPMC_CONFIG4_WEONTIME_MASK) | \
372 (((OEAADMuxOffTime) << \
373 CSL_GPMC_CONFIG4_OEAADMUXOFFTIME_SHIFT) & \
374 CSL_GPMC_CONFIG4_OEAADMUXOFFTIME_MASK) | \
375 (((OEOffTime) << \
376 CSL_GPMC_CONFIG4_OEOFFTIME_SHIFT) & CSL_GPMC_CONFIG4_OEOFFTIME_MASK) | \
377 (((OEExtDelayFlag) << \
378 CSL_GPMC_CONFIG4_OEEXTRADELAY_SHIFT) & CSL_GPMC_CONFIG4_OEEXTRADELAY_MASK) | \
379 (((OEAADMuxOnTime) << \
380 CSL_GPMC_CONFIG4_OEAADMUXONTIME_SHIFT) & \
381 CSL_GPMC_CONFIG4_OEAADMUXONTIME_MASK) | \
382 (((OEOnTime) << \
383 CSL_GPMC_CONFIG4_OEONTIME_SHIFT) & CSL_GPMC_CONFIG4_OEONTIME_MASK))
384
385
386
403 #define GPMC_RDACCESS_CYCLETIME_TIMING_CONFIG(rdCycleTime, wrCycleTime, \
404 rdAccessTime, \
405 pageBurstAccessTime) \
406 ((uint32_t) (((rdCycleTime) << \
407 CSL_GPMC_CONFIG5_RDCYCLETIME_SHIFT) & \
408 CSL_GPMC_CONFIG5_RDCYCLETIME_MASK) | \
409 (((wrCycleTime) << \
410 CSL_GPMC_CONFIG5_WRCYCLETIME_SHIFT) & CSL_GPMC_CONFIG5_WRCYCLETIME_MASK) | \
411 (((rdAccessTime) << \
412 CSL_GPMC_CONFIG5_RDACCESSTIME_SHIFT) & CSL_GPMC_CONFIG5_RDACCESSTIME_MASK) | \
413 (((pageBurstAccessTime) << \
414 CSL_GPMC_CONFIG5_PAGEBURSTACCESSTIME_SHIFT) & \
415 CSL_GPMC_CONFIG5_PAGEBURSTACCESSTIME_MASK))
416
417
418
448 #define GPMC_CYCLE2CYCLE_BUSTURNAROUND_TIMING_CONFIG(cycle2CycleDelay, \
449 cycle2CycleDelaySameCSCfg, \
450 cycle2CycleDelayDiffCSCfg, \
451 busTAtime) \
452 ((uint32_t) (((cycle2CycleDelay) << \
453 CSL_GPMC_CONFIG6_CYCLE2CYCLEDELAY_SHIFT) & \
454 CSL_GPMC_CONFIG6_CYCLE2CYCLEDELAY_MASK) | \
455 (((cycle2CycleDelaySameCSCfg) << \
456 CSL_GPMC_CONFIG6_CYCLE2CYCLESAMECSEN_SHIFT) & \
457 CSL_GPMC_CONFIG6_CYCLE2CYCLESAMECSEN_MASK) | \
458 (((cycle2CycleDelayDiffCSCfg) << \
459 CSL_GPMC_CONFIG6_CYCLE2CYCLEDIFFCSEN_SHIFT) & \
460 CSL_GPMC_CONFIG6_CYCLE2CYCLEDIFFCSEN_MASK) | \
461 (((busTAtime) << \
462 CSL_GPMC_CONFIG6_BUSTURNAROUND_SHIFT) & CSL_GPMC_CONFIG6_BUSTURNAROUND_MASK))
463
465 #define GPMC_DMA_COPY_LOWER_LIMIT (512U)
466
467 #define GPMC_CS_BASE_ADDR_SHIFT (24U)
468
469 #define GPMC_ECC_WRAP_MODE1 (1)
470
471 #define GPMC_CMD_INVALID (0xFFFFFFFFU)
472
473 #define GPMC_MEM_TYPE_NAND (0)
474 #define GPMC_MEM_TYPE_PSRAM (1)
475 #define GPMC_MEM_TYPE_NORLIKE (1) //Same as pSRAM
476
477 /* ========================================================================== */
478 /* Structure Declarations */
479 /* ========================================================================== */
485 typedef enum GPMC_v1_nandEccAlgo_s
486 {
487 GPMC_NAND_ECC_ALGO_NONE = 0x00U,
488 GPMC_NAND_ECC_ALGO_HAMMING_1BIT,
489 GPMC_NAND_ECC_ALGO_BCH_4BIT,
490 GPMC_NAND_ECC_ALGO_BCH_8BIT,
491 GPMC_NAND_ECC_ALGO_BCH_16BIT
492
493 } GPMC_nandEccAlgo;
494
500 typedef enum GPMC_OperatingMode_s {
501
502 GPMC_OPERATING_MODE_BLOCKING = 0,
504 GPMC_OPERATING_MODE_CALLBACK,
506 GPMC_OPERATING_MODE_POLLING
509 } GPMC_OperatingMode;
510
516 typedef enum GPMC_TransferMode_s {
517
518 GPMC_TRANSFER_MODE_BLOCKING = 0,
523 GPMC_TRANSFER_MODE_CALLBACK,
528 } GPMC_TransferMode;
529
534 typedef enum GPMC_TransactionType_e {
535 GPMC_TRANSACTION_TYPE_READ = 0,
537 GPMC_TRANSACTION_TYPE_WRITE,
539 GPMC_TRANSACTION_TYPE_READ_CMDREG,
541 GPMC_TRANSACTION_TYPE_WRITE_CMDREG
543 } GPMC_TransactionType;
544
549 typedef enum GPMC_TransactionStatus_s {
550 GPMC_TRANSFER_COMPLETED = 0,
551 GPMC_TRANSFER_STARTED,
552 GPMC_TRANSFER_CANCELED,
553 GPMC_TRANSFER_FAILED,
554 GPMC_TRANSFER_CSN_DEASSERT,
555 GPMC_TRANSFER_TIMEOUT,
556 } GPMC_TransactionStatus;
557
558
563 typedef struct
564 {
565 uint32_t cmdCycle1;
567 uint32_t cmdCycle2;
569 uint32_t rowAddress;
571 uint32_t numRowAddrCycles;
573 uint32_t colAddress;
575 uint32_t numColAddrCycles;
577 uint32_t waitTimeout;
579 uint32_t checkReadypin;
581 } GPMC_nandCmdParams;
582
583
588 typedef struct GPMC_Transaction_s {
589
590 GPMC_TransactionType transType;
592 uint32_t count;
594 void *Buf;
596 void *arg;
598 uint32_t transferTimeout;
600 GPMC_TransactionStatus status;
602 } GPMC_Transaction;
603
604
614 typedef struct GPMC_Params_s
615 {
619 int32_t gpmcDmaChIndex;
621 uint32_t devType;
623 uint32_t devSize;
625 uint32_t chipSel;
627 uint32_t intrEnable;
628
629 uint32_t dmaEnable;
631 GPMC_TransferMode transferMode;
633 uint32_t memDevice;
635 } GPMC_Params;
636
645 typedef struct
646 {
647 uint32_t regionStartAddr;
649 uint32_t regionSize;
652 } GPMC_AddrRegion;
653
658 typedef struct GPMC_Object_s {
659 GPMC_Params params;
661 GPMC_OperatingMode operMode;
663 /*
664 * State variables
665 */
666 uint32_t isOpen;
668 HwiP_Object hwi;
670 SemaphoreP_Object mutex;
672 SemaphoreP_Object transferComplete;
674 GPMC_Transaction *transaction;
676 Gpmc_DmaArgs* gpmcDmaHandle;
678 } GPMC_Object;
679
683 typedef struct GPMC_timingParams_s
684 {
685 uint32_t csOnTime;
686 /* Chip Select assertion time. */
687 uint32_t csRdOffTime;
689 uint32_t csWrOffTime;
691 uint32_t advOnTime;
693 uint32_t advRdOffTime;
695 uint32_t advWrOffTime;
697 uint32_t advAadMuxOnTime;
699 uint32_t advAadMuxRdOffTime;
701 uint32_t advAadMuxWrOffTime;
703 uint32_t weOnTtime;
705 uint32_t weOffTime;
707 uint32_t oeOnTime;
709 uint32_t oeOffTime;
711 uint32_t oeAadMuxOnTime;
713 uint32_t oeAadMuxOffTime;
715 uint32_t pageBurstAccess;
717 uint32_t rdAccessTime;
719 uint32_t wrAcessTime;
721 uint32_t rdCycleTime;
723 uint32_t wrCycleTime;
725 uint32_t wrDataOnMuxBusTime;
727 uint32_t cycle2CycleDelay;
729 uint32_t cycleDelaySameChipSel;
732 uint32_t cycleDelayDiffChipSel;
735 uint32_t busTurnAroundTime;
740 } GPMC_timingParams;
741
745 typedef struct GPMC_HwAttrs_s
746 {
747
748 uint32_t gpmcBaseAddr;
750 uint32_t dataBaseAddr;
752 uint32_t elmBaseAddr;
754 uint32_t inputClkFreq;
756 uint32_t intrNum;
758 uint32_t intrPriority;
760 uint32_t clkDivider;
762 uint32_t addrDataMux;
764 uint32_t timeLatency;
766 uint32_t chipSelBaseAddr;
768 uint32_t chipSelAddrSize;
770 uint32_t waitPinNum;
772 uint32_t waitPinPol;
774 GPMC_timingParams timingParams;
776 GPMC_nandEccAlgo eccAlgo;
778 uint32_t readType;
780 uint32_t writeType;
782 uint32_t csExDelay;
784 uint32_t accessType;
786 uint32_t optimisedAccess;
788 uint32_t cycleOptimisation;
790 const GPMC_AddrRegion *dmaRestrictedRegions;
796 } GPMC_HwAttrs;
797
801 typedef struct GPMC_Config_s {
802
803 const GPMC_HwAttrs * attrs;
805 GPMC_Object *object;
808 } GPMC_Config;
809
810
812 extern GPMC_Config gGpmcConfig[];
814 extern uint32_t gGpmcConfigNum;
815
816 typedef GPMC_Config* GPMC_Handle;
817
818 /* ========================================================================== */
819 /* Function Declarations */
820 /* ========================================================================== */
826 static inline void GPMC_Params_init(GPMC_Params *params);
827
831 void GPMC_init(void);
835 void GPMC_deinit(void);
836
851 GPMC_Handle GPMC_open(uint32_t index, const GPMC_Params *prms);
852
862 void GPMC_close(GPMC_Handle handle);
863
873 uint32_t GPMC_getInputClk(GPMC_Handle handle);
874
887 GPMC_Handle GPMC_getHandle(uint32_t driverInstanceIndex);
888
896 void GPMC_writeNandCommandParamsInit(GPMC_nandCmdParams *cmdParams);
897
908 int32_t GPMC_writeNandCommand(GPMC_Handle handle, GPMC_nandCmdParams *cmdParams);
909
917 void GPMC_transactionInit(GPMC_Transaction *trans);
918
929 int32_t GPMC_nandReadData(GPMC_Handle handle, GPMC_Transaction *trans);
930
940 int32_t GPMC_nandWriteData(GPMC_Handle handle, GPMC_Transaction *trans);
941
951 int32_t GPMC_setDeviceSize(GPMC_Handle handle);
952
962 int32_t GPMC_setDeviceType(GPMC_Handle handle);
963
972 int32_t GPMC_configureTimingParameters(GPMC_Handle handle);
973
986 int32_t GPMC_eccValueSizeSet(GPMC_Handle handle, uint32_t eccSize, uint32_t eccSizeVal);
987
998 int32_t GPMC_eccBchConfigureElm(GPMC_Handle handle, uint8_t numSectors);
999
1010 int32_t GPMC_eccEngineBCHConfig (GPMC_Handle handle, uint32_t eccSteps);
1011
1019 int32_t GPMC_eccEngineEnable(GPMC_Handle handle);
1020
1027 void GPMC_eccResultRegisterClear(GPMC_Handle handle);
1028
1041 int32_t GPMC_eccBchFillSyndromeValue(GPMC_Handle handle, uint32_t sector, uint32_t *bchData);
1042
1054 int32_t GPMC_eccBchStartErrorProcessing(GPMC_Handle handle, uint8_t sector);
1055
1065 int32_t GPMC_eccBchCheckErrorProcessingStatus(GPMC_Handle handle, uint32_t sector);
1066
1080 int32_t GPMC_eccBchSectorGetError(GPMC_Handle handle, uint32_t sector, uint32_t *errCount, uint32_t *errLoc);
1081
1093 int32_t GPMC_eccCalculateBchSyndromePolynomial(GPMC_Handle handle, uint8_t *pEccdata, uint32_t sector);
1094
1106 int32_t GPMC_eccGetBchSyndromePolynomial(GPMC_Handle handle, uint32_t sector, uint32_t *bchData);
1107
1116 int32_t GPMC_configurePrefetchPostWriteEngine(GPMC_Handle handle);
1117
1126 int32_t GPMC_disableFlashWriteProtect(GPMC_Handle handle);
1127
1136 int32_t GPMC_enableFlashWriteProtect(GPMC_Handle handle);
1137
1150 uint8_t *GPMC_norMakeAddr(uint8_t busWidth,uint32_t blkAddr,uint32_t offset);
1151
1162 void GPMC_norMakeCmd(uint8_t busWidth, uint32_t cmd, uint8_t *cmdBuf);
1163
1178 int32_t GPMC_norReadData(GPMC_Handle handle, uint32_t offset,uint8_t *buf, uint32_t len);
1179
1194 int32_t GPMC_norWriteData(GPMC_Handle handle,uint32_t offset,uint8_t *buf, uint32_t len);
1195
1196 /* ========================================================================== */
1197 /* Static Function Definitions */
1198 /* ========================================================================== */
1199 static inline void GPMC_Params_init(GPMC_Params *params)
1200 {
1201 if (params != NULL)
1202 {
1203 params->dmaEnable = FALSE;
1204 params->intrEnable = FALSE;
1205 params->chipSel = 0;
1206 params->devType = CSL_GPMC_CONFIG1_DEVICETYPE_NANDLIKE;
1207 params->devType = CSL_GPMC_CONFIG1_DEVICESIZE_EIGHTBITS;
1208 params->gpmcDmaChIndex = -1;
1209 params->transferMode = GPMC_TRANSFER_MODE_BLOCKING;
1210 }
1211 }
1212
1213 #ifdef __cplusplus
1214 }
1215 #endif
1216
1217 #endif /* _GPMC__H_ */
1218
GPMC_Object
GPMC driver object.
Definition: gpmc.h:658
GPMC_writeNandCommand
int32_t GPMC_writeNandCommand(GPMC_Handle handle, GPMC_nandCmdParams *cmdParams)
Function to write NAND command parameters.
GPMC_HwAttrs::waitPinPol
uint32_t waitPinPol
Definition: gpmc.h:772
GPMC_configureTimingParameters
int32_t GPMC_configureTimingParameters(GPMC_Handle handle)
Function to configure GPMC timing parameters.
GPMC_HwAttrs::waitPinNum
uint32_t waitPinNum
Definition: gpmc.h:770
FALSE
#define FALSE
Definition: os_defs.h:32
GPMC_eccBchConfigureElm
int32_t GPMC_eccBchConfigureElm(GPMC_Handle handle, uint8_t numSectors)
Function to configure ELM module for error correction.
GPMC_configurePrefetchPostWriteEngine
int32_t GPMC_configurePrefetchPostWriteEngine(GPMC_Handle handle)
Function to configure GPMC PREFETCH read and POST write engine.
GPMC_norMakeCmd
void GPMC_norMakeCmd(uint8_t busWidth, uint32_t cmd, uint8_t *cmdBuf)
Function to create correct NOR cmd based on bus width.
GPMC_timingParams::cycleDelaySameChipSel
uint32_t cycleDelaySameChipSel
Definition: gpmc.h:729
GPMC_TRANSACTION_TYPE_WRITE_CMDREG
@ GPMC_TRANSACTION_TYPE_WRITE_CMDREG
Definition: gpmc.h:541
GPMC_Object::isOpen
uint32_t isOpen
Definition: gpmc.h:666
GPMC_HwAttrs::intrPriority
uint32_t intrPriority
Definition: gpmc.h:758
GPMC_HwAttrs::dataBaseAddr
uint32_t dataBaseAddr
Definition: gpmc.h:750
GPMC_TRANSFER_CSN_DEASSERT
@ GPMC_TRANSFER_CSN_DEASSERT
Definition: gpmc.h:554
GPMC_HwAttrs::writeType
uint32_t writeType
Definition: gpmc.h:780
GPMC_init
void GPMC_init(void)
This function initializes the GPMC module.
GPMC_timingParams::csOnTime
uint32_t csOnTime
Definition: gpmc.h:685
GPMC_HwAttrs::intrNum
uint32_t intrNum
Definition: gpmc.h:756
GPMC_timingParams::rdCycleTime
uint32_t rdCycleTime
Definition: gpmc.h:721
GPMC_TRANSACTION_TYPE_READ_CMDREG
@ GPMC_TRANSACTION_TYPE_READ_CMDREG
Definition: gpmc.h:539
GPMC_timingParams::rdAccessTime
uint32_t rdAccessTime
Definition: gpmc.h:717
GPMC_nandWriteData
int32_t GPMC_nandWriteData(GPMC_Handle handle, GPMC_Transaction *trans)
Function to write data to NANDflash using CPU prefetch/post write engine.
GPMC_nandReadData
int32_t GPMC_nandReadData(GPMC_Handle handle, GPMC_Transaction *trans)
Function to read data from NAND flash using DMA or CPU prefetch/post write engine.
GPMC_timingParams::oeOffTime
uint32_t oeOffTime
Definition: gpmc.h:709
GPMC_TRANSFER_FAILED
@ GPMC_TRANSFER_FAILED
Definition: gpmc.h:553
SystemP.h
GPMC_timingParams::busTurnAroundTime
uint32_t busTurnAroundTime
Definition: gpmc.h:735
GPMC_norReadData
int32_t GPMC_norReadData(GPMC_Handle handle, uint32_t offset, uint8_t *buf, uint32_t len)
Function to read data from norlike device.
GPMC_timingParams::advAadMuxOnTime
uint32_t advAadMuxOnTime
Definition: gpmc.h:697
GPMC_Config
GPMC Driver configuration structure.
Definition: gpmc.h:801
GPMC_Config::attrs
const GPMC_HwAttrs * attrs
Definition: gpmc.h:803
GPMC_HwAttrs::optimisedAccess
uint32_t optimisedAccess
Definition: gpmc.h:786
GPMC_HwAttrs::gpmcBaseAddr
uint32_t gpmcBaseAddr
Definition: gpmc.h:748
GPMC_Config::object
GPMC_Object * object
Definition: gpmc.h:805
GPMC_AddrRegion::regionSize
uint32_t regionSize
Definition: gpmc.h:649
GPMC_norMakeAddr
uint8_t * GPMC_norMakeAddr(uint8_t busWidth, uint32_t blkAddr, uint32_t offset)
Function to create correct address based on bus width.
GPMC_HwAttrs::csExDelay
uint32_t csExDelay
Definition: gpmc.h:782
GPMC_Params::transferMode
GPMC_TransferMode transferMode
Definition: gpmc.h:631
GPMC_Transaction
Data structure to set transaction type parameters.
Definition: gpmc.h:588
GPMC_transactionInit
void GPMC_transactionInit(GPMC_Transaction *trans)
Function to initialise GPMC_Transaction structure to default values.
GPMC_HwAttrs
GPMC instance attributes.
Definition: gpmc.h:746
GPMC_HwAttrs::inputClkFreq
uint32_t inputClkFreq
Definition: gpmc.h:754
GPMC_Transaction::Buf
void * Buf
Definition: gpmc.h:594
GPMC_timingParams::cycle2CycleDelay
uint32_t cycle2CycleDelay
Definition: gpmc.h:727
GPMC_setDeviceType
int32_t GPMC_setDeviceType(GPMC_Handle handle)
Function to set device type (NANDLIKE OR NORLIKE) for GPMC instance connected to external device.
GPMC_NAND_ECC_ALGO_HAMMING_1BIT
@ GPMC_NAND_ECC_ALGO_HAMMING_1BIT
Definition: gpmc.h:488
GPMC_Transaction::transferTimeout
uint32_t transferTimeout
Definition: gpmc.h:598
GPMC_eccCalculateBchSyndromePolynomial
int32_t GPMC_eccCalculateBchSyndromePolynomial(GPMC_Handle handle, uint8_t *pEccdata, uint32_t sector)
Function to compute BCH syndrome polynomial for NAND write operation.
GPMC_HwAttrs::timeLatency
uint32_t timeLatency
Definition: gpmc.h:764
GPMC_eccResultRegisterClear
void GPMC_eccResultRegisterClear(GPMC_Handle handle)
Function to clear GPMC ECC result register.
GPMC_HwAttrs::cycleOptimisation
uint32_t cycleOptimisation
Definition: gpmc.h:788
GPMC_OperatingMode
GPMC_OperatingMode
GPMC driver operating modes.
Definition: gpmc.h:500
GPMC_OPERATING_MODE_POLLING
@ GPMC_OPERATING_MODE_POLLING
Definition: gpmc.h:506
GPMC_HwAttrs::chipSelAddrSize
uint32_t chipSelAddrSize
Definition: gpmc.h:768
SemaphoreP.h
GPMC_Params::devType
uint32_t devType
Definition: gpmc.h:621
GPMC_Transaction::transType
GPMC_TransactionType transType
Definition: gpmc.h:590
GPMC_enableFlashWriteProtect
int32_t GPMC_enableFlashWriteProtect(GPMC_Handle handle)
Function to disable WRITE protect line.
GPMC_nandCmdParams::numRowAddrCycles
uint32_t numRowAddrCycles
Definition: gpmc.h:571
GPMC_NAND_ECC_ALGO_BCH_8BIT
@ GPMC_NAND_ECC_ALGO_BCH_8BIT
Definition: gpmc.h:490
GPMC_Object::mutex
SemaphoreP_Object mutex
Definition: gpmc.h:670
GPMC_nandCmdParams::cmdCycle2
uint32_t cmdCycle2
Definition: gpmc.h:567
GPMC_NAND_ECC_ALGO_BCH_16BIT
@ GPMC_NAND_ECC_ALGO_BCH_16BIT
Definition: gpmc.h:491
GPMC_timingParams::wrCycleTime
uint32_t wrCycleTime
Definition: gpmc.h:723
GPMC_TRANSACTION_TYPE_READ
@ GPMC_TRANSACTION_TYPE_READ
Definition: gpmc.h:535
GPMC_Object::hwi
HwiP_Object hwi
Definition: gpmc.h:668
GPMC_OPERATING_MODE_BLOCKING
@ GPMC_OPERATING_MODE_BLOCKING
Definition: gpmc.h:502
GPMC_Handle
GPMC_Config * GPMC_Handle
Definition: gpmc.h:816
GPMC_Params_init
static void GPMC_Params_init(GPMC_Params *params)
Function to initialize the GPMC_Params struct to its defaults.
Definition: gpmc.h:1199
GPMC_setDeviceSize
int32_t GPMC_setDeviceSize(GPMC_Handle handle)
Function to set device width for GPMC instance connected to external device.
GPMC_timingParams::oeOnTime
uint32_t oeOnTime
Definition: gpmc.h:707
GPMC_timingParams::oeAadMuxOffTime
uint32_t oeAadMuxOffTime
Definition: gpmc.h:713
CacheP.h
GPMC_TransferMode
GPMC_TransferMode
GPMC data transfer modes.
Definition: gpmc.h:516
GPMC_eccGetBchSyndromePolynomial
int32_t GPMC_eccGetBchSyndromePolynomial(GPMC_Handle handle, uint32_t sector, uint32_t *bchData)
Function to get BCH syndrome polynomial per sector NAND read operation.
GPMC_close
void GPMC_close(GPMC_Handle handle)
Function to close a GPMC peripheral specified by the GPMC handle.
GPMC_HwAttrs::timingParams
GPMC_timingParams timingParams
Definition: gpmc.h:774
GPMC_timingParams::weOffTime
uint32_t weOffTime
Definition: gpmc.h:705
GPMC_nandCmdParams::waitTimeout
uint32_t waitTimeout
Definition: gpmc.h:577
GPMC_Params::intrEnable
uint32_t intrEnable
Definition: gpmc.h:627
GPMC_Object::params
GPMC_Params params
Definition: gpmc.h:659
GPMC_timingParams::advOnTime
uint32_t advOnTime
Definition: gpmc.h:691
GPMC_nandCmdParams::colAddress
uint32_t colAddress
Definition: gpmc.h:573
GPMC_timingParams::weOnTtime
uint32_t weOnTtime
Definition: gpmc.h:703
GPMC_disableFlashWriteProtect
int32_t GPMC_disableFlashWriteProtect(GPMC_Handle handle)
Function to disable WRITE protect line.
GPMC_TRANSFER_MODE_BLOCKING
@ GPMC_TRANSFER_MODE_BLOCKING
Definition: gpmc.h:518
GPMC_NAND_ECC_ALGO_BCH_4BIT
@ GPMC_NAND_ECC_ALGO_BCH_4BIT
Definition: gpmc.h:489
GPMC_open
GPMC_Handle GPMC_open(uint32_t index, const GPMC_Params *prms)
This function opens a given GPMC peripheral.
GPMC_eccValueSizeSet
int32_t GPMC_eccValueSizeSet(GPMC_Handle handle, uint32_t eccSize, uint32_t eccSizeVal)
Function to set ECC used and unused bytes size in nibbles.
GPMC_timingParams::oeAadMuxOnTime
uint32_t oeAadMuxOnTime
Definition: gpmc.h:711
GPMC_HwAttrs::elmBaseAddr
uint32_t elmBaseAddr
Definition: gpmc.h:752
GPMC_NAND_ECC_ALGO_NONE
@ GPMC_NAND_ECC_ALGO_NONE
Definition: gpmc.h:487
GPMC_timingParams::csWrOffTime
uint32_t csWrOffTime
Definition: gpmc.h:689
GPMC_Object::gpmcDmaHandle
Gpmc_DmaArgs * gpmcDmaHandle
Definition: gpmc.h:676
HwiP.h
GPMC_HwAttrs::eccAlgo
GPMC_nandEccAlgo eccAlgo
Definition: gpmc.h:776
GPMC_timingParams::advAadMuxRdOffTime
uint32_t advAadMuxRdOffTime
Definition: gpmc.h:699
GPMC_TRANSFER_CANCELED
@ GPMC_TRANSFER_CANCELED
Definition: gpmc.h:552
GPMC_AddrRegion::regionStartAddr
uint32_t regionStartAddr
Definition: gpmc.h:647
GPMC_timingParams::cycleDelayDiffChipSel
uint32_t cycleDelayDiffChipSel
Definition: gpmc.h:732
GPMC_timingParams::advWrOffTime
uint32_t advWrOffTime
Definition: gpmc.h:695
GPMC_timingParams
GPMC timing parameters.
Definition: gpmc.h:684
GPMC_TRANSFER_TIMEOUT
@ GPMC_TRANSFER_TIMEOUT
Definition: gpmc.h:555
GPMC_nandCmdParams::numColAddrCycles
uint32_t numColAddrCycles
Definition: gpmc.h:575
GPMC_TRANSFER_STARTED
@ GPMC_TRANSFER_STARTED
Definition: gpmc.h:551
GPMC_Object::transferComplete
SemaphoreP_Object transferComplete
Definition: gpmc.h:672
gGpmcConfigNum
uint32_t gGpmcConfigNum
Externally defined driver configuration array size.
GPMC_eccBchFillSyndromeValue
int32_t GPMC_eccBchFillSyndromeValue(GPMC_Handle handle, uint32_t sector, uint32_t *bchData)
Function to fill BCH syndrome value per sector to ELM module.
GPMC_timingParams::advAadMuxWrOffTime
uint32_t advAadMuxWrOffTime
Definition: gpmc.h:701
GPMC_norWriteData
int32_t GPMC_norWriteData(GPMC_Handle handle, uint32_t offset, uint8_t *buf, uint32_t len)
Function to write data to norlike device.
GPMC_OPERATING_MODE_CALLBACK
@ GPMC_OPERATING_MODE_CALLBACK
Definition: gpmc.h:504
GPMC_eccBchSectorGetError
int32_t GPMC_eccBchSectorGetError(GPMC_Handle handle, uint32_t sector, uint32_t *errCount, uint32_t *errLoc)
Function to get number of errors per sector by ELM module.
GPMC_HwAttrs::dmaRestrictedRegions
const GPMC_AddrRegion * dmaRestrictedRegions
Definition: gpmc.h:790
GPMC_nandCmdParams::cmdCycle1
uint32_t cmdCycle1
Definition: gpmc.h:565
GPMC_timingParams::csRdOffTime
uint32_t csRdOffTime
Definition: gpmc.h:687
GPMC_nandCmdParams::rowAddress
uint32_t rowAddress
Definition: gpmc.h:569
GPMC_eccEngineEnable
int32_t GPMC_eccEngineEnable(GPMC_Handle handle)
Function to enable GPMC ECC engine.
GPMC_Transaction::arg
void * arg
Definition: gpmc.h:596
GPMC_Params
GPMC driver instance parameters.
Definition: gpmc.h:615
GPMC_TRANSFER_MODE_CALLBACK
@ GPMC_TRANSFER_MODE_CALLBACK
Definition: gpmc.h:523
GPMC_HwAttrs::accessType
uint32_t accessType
Definition: gpmc.h:784
GPMC_eccBchCheckErrorProcessingStatus
int32_t GPMC_eccBchCheckErrorProcessingStatus(GPMC_Handle handle, uint32_t sector)
Function to get error processing status for a sector by ELM module.
GPMC_Transaction::count
uint32_t count
Definition: gpmc.h:592
GPMC_HwAttrs::readType
uint32_t readType
Definition: gpmc.h:778
GPMC_getHandle
GPMC_Handle GPMC_getHandle(uint32_t driverInstanceIndex)
This function returns the handle of an open GPMC Instance from the instance index.
GPMC_getInputClk
uint32_t GPMC_getInputClk(GPMC_Handle handle)
This function returns the input clk frequency GPMC was programmed at.
HwiP_Object
Opaque Hwi object used with the Hwi APIs.
Definition: HwiP.h:142
GPMC_HwAttrs::chipSelBaseAddr
uint32_t chipSelBaseAddr
Definition: gpmc.h:766
GPMC_timingParams::wrAcessTime
uint32_t wrAcessTime
Definition: gpmc.h:719
GPMC_TRANSFER_COMPLETED
@ GPMC_TRANSFER_COMPLETED
Definition: gpmc.h:550
GPMC_Object::operMode
GPMC_OperatingMode operMode
Definition: gpmc.h:661
GPMC_nandCmdParams
Data structure to set NAND command parameters.
Definition: gpmc.h:564
GPMC_Params::gpmcDmaChIndex
int32_t gpmcDmaChIndex
Definition: gpmc.h:619
GPMC_HwAttrs::clkDivider
uint32_t clkDivider
Definition: gpmc.h:760
GPMC_Params::chipSel
uint32_t chipSel
Definition: gpmc.h:625
GPMC_timingParams::pageBurstAccess
uint32_t pageBurstAccess
Definition: gpmc.h:715
GPMC_Params::dmaEnable
uint32_t dmaEnable
Definition: gpmc.h:629
GPMC_Transaction::status
GPMC_TransactionStatus status
Definition: gpmc.h:600
GPMC_nandCmdParams::checkReadypin
uint32_t checkReadypin
Definition: gpmc.h:579
GPMC_TransactionType
GPMC_TransactionType
Type of the GPMC transaction for read and write.
Definition: gpmc.h:534
GPMC_nandEccAlgo
GPMC_nandEccAlgo
GPMC ECC engine algoritms.
Definition: gpmc.h:486
GPMC_timingParams::advRdOffTime
uint32_t advRdOffTime
Definition: gpmc.h:693
GPMC_AddrRegion
GPMC Address Region.
Definition: gpmc.h:646
GPMC_Object::transaction
GPMC_Transaction * transaction
Definition: gpmc.h:674
GPMC_writeNandCommandParamsInit
void GPMC_writeNandCommandParamsInit(GPMC_nandCmdParams *cmdParams)
Function to initialise GPMC_nandCmdParams structure to default values.
GPMC_TRANSACTION_TYPE_WRITE
@ GPMC_TRANSACTION_TYPE_WRITE
Definition: gpmc.h:537
GPMC_timingParams::wrDataOnMuxBusTime
uint32_t wrDataOnMuxBusTime
Definition: gpmc.h:725
GPMC_HwAttrs::addrDataMux
uint32_t addrDataMux
Definition: gpmc.h:762
gGpmcConfig
GPMC_Config gGpmcConfig[]
Externally defined driver configuration array.
GPMC_deinit
void GPMC_deinit(void)
This function de-initializes the GPMC module.
GPMC_Params::memDevice
uint32_t memDevice
Definition: gpmc.h:633
GPMC_eccBchStartErrorProcessing
int32_t GPMC_eccBchStartErrorProcessing(GPMC_Handle handle, uint8_t sector)
Function to start error processing for a sector by ELM module.
GPMC_eccEngineBCHConfig
int32_t GPMC_eccEngineBCHConfig(GPMC_Handle handle, uint32_t eccSteps)
Function to configure GPMC ECC engine for BCH algorithm.
GPMC_TransactionStatus
GPMC_TransactionStatus
Transaction status codes that are set by the GPMC driver.
Definition: gpmc.h:549
GPMC_Params::devSize
uint32_t devSize
Definition: gpmc.h:623