AM261x MCU+ SDK: edma.h Source File

| AM261x MCU+ SDK 26.00.00 |

edma/v0/edma.h
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1 /*
2 * Copyright (C) 2022-24 Texas Instruments Incorporated
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 *
8 * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 *
11 * Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the
14 * distribution.
15 *
16 * Neither the name of Texas Instruments Incorporated nor the names of
17 * its contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
61 #ifndef EDMA_V0_H_
62 #define EDMA_V0_H_
63
64 #ifdef __cplusplus
65 extern "C" {
66 #endif
67
68 /* ========================================================================== */
69 /* Include Files */
70 /* ========================================================================== */
71
72 #include <drivers/hw_include/cslr_edma.h>
73 #include <drivers/hw_include/cslr_soc.h>
74 #include <drivers/hw_include/tistdtypes.h>
75 #include <kernel/dpl/SystemP.h>
76 #include <kernel/dpl/HwiP.h>
77
78 /* ========================================================================== */
79 /* Macros */
80 /* ========================================================================== */
85 #define EDMACC_DMAQNUM_CLR(chNum) \
86 (~((uint32_t) 0x7U << (((chNum) % 8U) * 4U)))
87
88 #define EDMACC_DMAQNUM_SET(chNum, queNum) \
89 (((uint32_t) 0x7U & (queNum)) << (((chNum) % 8U) * 4U))
90
91 #define EDMACC_QDMAQNUM_CLR(chNum) \
92 (~((uint32_t) 0x7U << ((chNum) * 4U)))
93
94 #define EDMACC_QDMAQNUM_SET(chNum, queNum) \
95 (((uint32_t) 0x7U & (queNum)) << ((chNum) * 4U))
96
103 #define EDMACC_QCHMAP_PAENTRY_CLR ((uint32_t) (~((uint32_t)EDMA_TPCC_QCHMAPN_PAENTRY_MASK)))
104
105 #define EDMACC_QCHMAP_PAENTRY_SET(paRAMId) \
106 (((EDMA_TPCC_QCHMAPN_PAENTRY_MASK >> EDMA_TPCC_QCHMAPN_PAENTRY_SHIFT) \
107 & (paRAMId)) << EDMA_TPCC_QCHMAPN_PAENTRY_SHIFT) \
108
109 #define EDMACC_QCHMAP_TRWORD_CLR ((uint32_t) (~((uint32_t)EDMA_TPCC_QCHMAPN_TRWORD_MASK)))
110
111 #define EDMACC_QCHMAP_TRWORD_SET(paRAMId) \
112 (((EDMA_TPCC_QCHMAPN_TRWORD_MASK >> EDMA_TPCC_QCHMAPN_TRWORD_SHIFT) & \
113 (paRAMId)) << EDMA_TPCC_QCHMAPN_TRWORD_SHIFT)
114
121 #define EDMA_PARAM_BIDX(val) (val & 0xFFFF)
122
123 #define EDMA_PARAM_BIDX_EXT(val) ((val & 0xFF0000) >> 16)
124
131 #define EDMA_TRIG_MODE_MANUAL ((uint32_t) 0U)
132
133 #define EDMA_TRIG_MODE_QDMA ((uint32_t) 1U)
134
135 #define EDMA_TRIG_MODE_EVENT ((uint32_t) 2U)
136
145 #define EDMA_CHANNEL_TYPE_DMA ((uint32_t) 0U)
146
147 #define EDMA_CHANNEL_TYPE_QDMA ((uint32_t) 1U)
148
157 #define EDMA_XFER_COMPLETE ((uint32_t) 0U)
158
159 #define EDMA_CC_DMA_EVT_MISS ((uint32_t) 1U)
160
161 #define EDMA_CC_QDMA_EVT_MISS ((uint32_t) 2U)
162
171 #define EDMA_TPTC0 ((uint32_t) 0U)
172
173 #define EDMA_TPTC1 ((uint32_t) 1U)
174
183 #define EDMA_TPTC_ERROR_DISABLE ((uint32_t) 0U)
184
185 #define EDMA_TPTC_ERROR_ENABLE ((uint32_t) 1U)
186
197 #define EDMA_SYNC_A ((uint32_t) 0U)
198
199 #define EDMA_SYNC_AB ((uint32_t) 1U)
200
210 #define EDMA_ADDRESSING_MODE_LINEAR ((uint32_t) 0U)
211
212 #define EDMA_ADDRESSING_MODE_FIFO_WRAP ((uint32_t) 1U)
213
223 #define EDMA_FIFO_WIDTH_8BIT ((uint32_t) EDMA_TPCC_OPT_FWID_FIFOWIDTH8BIT)
224
225 #define EDMA_FIFO_WIDTH_16BIT ((uint32_t) EDMA_TPCC_OPT_FWID_FIFOWIDTH16BIT)
226
227 #define EDMA_FIFO_WIDTH_32BIT ((uint32_t) EDMA_TPCC_OPT_FWID_FIFOWIDTH32BIT)
228
229 #define EDMA_FIFO_WIDTH_64BIT ((uint32_t) EDMA_TPCC_OPT_FWID_FIFOWIDTH64BIT)
230
231 #define EDMA_FIFO_WIDTH_128BIT ((uint32_t) EDMA_TPCC_OPT_FWID_FIFOWIDTH128BIT)
232
233 #define EDMA_FIFO_WIDTH_256BIT ((uint32_t) DMA_TPCC_OPT_FWID_FIFOWIDTH256BIT)
234
243 #define EDMACC_CLR_TCCERR ((uint32_t) EDMA_TPCC_CCERRCLR_TCERR_MASK)
244
245 #define EDMACC_CLR_QTHRQ0 ((uint32_t) EDMA_TPCC_CCERRCLR_QTHRXCD0_MASK)
246
247 #define EDMACC_CLR_QTHRQ1 ((uint32_t) EDMA_TPCC_CCERRCLR_QTHRXCD1_MASK)
248
257 #define EDMACC_TCCERR_STAT ((uint32_t) EDMA_TPCC_CCERR_TCERR_MASK)
258
259 #define EDMACC_QTHRQ0_STAT ((uint32_t) EDMA_TPCC_CCERR_QTHRXCD0_MASK)
260
261 #define EDMACC_QTHRQ1_STAT ((uint32_t) EDMA_TPCC_CCERR_QTHRXCD1_MASK)
262
270 #define EDMA_OPT_TCCHEN_MASK ((uint32_t) EDMA_TPCC_OPT_TCCHEN_MASK)
271
272 #define EDMA_OPT_ITCCHEN_MASK ((uint32_t) EDMA_TPCC_OPT_ITCCHEN_MASK)
273
274 #define EDMA_OPT_TCINTEN_MASK ((uint32_t) EDMA_TPCC_OPT_TCINTEN_MASK)
275
276 #define EDMA_OPT_ITCINTEN_MASK ((uint32_t) EDMA_TPCC_OPT_ITCINTEN_MASK)
277
278 #define EDMA_OPT_TCC_MASK ((uint32_t) EDMA_TPCC_OPT_TCC_MASK)
279
280 #define EDMA_OPT_TCC_SHIFT ((uint32_t) EDMA_TPCC_OPT_TCC_SHIFT)
281
282 #define EDMA_OPT_SYNCDIM_MASK ((uint32_t) EDMA_TPCC_OPT_SYNCDIM_MASK)
283
284 #define EDMA_OPT_SYNCDIM_SHIFT ((uint32_t) EDMA_TPCC_OPT_SYNCDIM_SHIFT)
285
286 #define EDMA_OPT_STATIC_MASK ((uint32_t) EDMA_TPCC_OPT_STATIC_MASK)
287
288 #define EDMA_OPT_STATIC_SHIFT ((uint32_t) EDMA_TPCC_OPT_STATIC_SHIFT)
289
290 #define EDMACC_OPT_TCC_CLR ((uint32_t) (~EDMA_TPCC_OPT_TCC_MASK))
291
292 #define EDMACC_OPT_TCC_SET(tcc) \
293 (((EDMA_TPCC_OPT_TCC_MASK >> EDMA_TPCC_OPT_TCC_SHIFT) & (tcc)) << \
294 EDMA_TPCC_OPT_TCC_SHIFT)
295
296 #define EDMA_OPT_SAM_MASK ((uint32_t) EDMA_TPCC_OPT_SAM_MASK)
297
298 #define EDMA_OPT_SAM_SHIFT ((uint32_t) EDMA_TPCC_OPT_SAM_SHIFT)
299
300 #define EDMA_OPT_DAM_MASK ((uint32_t) EDMA_TPCC_OPT_DAM_SHIFT)
301
302 #define EDMA_OPT_DAM_SHIFT ((uint32_t) EDMA_TPCC_OPT_DAM_SHIFT)
303
311 #define EDMACC_PARAM_ENTRY_OPT ((uint32_t) 0x0U)
312
313 #define EDMACC_PARAM_ENTRY_SRC ((uint32_t) 0x1U)
314
315 #define EDMACC_PARAM_ENTRY_ACNT_BCNT ((uint32_t) 0x2U)
316
317 #define EDMACC_PARAM_ENTRY_DST ((uint32_t) 0x3U)
318
319 #define EDMACC_PARAM_ENTRY_SRC_DST_BIDX ((uint32_t) 0x4U)
320
321 #define EDMACC_PARAM_ENTRY_LINK_BCNTRLD ((uint32_t) 0x5U)
322
323 #define EDMACC_PARAM_ENTRY_SRC_DST_CIDX ((uint32_t) 0x6U)
324
325 #define EDMACC_PARAM_ENTRY_CCNT ((uint32_t) 0x7U)
326
327 #define EDMACC_PARAM_FIELD_OFFSET ((uint32_t) 0x4U)
328
329 #define EDMACC_PARAM_ENTRY_FIELDS ((uint32_t) 0x8U)
330
334 #define EDMA_NUM_TCC ((uint32_t) SOC_EDMA_NUM_DMACH)
335
344 #define EDMA_RESOURCE_TYPE_DMA ((uint32_t) 0U)
345
346 #define EDMA_RESOURCE_TYPE_QDMA ((uint32_t) 1U)
347
348 #define EDMA_RESOURCE_TYPE_TCC ((uint32_t) 2U)
349
350 #define EDMA_RESOURCE_TYPE_PARAM ((uint32_t) 3U)
351
352 #define EDMA_RESOURCE_ALLOC_ANY ((uint32_t) 0xFFFFU)
353
356 #define EDMA_SET_ALL_BITS ((uint32_t) 0xFFFFFFFFU)
357
358 #define EDMA_CLR_ALL_BITS ((uint32_t) 0x00000000U)
359
360 #define EDMACC_COMPL_HANDLER_RETRY_COUNT ((uint32_t) 10U)
361
362 #define EDMACC_ERR_HANDLER_RETRY_COUNT ((uint32_t) 10U)
363
365 /* ========================================================================== */
366 /* Structures */
367 /* ========================================================================== */
373 typedef struct {
374 /* \brief OPT field of PaRAM Set */
375 uint32_t opt;
380 uint32_t srcAddr;
381 /* \brief Number of bytes in each Array (ACNT) */
382 uint16_t aCnt;
383 /* \brief Number of Arrays in each Frame (BCNT) */
384 uint16_t bCnt;
390 uint32_t destAddr;
396 int16_t srcBIdx;
402 int16_t destBIdx;
408 uint16_t linkAddr;
413 uint16_t bCntReload;
414 /* \brief Index between consecutive frames of a Source Block (SRCCIDX) */
415 int16_t srcCIdx;
416 /* \brief Index between consecutive frames of a Dest Block (DSTCIDX) */
417 int16_t destCIdx;
418 /* \brief Number of Frames in a block (CCNT) */
419 uint16_t cCnt;
420 /* \brief Stores higher 8 Bits of SRCBIDX */
421 int8_t srcBIdxExt;
422 /* \brief Stores higher 8 Bits of DSTBIDX */
423 int8_t destBIdxExt;
424
425 } __attribute__((packed))
426 EDMACCPaRAMEntry;
427
432 typedef struct
433 {
438 uint32_t dmaCh[SOC_EDMA_NUM_DMACH/32U];
439 /* \brief QDMA channels allocated. Each channel will be defined with 1 bit. */
440 uint32_t qdmaCh;
445 uint32_t tcc[EDMA_NUM_TCC/32U];
450 uint32_t paramSet[SOC_EDMA_NUM_PARAMSETS/32U];
451 } EDMA_ResourceObject;
452
457 typedef struct {
458 /* \brief EDMA region to be used */
459 uint32_t regionId;
460 /* \brief EDMA Event queue to be used for all channels */
461 uint32_t queNum;
462 /* \brief Parameter to reset the PaRAM memory of the owned PaRAMs */
463 uint32_t initParamSet;
464 /* \brief owned resource configuration */
465 EDMA_ResourceObject ownResource;
466 /* \brief Dma channels reserved for Event triggered transfers */
467 uint32_t reservedDmaCh[SOC_EDMA_NUM_DMACH/32U];
468 }EDMA_InitParams;
469
474 typedef struct {
475 uint32_t dmaEventMissStatusLow;
476 /* \brief Each bit denotes Event miss status for DMA channels 0 - 31 */
477 uint32_t dmaEventMissStatusHigh;
478 /* \brief Each bit denotes Event miss status for DMA channels 32 - 63 */
479 uint32_t qdmaEventMissStatus;
480 /* \brief Each bit denotes Event miss status for QDMA Channels 0 to 7 */
481 uint32_t isEventQueueThresholdExceeded;
482 /* \brief Each bit denotes if Threshold is exceeded for Queues */
483 uint32_t isTccLimitExceeded;
484 /* \brief Set to TRUE if TCC limit exceeded for a transfer */
485 }EDMA_CcErrorInfo;
486
491 typedef struct {
492 uint32_t isTransferRequestError;
493 /* \brief Set to TRUE if a TR is detected that violates transfer rules */
494 uint32_t isInvalidAccessError;
495 /* \brief Set to TRUE if an Invalid address write or read access is requested */
496 uint32_t isBusError;
497 /* \brief Set to TRUE if a bus error event occurs. Error information is stored in Error code */
498 uint32_t errorCode;
499 /* \brief Contains error code for the transaction that caused the error */
500 uint32_t transferCompletionCode;
501 /* \brief Contains TCC value for the transaction that caused the error */
502 uint32_t isChainingEnabled;
503 /* \brief Set to TRUE if TCCHEN is High in the transaction that caused the error */
504 uint32_t isTransferInterruptEnabled;
505 /* \brief Set to TRUE if TCINTEN is High in the transaction that caused the error */
506 }EDMA_TcErrorInfo;
507
512 typedef struct {
513 uint32_t errorStatus;
514 /* \brief EDMA Aggregated Error status value */
515 EDMA_CcErrorInfo ccErrorInfo;
516 /* \brief TPCC Error information */
517 EDMA_TcErrorInfo tcErrorInfo[SOC_EDMA_NUM_TPTC];
518 /* \brief TPCC Error information */
519 }EDMA_ErrorInfo;
520
524 typedef struct
525 {
526 uint32_t intrEnable;
528 uint32_t errIntrEnable;
530 } EDMA_Params;
531
535 typedef struct Edma_IntrObject_t *Edma_IntrHandle;
536
540 typedef void (*Edma_EventCallback)(Edma_IntrHandle intrHandle,
541 void *appData);
542
546 typedef void (*Edma_ErrorCallback)(EDMA_ErrorInfo *errorInfo,
547 void *appData);
548
556 typedef struct Edma_IntrObject_t
557 {
558 /* \brief TCC number for which the callback to be reistered. */
559 uint32_t tccNum;
560 /* \brief Application data pointer passed to callback function. */
561 void *appData;
562 /* \brief Callback function pointer. */
563 Edma_EventCallback cbFxn;
568 Edma_IntrHandle nextIntr;
573 Edma_IntrHandle prevIntr;
574 } Edma_IntrObject;
575
577 typedef void *EDMA_Handle;
578
582 typedef struct
583 {
584 /*
585 * User parameters
586 */
587 EDMA_Handle handle;
589 EDMA_Params openPrms;
591 uint32_t isOpen;
593 EDMA_ResourceObject allocResource;
595 void *hwiHandle;
597 HwiP_Object hwiObj;
599 void *errHwiHandle;
601 HwiP_Object errHwiObj;
603 Edma_ErrorCallback errCallback;
605 void* errCallbackArgs;
607 EDMA_ErrorInfo errorInfo;
609 Edma_IntrHandle firstIntr;
610 } EDMA_Object;
611
613 typedef struct
614 {
615 /*
616 * SOC configuration
617 */
618 uint32_t baseAddr;
620 uint32_t tcBaseAddr[SOC_EDMA_NUM_TPTC];
622 EDMA_InitParams initPrms;
624 uint32_t compIntrNumber;
626 uint8_t intrPriority;
628 uint32_t errIntrNumber;
630 uint8_t errIntrPriority;
632 uint32_t intrAggEnableAddr;
634 uint32_t intrAggEnableMask;
636 uint32_t intrAggStatusAddr;
638 uint32_t intrAggClearMask;
640 uint32_t errIntrAggEnableAddr;
642 uint32_t errIntrAggEnableMask;
644 uint32_t errIntrAggStatusAddr;
646 uint32_t errIntrAggRawStatusAddr;
648 uint32_t errIntrAggClearMask;
650 } EDMA_Attrs;
651
655 typedef struct
656 {
657 EDMA_Attrs *attrs;
659 EDMA_Object *object;
661 } EDMA_Config;
662
664 extern EDMA_Config gEdmaConfig[];
666 extern uint32_t gEdmaConfigNum;
668 extern EDMA_InitParams gEdmaInitParams[];
669
670 /* ========================================================================== */
671 /* Function Declarations */
672 /* ========================================================================== */
673
683 void EDMA_initParamsInit(EDMA_InitParams *initParam);
684
691 void EDMA_ccPaRAMEntry_init(EDMACCPaRAMEntry *paramEntry);
692
717 void EDMA_enableChInShadowRegRegion(uint32_t baseAddr,
718 uint32_t regionId,
719 uint32_t chType,
720 uint32_t chNum);
721
746 void EDMA_disableChInShadowRegRegion(uint32_t baseAddr,
747 uint32_t regionId,
748 uint32_t chType,
749 uint32_t chNum);
750
764 void EDMA_channelToParamMap(uint32_t baseAddr,
765 uint32_t channel,
766 uint32_t paramSet);
767
792 void EDMA_mapChToEvtQ(uint32_t baseAddr,
793 uint32_t chType,
794 uint32_t chNum,
795 uint32_t evtQNum);
796
817 void EDMA_unmapChToEvtQ(uint32_t baseAddr,
818 uint32_t chType,
819 uint32_t chNum);
820
843 void EDMA_mapQdmaChToPaRAM(uint32_t baseAddr,
844 uint32_t chNum,
845 const uint32_t *paRAMId);
846
864 uint32_t EDMA_getMappedPaRAM(uint32_t baseAddr,
865 uint32_t chNum,
866 uint32_t chType,
867 uint32_t *paramId);
886 void EDMA_setQdmaTrigWord(uint32_t baseAddr,
887 uint32_t chNum,
888 uint32_t trigWord);
889
901 void EDMA_clrMissEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
902
916 void EDMA_qdmaClrMissEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
917
933 void EDMA_clrCCErr(uint32_t baseAddr, uint32_t flags);
934
948 void EDMA_setEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
949
963 void EDMA_clrEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
964
979 void EDMA_enableDmaEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
980
996 void EDMA_disableDmaEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
997
1012 void EDMA_enableQdmaEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
1013
1028 void EDMA_disableQdmaEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
1029
1042 uint32_t EDMA_getIntrStatusRegion(uint32_t baseAddr, uint32_t regionId);
1043
1059 void EDMA_enableEvtIntrRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
1060
1076 void EDMA_disableEvtIntrRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
1077
1090 void EDMA_clrIntrRegion(uint32_t baseAddr, uint32_t regionId, uint32_t value);
1091
1104 uint32_t EDMA_getEnabledIntrRegion(uint32_t baseAddr, uint32_t regionId);
1105
1118 uint32_t EDMA_getEnabledIntrHighRegion(uint32_t baseAddr, uint32_t regionId);
1119
1133 void EDMA_getPaRAM(uint32_t baseAddr,
1134 uint32_t paRAMId,
1135 EDMACCPaRAMEntry *currPaRAM);
1136
1150 void EDMA_qdmaGetPaRAM(uint32_t baseAddr,
1151 uint32_t paRAMId,
1152 EDMACCPaRAMEntry *currPaRAM);
1153
1173 void EDMA_setPaRAM(uint32_t baseAddr,
1174 uint32_t paRAMId,
1175 const EDMACCPaRAMEntry *newPaRAM);
1176
1197 void EDMA_qdmaSetPaRAM(uint32_t baseAddr,
1198 uint32_t paRAMId,
1199 const EDMACCPaRAMEntry *newPaRAM);
1200
1229 void EDMA_qdmaSetPaRAMEntry(uint32_t baseAddr,
1230 uint32_t paRAMId,
1231 uint32_t paRAMEntry,
1232 uint32_t newPaRAMEntryVal);
1233
1266 uint32_t EDMA_qdmaGetPaRAMEntry(uint32_t baseAddr,
1267 uint32_t paRAMId,
1268 uint32_t paRAMEntry);
1269
1296 void EDMA_dmaSetPaRAMEntry(uint32_t baseAddr,
1297 uint32_t paRAMId,
1298 uint32_t paRAMEntry,
1299 uint32_t newPaRAMEntryVal);
1300
1333 uint32_t EDMA_dmaGetPaRAMEntry(uint32_t baseAddr,
1334 uint32_t paRAMId,
1335 uint32_t paRAMEntry);
1336
1388 uint32_t EDMA_configureChannelRegion(uint32_t baseAddr,
1389 uint32_t regionId,
1390 uint32_t chType,
1391 uint32_t chNum,
1392 uint32_t tccNum,
1393 uint32_t paramId,
1394 uint32_t evtQNum);
1395
1441 uint32_t EDMA_freeChannelRegion(uint32_t baseAddr,
1442 uint32_t regionId,
1443 uint32_t chType,
1444 uint32_t chNum,
1445 uint32_t trigMode,
1446 uint32_t tccNum,
1447 uint32_t evtQNum);
1448
1489 uint32_t EDMA_enableTransferRegion(uint32_t baseAddr,
1490 uint32_t regionId,
1491 uint32_t chNum,
1492 uint32_t trigMode);
1493
1526 uint32_t EDMA_disableTransferRegion(uint32_t baseAddr,
1527 uint32_t regionId,
1528 uint32_t chNum,
1529 uint32_t trigMode);
1530
1552 void EDMA_clearErrorBitsRegion(uint32_t baseAddr,
1553 uint32_t regionId,
1554 uint32_t chNum,
1555 uint32_t evtQNum);
1556
1565 uint32_t EDMA_getCCErrStatus(uint32_t baseAddr);
1566
1576 uint32_t EDMA_getErrIntrStatus(uint32_t baseAddr);
1577
1586 uint32_t EDMA_qdmaGetErrIntrStatus(uint32_t baseAddr);
1587
1595 uint32_t EDMA_peripheralIdGet(uint32_t baseAddr);
1596
1608 uint32_t EDMA_intrStatusHighGetRegion(uint32_t baseAddr, uint32_t regionId);
1609
1623 uint32_t EDMA_readIntrStatusRegion(uint32_t baseAddr, uint32_t regionId, uint32_t tccNum);
1624
1634 uint32_t EDMA_getEventStatus(uint32_t baseAddr);
1635
1636
1646 uint32_t EDMA_getEventStatusHigh(uint32_t baseAddr);
1647
1659 uint32_t EDMA_readEventStatusRegion(uint32_t baseAddr, uint32_t chNum);
1660
1670 uint32_t EDMA_errIntrHighStatusGet(uint32_t baseAddr);
1671
1710 void EDMA_chainChannel(uint32_t baseAddr,
1711 uint32_t paRAMId1,
1712 uint32_t chId2,
1713 uint32_t chainOptions);
1714
1748 void EDMA_linkChannel(uint32_t baseAddr, uint32_t paRAMId1, uint32_t paRAMId2);
1749
1754 void EDMA_init(void);
1755
1760 void EDMA_deinit(void);
1761
1773 uint32_t EDMA_isInitialized(EDMA_Handle handle);
1774
1785 EDMA_Handle EDMA_open(uint32_t index, const EDMA_Params *prms);
1786
1799 EDMA_Handle EDMA_getHandle(uint32_t index);
1800
1810 void EDMA_close(EDMA_Handle handle);
1811
1821 uint32_t EDMA_isInterruptEnabled(EDMA_Handle handle);
1822
1838 int32_t EDMA_registerIntr(EDMA_Handle handle, Edma_IntrObject *intrObj);
1839
1855 int32_t EDMA_unregisterIntr(EDMA_Handle handle, Edma_IntrObject *intrObj);
1856
1869 uint32_t EDMA_getBaseAddr(EDMA_Handle handle);
1870
1884 uint32_t EDMA_getRegionId(EDMA_Handle handle);
1885
1900 int32_t EDMA_allocDmaChannel(EDMA_Handle handle, uint32_t *dmaCh);
1901
1916 int32_t EDMA_allocQdmaChannel(EDMA_Handle handle, uint32_t *qdmaCh);
1917
1932 int32_t EDMA_allocTcc(EDMA_Handle handle, uint32_t *tcc);
1933
1948 int32_t EDMA_allocParam(EDMA_Handle handle, uint32_t *param);
1949
1963 int32_t EDMA_freeDmaChannel(EDMA_Handle handle, uint32_t *dmaCh);
1964
1978 int32_t EDMA_freeQdmaChannel(EDMA_Handle handle, uint32_t *qdmaCh);
1979
1993 int32_t EDMA_freeTcc(EDMA_Handle handle, uint32_t *tcc);
1994
2008 int32_t EDMA_freeParam(EDMA_Handle handle, uint32_t *param);
2009
2023 int32_t EDMA_registerErrorCallback(EDMA_Handle handle, Edma_ErrorCallback errorCallback, void* args);
2024
2036 int32_t EDMA_unregisterErrorCallback(EDMA_Handle handle);
2037
2038 #ifdef __cplusplus
2039 }
2040 #endif
2041
2042 #endif /* #ifndef EDMA_V0_H_ */
2043
EDMA_registerIntr
int32_t EDMA_registerIntr(EDMA_Handle handle, Edma_IntrObject *intrObj)
Function to register callback function for a TCC.
EDMA_Config
EDMA Instance Configuration. Pointer to this object is returned as handle by driver open.
Definition: edma/v0/edma.h:675
EDMA_enableEvtIntrRegion
void EDMA_enableEvtIntrRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum)
Enables the user to enable the transfer completion interrupt generation by the EDMACC for all DMA/QDM...
EDMA_peripheralIdGet
uint32_t EDMA_peripheralIdGet(uint32_t baseAddr)
This API return the revision Id of the peripheral.
EDMA_readIntrStatusRegion
uint32_t EDMA_readIntrStatusRegion(uint32_t baseAddr, uint32_t regionId, uint32_t tccNum)
This function reads interrupt status.
EDMA_disableTransferRegion
uint32_t EDMA_disableTransferRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum, uint32_t trigMode)
Disable DMA transfer on the specified channel.
EDMA_ResourceObject
EDMA resource allocation structure.
Definition: edma/v0/edma.h:452
args
void * args
Definition: hsmclient_msg.h:4
EDMA_errIntrHighStatusGet
uint32_t EDMA_errIntrHighStatusGet(uint32_t baseAddr)
This returns error interrupt status for those events whose event number is greater than 32.
SOC_EDMA_NUM_DMACH
#define SOC_EDMA_NUM_DMACH
Number of DMA Channels.
Definition: cslr_soc_defines.h:87
EDMA_mapChToEvtQ
void EDMA_mapChToEvtQ(uint32_t baseAddr, uint32_t chType, uint32_t chNum, uint32_t evtQNum)
Map channel to Event Queue.
EDMA_setEvtRegion
void EDMA_setEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum)
Enables the user to Set an event. This API helps user to manually set events to initiate DMA transfer...
EDMA_freeTcc
int32_t EDMA_freeTcc(EDMA_Handle handle, uint32_t *tcc)
Function to free the tcc Channel.
EDMA_intrStatusHighGetRegion
uint32_t EDMA_intrStatusHighGetRegion(uint32_t baseAddr, uint32_t regionId)
This function returns interrupt status of those events which are greater than 32.
EDMA_TcErrorInfo
EDMA Error Info structure used storing TPTC Errors.
Definition: edma/v0/edma.h:510
EDMA_disableDmaEvtRegion
void EDMA_disableDmaEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum)
Enables the user to Disable an DMA event.
EDMA_isInitialized
uint32_t EDMA_isInitialized(EDMA_Handle handle)
Function to check if EDMA is enabled or not.
EDMA_getPaRAM
void EDMA_getPaRAM(uint32_t baseAddr, uint32_t paRAMId, EDMACCPaRAMEntry *currPaRAM)
Retrieve existing PaRAM set associated with specified logical channel (DMA/Link).
EDMA_ErrorInfo
EDMA Error Info structure used for Error Handling.
Definition: edma/v0/edma.h:531
EDMA_init
void EDMA_init(void)
This function initializes the EDMA driver object and controller.
Edma_IntrObject
EDMA interrupt configuration object. The object is passed to the EDMA_registerIntr() function....
Definition: edma/v0/edma.h:576
SystemP.h
EDMA_Object
EDMA driver object.
Definition: edma/v0/edma.h:602
EDMA_enableTransferRegion
uint32_t EDMA_enableTransferRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum, uint32_t trigMode)
Start EDMA transfer on the specified channel.
EDMA_unregisterIntr
int32_t EDMA_unregisterIntr(EDMA_Handle handle, Edma_IntrObject *intrObj)
Function to unregister callback function for a TCC.
EDMA_getEnabledIntrHighRegion
uint32_t EDMA_getEnabledIntrHighRegion(uint32_t baseAddr, uint32_t regionId)
This function returns interrupt enable status of events which are more than 32.
EDMA_getMappedPaRAM
uint32_t EDMA_getMappedPaRAM(uint32_t baseAddr, uint32_t chNum, uint32_t chType, uint32_t *paramId)
Returns the PaRAM associated with the DMA/QDMA channel.
EDMA_getRegionId
uint32_t EDMA_getRegionId(EDMA_Handle handle)
Function to get the edma region.
EDMA_enableChInShadowRegRegion
void EDMA_enableChInShadowRegRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chType, uint32_t chNum)
Enable channel to Shadow region mapping.
EDMA_linkChannel
void EDMA_linkChannel(uint32_t baseAddr, uint32_t paRAMId1, uint32_t paRAMId2)
Link two channels.
Edma_ErrorCallback
void(* Edma_ErrorCallback)(EDMA_ErrorInfo *errorInfo, void *appData)
EDMA error interrupt callback function prototype.
Definition: edma/v0/edma.h:565
EDMA_registerErrorCallback
int32_t EDMA_registerErrorCallback(EDMA_Handle handle, Edma_ErrorCallback errorCallback, void *args)
Function to register error callback function.
EDMA_freeDmaChannel
int32_t EDMA_freeDmaChannel(EDMA_Handle handle, uint32_t *dmaCh)
Function to free the Dma Channel.
Edma_EventCallback
void(* Edma_EventCallback)(Edma_IntrHandle intrHandle, void *appData)
EDMA interrupt callback function prototype.
Definition: edma/v0/edma.h:559
EDMA_clrIntrRegion
void EDMA_clrIntrRegion(uint32_t baseAddr, uint32_t regionId, uint32_t value)
Enables the user to Clear an Interrupt.
EDMA_clrEvtRegion
void EDMA_clrEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum)
Enables the user to Clear an event.
EDMA_getBaseAddr
uint32_t EDMA_getBaseAddr(EDMA_Handle handle)
Function to get the edma base address.
EDMA_getCCErrStatus
uint32_t EDMA_getCCErrStatus(uint32_t baseAddr)
This returns EDMA CC error status.
SOC_EDMA_NUM_TPTC
#define SOC_EDMA_NUM_TPTC
Number of Transfer Controllers available.
Definition: cslr_soc_defines.h:101
SOC_EDMA_NUM_PARAMSETS
#define SOC_EDMA_NUM_PARAMSETS
Number of PaRAM Sets available.
Definition: cslr_soc_defines.h:91
EDMA_clearErrorBitsRegion
void EDMA_clearErrorBitsRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum, uint32_t evtQNum)
Clears Event Register and Error Register for a specific DMA channel and brings back EDMA to its initi...
EDMA_allocDmaChannel
int32_t EDMA_allocDmaChannel(EDMA_Handle handle, uint32_t *dmaCh)
Function to allocate the Dma Channel.
EDMA_close
void EDMA_close(EDMA_Handle handle)
Function to close a EDMA peripheral specified by the EDMA handle.
__attribute__
struct lld_sockaddr __attribute__
This is the SecureBoot Stream type which holds the data for a specific bootloader to HSM call....
EDMA_dmaSetPaRAMEntry
void EDMA_dmaSetPaRAMEntry(uint32_t baseAddr, uint32_t paRAMId, uint32_t paRAMEntry, uint32_t newPaRAMEntryVal)
Set a particular PaRAM set entry of the specified PaRAM set.
EDMA_qdmaSetPaRAM
void EDMA_qdmaSetPaRAM(uint32_t baseAddr, uint32_t paRAMId, const EDMACCPaRAMEntry *newPaRAM)
Copy the user specified PaRAM Set onto the PaRAM Set associated with the logical channel (QDMA only).
EDMA_Attrs
EDMA instance attributes - used during init time.
Definition: edma/v0/edma.h:633
EDMA_clrMissEvtRegion
void EDMA_clrMissEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum)
Enables the user to Clear any missed event.
EDMA_CcErrorInfo
EDMA Error Info structure used storing TPCC Errors.
Definition: edma/v0/edma.h:493
flags
uint8_t flags
Definition: hsmclient_msg.h:2
HwiP.h
EDMA_clrCCErr
void EDMA_clrCCErr(uint32_t baseAddr, uint32_t flags)
Enables the user to Clear any Channel controller Errors.
EDMA_enableDmaEvtRegion
void EDMA_enableDmaEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum)
Enables the user to enable an DMA event.
gEdmaConfigNum
uint32_t gEdmaConfigNum
Externally defined driver configuration array size.
EDMA_getIntrStatusRegion
uint32_t EDMA_getIntrStatusRegion(uint32_t baseAddr, uint32_t regionId)
This function returns interrupts status of those events which is less than 32.
EDMA_allocQdmaChannel
int32_t EDMA_allocQdmaChannel(EDMA_Handle handle, uint32_t *qdmaCh)
Function to allocate the Qdma Channel.
EDMA_channelToParamMap
void EDMA_channelToParamMap(uint32_t baseAddr, uint32_t channel, uint32_t paramSet)
This function maps DMA channel to any of the PaRAM sets in the PaRAM memory map.
EDMA_freeChannelRegion
uint32_t EDMA_freeChannelRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chType, uint32_t chNum, uint32_t trigMode, uint32_t tccNum, uint32_t evtQNum)
Free the specified channel (DMA/QDMA/Link) and its associated resources (PaRAM Set,...
EDMA_enableQdmaEvtRegion
void EDMA_enableQdmaEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum)
Enables the user to enable an QDMA event.
EDMA_initParamsInit
void EDMA_initParamsInit(EDMA_InitParams *initParam)
Structure initialization function for EDMA_InitParams.
EDMA_InitParams
EDMA initialization structure used for EDMAInitialize.
Definition: edma/v0/edma.h:476
EDMA_setQdmaTrigWord
void EDMA_setQdmaTrigWord(uint32_t baseAddr, uint32_t chNum, uint32_t trigWord)
Assign a Trigger Word to the specified QDMA channel.
Edma_IntrHandle
struct Edma_IntrObject_t * Edma_IntrHandle
EDMA interrupt handle returned from EDMA_registerIntr() function.
Definition: edma/v0/edma.h:554
EDMA_NUM_TCC
#define EDMA_NUM_TCC
Definition: edma/v0/edma.h:353
EDMA_unmapChToEvtQ
void EDMA_unmapChToEvtQ(uint32_t baseAddr, uint32_t chType, uint32_t chNum)
Remove Mapping of channel to Event Queue.
EDMA_qdmaGetErrIntrStatus
uint32_t EDMA_qdmaGetErrIntrStatus(uint32_t baseAddr)
This returns QDMA error interrupt status.
HwiP_Object
Opaque Hwi object used with the Hwi APIs.
Definition: HwiP.h:142
EDMA_freeParam
int32_t EDMA_freeParam(EDMA_Handle handle, uint32_t *param)
Function to free the Param.
EDMA_open
EDMA_Handle EDMA_open(uint32_t index, const EDMA_Params *prms)
This function opens a given EDMA instance.
EDMA_chainChannel
void EDMA_chainChannel(uint32_t baseAddr, uint32_t paRAMId1, uint32_t chId2, uint32_t chainOptions)
Chain the two specified channels.
EDMA_qdmaGetPaRAM
void EDMA_qdmaGetPaRAM(uint32_t baseAddr, uint32_t paRAMId, EDMACCPaRAMEntry *currPaRAM)
Retrieve existing PaRAM set associated with specified logical channel (QDMA).
EDMA_getErrIntrStatus
uint32_t EDMA_getErrIntrStatus(uint32_t baseAddr)
This returns error interrupt status for those events whose event number is less than 32.
EDMA_Handle
void * EDMA_Handle
A handle that is returned from a EDMA_open() call.
Definition: edma/v0/edma.h:596
EDMA_qdmaClrMissEvtRegion
void EDMA_qdmaClrMissEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum)
Enables the user to Clear any QDMA missed event.
EDMA_configureChannelRegion
uint32_t EDMA_configureChannelRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chType, uint32_t chNum, uint32_t tccNum, uint32_t paramId, uint32_t evtQNum)
Request a DMA/QDMA/Link channel.
EDMA_allocParam
int32_t EDMA_allocParam(EDMA_Handle handle, uint32_t *param)
Function to allocate Param Set.
EDMA_deinit
void EDMA_deinit(void)
This function Deinitializes the EDMA driver object and controller.
EDMA_getHandle
EDMA_Handle EDMA_getHandle(uint32_t index)
This function returns the handle of an open EDMA Instance from the instance index.
EDMA_dmaGetPaRAMEntry
uint32_t EDMA_dmaGetPaRAMEntry(uint32_t baseAddr, uint32_t paRAMId, uint32_t paRAMEntry)
Get a particular PaRAM entry of the specified PaRAM set.
EDMA_freeQdmaChannel
int32_t EDMA_freeQdmaChannel(EDMA_Handle handle, uint32_t *qdmaCh)
Function to free the Qdma Channel.
EDMA_getEnabledIntrRegion
uint32_t EDMA_getEnabledIntrRegion(uint32_t baseAddr, uint32_t regionId)
This function returns interrupt enable status of events which are less than 32.
EDMA_readEventStatusRegion
uint32_t EDMA_readEventStatusRegion(uint32_t baseAddr, uint32_t chNum)
This function reads Event pending status.
EDMA_setPaRAM
void EDMA_setPaRAM(uint32_t baseAddr, uint32_t paRAMId, const EDMACCPaRAMEntry *newPaRAM)
Copy the user specified PaRAM Set onto the PaRAM Set associated with the logical channel (DMA/Link).
EDMA_mapQdmaChToPaRAM
void EDMA_mapQdmaChToPaRAM(uint32_t baseAddr, uint32_t chNum, const uint32_t *paRAMId)
Enables the user to map a QDMA channel to PaRAM set This API Needs to be called before programming th...
EDMA_Params
EDMA open parameters passed to EDMA_open() function.
Definition: edma/v0/edma.h:544
gEdmaConfig
EDMA_Config gEdmaConfig[]
Externally defined driver configuration array.
EDMA_qdmaGetPaRAMEntry
uint32_t EDMA_qdmaGetPaRAMEntry(uint32_t baseAddr, uint32_t paRAMId, uint32_t paRAMEntry)
Get a particular PaRAM entry of the specified PaRAM set.
gEdmaInitParams
EDMA_InitParams gEdmaInitParams[]
Externally defined driver init parameters array.
EDMA_isInterruptEnabled
uint32_t EDMA_isInterruptEnabled(EDMA_Handle handle)
Function to check if EDMA interrupt is enabled.
EDMA_disableQdmaEvtRegion
void EDMA_disableQdmaEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum)
Enables the user to disable an QDMA event.
EDMA_ccPaRAMEntry_init
void EDMA_ccPaRAMEntry_init(EDMACCPaRAMEntry *paramEntry)
Clear a PaRAM Set .
EDMA_getEventStatus
uint32_t EDMA_getEventStatus(uint32_t baseAddr)
This function returns status of those events which are less than 32.
EDMA_qdmaSetPaRAMEntry
void EDMA_qdmaSetPaRAMEntry(uint32_t baseAddr, uint32_t paRAMId, uint32_t paRAMEntry, uint32_t newPaRAMEntryVal)
Set a particular PaRAM set entry of the specified PaRAM set.
EDMA_unregisterErrorCallback
int32_t EDMA_unregisterErrorCallback(EDMA_Handle handle)
Function to unregister error callback.
EDMA_getEventStatusHigh
uint32_t EDMA_getEventStatusHigh(uint32_t baseAddr)
This function returns status of those events which are greater than 32.
EDMA_disableChInShadowRegRegion
void EDMA_disableChInShadowRegRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chType, uint32_t chNum)
Disable channel to Shadow region mapping.
EDMA_disableEvtIntrRegion
void EDMA_disableEvtIntrRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum)
Enables the user to clear CC interrupts.
EDMA_allocTcc
int32_t EDMA_allocTcc(EDMA_Handle handle, uint32_t *tcc)
Function to allocate Tcc.