AM261x MCU+ SDK: enet_osal.h Source File

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enet_osal.h
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1 /*
2 * Copyright (c) Texas Instruments Incorporated 2020
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 *
8 * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 *
11 * Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the
14 * distribution.
15 *
16 * Neither the name of Texas Instruments Incorporated nor the names of
17 * its contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
39 #ifndef ENET_OSAL_H_
40 #define ENET_OSAL_H_
41
42 /* ========================================================================== */
43 /* Include Files */
44 /* ========================================================================== */
45
46 #include <stdint.h>
47 #include <stdbool.h>
48 #include <kernel/dpl/HwiP.h>
49 #include <kernel/dpl/SystemP.h>
50 #include <kernel/dpl/SemaphoreP.h>
51 #include <kernel/dpl/CacheP.h>
52
53 #ifdef __cplusplus
54 extern "C" {
55 #endif
56
57 /* ========================================================================== */
58 /* Macros */
59 /* ========================================================================== */
60
61 /* None */
62
63 /* ========================================================================== */
64 /* Structures and Enums */
65 /* ========================================================================== */
66
70 typedef struct SemaphoreP_enetOsal_s {
71 bool used;
72 SemaphoreP_Object sem;
73 } SemaphoreP_enetOsal;
74
78 typedef struct HwiP_enetOsal_s {
79 bool used;
80 HwiP_Object hwi;
81 } HwiP_enetOsal;
82
89 typedef enum
90 {
91 ENETOSAL_ARM_GIC_TRIG_TYPE_LEVEL = 1,
94 ENETOSAL_ARM_GIC_TRIG_TYPE_EDGE = 2,
97 ENETOSAL_ARM_GIC_TRIG_TYPE_HIGH_LEVEL = 3,
100 ENETOSAL_ARM_GIC_TRIG_TYPE_LOW_LEVEL = 4,
103 ENETOSAL_ARM_GIC_TRIG_TYPE_RISING_EDGE = 5,
106 ENETOSAL_ARM_GIC_TRIG_TYPE_FALLING_EDGE = 6
108 } EnetOSAL_armGicTrigType_t;
109
115 typedef void (*EnetOsal_Isr)(uintptr_t arg);
116
117 /* ========================================================================== */
118 /* Global Variables Declarations */
119 /* ========================================================================== */
120
121 /* None */
122
123 /* ========================================================================== */
124 /* Function Declarations */
125 /* ========================================================================== */
126
132 uintptr_t EnetOsal_disableAllIntr(void);
133
139 void EnetOsal_restoreAllIntr(uintptr_t cookie);
140
152 HwiP_enetOsal * EnetOsal_registerIntr(EnetOsal_Isr isrFxn,
153 uint32_t coreIntrNum,
154 uint32_t intrPriority,
155 uint32_t intrTrigType,
156 void *arg);
157
163 void EnetOsal_unregisterIntr(HwiP_enetOsal * hHwi);
164
170 void EnetOsal_enableIntr(uint32_t coreIntrNum);
171
177 void EnetOsal_disableIntr(uint32_t coreIntrNum);
178
184 SemaphoreP_enetOsal * EnetOsal_createMutex(void);
185
191 void EnetOsal_deleteMutex(SemaphoreP_enetOsal * hMutex);
192
198 void EnetOsal_lockMutex(SemaphoreP_enetOsal * hMutex);
199
205 void EnetOsal_unlockMutex(SemaphoreP_enetOsal * hMutex);
206
215 void EnetOsal_cacheInv(void *addr,
216 int32_t size);
217
226 void EnetOsal_cacheWb(void *addr,
227 int32_t size);
228
237 void EnetOsal_cacheWbInv(void *addr,
238 int32_t size);
239
240 bool EnetOsal_isCacheCoherent(void);
241
250 uint32_t EnetOsal_timerGetDiff(uint32_t startTime);
251
257 uint32_t EnetOsal_timerRead(void);
258
259 /* ========================================================================== */
260 /* Deprecated Function Declarations */
261 /* ========================================================================== */
262
263 /* None */
264
265 #ifdef __cplusplus
266 }
267 #endif
268
269 #endif /* ENET_OSAL_H_ */
EnetOsal_timerGetDiff
uint32_t EnetOsal_timerGetDiff(uint32_t startTime)
Get the time difference with respect to timestamp.
EnetOsal_timerRead
uint32_t EnetOsal_timerRead(void)
Read current timer value.
ENETOSAL_ARM_GIC_TRIG_TYPE_HIGH_LEVEL
@ ENETOSAL_ARM_GIC_TRIG_TYPE_HIGH_LEVEL
Definition: enet_osal.h:97
SemaphoreP_enetOsal
Semaphore structure.
Definition: enet_osal.h:70
SystemP.h
EnetOsal_isCacheCoherent
bool EnetOsal_isCacheCoherent(void)
EnetOsal_unregisterIntr
void EnetOsal_unregisterIntr(HwiP_enetOsal *hHwi)
Unregister an interrupt.
EnetOsal_disableIntr
void EnetOsal_disableIntr(uint32_t coreIntrNum)
Disable interrupt.
SemaphoreP.h
EnetOsal_registerIntr
HwiP_enetOsal * EnetOsal_registerIntr(EnetOsal_Isr isrFxn, uint32_t coreIntrNum, uint32_t intrPriority, uint32_t intrTrigType, void *arg)
Register an ISR for an interrupt.
ENETOSAL_ARM_GIC_TRIG_TYPE_EDGE
@ ENETOSAL_ARM_GIC_TRIG_TYPE_EDGE
Definition: enet_osal.h:94
EnetOsal_cacheWbInv
void EnetOsal_cacheWbInv(void *addr, int32_t size)
Write-back and invalidate cache.
ENETOSAL_ARM_GIC_TRIG_TYPE_FALLING_EDGE
@ ENETOSAL_ARM_GIC_TRIG_TYPE_FALLING_EDGE
Definition: enet_osal.h:106
CacheP.h
HwiP_enetOsal::used
bool used
Definition: enet_osal.h:79
EnetOsal_cacheInv
void EnetOsal_cacheInv(void *addr, int32_t size)
Invalidate cache.
EnetOsal_createMutex
SemaphoreP_enetOsal * EnetOsal_createMutex(void)
Create a mutex.
HwiP.h
EnetOsal_lockMutex
void EnetOsal_lockMutex(SemaphoreP_enetOsal *hMutex)
Lock a mutex.
SemaphoreP_enetOsal::sem
SemaphoreP_Object sem
Definition: enet_osal.h:72
EnetOsal_deleteMutex
void EnetOsal_deleteMutex(SemaphoreP_enetOsal *hMutex)
Delete a mutex.
ENETOSAL_ARM_GIC_TRIG_TYPE_RISING_EDGE
@ ENETOSAL_ARM_GIC_TRIG_TYPE_RISING_EDGE
Definition: enet_osal.h:103
HwiP_Object
Opaque Hwi object used with the Hwi APIs.
Definition: HwiP.h:142
ENETOSAL_ARM_GIC_TRIG_TYPE_LEVEL
@ ENETOSAL_ARM_GIC_TRIG_TYPE_LEVEL
Definition: enet_osal.h:91
EnetOSAL_armGicTrigType_t
EnetOSAL_armGicTrigType_t
Enumerates the types different trigger types. Please refer to Section 4.3.13 Interrupt Configuration ...
Definition: enet_osal.h:90
HwiP_enetOsal::hwi
HwiP_Object hwi
Definition: enet_osal.h:80
HwiP_enetOsal
Hwi structure.
Definition: enet_osal.h:78
EnetOsal_disableAllIntr
uintptr_t EnetOsal_disableAllIntr(void)
Enet OSAL intr disable function prototype.
EnetOsal_enableIntr
void EnetOsal_enableIntr(uint32_t coreIntrNum)
Enable interrupt.
EnetOsal_Isr
void(* EnetOsal_Isr)(uintptr_t arg)
Enet OSAL ISR callback function prototype.
Definition: enet_osal.h:115
EnetOsal_unlockMutex
void EnetOsal_unlockMutex(SemaphoreP_enetOsal *hMutex)
Unlock a mutex.
EnetOsal_restoreAllIntr
void EnetOsal_restoreAllIntr(uintptr_t cookie)
Enet OSAL intr restore function prototype.
SemaphoreP_enetOsal::used
bool used
Definition: enet_osal.h:71
EnetOsal_cacheWb
void EnetOsal_cacheWb(void *addr, int32_t size)
Write-back cache.
ENETOSAL_ARM_GIC_TRIG_TYPE_LOW_LEVEL
@ ENETOSAL_ARM_GIC_TRIG_TYPE_LOW_LEVEL
Definition: enet_osal.h:100