AM261x MCU+ SDK: APIs for MCSPI LLD

| AM261x MCU+ SDK 26.00.00 |

Sub Modules | Files | Data Structures | Functions | Typedefs | Macros
APIs for MCSPI LLD
APIs for SOC Specific Device Drivers

## Introduction

This module contains APIs to program and use the MCSPI LLD module. The APIs can be used by other drivers to get access to MCSPI and also by application to initiate data transfer operation.

## Sub Modules
| APIs for MCSPI DMA mode

## Files
file | mcspi_lld.h
| MCSPI LLD Driver API/interface file.

## Data Structures
struct | MCSPI_Transaction
| Data structure used with MCSPI_transfer() More...
struct | MCSPI_ExtendedParams
| Data structure used with MCSPI_lld_read(), MCSPI_lld_readIntr(), MCSPI_lld_readDma(), MCSPI_lld_write(), MCSPI_lld_writeIntr, MCSPI_lld_writeDma, MCSPI_lld_readWrite(), MCSPI_lld_readWriteIntr(), MCSPI_lld_readWriteDma(). MCSPI ExtendedParams to be used in case, one's don't want to use default parameters, else pass NULL. More...
struct | MCSPI_ChConfig
| MCSPI configuration parameters for the channel. More...
struct | MCSPI_ChObject
| MCSPI channel object. More...
struct | MCSPILLD_InitObject
| MCSPI driver initialization object. More...
struct | MCSPILLD_Object
| MCSPI driver object. More...

## Functions
void | MCSPI_reset (uint32_t baseAddr)
void | MCSPI_clearAllIrqStatus (uint32_t baseAddr)
void | MCSPI_stop (MCSPILLD_Handle hMcspi, MCSPI_ChObject *chObj, uint32_t chNum)
void | MCSPI_setChDataSize (uint32_t baseAddr, MCSPI_ChObject *chObj, uint32_t dataSize, uint32_t csDisable)
static void | MCSPI_intrStatusClear (const MCSPI_ChObject *chObj, uint32_t baseAddr, uint32_t intFlags)
int32_t | MCSPI_lld_init (MCSPILLD_Handle hMcspi)
| This API Initializes the McSPI instance. More...
int32_t | MCSPI_lld_initDma (MCSPILLD_Handle hMcspi)
| This API Initializes the McSPI instance in DMA Mode. More...
int32_t | MCSPI_lld_deInit (MCSPILLD_Handle hMcspi)
| This API De-Initializes the McSPI instance. More...
int32_t | MCSPI_lld_deInitDma (MCSPILLD_Handle hMcspi)
| This API De-Initializes the McSPI instance in DMA mode. More...
int32_t | MCSPI_lld_write (MCSPILLD_Handle hMcspi, void *txBuf, uint32_t count, uint32_t timeout, const MCSPI_ExtendedParams *extendedParams)
| This API writes data to the McSPI instance in Polling mode. More...
int32_t | MCSPI_lld_writeIntr (MCSPILLD_Handle hMcspi, void *txBuf, uint32_t count, uint32_t timeout, const MCSPI_ExtendedParams *extendedParams)
| This API writes data to the McSPI instance in Interrupt mode. More...
int32_t | MCSPI_lld_writeDma (MCSPILLD_Handle hMcspi, void *txBuf, uint32_t count, uint32_t timeout, const MCSPI_ExtendedParams *extendedParams)
| This API writes data to the McSPI instance in DMA mode. More...
int32_t | MCSPI_lld_read (MCSPILLD_Handle hMcspi, void *rxBuf, uint32_t count, uint32_t timeout, const MCSPI_ExtendedParams *extendedParams)
| This API reads data from the McSPI instance in Polling mode. More...
int32_t | MCSPI_lld_readIntr (MCSPILLD_Handle hMcspi, void *rxBuf, uint32_t count, uint32_t timeout, const MCSPI_ExtendedParams *extendedParams)
| This API reads data from the McSPI instance in Interrupt mode. More...
int32_t | MCSPI_lld_readDma (MCSPILLD_Handle hMcspi, void *rxBuf, uint32_t count, uint32_t timeout, const MCSPI_ExtendedParams *extendedParams)
| This API reads data from the McSPI instance in DMA mode. More...
int32_t | MCSPI_lld_readWrite (MCSPILLD_Handle hMcspi, void *txBuf, void *rxBuf, uint32_t count, uint32_t timeout, const MCSPI_ExtendedParams *extendedParams)
| This API reads writes data from the McSPI instance in polling mode. More...
int32_t | MCSPI_lld_readWriteIntr (MCSPILLD_Handle hMcspi, void *txBuf, void *rxBuf, uint32_t count, uint32_t timeout, const MCSPI_ExtendedParams *extendedParams)
| This API reads writes data from the McSPI instance in Interrupt mode. More...
int32_t | MCSPI_lld_readWriteDma (MCSPILLD_Handle hMcspi, void *txBuf, void *rxBuf, uint32_t count, uint32_t timeout, const MCSPI_ExtendedParams *extendedParams)
| This API reads writes data from the McSPI instance in DMA mode. More...
int32_t | MCSPI_lld_readWriteCancel (MCSPILLD_Handle hMcspi)
| This API cancels current McSPI transfer. More...
int32_t | MCSPI_lld_readWriteDmaCancel (MCSPILLD_Handle hMcspi)
| This API cancels current McSPI transfer in DMA mode. More...
int32_t | MCSPI_lld_transfer (MCSPILLD_Handle hMcspi, MCSPI_Transaction *transaction)
| This API transfers data from the McSPI instance in Polling mode. More...
int32_t | MCSPI_lld_transferIntr (MCSPILLD_Handle hMcspi, MCSPI_Transaction *transaction)
| This API reads data from the McSPI instance in Interrupt mode. More...
int32_t | MCSPI_lld_transferDma (MCSPILLD_Handle hMcspi, MCSPI_Transaction *transaction)
| This API reads data from the McSPI instance in DMA mode. More...
void | MCSPI_lld_controllerIsr (void *args)
| This is the McSPI Controller ISR and can be used as IRQ handler in Controller mode. More...
void | MCSPI_lld_peripheralIsr (void *args)
| This is the McSPI Peripheral ISR and can be used as IRQ handler in Peripheral mode. More...
int32_t | MCSPI_lld_getState (MCSPILLD_Handle hMcspi)
| This API returns the driver state. More...
int32_t | MCSPI_lld_transferCancel (MCSPILLD_Handle hMcspi)
| This API cancels current McSPI transfer. More...
int32_t | MCSPI_lld_transferDmaCancel (MCSPILLD_Handle hMcspi)
| This API cancels current McSPI transfer in DMA mode. More...
static void | MCSPI_lld_ChConfig_init (MCSPI_ChConfig *chConfig)
| Function to initialize the MCSPI_ChConfig struct to its defaults. More...
static void | MCSPI_lld_Transaction_init (MCSPI_Transaction *trans)
| Function to initialize the MCSPI_Transaction struct to its defaults. More...
uint32_t | MCSPI_lld_getBaseAddr (MCSPILLD_Handle handle)
| Function to get base address of MCSPI instance of a particular handle. More...
int32_t | MCSPI_lld_reConfigFifo (MCSPILLD_Handle handle, uint32_t chNum, uint32_t numWordsRxTx)
| Function to re-configure Effective FIFO Words. More...
void | MCSPI_initiateLastChunkTransfer (MCSPILLD_Handle hMcspi, MCSPI_ChObject *chObj, const MCSPI_Transaction *transaction)
| This API will initiate the last chuncks when FIFO is enabled. The byte thats are non-multiple of FIFO trigger level. More...
static uint8_t | MCSPI_getBufWidthShift (uint32_t dataSize)
| This API will return the buffer width in bytes based on dataSize. More...
static uint32_t | MCSPI_readChStatusReg (uint32_t baseAddr, uint32_t chNum)
| This API will return the status of the McSPI channel currently in use. More...
static uint32_t | MCSPI_readChCtrlReg (uint32_t baseAddr, uint32_t chNum)
| This API returns Channel control register value. More...
static void | MCSPI_writeChCtrlReg (uint32_t baseAddr, uint32_t chNum, uint32_t regVal)
| This API sets Channel control register value. More...
static uint32_t | MCSPI_readChConf (uint32_t baseAddr, uint32_t chNum)
| This API returns Channel Config register value. More...
static void | MCSPI_writeChConfReg (uint32_t baseAddr, uint32_t chNum, uint32_t regVal)
| This API sets Channel Config register value. More...
static void | MCSPI_writeTxDataReg (uint32_t baseAddr, uint32_t txData, uint32_t chNum)
| This API will put the data on to the McSPI Channel transmit register. More...
static void | MCSPI_enableTxFIFO (uint32_t baseAddr, uint32_t chNum, uint32_t enableFlag)
| This API will enable/disable the Tx FIFOs of McSPI peripheral. More...
static void | MCSPI_enableRxFIFO (uint32_t baseAddr, uint32_t chNum, uint32_t enableFlag)
| This API will enable/disable the Rx FIFOs of McSPI peripheral. More...
static uint32_t | MCSPI_readRxDataReg (uint32_t baseAddr, uint32_t chNum)
| This API will return the data present in the MCSPI_RX register. More...
static void | MCSPI_setDataWidth (uint32_t baseAddr, uint32_t chNum, uint32_t dataWidth)
| This API will set the data width in the channel config register. More...

## Typedefs
typedef uint32_t(* | MCSPI_clockGet) (void)
typedef void(* | MCSPI_transferCallbackFxn) (void *args, uint32_t transferStatus)
| The definition of a transfer completion callback function used by the SPI driver when used in MCSPI_TRANSFER_MODE_CALLBACK. More...
typedef void(* | MCSPI_errorCallbackFxn) (void *args, uint32_t transferStatus)
| The definition of a error callback function used by the SPI driver when used in MCSPI_TRANSFER_MODE_CALLBACK. More...
typedef struct MCSPILLD_InitObject * | MCSPILLD_InitHandle
typedef struct MCSPILLD_Object * | MCSPILLD_Handle

## Macros
#define | MCSPI_MAX_NUM_CHANNELS (4U)
| Max number of channels/Chip Select (CS) supported. More...
#define | MCSPI_ERROR_TX_UNDERFLOW (0x00000001U)
| McSPI error macro's. More...
#define | MCSPI_ERROR_RX_OVERFLOW (0x00000002U)
#define | MCSPI_MAX_CLK_DIVIDER_SUPPORTED (4096U)
#define | MCSPI_FIFO_LENGTH (64U)
| Total length of FIFO for both TX/RX. More...
#define | MCSPI_RX_FIFO_ENABLE
| McSPI peripheral Rx FIFO is enabled. More...
#define | MCSPI_RX_FIFO_DISABLE
| McSPI peripheral Rx FIFO is disabled. More...
#define | MCSPI_TX_FIFO_ENABLE
| McSPI peripheral Tx FIFO is enabled. More...
#define | MCSPI_TX_FIFO_DISABLE
| McSPI peripheral Tx FIFO is disabled. More...
#define | MCSPI_REG_OFFSET (0x14U)
| McSPI Register Offset for MCSPI_CHxCONF, MCSPI_CHxSTAT, MCSPI_CHxCTRL, MCSPI_TXx and MCSPI_RXx register set. More...
#define | MCSPI_CHCONF(x)
| Base address of McSPI_CHCONF(x) More...
#define | MCSPI_CHSTAT(x)
| Base address of McSPI_CHSTAT(x) More...
#define | MCSPI_CHCTRL(x)
| Base address of McSPI_CHCTRL(x) More...
#define | MCSPI_CHTX(x)
| Base address of McSPI_CHTX(x) More...
#define | MCSPI_CHRX(x)
| Base address of McSPI_CHRX(x) More...
#define | MCSPI_CLKD_MASK (0x0FU)
#define | MCSPI_IRQSTATUS_CLEAR_ALL
| Bit mask to clear all status bits. More...

## Return status
#define | MCSPI_STATUS_SUCCESS ((int32_t)0)
| Return status when the API execution was successful. More...
#define | MCSPI_STATUS_FAILURE ((int32_t)-1)
| Return status when the API execution was not successful due to a failure. More...
#define | MCSPI_TIMEOUT ((int32_t)-2)
| Return status when the API execution was not successful due to a time out. More...
#define | MCSPI_INVALID_PARAM ((int32_t)-3)
| Return status when the API execution failed due invalid parameters. More...
#define | MCSPI_STATUS_BUSY ((int32_t)-4)
| Return status when the API execution failed due to driver busy. More...
#define | MCSPI_INVALID_STATE ((int32_t)-5)
| Return status when the API execution failed due to invalid state. More...

## Timeout values
#define | MCSPI_NO_WAIT ((uint32_t)0)
| Value to use when needing a timeout of zero or NO timeout, return immediately on resource not available. More...
#define | MCSPI_WAIT_FOREVER ((uint32_t)-1)
| Value to use when needing a timeout of infinity or wait forver until resource is available. More...

## MCSPI Driver states
#define | MCSPI_STATE_RESET ((uint32_t)0U)
| MCSPI driver is in Reset State prior to driver init and post driver deinit. More...
#define | MCSPI_STATE_READY ((uint32_t)1U)
| MCSPI driver accepts runtime APIs only Ready State, otherwise return error. More...
#define | MCSPI_STATE_BUSY ((uint32_t)2U)
| MCSPI driver is busy performing operation with peripherals, return error when APIs are invoked. More...
#define | MCSPI_STATE_ERROR ((uint32_t)3U)
| MCSPI driver ran into error, returns error for all APIs other than deinit in this state. More...

## Channel Id
Values used to determine the channel number used for McSPI communication. This determines which Chip Select (CS) line to use
#define | MCSPI_CHANNEL_0 (0U)
#define | MCSPI_CHANNEL_1 (1U)
#define | MCSPI_CHANNEL_2 (2U)
#define | MCSPI_CHANNEL_3 (3U)

## Operating Mode
Values used to determine the McSPI driver operation.
#define | MCSPI_OPER_MODE_POLLED (0U)
#define | MCSPI_OPER_MODE_INTERRUPT (1U)
#define | MCSPI_OPER_MODE_DMA (2U)

## Transfer Status Code
Status codes that are set by the MCSPI driver
#define | MCSPI_TRANSFER_COMPLETED ((int32_t)0U)
#define | MCSPI_TRANSFER_STARTED ((int32_t)1U)
#define | MCSPI_TRANSFER_CANCELLED ((int32_t)2U)
#define | MCSPI_TRANSFER_FAILED ((int32_t)3U)
#define | MCSPI_TRANSFER_CSN_DEASSERT ((int32_t)4U)
#define | MCSPI_TRANSFER_TIMEOUT ((int32_t)5U)

## Modes of Operation
Definitions for various MCSPI modes of operation The MCSPI driver operates in both controller and SPI peripheral modes. Logically, the implementation is identical, however the difference between these two modes is driven by hardware. The default mode is MCSPI_MS_MODE_CONTROLLER, but can be set to peripheral mode by setting MCSPI_OpenParams.msMode to MCSPI_MS_MODE_PERIPHERAL in the parameters passed to MCSPI_open().
#define | MCSPI_MS_MODE_CONTROLLER (CSL_MCSPI_MODULCTRL_MS_MASTER)
| The module generates the clock and CS. More...
#define | MCSPI_MS_MODE_PERIPHERAL (CSL_MCSPI_MODULCTRL_MS_SLAVE)
| The module receives the clock and CS. More...

## Frame Format
Definitions for various SPI data frame formats POL0 = SPICLK is held low during the INACTIVE state POL1 = SPICLK is held high during the INACTIVE state PHA0 = Data are latched on odd-numbered edges of SPICLK PHA1 = Data are latched on even-numbered edges of SPICLK
#define | MCSPI_FF_POL0_PHA0 (0U)
#define | MCSPI_FF_POL0_PHA1 (1U)
#define | MCSPI_FF_POL1_PHA0 (2U)
#define | MCSPI_FF_POL1_PHA1 (3U)

## Chip-select Polarity
Type for SPI Chip Select Polarity and Clock Idle Level
#define | MCSPI_CS_POL_HIGH (CSL_MCSPI_CH0CONF_EPOL_ACTIVEHIGH)
| SPIEN (CS) is held high during the ACTIVE state. More...
#define | MCSPI_CS_POL_LOW (CSL_MCSPI_CH0CONF_EPOL_ACTIVELOW)
| SPIEN (CS) is held low during the ACTIVE state. More...

## Transmit-Receive Modes
#define | MCSPI_TR_MODE_TX_RX (CSL_MCSPI_CH0CONF_TRM_TRANSRECEI)
#define | MCSPI_TR_MODE_RX_ONLY (CSL_MCSPI_CH0CONF_TRM_RECEIVONLY)
#define | MCSPI_TR_MODE_TX_ONLY (CSL_MCSPI_CH0CONF_TRM_TRANSONLY)

## Input Select
#define | MCSPI_IS_D0 (CSL_MCSPI_CH0CONF_IS_LINE0)
| Data line 0 (SPIDAT[0]) selected for reception. More...
#define | MCSPI_IS_D1 (CSL_MCSPI_CH0CONF_IS_LINE1)
| Data line 1 (SPIDAT[1]) selected for reception. More...

## Transmission Enable for Data Line
#define | MCSPI_DPE_ENABLE (CSL_MCSPI_CH0CONF_DPE0_ENABLED)
| Data line selected for transmission. More...
#define | MCSPI_DPE_DISABLE (CSL_MCSPI_CH0CONF_DPE0_DISABLED)
| No transmission on Data Line. More...

## Peripheral Chip-select Signal Select
#define | MCSPI_SLV_CS_SELECT_0 (CSL_MCSPI_CH0CONF_SPIENSLV_SPIEN0)
#define | MCSPI_SLV_CS_SELECT_1 (CSL_MCSPI_CH0CONF_SPIENSLV_SPIEN1)
#define | MCSPI_SLV_CS_SELECT_2 (CSL_MCSPI_CH0CONF_SPIENSLV_SPIEN2)
#define | MCSPI_SLV_CS_SELECT_3 (CSL_MCSPI_CH0CONF_SPIENSLV_SPIEN3)

## Start-bit Polarity
#define | MCSPI_SB_POL_HIGH (CSL_MCSPI_CH0CONF_SBPOL_HIGHLEVEL)
| SStart-bit polarity is held to 1 during MCSPI transfer. More...
#define | MCSPI_SB_POL_LOW (CSL_MCSPI_CH0CONF_SBPOL_LOWLEVEL)
| Start-bit polarity is held to 0 during MCSPI transfer. More...

## Chip-select Idle Time
Values used to configure the chip select time control (TCS)
#define | MCSPI_TCS0_0_CLK (CSL_MCSPI_CH0CONF_TCS0_ZEROCYCLEDLY)
| 0.5 clock cycles delay More...
#define | MCSPI_TCS0_1_CLK (CSL_MCSPI_CH0CONF_TCS0_ONECYCLEDLY)
| 1.5 clock cycles delay More...
#define | MCSPI_TCS0_2_CLK (CSL_MCSPI_CH0CONF_TCS0_TWOCYCLEDLY)
| 2.5 clock cycles delay More...
#define | MCSPI_TCS0_3_CLK (CSL_MCSPI_CH0CONF_TCS0_THREECYCLEDLY)
| 3.5 clock cycles delay More...

## Channel Mode
#define | MCSPI_CH_MODE_SINGLE (CSL_MCSPI_MODULCTRL_SINGLE_SINGLE)
| Only one channel will be used in controller mode. This should be used when CS is used in forced enable mode. More...
#define | MCSPI_CH_MODE_MULTI (CSL_MCSPI_MODULCTRL_SINGLE_MULTI)
| More than one channel will be used in controller mode. More...

## Pin Mode
#define | MCSPI_PINMODE_3PIN (CSL_MCSPI_MODULCTRL_PIN34_3PINMODE)
| SPIEN (CS) is not used. In this mode all related options to chip-select have no meaning. More...
#define | MCSPI_PINMODE_4PIN (CSL_MCSPI_MODULCTRL_PIN34_4PINMODE)

## Init Delay
Values used to enable initial delay for first transfer
#define | MCSPI_INITDLY_0 (CSL_MCSPI_MODULCTRL_INITDLY_NODELAY)
| No delay. More...
#define | MCSPI_INITDLY_4 (CSL_MCSPI_MODULCTRL_INITDLY_4CLKDLY)
| 4 SPI bus clock delays More...
#define | MCSPI_INITDLY_8 (CSL_MCSPI_MODULCTRL_INITDLY_8CLKDLY)
| 8 SPI bus clock delays More...
#define | MCSPI_INITDLY_16 (CSL_MCSPI_MODULCTRL_INITDLY_16CLKDLY)
| 16 SPI bus clock delays More...
#define | MCSPI_INITDLY_32 (CSL_MCSPI_MODULCTRL_INITDLY_32CLKDLY)
| 32 SPI bus clock delays More...

## Macro Definition Documentation

## ◆ MCSPI_STATUS_SUCCESS

#define MCSPI_STATUS_SUCCESS ((int32_t)0)

Return status when the API execution was successful.

## ◆ MCSPI_STATUS_FAILURE

#define MCSPI_STATUS_FAILURE ((int32_t)-1)

Return status when the API execution was not successful due to a failure.

## ◆ MCSPI_TIMEOUT

#define MCSPI_TIMEOUT ((int32_t)-2)

Return status when the API execution was not successful due to a time out.

## ◆ MCSPI_INVALID_PARAM

#define MCSPI_INVALID_PARAM ((int32_t)-3)

Return status when the API execution failed due invalid parameters.

## ◆ MCSPI_STATUS_BUSY

#define MCSPI_STATUS_BUSY ((int32_t)-4)

Return status when the API execution failed due to driver busy.

## ◆ MCSPI_INVALID_STATE

#define MCSPI_INVALID_STATE ((int32_t)-5)

Return status when the API execution failed due to invalid state.

## ◆ MCSPI_NO_WAIT

#define MCSPI_NO_WAIT ((uint32_t)0)

Value to use when needing a timeout of zero or NO timeout, return immediately on resource not available.

## ◆ MCSPI_WAIT_FOREVER

#define MCSPI_WAIT_FOREVER ((uint32_t)-1)

Value to use when needing a timeout of infinity or wait forver until resource is available.

## ◆ MCSPI_STATE_RESET

#define MCSPI_STATE_RESET ((uint32_t)0U)

MCSPI driver is in Reset State prior to driver init and post driver deinit.

## ◆ MCSPI_STATE_READY

#define MCSPI_STATE_READY ((uint32_t)1U)

MCSPI driver accepts runtime APIs only Ready State, otherwise return error.

## ◆ MCSPI_STATE_BUSY

#define MCSPI_STATE_BUSY ((uint32_t)2U)

MCSPI driver is busy performing operation with peripherals, return error when APIs are invoked.

## ◆ MCSPI_STATE_ERROR

#define MCSPI_STATE_ERROR ((uint32_t)3U)

MCSPI driver ran into error, returns error for all APIs other than deinit in this state.

## ◆ MCSPI_CHANNEL_0

#define MCSPI_CHANNEL_0 (0U)

## ◆ MCSPI_CHANNEL_1

#define MCSPI_CHANNEL_1 (1U)

## ◆ MCSPI_CHANNEL_2

#define MCSPI_CHANNEL_2 (2U)

## ◆ MCSPI_CHANNEL_3

#define MCSPI_CHANNEL_3 (3U)

## ◆ MCSPI_OPER_MODE_POLLED

#define MCSPI_OPER_MODE_POLLED (0U)

## ◆ MCSPI_OPER_MODE_INTERRUPT

#define MCSPI_OPER_MODE_INTERRUPT (1U)

## ◆ MCSPI_OPER_MODE_DMA

#define MCSPI_OPER_MODE_DMA (2U)

## ◆ MCSPI_MAX_NUM_CHANNELS

#define MCSPI_MAX_NUM_CHANNELS (4U)

Max number of channels/Chip Select (CS) supported.

## ◆ MCSPI_TRANSFER_COMPLETED

#define MCSPI_TRANSFER_COMPLETED ((int32_t)0U)

## ◆ MCSPI_TRANSFER_STARTED

#define MCSPI_TRANSFER_STARTED ((int32_t)1U)

## ◆ MCSPI_TRANSFER_CANCELLED

#define MCSPI_TRANSFER_CANCELLED ((int32_t)2U)

## ◆ MCSPI_TRANSFER_FAILED

#define MCSPI_TRANSFER_FAILED ((int32_t)3U)

## ◆ MCSPI_TRANSFER_CSN_DEASSERT

#define MCSPI_TRANSFER_CSN_DEASSERT ((int32_t)4U)

## ◆ MCSPI_TRANSFER_TIMEOUT

#define MCSPI_TRANSFER_TIMEOUT ((int32_t)5U)

## ◆ MCSPI_MS_MODE_CONTROLLER

#define MCSPI_MS_MODE_CONTROLLER (CSL_MCSPI_MODULCTRL_MS_MASTER)

The module generates the clock and CS.

## ◆ MCSPI_MS_MODE_PERIPHERAL

#define MCSPI_MS_MODE_PERIPHERAL (CSL_MCSPI_MODULCTRL_MS_SLAVE)

The module receives the clock and CS.

## ◆ MCSPI_FF_POL0_PHA0

#define MCSPI_FF_POL0_PHA0 (0U)

## ◆ MCSPI_FF_POL0_PHA1

#define MCSPI_FF_POL0_PHA1 (1U)

## ◆ MCSPI_FF_POL1_PHA0

#define MCSPI_FF_POL1_PHA0 (2U)

## ◆ MCSPI_FF_POL1_PHA1

#define MCSPI_FF_POL1_PHA1 (3U)

## ◆ MCSPI_CS_POL_HIGH

#define MCSPI_CS_POL_HIGH (CSL_MCSPI_CH0CONF_EPOL_ACTIVEHIGH)

SPIEN (CS) is held high during the ACTIVE state.

## ◆ MCSPI_CS_POL_LOW

#define MCSPI_CS_POL_LOW (CSL_MCSPI_CH0CONF_EPOL_ACTIVELOW)

SPIEN (CS) is held low during the ACTIVE state.

## ◆ MCSPI_TR_MODE_TX_RX

#define MCSPI_TR_MODE_TX_RX (CSL_MCSPI_CH0CONF_TRM_TRANSRECEI)

## ◆ MCSPI_TR_MODE_RX_ONLY

#define MCSPI_TR_MODE_RX_ONLY (CSL_MCSPI_CH0CONF_TRM_RECEIVONLY)

## ◆ MCSPI_TR_MODE_TX_ONLY

#define MCSPI_TR_MODE_TX_ONLY (CSL_MCSPI_CH0CONF_TRM_TRANSONLY)

## ◆ MCSPI_IS_D0

#define MCSPI_IS_D0 (CSL_MCSPI_CH0CONF_IS_LINE0)

Data line 0 (SPIDAT[0]) selected for reception.

## ◆ MCSPI_IS_D1

#define MCSPI_IS_D1 (CSL_MCSPI_CH0CONF_IS_LINE1)

Data line 1 (SPIDAT[1]) selected for reception.

## ◆ MCSPI_DPE_ENABLE

#define MCSPI_DPE_ENABLE (CSL_MCSPI_CH0CONF_DPE0_ENABLED)

Data line selected for transmission.

## ◆ MCSPI_DPE_DISABLE

#define MCSPI_DPE_DISABLE (CSL_MCSPI_CH0CONF_DPE0_DISABLED)

No transmission on Data Line.

## ◆ MCSPI_SLV_CS_SELECT_0

#define MCSPI_SLV_CS_SELECT_0 (CSL_MCSPI_CH0CONF_SPIENSLV_SPIEN0)

## ◆ MCSPI_SLV_CS_SELECT_1

#define MCSPI_SLV_CS_SELECT_1 (CSL_MCSPI_CH0CONF_SPIENSLV_SPIEN1)

## ◆ MCSPI_SLV_CS_SELECT_2

#define MCSPI_SLV_CS_SELECT_2 (CSL_MCSPI_CH0CONF_SPIENSLV_SPIEN2)

## ◆ MCSPI_SLV_CS_SELECT_3

#define MCSPI_SLV_CS_SELECT_3 (CSL_MCSPI_CH0CONF_SPIENSLV_SPIEN3)

## ◆ MCSPI_SB_POL_HIGH

#define MCSPI_SB_POL_HIGH (CSL_MCSPI_CH0CONF_SBPOL_HIGHLEVEL)

SStart-bit polarity is held to 1 during MCSPI transfer.

## ◆ MCSPI_SB_POL_LOW

#define MCSPI_SB_POL_LOW (CSL_MCSPI_CH0CONF_SBPOL_LOWLEVEL)

Start-bit polarity is held to 0 during MCSPI transfer.

## ◆ MCSPI_TCS0_0_CLK

#define MCSPI_TCS0_0_CLK (CSL_MCSPI_CH0CONF_TCS0_ZEROCYCLEDLY)

0.5 clock cycles delay

## ◆ MCSPI_TCS0_1_CLK

#define MCSPI_TCS0_1_CLK (CSL_MCSPI_CH0CONF_TCS0_ONECYCLEDLY)

1.5 clock cycles delay

## ◆ MCSPI_TCS0_2_CLK

#define MCSPI_TCS0_2_CLK (CSL_MCSPI_CH0CONF_TCS0_TWOCYCLEDLY)

2.5 clock cycles delay

## ◆ MCSPI_TCS0_3_CLK

#define MCSPI_TCS0_3_CLK (CSL_MCSPI_CH0CONF_TCS0_THREECYCLEDLY)

3.5 clock cycles delay

## ◆ MCSPI_CH_MODE_SINGLE

#define MCSPI_CH_MODE_SINGLE (CSL_MCSPI_MODULCTRL_SINGLE_SINGLE)

Only one channel will be used in controller mode. This should be used when CS is used in forced enable mode.

## ◆ MCSPI_CH_MODE_MULTI

#define MCSPI_CH_MODE_MULTI (CSL_MCSPI_MODULCTRL_SINGLE_MULTI)

More than one channel will be used in controller mode.

## ◆ MCSPI_PINMODE_3PIN

#define MCSPI_PINMODE_3PIN (CSL_MCSPI_MODULCTRL_PIN34_3PINMODE)

SPIEN (CS) is not used. In this mode all related options to chip-select have no meaning.

## ◆ MCSPI_PINMODE_4PIN

#define MCSPI_PINMODE_4PIN (CSL_MCSPI_MODULCTRL_PIN34_4PINMODE)

## ◆ MCSPI_INITDLY_0

#define MCSPI_INITDLY_0 (CSL_MCSPI_MODULCTRL_INITDLY_NODELAY)

No delay.

## ◆ MCSPI_INITDLY_4

#define MCSPI_INITDLY_4 (CSL_MCSPI_MODULCTRL_INITDLY_4CLKDLY)

4 SPI bus clock delays

## ◆ MCSPI_INITDLY_8

#define MCSPI_INITDLY_8 (CSL_MCSPI_MODULCTRL_INITDLY_8CLKDLY)

8 SPI bus clock delays

## ◆ MCSPI_INITDLY_16

#define MCSPI_INITDLY_16 (CSL_MCSPI_MODULCTRL_INITDLY_16CLKDLY)

16 SPI bus clock delays

## ◆ MCSPI_INITDLY_32

#define MCSPI_INITDLY_32 (CSL_MCSPI_MODULCTRL_INITDLY_32CLKDLY)

32 SPI bus clock delays

## ◆ MCSPI_ERROR_TX_UNDERFLOW

#define MCSPI_ERROR_TX_UNDERFLOW (0x00000001U)

McSPI error macro's.

## ◆ MCSPI_ERROR_RX_OVERFLOW

#define MCSPI_ERROR_RX_OVERFLOW (0x00000002U)

## ◆ MCSPI_MAX_CLK_DIVIDER_SUPPORTED

#define MCSPI_MAX_CLK_DIVIDER_SUPPORTED (4096U)

Maximuum Clock Divider supported

## ◆ MCSPI_FIFO_LENGTH

#define MCSPI_FIFO_LENGTH (64U)

Total length of FIFO for both TX/RX.

## ◆ MCSPI_RX_FIFO_ENABLE

#define MCSPI_RX_FIFO_ENABLE

Value:
((uint32_t) CSL_MCSPI_CH0CONF_FFER_FFENABLED \
<< \
CSL_MCSPI_CH0CONF_FFER_SHIFT)

McSPI peripheral Rx FIFO is enabled.

## ◆ MCSPI_RX_FIFO_DISABLE

#define MCSPI_RX_FIFO_DISABLE

Value:
((uint32_t) CSL_MCSPI_CH0CONF_FFER_FFDISABLED \
<< CSL_MCSPI_CH0CONF_FFER_SHIFT)

McSPI peripheral Rx FIFO is disabled.

## ◆ MCSPI_TX_FIFO_ENABLE

#define MCSPI_TX_FIFO_ENABLE

Value:
((uint32_t) CSL_MCSPI_CH0CONF_FFEW_FFENABLED \
<< CSL_MCSPI_CH0CONF_FFEW_SHIFT)

McSPI peripheral Tx FIFO is enabled.

## ◆ MCSPI_TX_FIFO_DISABLE

#define MCSPI_TX_FIFO_DISABLE

Value:
((uint32_t) CSL_MCSPI_CH0CONF_FFEW_FFDISABLED \
<< CSL_MCSPI_CH0CONF_FFEW_SHIFT)

McSPI peripheral Tx FIFO is disabled.

## ◆ MCSPI_REG_OFFSET

#define MCSPI_REG_OFFSET (0x14U)

McSPI Register Offset for MCSPI_CHxCONF, MCSPI_CHxSTAT, MCSPI_CHxCTRL, MCSPI_TXx and MCSPI_RXx register set.

## ◆ MCSPI_CHCONF

#define MCSPI_CHCONF | ( |  | x | ) |

Value:
((uint32_t) CSL_MCSPI_CH0CONF + \
(uint32_t) ((uint32_t) MCSPI_REG_OFFSET * \
(uint32_t) (x)))

Base address of McSPI_CHCONF(x)

## ◆ MCSPI_CHSTAT

#define MCSPI_CHSTAT | ( |  | x | ) |

Value:
((uint32_t) CSL_MCSPI_CH0STAT + \
(uint32_t) ((uint32_t) MCSPI_REG_OFFSET * \
(uint32_t) (x)))

Base address of McSPI_CHSTAT(x)

## ◆ MCSPI_CHCTRL

#define MCSPI_CHCTRL | ( |  | x | ) |

Value:
((uint32_t) CSL_MCSPI_CH0CTRL + \
(uint32_t) ((uint32_t) MCSPI_REG_OFFSET * \
(uint32_t) (x)))

Base address of McSPI_CHCTRL(x)

## ◆ MCSPI_CHTX

#define MCSPI_CHTX | ( |  | x | ) |

Value:
((uint32_t) CSL_MCSPI_TX0 + \
(uint32_t) ((uint32_t) MCSPI_REG_OFFSET * \
(uint32_t) (x)))

Base address of McSPI_CHTX(x)

## ◆ MCSPI_CHRX

#define MCSPI_CHRX | ( |  | x | ) |

Value:
((uint32_t) CSL_MCSPI_RX0 + \
(uint32_t) ((uint32_t) MCSPI_REG_OFFSET * \
(uint32_t) (x)))

Base address of McSPI_CHRX(x)

## ◆ MCSPI_CLKD_MASK

#define MCSPI_CLKD_MASK (0x0FU)

## ◆ MCSPI_IRQSTATUS_CLEAR_ALL

#define MCSPI_IRQSTATUS_CLEAR_ALL

Value:
(CSL_MCSPI_IRQSTATUS_EOW_MASK | \
CSL_MCSPI_IRQSTATUS_WKS_MASK | \
CSL_MCSPI_IRQSTATUS_RX3_FULL_MASK | \
CSL_MCSPI_IRQSTATUS_TX3_UNDERFLOW_MASK | \
CSL_MCSPI_IRQSTATUS_TX3_EMPTY_MASK | \
CSL_MCSPI_IRQSTATUS_RX2_FULL_MASK | \
CSL_MCSPI_IRQSTATUS_TX2_UNDERFLOW_MASK | \
CSL_MCSPI_IRQSTATUS_TX2_EMPTY_MASK | \
CSL_MCSPI_IRQSTATUS_RX1_FULL_MASK | \
CSL_MCSPI_IRQSTATUS_TX1_UNDERFLOW_MASK | \
CSL_MCSPI_IRQSTATUS_TX1_EMPTY_MASK | \
CSL_MCSPI_IRQSTATUS_RX0_OVERFLOW_MASK | \
CSL_MCSPI_IRQSTATUS_RX0_FULL_MASK | \
CSL_MCSPI_IRQSTATUS_TX0_UNDERFLOW_MASK | \
CSL_MCSPI_IRQSTATUS_TX0_EMPTY_MASK)

Bit mask to clear all status bits.

## Typedef Documentation

## ◆ MCSPI_clockGet

typedef uint32_t(* MCSPI_clockGet) (void)

## ◆ MCSPI_transferCallbackFxn

typedef void(* MCSPI_transferCallbackFxn) (void *args, uint32_t transferStatus)

The definition of a transfer completion callback function used by the SPI driver when used in MCSPI_TRANSFER_MODE_CALLBACK.

Parameters

  args* | void pointer
  transferStatus | transfer Status

## ◆ MCSPI_errorCallbackFxn

typedef void(* MCSPI_errorCallbackFxn) (void *args, uint32_t transferStatus)

The definition of a error callback function used by the SPI driver when used in MCSPI_TRANSFER_MODE_CALLBACK.

Parameters

  args* | void pointer
  transferStatus | transfer Status

## ◆ MCSPILLD_InitHandle

typedef struct MCSPILLD_InitObject * MCSPILLD_InitHandle

## ◆ MCSPILLD_Handle

typedef struct MCSPILLD_Object * MCSPILLD_Handle

## Function Documentation

## ◆ MCSPI_reset()

void MCSPI_reset | ( | uint32_t | baseAddr | ) |

## ◆ MCSPI_clearAllIrqStatus()

void MCSPI_clearAllIrqStatus | ( | uint32_t | baseAddr | ) |

## ◆ MCSPI_stop()

void MCSPI_stop | ( | MCSPILLD_Handle | hMcspi,
|  | MCSPI_ChObject * | chObj,
|  | uint32_t | chNum
| ) |  |

## ◆ MCSPI_setChDataSize()

void MCSPI_setChDataSize | ( | uint32_t | baseAddr,
|  | MCSPI_ChObject * | chObj,
|  | uint32_t | dataSize,
|  | uint32_t | csDisable
| ) |  |

## ◆ MCSPI_intrStatusClear()

static void MCSPI_intrStatusClear | ( | const MCSPI_ChObject * | chObj,
|  | uint32_t | baseAddr,
|  | uint32_t | intFlags
| ) |  |
| inlinestatic

## ◆ MCSPI_lld_init()

int32_t MCSPI_lld_init | ( | MCSPILLD_Handle | hMcspi | ) |

This API Initializes the McSPI instance.

Parameters

  hMcspi | Handle to the McSPI instance used

Returns
  MCSPI_STATUS_SUCCESS if successful; else error on failure

## ◆ MCSPI_lld_initDma()

int32_t MCSPI_lld_initDma | ( | MCSPILLD_Handle | hMcspi | ) |

This API Initializes the McSPI instance in DMA Mode.

Parameters

  hMcspi | Handle to the McSPI instance used

Returns
  MCSPI_STATUS_SUCCESS if successful; else error on failure

## ◆ MCSPI_lld_deInit()

int32_t MCSPI_lld_deInit | ( | MCSPILLD_Handle | hMcspi | ) |

This API De-Initializes the McSPI instance.

Parameters

  hMcspi | Handle to the McSPI instance used

Returns
  MCSPI_STATUS_SUCCESS if successful; else error on failure

## ◆ MCSPI_lld_deInitDma()

int32_t MCSPI_lld_deInitDma | ( | MCSPILLD_Handle | hMcspi | ) |

This API De-Initializes the McSPI instance in DMA mode.

Parameters

  hMcspi | Handle to the McSPI instance used

Returns
  MCSPI_STATUS_SUCCESS if successful; else error on failure

## ◆ MCSPI_lld_write()

int32_t MCSPI_lld_write | ( | MCSPILLD_Handle | hMcspi,
|  | void * | txBuf,
|  | uint32_t | count,
|  | uint32_t | timeout,
|  | const MCSPI_ExtendedParams * | extendedParams
| ) |  |

This API writes data to the McSPI instance in Polling mode.

Parameters

  hMcspi | Handle to the McSPI instance used
  txBuf | Pointer to write data buffer
  count | Number of frames for this transaction
  timeout | Write timeout value
  extendedParams | Pointer to structure that contains the transfer data.

Returns
  MCSPI_STATUS_SUCCESS if successful; else error on failure

## ◆ MCSPI_lld_writeIntr()

int32_t MCSPI_lld_writeIntr | ( | MCSPILLD_Handle | hMcspi,
|  | void * | txBuf,
|  | uint32_t | count,
|  | uint32_t | timeout,
|  | const MCSPI_ExtendedParams * | extendedParams
| ) |  |

This API writes data to the McSPI instance in Interrupt mode.

Parameters

  hMcspi | Handle to the McSPI instance used
  txBuf | Pointer to write data buffer
  count | Number of frames for this transaction
  timeout | write timeout value
  extendedParams | Pointer to structure that contains the transfer data.

Returns
  MCSPI_STATUS_SUCCESS if successful; else error on failure

## ◆ MCSPI_lld_writeDma()

int32_t MCSPI_lld_writeDma | ( | MCSPILLD_Handle | hMcspi,
|  | void * | txBuf,
|  | uint32_t | count,
|  | uint32_t | timeout,
|  | const MCSPI_ExtendedParams * | extendedParams
| ) |  |

This API writes data to the McSPI instance in DMA mode.

Parameters

  hMcspi | Handle to the McSPI instance used
  txBuf | Pointer to write data buffer
  count | Number of frames for this transaction
  timeout | write timeout value
  extendedParams | Pointer to structure that contains the transfer data.

Returns
  MCSPI_STATUS_SUCCESS if successful; else error on failure

## ◆ MCSPI_lld_read()

int32_t MCSPI_lld_read | ( | MCSPILLD_Handle | hMcspi,
|  | void * | rxBuf,
|  | uint32_t | count,
|  | uint32_t | timeout,
|  | const MCSPI_ExtendedParams * | extendedParams
| ) |  |

This API reads data from the McSPI instance in Polling mode.

Parameters

  hMcspi | Handle to the McSPI instance used
  rxBuf | Pointer to Read data buffer
  count | Number of frames for this transaction
  timeout | Read timeout value
  extendedParams | Pointer to structure that contains the transfer data.

Returns
  MCSPI_STATUS_SUCCESS if successful; else error on failure

## ◆ MCSPI_lld_readIntr()

int32_t MCSPI_lld_readIntr | ( | MCSPILLD_Handle | hMcspi,
|  | void * | rxBuf,
|  | uint32_t | count,
|  | uint32_t | timeout,
|  | const MCSPI_ExtendedParams * | extendedParams
| ) |  |

This API reads data from the McSPI instance in Interrupt mode.

Parameters

  hMcspi | Handle to the McSPI instance used
  rxBuf | Pointer to Read data buffer
  count | Number of frames for this transaction
  timeout | Read timeout value
  extendedParams | Pointer to structure that contains the transfer data.

Returns
  MCSPI_STATUS_SUCCESS if successful; else error on failure

## ◆ MCSPI_lld_readDma()

int32_t MCSPI_lld_readDma | ( | MCSPILLD_Handle | hMcspi,
|  | void * | rxBuf,
|  | uint32_t | count,
|  | uint32_t | timeout,
|  | const MCSPI_ExtendedParams * | extendedParams
| ) |  |

This API reads data from the McSPI instance in DMA mode.

Parameters

  hMcspi | Handle to the McSPI instance used
  rxBuf | Pointer to Read data buffer
  count | Number of frames for this transaction
  timeout | Read timeout value
  extendedParams | Pointer to structure that contains the transfer data. extendedParams

Returns
  MCSPI_STATUS_SUCCESS if successful; else error on failure

## ◆ MCSPI_lld_readWrite()

int32_t MCSPI_lld_readWrite | ( | MCSPILLD_Handle | hMcspi,
|  | void * | txBuf,
|  | void * | rxBuf,
|  | uint32_t | count,
|  | uint32_t | timeout,
|  | const MCSPI_ExtendedParams * | extendedParams
| ) |  |

This API reads writes data from the McSPI instance in polling mode.

Parameters

  hMcspi | Handle to the McSPI instance used
  txBuf | Pointer to write data buffer
  rxBuf | Pointer to Read data buffer
  count | Number of frames for this transaction
  timeout | Read write timeout value
  extendedParams | Pointer to structure that contains the transfer data.

Returns
  MCSPI_STATUS_SUCCESS if successful; else error on failure

## ◆ MCSPI_lld_readWriteIntr()

int32_t MCSPI_lld_readWriteIntr | ( | MCSPILLD_Handle | hMcspi,
|  | void * | txBuf,
|  | void * | rxBuf,
|  | uint32_t | count,
|  | uint32_t | timeout,
|  | const MCSPI_ExtendedParams * | extendedParams
| ) |  |

This API reads writes data from the McSPI instance in Interrupt mode.

Parameters

  hMcspi | Handle to the McSPI instance used
  txBuf | Pointer to write data buffer
  rxBuf | Pointer to Read data buffer
  count | Number of frames for this transaction
  timeout | Read write timeout value
  extendedParams | Pointer to structure that contains the transfer data.

Returns
  MCSPI_STATUS_SUCCESS if successful; else error on failure

## ◆ MCSPI_lld_readWriteDma()

int32_t MCSPI_lld_readWriteDma | ( | MCSPILLD_Handle | hMcspi,
|  | void * | txBuf,
|  | void * | rxBuf,
|  | uint32_t | count,
|  | uint32_t | timeout,
|  | const MCSPI_ExtendedParams * | extendedParams
| ) |  |

This API reads writes data from the McSPI instance in DMA mode.

Parameters

  hMcspi | Handle to the McSPI instance used
  txBuf | Pointer to write data buffer
  rxBuf | Pointer to Read data buffer
  count | Number of frames for this transaction
  timeout | Read write timeout value
  extendedParams | Pointer to structure that contains the transfer data.

Returns
  MCSPI_STATUS_SUCCESS if successful; else error on failure

## ◆ MCSPI_lld_readWriteCancel()

int32_t MCSPI_lld_readWriteCancel | ( | MCSPILLD_Handle | hMcspi | ) |

This API cancels current McSPI transfer.

Parameters

  hMcspi | Handle to the McSPI instance used

Returns
  Mcspi Status Status of current mcspi transaction

## ◆ MCSPI_lld_readWriteDmaCancel()

int32_t MCSPI_lld_readWriteDmaCancel | ( | MCSPILLD_Handle | hMcspi | ) |

This API cancels current McSPI transfer in DMA mode.

Parameters

  hMcspi | Handle to the McSPI instance used

Returns
  Mcspi Status Status of current mcspi transaction

## ◆ MCSPI_lld_transfer()

int32_t MCSPI_lld_transfer | ( | MCSPILLD_Handle | hMcspi,
|  | MCSPI_Transaction * | transaction
| ) |  |

This API transfers data from the McSPI instance in Polling mode.

Parameters

  hMcspi | Handle to the McSPI instance used
  transaction | Pointer to structure that contains the transfer data.

Returns
  MCSPI_STATUS_SUCCESS if successful; else error on failure

## ◆ MCSPI_lld_transferIntr()

int32_t MCSPI_lld_transferIntr | ( | MCSPILLD_Handle | hMcspi,
|  | MCSPI_Transaction * | transaction
| ) |  |

This API reads data from the McSPI instance in Interrupt mode.

Parameters

  hMcspi | Handle to the McSPI instance used
  transaction | Pointer to structure that contains the transfer data.

Returns
  MCSPI_STATUS_SUCCESS if successful; else error on failure

## ◆ MCSPI_lld_transferDma()

int32_t MCSPI_lld_transferDma | ( | MCSPILLD_Handle | hMcspi,
|  | MCSPI_Transaction * | transaction
| ) |  |

This API reads data from the McSPI instance in DMA mode.

Parameters

  hMcspi | Handle to the McSPI instance used
  transaction | Pointer to structure that contains the transfer data.

Returns
  MCSPI_STATUS_SUCCESS if successful; else error on failure

## ◆ MCSPI_lld_controllerIsr()

void MCSPI_lld_controllerIsr | ( | void * | args | ) |

This is the McSPI Controller ISR and can be used as IRQ handler in Controller mode.

Parameters

  args | Argument to the ISR.

## ◆ MCSPI_lld_peripheralIsr()

void MCSPI_lld_peripheralIsr | ( | void * | args | ) |

This is the McSPI Peripheral ISR and can be used as IRQ handler in Peripheral mode.

Parameters

  args | Argument to the ISR.

## ◆ MCSPI_lld_getState()

int32_t MCSPI_lld_getState | ( | MCSPILLD_Handle | hMcspi | ) |

This API returns the driver state.

Parameters

  hMcspi | Handle to the McSPI instance used

## ◆ MCSPI_lld_transferCancel()

int32_t MCSPI_lld_transferCancel | ( | MCSPILLD_Handle | hMcspi | ) |

This API cancels current McSPI transfer.

Parameters

  hMcspi | Handle to the McSPI instance used

Returns
  MCSPI_STATUS_SUCCESS if successful; else error on failure

## ◆ MCSPI_lld_transferDmaCancel()

int32_t MCSPI_lld_transferDmaCancel | ( | MCSPILLD_Handle | hMcspi | ) |

This API cancels current McSPI transfer in DMA mode.

Parameters

  hMcspi | Handle to the McSPI instance used

Returns
  MCSPI_STATUS_SUCCESS if successful; else error on failure

## ◆ MCSPI_lld_ChConfig_init()

static void MCSPI_lld_ChConfig_init | ( | MCSPI_ChConfig * | chConfig | ) |
| inlinestatic

Function to initialize the MCSPI_ChConfig struct to its defaults.

Parameters

  chConfig | Pointer to MCSPI_ChConfig structure for initialization

## ◆ MCSPI_lld_Transaction_init()

static void MCSPI_lld_Transaction_init | ( | MCSPI_Transaction * | trans | ) |
| inlinestatic

Function to initialize the MCSPI_Transaction struct to its defaults.

Parameters

  trans | Pointer to MCSPI_Transaction structure for initialization

## ◆ MCSPI_lld_getBaseAddr()

uint32_t MCSPI_lld_getBaseAddr | ( | MCSPILLD_Handle | handle | ) |

Function to get base address of MCSPI instance of a particular handle.

Parameters

  handle | MCSPILLD_Handle returned from MCSPI_open()

See also
  MCSPI_open

## ◆ MCSPI_lld_reConfigFifo()

int32_t MCSPI_lld_reConfigFifo | ( | MCSPILLD_Handle | handle,
|  | uint32_t | chNum,
|  | uint32_t | numWordsRxTx
| ) |  |

Function to re-configure Effective FIFO Words.

Parameters

  handle | MCSPILLD_Handle returned from MCSPI_open()
  chNum | Channel used for communication.
  numWordsRxTx | Number of words to transfer

Returns
  MCSPI_STATUS_SUCCESS if successful; else error on failure

See also
  MCSPI_open

## ◆ MCSPI_initiateLastChunkTransfer()

void MCSPI_initiateLastChunkTransfer | ( | MCSPILLD_Handle | hMcspi,
|  | MCSPI_ChObject * | chObj,
|  | const MCSPI_Transaction * | transaction
| ) |  |

This API will initiate the last chuncks when FIFO is enabled. The byte thats are non-multiple of FIFO trigger level.

Parameters

  hMcspi | MCSPILLD_Handle returned from MCSPI_open()
  chObj | Pointer to the McSPI Channel Object.
  transaction | Pointer to structure that contains the transfer data.

## ◆ MCSPI_getBufWidthShift()

static uint8_t MCSPI_getBufWidthShift | ( | uint32_t | dataSize | ) |
| inlinestatic

This API will return the buffer width in bytes based on dataSize.

Parameters

  dataSize | MCSPI data frame size in bits - valid values: 4 bits to 32 bits

Returns
  bufWidthShift Width of buffer in bytes - used for accessing the TX/RX buffer. When dataWidth <= 8, (1 byte - 0 shift) When dataWidth > 8 && <= 16, (2 bytes - 1 shift) When dataWidth > 16 && <= 32, (4 bytes - 2 shift)

See also
  MCSPI_open

## ◆ MCSPI_readChStatusReg()

static uint32_t MCSPI_readChStatusReg | ( | uint32_t | baseAddr,
|  | uint32_t | chNum
| ) |  |
| inlinestatic

This API will return the status of the McSPI channel currently in use.

Parameters

  baseAddr | Memory Address of the McSPI instance used.
  chNum | Channel used for communication.
          'chNum' can take the following values.\n
          MCSPI_CHANNEL_n - Channel n is used for communication.\n

Returns
  This API will return the status of the McSPI channel status register. User can use the following macros to check the status
  MCSPI_CH_STAT_RXS_FULL - Receiver register is full
  MCSPI_CH_STAT_TXS_EMPTY - Transmitter register is full
  MCSPI_CH_STAT_EOT - End of transfer status
  MCSPI_CH_TXFFE - FIFO transmit buffer empty status
  MCSPI_CH_TXFFF - FIFO transmit buffer full status
  MCSPI_CH_RXFFE - FIFO receive buffer empty status
  MCSPI_CH_RXFFF - FIFO receive buffer full status

See also
  MCSPI_open

## ◆ MCSPI_readChCtrlReg()

static uint32_t MCSPI_readChCtrlReg | ( | uint32_t | baseAddr,
|  | uint32_t | chNum
| ) |  |
| inlinestatic

This API returns Channel control register value.

Parameters

  baseAddr | Memory Address of the McSPI instance used.
  chNum | Channel number of the McSPI instance used.

Returns
  Channel control register value.

See also
  MCSPI_open

## ◆ MCSPI_writeChCtrlReg()

static void MCSPI_writeChCtrlReg | ( | uint32_t | baseAddr,
|  | uint32_t | chNum,
|  | uint32_t | regVal
| ) |  |
| inlinestatic

This API sets Channel control register value.

Parameters

  baseAddr | Memory Address of the McSPI instance used.
  chNum | Channel number of the McSPI instance used.
  regVal | register value to set in channel control register.

See also
  MCSPI_open

## ◆ MCSPI_readChConf()

static uint32_t MCSPI_readChConf | ( | uint32_t | baseAddr,
|  | uint32_t | chNum
| ) |  |
| inlinestatic

This API returns Channel Config register value.

Parameters

  baseAddr | Memory Address of the McSPI instance used.
  chNum | Channel number of the McSPI instance used.

Returns
  Channel Config register value.

See also
  MCSPI_open

## ◆ MCSPI_writeChConfReg()

static void MCSPI_writeChConfReg | ( | uint32_t | baseAddr,
|  | uint32_t | chNum,
|  | uint32_t | regVal
| ) |  |
| inlinestatic

This API sets Channel Config register value.

Parameters

  baseAddr | Memory Address of the McSPI instance used.
  chNum | Channel number of the McSPI instance used.
  regVal | register value to set in channel Config register.

See also
  MCSPI_open

## ◆ MCSPI_writeTxDataReg()

static void MCSPI_writeTxDataReg | ( | uint32_t | baseAddr,
|  | uint32_t | txData,
|  | uint32_t | chNum
| ) |  |
| inlinestatic

This API will put the data on to the McSPI Channel transmit register.

Parameters

  baseAddr | Memory Address of the McSPI instance used.
  txData | 32 bit data sent by the user which is put on to the MCSPI_TX register.
  chNum | Channel number of the McSPI instance used.
          'chNum' can take the following values.\n
          MCSPI_CHANNEL_n - Channel n is used for communication.\n

          For chNum n can range from 0-3.\n

See also
  MCSPI_open

## ◆ MCSPI_enableTxFIFO()

static void MCSPI_enableTxFIFO | ( | uint32_t | baseAddr,
|  | uint32_t | chNum,
|  | uint32_t | enableFlag
| ) |  |
| inlinestatic

This API will enable/disable the Tx FIFOs of McSPI peripheral.

Parameters

  baseAddr | Memory Address of the McSPI instance used.
  chNum | Channel number of the McSPI instance used.
  enableFlag | Flag to enable/diable FIFO transmit mode.
          'enableFlag' can take the following values.\n
          MCSPI_TX_FIFO_ENABLE - Enables the receiver FIFO of McSPI.\n
          MCSPI_TX_FIFO_DISABLE - Disables the receiver FIFO of McSPI.\n

          'chNum' can take the following values.\n
          MCSPI_CHANNEL_n - Channel n is used for communication.\n

          For chNum n can range from 0-3.\n

Note
  : Enabling FIFO is restricted to only 1 channel.

See also
  MCSPI_open

## ◆ MCSPI_enableRxFIFO()

static void MCSPI_enableRxFIFO | ( | uint32_t | baseAddr,
|  | uint32_t | chNum,
|  | uint32_t | enableFlag
| ) |  |
| inlinestatic

This API will enable/disable the Rx FIFOs of McSPI peripheral.

Parameters

  baseAddr | Memory Address of the McSPI instance used.
  chNum | Channel number of the McSPI instance used.
  enableFlag | Flag to enable/diable FIFO receive mode.
          'enableFlag' can take the following values.\n
          MCSPI_RX_FIFO_ENABLE - Enables the receiver FIFO of McSPI.\n
          MCSPI_RX_FIFO_DISABLE - Disables the receiver FIFO of McSPI.\n

          'chNum' can take the following values.\n
          MCSPI_CHANNEL_n - Channel n is used for communication.\n

          For chNum n can range from 0-3.\n

Note
  : Enabling FIFO is restricted to only 1 channel.

See also
  MCSPI_open

## ◆ MCSPI_readRxDataReg()

static uint32_t MCSPI_readRxDataReg | ( | uint32_t | baseAddr,
|  | uint32_t | chNum
| ) |  |
| inlinestatic

This API will return the data present in the MCSPI_RX register.

Parameters

  baseAddr | Memory Address of the McSPI instance used.
  chNum | Channel number of the McSPI instance used.
          'chNum' can take the following values.\n
          MCSPI_CHANNEL_n - Channel n is used for communication.\n

          For chNum n can range from 0-3.\n

See also
  MCSPI_open

Returns
  This API will return the data received in the MCSPI_RX register.

## ◆ MCSPI_setDataWidth()

static void MCSPI_setDataWidth | ( | uint32_t | baseAddr,
|  | uint32_t | chNum,
|  | uint32_t | dataWidth
| ) |  |
| inlinestatic

This API will set the data width in the channel config register.

Parameters

  baseAddr | Memory Address of the McSPI instance used.
  chNum | Channel number of the McSPI instance used.
  dataWidth | MCSPI data frame width in bits.
          'chNum' can take the following values.\n
          MCSPI_CHANNEL_n - Channel n is used for communication.\n

          For chNum n can range from 0-3.\n
          For dataWidth valid values: 4 bits to 32 bits

See also
  MCSPI_open

MCSPI_REG_OFFSET
#define MCSPI_REG_OFFSET
McSPI Register Offset for MCSPI_CHxCONF, MCSPI_CHxSTAT, MCSPI_CHxCTRL, MCSPI_TXx and MCSPI_RXx regist...
Definition: mcspi_lld.h:418