Device Global Registers Offsets 700h-7FCh.
The following structures define the size and relative field offsets for the Device Mode Global Registers.
Data Fields | |
| volatile u32 | dcfg |
| volatile u32 | dctl |
| volatile u32 | devten |
| volatile u32 | dsts |
| volatile u32 | dgcmdpar |
| volatile u32 | dgcmd |
| volatile u32 | reserved [2] |
| volatile u32 | dalepena |
| volatile u32 dwc_usb3_dev_global_regs_t::dcfg |
Device Configuration Register Offset: 700h. Fields defined in enum dcfg_data.
| volatile u32 dwc_usb3_dev_global_regs_t::dctl |
Device Control Register Offset: 704h. Fields defined in enum dctl_data.
| volatile u32 dwc_usb3_dev_global_regs_t::devten |
Device All Endpoints Interrupt Mask Register Offset: 708h. Fields defined in enum devten_data.
| volatile u32 dwc_usb3_dev_global_regs_t::dsts |
Device Status Register Offset: 70Ch. Fields defined in enum dsts_data.
| volatile u32 dwc_usb3_dev_global_regs_t::dgcmdpar |
Device Generic Command Parameter Register Offset: 710h. Fields defined in enum dgcmdpar_data.
| volatile u32 dwc_usb3_dev_global_regs_t::dgcmd |
Device Generic Command Register Offset: 714h. Fields defined in enum dgcmd_data.
| volatile u32 dwc_usb3_dev_global_regs_t::reserved[2] |
reserved Offset: 718h-71Ch
| volatile u32 dwc_usb3_dev_global_regs_t::dalepena |
Device Active Logical Endpoint Enable Register Offset: 720h. One bit per logical endpoint, bit0=EP0 ... bit31=EP31.