dwc_usb3_core_global_regs_t Struct Reference

Detailed Description

Core Global Registers Offsets 100h-5FCh.

The dwc_usb3_core_global_regs structure defines the size and relative field offsets for the Core Global Registers.

Data Fields
volatile u32	gsbuscfg0
volatile u32	gsbuscfg1
volatile u32	gtxthrcfg
volatile u32	grxthrcfg
volatile u32	gctl
volatile u32	gevten
volatile u32	gsts
volatile u32	reserved0
volatile u32	gsnpsid
volatile u32	ggpio
volatile u32	guid
volatile u32	reserved1
volatile u32	gbuserraddrlo
volatile u32	gbuserraddrhi
volatile u32	gprtbimap_lo
volatile u32	gprtbimap_hi
volatile u32	ghwparams0
volatile u32	ghwparams1
volatile u32	ghwparams2
volatile u32	ghwparams3
volatile u32	ghwparams4
volatile u32	ghwparams5
volatile u32	ghwparams6
volatile u32	ghwparams7
volatile u32	gdbgfifospace
volatile u32	gdbgltssm
volatile u32	gdbglnmcc
volatile u32	gdbgbmu
volatile u32	gdbglspmux
volatile u32	gdbglsp
volatile u32	gdbgepinfo0
volatile u32	gdbgepinfo1
volatile u32	gprtbimap_hs_lo
volatile u32	gprtbimap_hs_hi
volatile u32	gprtbimap_fs_lo
volatile u32	gprtbimap_fs_hi
volatile u32	reserved4 [12]
volatile u32	gusb3rmmictl [16]
volatile u32	gusb2phycfg [16]
volatile u32	gusb2i2cctl [16]
volatile u32	gusb2phyacc [16]
volatile u32	gusb3pipectl [16]
volatile u32	gtxfifosiz [32]
volatile u32	grxfifosiz [32]
struct geventbuf_data	geventbuf [32]
volatile u32	ghwparams8

Field Documentation

gsbuscfg0

volatile u32 dwc_usb3_core_global_regs_t::gsbuscfg0

Core BIU Configuration 0 Register Offset: 100h. Fields defined in enum gsbuscfg0_data.

gsbuscfg1

volatile u32 dwc_usb3_core_global_regs_t::gsbuscfg1

Core BIU Configuration 1 Register Offset: 104h. Fields defined in enum gsbuscfg1_data.

gtxthrcfg

volatile u32 dwc_usb3_core_global_regs_t::gtxthrcfg

Core Tx Threshold Control Register Offset: 108h. Fields defined in enum gtxthrcfg_data.

grxthrcfg

volatile u32 dwc_usb3_core_global_regs_t::grxthrcfg

Core Threshold Control Register Offset: 10Ch. Fields defined in enum grxthrcfg_data.

gctl

volatile u32 dwc_usb3_core_global_regs_t::gctl

Core Control Register Offset: 110h. Fields defined in enum gctl_data.

gevten

volatile u32 dwc_usb3_core_global_regs_t::gevten

Core Interrupt Mask Register Offset: 114h. Fields defined in enum gevten_data.

gsts

volatile u32 dwc_usb3_core_global_regs_t::gsts

Core Status Register Offset: 118h. Fields defined in enum gsts_data.

reserved0

volatile u32 dwc_usb3_core_global_regs_t::reserved0

reserved Offset: 11Ch

gsnpsid

volatile u32 dwc_usb3_core_global_regs_t::gsnpsid

Synopsys ID Register Offset: 120h

ggpio

volatile u32 dwc_usb3_core_global_regs_t::ggpio

General Purpose I/O Register Offset: 124h

guid

volatile u32 dwc_usb3_core_global_regs_t::guid

User ID Register Offset: 128h

reserved1

volatile u32 dwc_usb3_core_global_regs_t::reserved1

reserved Offset: 12Ch

gbuserraddrlo

volatile u32 dwc_usb3_core_global_regs_t::gbuserraddrlo

Bus Error Address Register Offset: 130h

gbuserraddrhi

volatile u32 dwc_usb3_core_global_regs_t::gbuserraddrhi

Bus Error Address Register Offset: 134h

gprtbimap_lo

volatile u32 dwc_usb3_core_global_regs_t::gprtbimap_lo

SS Port to Bus Instance Mapping Register Offset: 138h

gprtbimap_hi

volatile u32 dwc_usb3_core_global_regs_t::gprtbimap_hi

SS Port to Bus Instance Mapping Register Offset: 13Ch

ghwparams0

volatile u32 dwc_usb3_core_global_regs_t::ghwparams0

Hardware Parameter 0 Register Offset: 140h. Fields defined in enum ghwparams0_data.

ghwparams1

volatile u32 dwc_usb3_core_global_regs_t::ghwparams1

Hardware Parameter 1 Register Offset: 144h. Fields defined in enum ghwparams1_data.

ghwparams2

volatile u32 dwc_usb3_core_global_regs_t::ghwparams2

Hardware Parameter 2 Register Offset: 148h. Fields defined in enum ghwparams2_data.

ghwparams3

volatile u32 dwc_usb3_core_global_regs_t::ghwparams3

Hardware Parameter 3 Register Offset: 14Ch. Fields defined in enum ghwparams3_data.

ghwparams4

volatile u32 dwc_usb3_core_global_regs_t::ghwparams4

Hardware Parameter 4 Register Offset: 150h. Fields defined in enum ghwparams4_data.

ghwparams5

volatile u32 dwc_usb3_core_global_regs_t::ghwparams5

Hardware Parameter 5 Register Offset: 154h. Fields defined in enum ghwparams5_data.

ghwparams6

volatile u32 dwc_usb3_core_global_regs_t::ghwparams6

Hardware Parameter 6 Register Offset: 158h. Fields defined in enum ghwparams6_data.

ghwparams7

volatile u32 dwc_usb3_core_global_regs_t::ghwparams7

Hardware Parameter 7 Register Offset: 15Ch. Fields defined in enum ghwparams7_data.

gdbgfifospace

volatile u32 dwc_usb3_core_global_regs_t::gdbgfifospace

Debug Queue/FIFO Space Register Offset: 160h. Fields defined in enum gdbgfifospace_data.

gdbgltssm

volatile u32 dwc_usb3_core_global_regs_t::gdbgltssm

Debug LTSSM Register Offset: 164h. Fields defined in enum gdbgltssm_data

gdbglnmcc

volatile u32 dwc_usb3_core_global_regs_t::gdbglnmcc

Debug LNMCC Register Offset: 168h

gdbgbmu

volatile u32 dwc_usb3_core_global_regs_t::gdbgbmu

Debug BMU Register Offset: 16Ch

gdbglspmux

volatile u32 dwc_usb3_core_global_regs_t::gdbglspmux

Debug LSP Mux Register Offset: 170h

gdbglsp

volatile u32 dwc_usb3_core_global_regs_t::gdbglsp

Debug LSP Register Offset: 174h

gdbgepinfo0

volatile u32 dwc_usb3_core_global_regs_t::gdbgepinfo0

Debug EP Info 0 Register Offset: 178h

gdbgepinfo1

volatile u32 dwc_usb3_core_global_regs_t::gdbgepinfo1

Debug EP Info 1 Register Offset: 17Ch

gprtbimap_hs_lo

volatile u32 dwc_usb3_core_global_regs_t::gprtbimap_hs_lo

HS Port to Bus Instance Mapping Register Offset: 180h

gprtbimap_hs_hi

volatile u32 dwc_usb3_core_global_regs_t::gprtbimap_hs_hi

HS Port to Bus Instance Mapping Register Offset: 184h

gprtbimap_fs_lo

volatile u32 dwc_usb3_core_global_regs_t::gprtbimap_fs_lo

FS Port to Bus Instance Mapping Register Offset: 188h

gprtbimap_fs_hi

volatile u32 dwc_usb3_core_global_regs_t::gprtbimap_fs_hi

FS Port to Bus Instance Mapping Register Offset: 18Ch

reserved4

volatile u32 dwc_usb3_core_global_regs_t::reserved4[12]

reserved Offset: 190h-1BCh

gusb3rmmictl

volatile u32 dwc_usb3_core_global_regs_t::gusb3rmmictl[16]

Global RMMI PHY Control Register Offset: 1C0h-200h

gusb2phycfg

volatile u32 dwc_usb3_core_global_regs_t::gusb2phycfg[16]

USB2 Configuration Registers Offset: 200h-23Ch. Fields defined in enum gusb2phycfg_data.

gusb2i2cctl

volatile u32 dwc_usb3_core_global_regs_t::gusb2i2cctl[16]

USB2 I2C Access Registers Offset: 240h-27Ch. Fields defined in enum gusb2i2cctl_data.

gusb2phyacc

volatile u32 dwc_usb3_core_global_regs_t::gusb2phyacc[16]

USB2 PHY Vendor Control Registers Offset: 280h-2BCh. Fields defined in enum gusb2phyacc_data.

gusb3pipectl

volatile u32 dwc_usb3_core_global_regs_t::gusb3pipectl[16]

USB3 Pipe Control Registers Offset: 2C0h-2FCh. Fields defined in enum gusb3pipectl_data.

gtxfifosiz

volatile u32 dwc_usb3_core_global_regs_t::gtxfifosiz[32]

Transmit FIFO Size Registers Offset: 300h-37Ch.

grxfifosiz

volatile u32 dwc_usb3_core_global_regs_t::grxfifosiz[32]

Receive FIFO Size Registers Offset: 380h-3FC0h.

geventbuf

struct geventbuf_data dwc_usb3_core_global_regs_t::geventbuf[32]

Event Buffer Registers Offset: 400h-5FCh. Fields defined in struct geventbuf_data_t.

ghwparams8

volatile u32 dwc_usb3_core_global_regs_t::ghwparams8

Hardware Parameter 8 Register Offset: 600h. Fields defined in enum ghwparams8_data.