51 #include "../inc/hw_types.h" 52 #include "../inc/hw_uart.h" 53 #include "../inc/hw_memmap.h" 54 #include "../inc/hw_ints.h" 74 #define UART_INT_EOT (UART_IMSC_EOT_M) 75 #define UART_INT_OE (UART_IMSC_OE_M) 76 #define UART_INT_BE (UART_IMSC_BE_M) 77 #define UART_INT_PE (UART_IMSC_PE_M) 78 #define UART_INT_FE (UART_IMSC_FE_M) 79 #define UART_INT_RT (UART_IMSC_RT_M) 80 #define UART_INT_RX (UART_IMSC_RX_M) 81 #define UART_INT_TX (UART_IMSC_TX_M) 82 #define UART_INT_CTS (UART_IMSC_CTSM_M) 83 #define UART_INT_TXDMADONE (UART_IMSC_TXDMADONE_M) 84 #define UART_INT_RXDMADONE (UART_IMSC_RXDMADONE_M) 85 #define UART_INT_LINBRK (UART_IMSC_LINBRK_M) 86 #define UART_INT_LINBRKTOE (UART_IMSC_LINBRKTOE_M) 87 #define UART_INT_LINSYNCTOE (UART_IMSC_LINSYNCTOE_M) 95 #define UART_CONFIG_WLEN_MASK UART_LCRH_WLEN_M 96 #define UART_CONFIG_WLEN_8 UART_LCRH_WLEN_BITL8 97 #define UART_CONFIG_WLEN_7 UART_LCRH_WLEN_BITL7 98 #define UART_CONFIG_WLEN_6 UART_LCRH_WLEN_BITL6 99 #define UART_CONFIG_WLEN_5 UART_LCRH_WLEN_BITL5 100 #define UART_CONFIG_STOP_MASK UART_LCRH_STP2_M 101 #define UART_CONFIG_STOP_ONE 0x00000000 102 #define UART_CONFIG_STOP_TWO UART_LCRH_STP2 103 #define UART_CONFIG_PAR_MASK 0x00000086 104 #define UART_CONFIG_PAR_NONE 0x00000000 105 #define UART_CONFIG_PAR_EVEN 0x00000006 106 #define UART_CONFIG_PAR_ODD 0x00000002 107 #define UART_CONFIG_PAR_ONE 0x00000082 108 #define UART_CONFIG_PAR_ZERO 0x00000086 115 #define UART_FIFO_TX2_8 UART_IFLS_TXSEL_QUARTER 116 #define UART_FIFO_TX4_8 UART_IFLS_TXSEL_HALF 117 #define UART_FIFO_TX6_8 UART_IFLS_TXSEL_THREEQU 124 #define UART_FIFO_RX2_8 UART_IFLS_RXSEL_QUARTER 125 #define UART_FIFO_RX4_8 UART_IFLS_RXSEL_HALF 126 #define UART_FIFO_RX6_8 UART_IFLS_RXSEL_THREEQU 133 #define UART_DMA_ERR_RXSTOP 0x00000004 134 #define UART_DMA_TX 0x00000002 135 #define UART_DMA_RX 0x00000001 142 #define UART_LIN_DELIM_LEN1BIT UART_LCRH_DELIM_LEN_1 143 #define UART_LIN_DELIM_LEN2BIT UART_LCRH_DELIM_LEN_2 144 #define UART_LIN_DELIM_LEN3BIT UART_LCRH_DELIM_LEN_3 145 #define UART_LIN_DELIM_LEN4BIT UART_LCRH_DELIM_LEN_4 152 #define UART_RXERROR_OVERRUN 0x00000008 153 #define UART_RXERROR_BREAK 0x00000004 154 #define UART_RXERROR_PARITY 0x00000002 155 #define UART_RXERROR_FRAMING 0x00000001 190 HWREG(base + UART_O_IFLS) = txLevel | rxLevel;
225 extern void UARTConfigSetExpClk(uint32_t base, uint32_t UARTClkFreq, uint32_t baudFreq, uint32_t config);
255 HWREG(base + UART_O_LCRH) |= UART_LCRH_FEN;
272 HWREG(base + UART_O_LCRH) &= ~(UART_LCRH_FEN);
292 return ((HWREG(base + UART_O_FR) & UART_FR_RXFE) ?
false :
true);
315 return (HWREGB(base + UART_O_DR));
350 return ((HWREG(base + UART_O_FR) & UART_FR_TXFF) ?
false :
true);
374 HWREG(base + UART_O_DR) = data;
391 extern void UARTPutChar(uint32_t base, uint8_t data);
412 return ((HWREG(base + UART_O_FR) & UART_FR_BUSY) ?
true :
false);
447 HWREG(base + UART_O_IMSC) |= intFlags;
481 HWREG(base + UART_O_IMSC) &= ~(intFlags);
520 return (HWREG(base + UART_O_MIS));
524 return (HWREG(base + UART_O_RIS));
575 HWREG(base + UART_O_ICR) = intFlags;
602 HWREG(base + UART_O_DMACTL) |= dmaFlags;
625 HWREG(base + UART_O_DMACTL) &= ~dmaFlags;
650 return (HWREG(base + UART_O_RSR_ECR) & 0x0000000F);
671 HWREG(base + UART_O_RSR_ECR) = 0;
687 HWREG(base + UART_O_CTL) |= (UART_CTL_CTSEN);
703 HWREG(base + UART_O_CTL) |= (UART_CTL_RTSEN);
719 HWREG(base + UART_O_CTL) &= ~(UART_CTL_CTSEN);
735 HWREG(base + UART_O_CTL) &= ~(UART_CTL_RTSEN);
752 HWREG(base + UART_O_CTL) |= UART_CTL_LINEN;
769 HWREG(base + UART_O_CTL) &= ~(UART_CTL_LINEN);
790 HWREG(base + UART_O_CTL) |= UART_CTL_DORMEN;
811 HWREG(base + UART_O_CTL) &= ~(UART_CTL_DORMEN);
850 HWREG(base + UART_O_LCRH) |= UART_LCRH_TXBRKSYNC;
868 HWREG(base + UART_O_LCRH) &= ~(UART_LCRH_TXBRKSYNC);
__STATIC_INLINE void UARTPutCharNonBlocking(uint32_t base, uint8_t data)
Sends a character to the specified port.
Definition: uart.h:371
#define UART_FIFO_RX2_8
Receive interrupt at 1/4 Full.
Definition: uart.h:124
__STATIC_INLINE uint32_t UARTIntStatus(uint32_t base, bool masked)
Gets the current interrupt status.
Definition: uart.h:514
__STATIC_INLINE uint8_t UARTGetCharNonBlocking(uint32_t base)
Receives a character from the specified port.
Definition: uart.h:312
__STATIC_INLINE void UARTSetFifoLevel(uint32_t base, uint32_t txLevel, uint32_t rxLevel)
Sets the FIFO level at which interrupts are generated.
Definition: uart.h:183
__STATIC_INLINE void UARTEnableInt(uint32_t base, uint32_t intFlags)
Enables individual UART interrupt sources.
Definition: uart.h:444
#define UART_FIFO_RX6_8
Receive interrupt at 3/4 Full.
Definition: uart.h:126
__STATIC_INLINE bool UARTBusy(uint32_t base)
Determines whether the UART transmitter is busy or not.
Definition: uart.h:409
__STATIC_INLINE void UARTDisableCTS(uint32_t base)
Disable CTS flow control.
Definition: uart.h:717
void UARTSetLINDelimiterLength(uint32_t base, uint32_t length)
Sets the delimiter length for UART in LIN mode.
Definition: uart.c:114
__STATIC_INLINE void UARTDisableFIFO(uint32_t base)
Disables the transmit and receive FIFOs.
Definition: uart.h:269
__STATIC_INLINE void UARTClearInt(uint32_t base, uint32_t intFlags)
Clears UART interrupt sources.
Definition: uart.h:572
__STATIC_INLINE void UARTDisableLINDormant(uint32_t base)
Disables dormant mode for UART in LIN mode.
Definition: uart.h:808
__STATIC_INLINE void UARTEnableLINDormant(uint32_t base)
Enables dormant mode for UART in LIN mode.
Definition: uart.h:787
__STATIC_INLINE void UARTEnableLINBreakSync(uint32_t base)
Enables sending Break/Sync field for UART in LIN mode.
Definition: uart.h:848
void UARTDisable(uint32_t base)
Disables transmitting and receiving.
Definition: uart.c:69
__STATIC_INLINE void UARTEnableFifo(uint32_t base)
Enables the transmit and receive FIFOs.
Definition: uart.h:252
__STATIC_INLINE void UARTDisableDMA(uint32_t base, uint32_t dmaFlags)
Disable UART DMA operation.
Definition: uart.h:622
#define ASSERT(expr)
Definition: debug.h:71
void UARTPutChar(uint32_t base, uint8_t data)
Waits to send a character to the specified port.
Definition: uart.c:100
#define UART_FIFO_TX6_8
Transmit interrupt at 3/4 Full.
Definition: uart.h:117
__STATIC_INLINE bool UARTSpaceAvailable(uint32_t base)
Determines if there is any space in the transmit FIFO.
Definition: uart.h:347
#define UART_FIFO_TX4_8
Transmit interrupt at 1/2 Full.
Definition: uart.h:116
uint8_t UARTGetChar(uint32_t base)
Waits for a character from the specified port.
Definition: uart.c:86
#define UART_FIFO_RX4_8
Receive interrupt at 1/2 Full.
Definition: uart.h:125
__STATIC_INLINE void UARTDisableInt(uint32_t base, uint32_t intFlags)
Disables individual UART interrupt sources.
Definition: uart.h:478
__STATIC_INLINE bool UARTCharAvailable(uint32_t base)
Determines if there are any characters in the receive FIFO.
Definition: uart.h:289
#define UART_FIFO_TX2_8
Transmit interrupt at 1/4 Full.
Definition: uart.h:115
__STATIC_INLINE void UARTDisableLINBreakSync(uint32_t base)
Disables sending Break/Sync field for UART in LIN mode.
Definition: uart.h:866
void UARTConfigSetExpClk(uint32_t base, uint32_t UARTClkFreq, uint32_t baudFreq, uint32_t config)
Sets the configuration of a UART.
Definition: uart.c:43
#define __STATIC_INLINE
Definition: cmsis_gcc.h:47
__STATIC_INLINE void UARTEnableDMA(uint32_t base, uint32_t dmaFlags)
Enable UART DMA operation.
Definition: uart.h:599
__STATIC_INLINE void UARTClearRxError(uint32_t base)
Clears all reported receiver errors.
Definition: uart.h:667
__STATIC_INLINE void UARTEnableLIN(uint32_t base)
Enables LIN mode for UART.
Definition: uart.h:749
__STATIC_INLINE void UARTDisableLIN(uint32_t base)
Disables LIN mode for UART.
Definition: uart.h:766
__STATIC_INLINE uint32_t UARTGetRxError(uint32_t base)
Gets current receiver errors.
Definition: uart.h:647
__STATIC_INLINE void UARTEnableRTS(uint32_t base)
Enable RTS flow control.
Definition: uart.h:701
__STATIC_INLINE void UARTEnableCTS(uint32_t base)
Enable CTS flow control.
Definition: uart.h:685
__STATIC_INLINE void UARTDisableRTS(uint32_t base)
Disable RTS flow control.
Definition: uart.h:733