CC27xxDriverLibrary
uart.h
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1 
2 /******************************************************************************
3  * Filename: uart.h
4  *
5  * Description: Defines and prototypes for the UART peripheral.
6  *
7  * Copyright (c) 2022-2025 Texas Instruments Incorporated
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions are met:
11  *
12  * 1) Redistributions of source code must retain the above copyright notice,
13  * this list of conditions and the following disclaimer.
14  *
15  * 2) Redistributions in binary form must reproduce the above copyright notice,
16  * this list of conditions and the following disclaimer in the documentation
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18  *
19  * 3) Neither the name of the copyright holder nor the names of its
20  * contributors may be used to endorse or promote products derived from this
21  * software without specific prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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32  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33  * POSSIBILITY OF SUCH DAMAGE.
34  *
35  ******************************************************************************/
36 
37 #ifndef __UART_H__
38 #define __UART_H__
39 
40 //*****************************************************************************
41 //
46 //
47 //*****************************************************************************
48 
49 #include <stdbool.h>
50 #include <stdint.h>
51 #include "../inc/hw_types.h"
52 #include "../inc/hw_uart.h"
53 #include "../inc/hw_memmap.h"
54 #include "../inc/hw_ints.h"
55 #include "interrupt.h"
56 #include "debug.h"
57 
58 //*****************************************************************************
59 //
60 // If building with a C++ compiler, make all of the definitions in this header
61 // have a C binding.
62 //
63 //*****************************************************************************
64 #ifdef __cplusplus
65 extern "C" {
66 #endif
67 
68 //*****************************************************************************
69 //
70 // Values that can be passed to UARTEnableInt, UARTDisableInt, and UARTClearInt
71 // as the intFlags parameter, and returned from UARTIntStatus.
72 //
73 //*****************************************************************************
74 #define UART_INT_EOT (UART_IMSC_EOT_M)
75 #define UART_INT_OE (UART_IMSC_OE_M)
76 #define UART_INT_BE (UART_IMSC_BE_M)
77 #define UART_INT_PE (UART_IMSC_PE_M)
78 #define UART_INT_FE (UART_IMSC_FE_M)
79 #define UART_INT_RT (UART_IMSC_RT_M)
80 #define UART_INT_RX (UART_IMSC_RX_M)
81 #define UART_INT_TX (UART_IMSC_TX_M)
82 #define UART_INT_CTS (UART_IMSC_CTSM_M)
83 #define UART_INT_TXDMADONE (UART_IMSC_TXDMADONE_M)
84 #define UART_INT_RXDMADONE (UART_IMSC_RXDMADONE_M)
85 #define UART_INT_LINBRK (UART_IMSC_LINBRK_M)
86 #define UART_INT_LINBRKTOE (UART_IMSC_LINBRKTOE_M)
87 #define UART_INT_LINSYNCTOE (UART_IMSC_LINSYNCTOE_M)
88 
89 //*****************************************************************************
90 //
91 // Values that can be passed to UARTConfigSetExpClk as the config parameter
92 // and returned by UARTConfigGetExpClk in the pconfig parameter.
93 //
94 //*****************************************************************************
95 #define UART_CONFIG_WLEN_MASK UART_LCRH_WLEN_M
96 #define UART_CONFIG_WLEN_8 UART_LCRH_WLEN_BITL8
97 #define UART_CONFIG_WLEN_7 UART_LCRH_WLEN_BITL7
98 #define UART_CONFIG_WLEN_6 UART_LCRH_WLEN_BITL6
99 #define UART_CONFIG_WLEN_5 UART_LCRH_WLEN_BITL5
100 #define UART_CONFIG_STOP_MASK UART_LCRH_STP2_M
101 #define UART_CONFIG_STOP_ONE 0x00000000
102 #define UART_CONFIG_STOP_TWO UART_LCRH_STP2
103 #define UART_CONFIG_PAR_MASK 0x00000086
104 #define UART_CONFIG_PAR_NONE 0x00000000
105 #define UART_CONFIG_PAR_EVEN 0x00000006
106 #define UART_CONFIG_PAR_ODD 0x00000002
107 #define UART_CONFIG_PAR_ONE 0x00000082
108 #define UART_CONFIG_PAR_ZERO 0x00000086
109 
110 //*****************************************************************************
111 //
112 // Values that can be passed to UARTSetFifoLevel as the txLevel parameter
113 //
114 //*****************************************************************************
115 #define UART_FIFO_TX2_8 UART_IFLS_TXSEL_QUARTER
116 #define UART_FIFO_TX4_8 UART_IFLS_TXSEL_HALF
117 #define UART_FIFO_TX6_8 UART_IFLS_TXSEL_THREEQU
118 
119 //*****************************************************************************
120 //
121 // Values that can be passed to UARTSetFifoLevel as the rxLevel parameter
122 //
123 //*****************************************************************************
124 #define UART_FIFO_RX2_8 UART_IFLS_RXSEL_QUARTER
125 #define UART_FIFO_RX4_8 UART_IFLS_RXSEL_HALF
126 #define UART_FIFO_RX6_8 UART_IFLS_RXSEL_THREEQU
127 
128 //*****************************************************************************
129 //
130 // Values that can be passed to UARTEnableDMA() and UARTDisableDMA().
131 //
132 //*****************************************************************************
133 #define UART_DMA_ERR_RXSTOP 0x00000004
134 #define UART_DMA_TX 0x00000002
135 #define UART_DMA_RX 0x00000001
136 
137 //*****************************************************************************
138 //
139 // Values that can be passed to UARTSetLINDelimiterLength().
140 //
141 //*****************************************************************************
142 #define UART_LIN_DELIM_LEN1BIT UART_LCRH_DELIM_LEN_1
143 #define UART_LIN_DELIM_LEN2BIT UART_LCRH_DELIM_LEN_2
144 #define UART_LIN_DELIM_LEN3BIT UART_LCRH_DELIM_LEN_3
145 #define UART_LIN_DELIM_LEN4BIT UART_LCRH_DELIM_LEN_4
146 
147 //*****************************************************************************
148 //
149 // Values returned from UARTGetRxError().
150 //
151 //*****************************************************************************
152 #define UART_RXERROR_OVERRUN 0x00000008
153 #define UART_RXERROR_BREAK 0x00000004
154 #define UART_RXERROR_PARITY 0x00000002
155 #define UART_RXERROR_FRAMING 0x00000001
156 
157 //*****************************************************************************
158 //
159 // API Functions and prototypes
160 //
161 //*****************************************************************************
162 
163 //*****************************************************************************
164 //
181 //
182 //*****************************************************************************
183 __STATIC_INLINE void UARTSetFifoLevel(uint32_t base, uint32_t txLevel, uint32_t rxLevel)
184 {
185  // Check the arguments.
186  ASSERT((txLevel == UART_FIFO_TX2_8) || (txLevel == UART_FIFO_TX4_8) || (txLevel == UART_FIFO_TX6_8));
187  ASSERT((rxLevel == UART_FIFO_RX2_8) || (rxLevel == UART_FIFO_RX4_8) || (rxLevel == UART_FIFO_RX6_8));
188 
189  // Set the FIFO interrupt levels.
190  HWREG(base + UART_O_IFLS) = txLevel | rxLevel;
191 }
192 
193 //*****************************************************************************
194 //
223 //
224 //*****************************************************************************
225 extern void UARTConfigSetExpClk(uint32_t base, uint32_t UARTClkFreq, uint32_t baudFreq, uint32_t config);
226 
227 //*****************************************************************************
228 //
237 //
238 //*****************************************************************************
239 extern void UARTDisable(uint32_t base);
240 
241 //*****************************************************************************
242 //
250 //
251 //*****************************************************************************
252 __STATIC_INLINE void UARTEnableFifo(uint32_t base)
253 {
254  // Enable the FIFO.
255  HWREG(base + UART_O_LCRH) |= UART_LCRH_FEN;
256 }
257 
258 //*****************************************************************************
259 //
267 //
268 //*****************************************************************************
269 __STATIC_INLINE void UARTDisableFIFO(uint32_t base)
270 {
271  // Disable the FIFO.
272  HWREG(base + UART_O_LCRH) &= ~(UART_LCRH_FEN);
273 }
274 
275 //*****************************************************************************
276 //
287 //
288 //*****************************************************************************
290 {
291  // Return the availability of characters.
292  return ((HWREG(base + UART_O_FR) & UART_FR_RXFE) ? false : true);
293 }
294 
295 //*****************************************************************************
296 //
310 //
311 //*****************************************************************************
313 {
314  // Return a character from the data register
315  return (HWREGB(base + UART_O_DR));
316 }
317 
318 //*****************************************************************************
319 //
329 //
330 //*****************************************************************************
331 extern uint8_t UARTGetChar(uint32_t base);
332 
333 //*****************************************************************************
334 //
345 //
346 //*****************************************************************************
348 {
349  // Return the availability of space.
350  return ((HWREG(base + UART_O_FR) & UART_FR_TXFF) ? false : true);
351 }
352 
353 //*****************************************************************************
354 //
369 //
370 //*****************************************************************************
371 __STATIC_INLINE void UARTPutCharNonBlocking(uint32_t base, uint8_t data)
372 {
373  // Write this character to the transmit FIFO.
374  HWREG(base + UART_O_DR) = data;
375 }
376 
377 //*****************************************************************************
378 //
389 //
390 //*****************************************************************************
391 extern void UARTPutChar(uint32_t base, uint8_t data);
392 
393 //*****************************************************************************
394 //
407 //
408 //*****************************************************************************
409 __STATIC_INLINE bool UARTBusy(uint32_t base)
410 {
411  // Determine if the UART is busy.
412  return ((HWREG(base + UART_O_FR) & UART_FR_BUSY) ? true : false);
413 }
414 
415 //*****************************************************************************
416 //
442 //
443 //*****************************************************************************
444 __STATIC_INLINE void UARTEnableInt(uint32_t base, uint32_t intFlags)
445 {
446  // Enable the specified interrupts.
447  HWREG(base + UART_O_IMSC) |= intFlags;
448 }
449 
450 //*****************************************************************************
451 //
476 //
477 //*****************************************************************************
478 __STATIC_INLINE void UARTDisableInt(uint32_t base, uint32_t intFlags)
479 {
480  // Disable the specified interrupts.
481  HWREG(base + UART_O_IMSC) &= ~(intFlags);
482 }
483 
484 //*****************************************************************************
485 //
512 //
513 //*****************************************************************************
514 __STATIC_INLINE uint32_t UARTIntStatus(uint32_t base, bool masked)
515 {
516  // Return either the interrupt status or the raw interrupt status as
517  // requested.
518  if (masked)
519  {
520  return (HWREG(base + UART_O_MIS));
521  }
522  else
523  {
524  return (HWREG(base + UART_O_RIS));
525  }
526 }
527 
528 //*****************************************************************************
529 //
570 //
571 //*****************************************************************************
572 __STATIC_INLINE void UARTClearInt(uint32_t base, uint32_t intFlags)
573 {
574  // Clear the requested interrupt sources
575  HWREG(base + UART_O_ICR) = intFlags;
576 }
577 
578 //*****************************************************************************
579 //
597 //
598 //*****************************************************************************
599 __STATIC_INLINE void UARTEnableDMA(uint32_t base, uint32_t dmaFlags)
600 {
601  // Set the requested bits in the UART DMA control register.
602  HWREG(base + UART_O_DMACTL) |= dmaFlags;
603 }
604 
605 //*****************************************************************************
606 //
620 //
621 //*****************************************************************************
622 __STATIC_INLINE void UARTDisableDMA(uint32_t base, uint32_t dmaFlags)
623 {
624  // Clear the requested bits in the UART DMA control register.
625  HWREG(base + UART_O_DMACTL) &= ~dmaFlags;
626 }
627 
628 //*****************************************************************************
629 //
645 //
646 //*****************************************************************************
647 __STATIC_INLINE uint32_t UARTGetRxError(uint32_t base)
648 {
649  // Return the current value of the receive status register.
650  return (HWREG(base + UART_O_RSR_ECR) & 0x0000000F);
651 }
652 
653 //*****************************************************************************
654 //
665 //
666 //*****************************************************************************
668 {
669  // Any write to the Error Clear Register will clear all bits which are
670  // currently set.
671  HWREG(base + UART_O_RSR_ECR) = 0;
672 }
673 
674 //*****************************************************************************
675 //
683 //
684 //*****************************************************************************
685 __STATIC_INLINE void UARTEnableCTS(uint32_t base)
686 {
687  HWREG(base + UART_O_CTL) |= (UART_CTL_CTSEN);
688 }
689 
690 //*****************************************************************************
691 //
699 //
700 //*****************************************************************************
701 __STATIC_INLINE void UARTEnableRTS(uint32_t base)
702 {
703  HWREG(base + UART_O_CTL) |= (UART_CTL_RTSEN);
704 }
705 
706 //*****************************************************************************
707 //
715 //
716 //*****************************************************************************
717 __STATIC_INLINE void UARTDisableCTS(uint32_t base)
718 {
719  HWREG(base + UART_O_CTL) &= ~(UART_CTL_CTSEN);
720 }
721 
722 //*****************************************************************************
723 //
731 //
732 //*****************************************************************************
733 __STATIC_INLINE void UARTDisableRTS(uint32_t base)
734 {
735  HWREG(base + UART_O_CTL) &= ~(UART_CTL_RTSEN);
736 }
737 
738 //*****************************************************************************
739 //
747 //
748 //*****************************************************************************
749 __STATIC_INLINE void UARTEnableLIN(uint32_t base)
750 {
751  // Set the LINEN bit in the UART CTL register.
752  HWREG(base + UART_O_CTL) |= UART_CTL_LINEN;
753 }
754 
755 //*****************************************************************************
756 //
764 //
765 //*****************************************************************************
766 __STATIC_INLINE void UARTDisableLIN(uint32_t base)
767 {
768  // Clear the LINEN bit in the UART CTL register.
769  HWREG(base + UART_O_CTL) &= ~(UART_CTL_LINEN);
770 }
771 
772 //*****************************************************************************
773 //
785 //
786 //*****************************************************************************
788 {
789  // Set the DORMEN bit in the UART CTL register.
790  HWREG(base + UART_O_CTL) |= UART_CTL_DORMEN;
791 }
792 
793 //*****************************************************************************
794 //
806 //
807 //*****************************************************************************
809 {
810  // Clear the DORMEN bit in the UART CTL register.
811  HWREG(base + UART_O_CTL) &= ~(UART_CTL_DORMEN);
812 }
813 
814 //*****************************************************************************
815 //
831 //
832 //*****************************************************************************
833 extern void UARTSetLINDelimiterLength(uint32_t base, uint32_t length);
834 
835 //*****************************************************************************
836 //
846 //
847 //*****************************************************************************
849 {
850  HWREG(base + UART_O_LCRH) |= UART_LCRH_TXBRKSYNC;
851 }
852 
853 //*****************************************************************************
854 //
864 //
865 //*****************************************************************************
867 {
868  HWREG(base + UART_O_LCRH) &= ~(UART_LCRH_TXBRKSYNC);
869 }
870 //*****************************************************************************
871 //
872 // Mark the end of the C bindings section for C++ compilers.
873 //
874 //*****************************************************************************
875 #ifdef __cplusplus
876 }
877 #endif
878 
879 //*****************************************************************************
880 //
884 //
885 //*****************************************************************************
886 
887 #endif // __UART_H__
__STATIC_INLINE void UARTPutCharNonBlocking(uint32_t base, uint8_t data)
Sends a character to the specified port.
Definition: uart.h:371
#define UART_FIFO_RX2_8
Receive interrupt at 1/4 Full.
Definition: uart.h:124
__STATIC_INLINE uint32_t UARTIntStatus(uint32_t base, bool masked)
Gets the current interrupt status.
Definition: uart.h:514
__STATIC_INLINE uint8_t UARTGetCharNonBlocking(uint32_t base)
Receives a character from the specified port.
Definition: uart.h:312
__STATIC_INLINE void UARTSetFifoLevel(uint32_t base, uint32_t txLevel, uint32_t rxLevel)
Sets the FIFO level at which interrupts are generated.
Definition: uart.h:183
__STATIC_INLINE void UARTEnableInt(uint32_t base, uint32_t intFlags)
Enables individual UART interrupt sources.
Definition: uart.h:444
#define UART_FIFO_RX6_8
Receive interrupt at 3/4 Full.
Definition: uart.h:126
__STATIC_INLINE bool UARTBusy(uint32_t base)
Determines whether the UART transmitter is busy or not.
Definition: uart.h:409
__STATIC_INLINE void UARTDisableCTS(uint32_t base)
Disable CTS flow control.
Definition: uart.h:717
void UARTSetLINDelimiterLength(uint32_t base, uint32_t length)
Sets the delimiter length for UART in LIN mode.
Definition: uart.c:114
__STATIC_INLINE void UARTDisableFIFO(uint32_t base)
Disables the transmit and receive FIFOs.
Definition: uart.h:269
__STATIC_INLINE void UARTClearInt(uint32_t base, uint32_t intFlags)
Clears UART interrupt sources.
Definition: uart.h:572
__STATIC_INLINE void UARTDisableLINDormant(uint32_t base)
Disables dormant mode for UART in LIN mode.
Definition: uart.h:808
__STATIC_INLINE void UARTEnableLINDormant(uint32_t base)
Enables dormant mode for UART in LIN mode.
Definition: uart.h:787
__STATIC_INLINE void UARTEnableLINBreakSync(uint32_t base)
Enables sending Break/Sync field for UART in LIN mode.
Definition: uart.h:848
void UARTDisable(uint32_t base)
Disables transmitting and receiving.
Definition: uart.c:69
__STATIC_INLINE void UARTEnableFifo(uint32_t base)
Enables the transmit and receive FIFOs.
Definition: uart.h:252
__STATIC_INLINE void UARTDisableDMA(uint32_t base, uint32_t dmaFlags)
Disable UART DMA operation.
Definition: uart.h:622
#define ASSERT(expr)
Definition: debug.h:71
void UARTPutChar(uint32_t base, uint8_t data)
Waits to send a character to the specified port.
Definition: uart.c:100
#define UART_FIFO_TX6_8
Transmit interrupt at 3/4 Full.
Definition: uart.h:117
__STATIC_INLINE bool UARTSpaceAvailable(uint32_t base)
Determines if there is any space in the transmit FIFO.
Definition: uart.h:347
#define UART_FIFO_TX4_8
Transmit interrupt at 1/2 Full.
Definition: uart.h:116
uint8_t UARTGetChar(uint32_t base)
Waits for a character from the specified port.
Definition: uart.c:86
#define UART_FIFO_RX4_8
Receive interrupt at 1/2 Full.
Definition: uart.h:125
__STATIC_INLINE void UARTDisableInt(uint32_t base, uint32_t intFlags)
Disables individual UART interrupt sources.
Definition: uart.h:478
__STATIC_INLINE bool UARTCharAvailable(uint32_t base)
Determines if there are any characters in the receive FIFO.
Definition: uart.h:289
#define UART_FIFO_TX2_8
Transmit interrupt at 1/4 Full.
Definition: uart.h:115
__STATIC_INLINE void UARTDisableLINBreakSync(uint32_t base)
Disables sending Break/Sync field for UART in LIN mode.
Definition: uart.h:866
void UARTConfigSetExpClk(uint32_t base, uint32_t UARTClkFreq, uint32_t baudFreq, uint32_t config)
Sets the configuration of a UART.
Definition: uart.c:43
#define __STATIC_INLINE
Definition: cmsis_gcc.h:47
__STATIC_INLINE void UARTEnableDMA(uint32_t base, uint32_t dmaFlags)
Enable UART DMA operation.
Definition: uart.h:599
__STATIC_INLINE void UARTClearRxError(uint32_t base)
Clears all reported receiver errors.
Definition: uart.h:667
__STATIC_INLINE void UARTEnableLIN(uint32_t base)
Enables LIN mode for UART.
Definition: uart.h:749
__STATIC_INLINE void UARTDisableLIN(uint32_t base)
Disables LIN mode for UART.
Definition: uart.h:766
__STATIC_INLINE uint32_t UARTGetRxError(uint32_t base)
Gets current receiver errors.
Definition: uart.h:647
__STATIC_INLINE void UARTEnableRTS(uint32_t base)
Enable RTS flow control.
Definition: uart.h:701
__STATIC_INLINE void UARTEnableCTS(uint32_t base)
Enable CTS flow control.
Definition: uart.h:685
__STATIC_INLINE void UARTDisableRTS(uint32_t base)
Disable RTS flow control.
Definition: uart.h:733