Data Fields
CAN_MsgRamConfig Struct Reference

CAN Message RAM configuration. More...

#include <CAN.h>

Collaboration diagram for CAN_MsgRamConfig:
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Data Fields

uint32_t stdFilterNum
 
uint32_t extFilterNum
 
MCAN_StdMsgIDFilterElementstdMsgIDFilterList
 
MCAN_ExtMsgIDFilterElementextMsgIDFilterList
 
uint32_t rxFifoNum [2]
 
uint32_t rxBufNum
 
uint32_t txBufNum
 
uint32_t txFifoQNum
 
uint32_t txFifoQMode
 
uint32_t txEventFifoNum
 

Detailed Description

CAN Message RAM configuration.

The CAN_MsgRamConfig structure contains information used to configure the message RAM. All Rx and Tx buffer elements include a 64 byte payload if CAN FD is enabled. Otherwise, they include an 8 byte payload.

This structure needs to be defined before calling CAN_init() and it must not be changed thereafter.

Note
The Rx FIFO operating mode is not configurable and is always set to blocking to allow for message loss to be detected and reported for proper error handling.
See also
CAN_init()

Field Documentation

§ stdFilterNum

uint32_t CAN_MsgRamConfig::stdFilterNum

Number of Standard ID filter elements [0-128]

§ extFilterNum

uint32_t CAN_MsgRamConfig::extFilterNum

Number of Extended ID filter elements [0-64]

§ stdMsgIDFilterList

MCAN_StdMsgIDFilterElement* CAN_MsgRamConfig::stdMsgIDFilterList

Points to Standard ID filter elements. Set to NULL if zero elements.

§ extMsgIDFilterList

MCAN_ExtMsgIDFilterElement* CAN_MsgRamConfig::extMsgIDFilterList

Points to Extended ID filter elements. Set to NULL if zero elements.

§ rxFifoNum

uint32_t CAN_MsgRamConfig::rxFifoNum[2]

Number of Rx FIFO elements [0-64] for FIFO0 and FIFO1 respectively

§ rxBufNum

uint32_t CAN_MsgRamConfig::rxBufNum

Number of dedicated Rx Buffer elements [0-64]

§ txBufNum

uint32_t CAN_MsgRamConfig::txBufNum

Number of dedicated Tx Buffer elements [0-64]

§ txFifoQNum

uint32_t CAN_MsgRamConfig::txFifoQNum

Number of Tx buffer elements [0-64] for Tx FIFO or Queue

§ txFifoQMode

uint32_t CAN_MsgRamConfig::txFifoQMode

Tx FIFO/Queue Mode: 0 = Tx FIFO mode, 1 = Tx Queue mode

§ txEventFifoNum

uint32_t CAN_MsgRamConfig::txEventFifoNum

Number of Tx Event FIFO elements [0-32]


The documentation for this struct was generated from the following file:
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