Detailed Description

GPIO driver implementation for Low Power F3 devices.

============================================================================

The GPIO header file should be included in an application as follows:

Refer to GPIO.h for a complete description of the GPIO driver APIs provided and examples of their use.

The definitions in this file should not be used directly. All GPIO_CFG macros should be used as-is from GPIO.h.

There are no additional configuration values or platform-specific functions for GPIOLPF3.

#include <ti/drivers/GPIO.h>
#include <ti/devices/DeviceFamily.h>
#include <DeviceFamily_constructPath(inc/hw_ioc.h)>

Include dependency graph for GPIOLPF3.h:

This graph shows which files directly or indirectly include this file:

Go to the source code of this file.

Macros
#define	GPIO_CFG_DO_NOT_CONFIG_INTERNAL (0x80000000U)

#define	GPIO_MUX_PORTCFG_PFUNC7 IOC_IOC3_PORTCFG_DTB

#define	GPIO_MUX_PORTCFG_PFUNC6 IOC_IOC3_PORTCFG_ANA

#define	GPIO_MUX_PORTCFG_PFUNC5 IOC_IOC3_PORTCFG_PFUNC5

#define	GPIO_MUX_PORTCFG_PFUNC4 IOC_IOC3_PORTCFG_PFUNC4

#define	GPIO_MUX_PORTCFG_PFUNC3 IOC_IOC3_PORTCFG_PFUNC3

#define	GPIO_MUX_PORTCFG_PFUNC2 IOC_IOC3_PORTCFG_PFUNC2

#define	GPIO_MUX_PORTCFG_PFUNC1 IOC_IOC3_PORTCFG_PFUNC1

#define	GPIO_MUX_GPIO_INTERNAL IOC_IOC3_PORTCFG_BASE

#define	GPIOLPF3_CFG_IOC_M (0xFFFFFFF8U)

#define	GPIO_CFG_INT_LOW_INTERNAL GPIOLPF3_CFG_OPTION_NOT_SUPPORTED

#define	GPIO_CFG_INT_HIGH_INTERNAL GPIOLPF3_CFG_OPTION_NOT_SUPPORTED

#define	GPIO_CFG_NO_DIR_INTERNAL (IOC_IOC3_IOMODE_NORMAL \| GPIOLPF3_CFG_PIN_IS_INPUT_INTERNAL)

#define	GPIO_CFG_INPUT_INTERNAL (IOC_IOC3_IOMODE_NORMAL \| IOC_IOC3_INPEN \| IOC_IOC3_WUENSB \| IOC_IOC3_HYSTEN \| GPIOLPF3_CFG_PIN_IS_INPUT_INTERNAL)

#define	GPIO_CFG_OUTPUT_INTERNAL (IOC_IOC3_IOMODE_NORMAL \| IOC_IOC3_INPEN \| GPIOLPF3_CFG_PIN_IS_OUTPUT_INTERNAL)

#define	GPIO_CFG_OUTPUT_OPEN_DRAIN_INTERNAL (IOC_IOC3_IOMODE_OPEND \| IOC_IOC3_INPEN \| GPIOLPF3_CFG_PIN_IS_OUTPUT_INTERNAL)

#define	GPIO_CFG_OUT_OPEN_SOURCE_INTERNAL (IOC_IOC3_IOMODE_OPENS \| IOC_IOC3_INPEN \| GPIOLPF3_CFG_PIN_IS_OUTPUT_INTERNAL)

#define	GPIO_CFG_PULL_NONE_INTERNAL IOC_IOC3_PULLCTL_PULL_DIS

#define	GPIO_CFG_PULL_UP_INTERNAL IOC_IOC3_PULLCTL_PULL_UP

#define	GPIO_CFG_PULL_DOWN_INTERNAL IOC_IOC3_PULLCTL_PULL_DOWN

#define	GPIO_CFG_INT_NONE_INTERNAL IOC_IOC3_EDGEDET_EDGE_DIS

#define	GPIO_CFG_INT_FALLING_INTERNAL IOC_IOC3_EDGEDET_EDGE_NEG

#define	GPIO_CFG_INT_RISING_INTERNAL IOC_IOC3_EDGEDET_EDGE_POS

#define	GPIO_CFG_INT_BOTH_EDGES_INTERNAL IOC_IOC3_EDGEDET_EDGE_BOTH

#define	GPIO_CFG_INVERT_OFF_INTERNAL (0U)

#define	GPIO_CFG_INVERT_ON_INTERNAL IOC_IOC3_IOMODE_INVERTED

#define	GPIO_CFG_HYSTERESIS_OFF_INTERNAL (0U)

#define	GPIO_CFG_HYSTERESIS_ON_INTERNAL IOC_IOC3_HYSTEN

#define	GPIO_CFG_SHUTDOWN_WAKE_OFF_INTERNAL (0U)

#define	GPIO_CFG_SHUTDOWN_WAKE_HIGH_INTERNAL IOC_IOC3_WUCFGSD_WAKE_HIGH

#define	GPIO_CFG_SHUTDOWN_WAKE_LOW_INTERNAL IOC_IOC3_WUCFGSD_WAKE_LOW

#define	GPIO_CFG_SLEW_NORMAL_INTERNAL IOC_IOC17_SLEWRED_NORMAL

#define	GPIO_CFG_SLEW_REDUCED_INTERNAL IOC_IOC17_SLEWRED_REDUCED

#define	GPIO_CFG_DRVSTR_LOW_INTERNAL IOC_IOC17_IOCURR_CUR_2MA

#define	GPIO_CFG_DRVSTR_MED_INTERNAL IOC_IOC17_IOCURR_CUR_4MA

#define	GPIO_CFG_DRVSTR_HIGH_INTERNAL IOC_IOC17_IOCURR_CUR_8MA

#define	GPIO_CFG_OUTPUT_DEFAULT_HIGH_INTERNAL (0x1U)

#define	GPIO_CFG_OUTPUT_DEFAULT_LOW_INTERNAL (0U)

#define	GPIOLPF3_CFG_PIN_IS_INPUT_INTERNAL (0x2U)

#define	GPIOLPF3_CFG_PIN_IS_OUTPUT_INTERNAL (0U)

#define	GPIO_CFG_INT_ENABLE_INTERNAL (0x4U)

#define	GPIO_CFG_INT_DISABLE_INTERNAL (0U)

Macro Definition Documentation

§ GPIO_CFG_DO_NOT_CONFIG_INTERNAL

#define GPIO_CFG_DO_NOT_CONFIG_INTERNAL (0x80000000U)

§ GPIO_MUX_PORTCFG_PFUNC7

#define GPIO_MUX_PORTCFG_PFUNC7 IOC_IOC3_PORTCFG_DTB

§ GPIO_MUX_PORTCFG_PFUNC6

#define GPIO_MUX_PORTCFG_PFUNC6 IOC_IOC3_PORTCFG_ANA

§ GPIO_MUX_PORTCFG_PFUNC5

#define GPIO_MUX_PORTCFG_PFUNC5 IOC_IOC3_PORTCFG_PFUNC5

§ GPIO_MUX_PORTCFG_PFUNC4

#define GPIO_MUX_PORTCFG_PFUNC4 IOC_IOC3_PORTCFG_PFUNC4

§ GPIO_MUX_PORTCFG_PFUNC3

#define GPIO_MUX_PORTCFG_PFUNC3 IOC_IOC3_PORTCFG_PFUNC3

§ GPIO_MUX_PORTCFG_PFUNC2

#define GPIO_MUX_PORTCFG_PFUNC2 IOC_IOC3_PORTCFG_PFUNC2

§ GPIO_MUX_PORTCFG_PFUNC1

#define GPIO_MUX_PORTCFG_PFUNC1 IOC_IOC3_PORTCFG_PFUNC1

§ GPIO_MUX_GPIO_INTERNAL

#define GPIO_MUX_GPIO_INTERNAL IOC_IOC3_PORTCFG_BASE

§ GPIOLPF3_CFG_IOC_M

#define GPIOLPF3_CFG_IOC_M (0xFFFFFFF8U)

§ GPIO_CFG_INT_LOW_INTERNAL

#define GPIO_CFG_INT_LOW_INTERNAL GPIOLPF3_CFG_OPTION_NOT_SUPPORTED

§ GPIO_CFG_INT_HIGH_INTERNAL

#define GPIO_CFG_INT_HIGH_INTERNAL GPIOLPF3_CFG_OPTION_NOT_SUPPORTED

§ GPIO_CFG_NO_DIR_INTERNAL

#define GPIO_CFG_NO_DIR_INTERNAL (IOC_IOC3_IOMODE_NORMAL | GPIOLPF3_CFG_PIN_IS_INPUT_INTERNAL)

§ GPIO_CFG_INPUT_INTERNAL

#define GPIO_CFG_INPUT_INTERNAL (IOC_IOC3_IOMODE_NORMAL | IOC_IOC3_INPEN | IOC_IOC3_WUENSB | IOC_IOC3_HYSTEN | GPIOLPF3_CFG_PIN_IS_INPUT_INTERNAL)

§ GPIO_CFG_OUTPUT_INTERNAL

#define GPIO_CFG_OUTPUT_INTERNAL (IOC_IOC3_IOMODE_NORMAL | IOC_IOC3_INPEN | GPIOLPF3_CFG_PIN_IS_OUTPUT_INTERNAL)

§ GPIO_CFG_OUTPUT_OPEN_DRAIN_INTERNAL

#define GPIO_CFG_OUTPUT_OPEN_DRAIN_INTERNAL (IOC_IOC3_IOMODE_OPEND | IOC_IOC3_INPEN | GPIOLPF3_CFG_PIN_IS_OUTPUT_INTERNAL)

§ GPIO_CFG_OUT_OPEN_SOURCE_INTERNAL

#define GPIO_CFG_OUT_OPEN_SOURCE_INTERNAL (IOC_IOC3_IOMODE_OPENS | IOC_IOC3_INPEN | GPIOLPF3_CFG_PIN_IS_OUTPUT_INTERNAL)

§ GPIO_CFG_PULL_NONE_INTERNAL

#define GPIO_CFG_PULL_NONE_INTERNAL IOC_IOC3_PULLCTL_PULL_DIS

§ GPIO_CFG_PULL_UP_INTERNAL

#define GPIO_CFG_PULL_UP_INTERNAL IOC_IOC3_PULLCTL_PULL_UP

§ GPIO_CFG_PULL_DOWN_INTERNAL

#define GPIO_CFG_PULL_DOWN_INTERNAL IOC_IOC3_PULLCTL_PULL_DOWN

§ GPIO_CFG_INT_NONE_INTERNAL

#define GPIO_CFG_INT_NONE_INTERNAL IOC_IOC3_EDGEDET_EDGE_DIS

§ GPIO_CFG_INT_FALLING_INTERNAL

#define GPIO_CFG_INT_FALLING_INTERNAL IOC_IOC3_EDGEDET_EDGE_NEG

§ GPIO_CFG_INT_RISING_INTERNAL

#define GPIO_CFG_INT_RISING_INTERNAL IOC_IOC3_EDGEDET_EDGE_POS

§ GPIO_CFG_INT_BOTH_EDGES_INTERNAL

#define GPIO_CFG_INT_BOTH_EDGES_INTERNAL IOC_IOC3_EDGEDET_EDGE_BOTH

§ GPIO_CFG_INVERT_OFF_INTERNAL

#define GPIO_CFG_INVERT_OFF_INTERNAL (0U)

§ GPIO_CFG_INVERT_ON_INTERNAL

#define GPIO_CFG_INVERT_ON_INTERNAL IOC_IOC3_IOMODE_INVERTED

§ GPIO_CFG_HYSTERESIS_OFF_INTERNAL

#define GPIO_CFG_HYSTERESIS_OFF_INTERNAL (0U)

§ GPIO_CFG_HYSTERESIS_ON_INTERNAL

#define GPIO_CFG_HYSTERESIS_ON_INTERNAL IOC_IOC3_HYSTEN

§ GPIO_CFG_SHUTDOWN_WAKE_OFF_INTERNAL

#define GPIO_CFG_SHUTDOWN_WAKE_OFF_INTERNAL (0U)

§ GPIO_CFG_SHUTDOWN_WAKE_HIGH_INTERNAL

#define GPIO_CFG_SHUTDOWN_WAKE_HIGH_INTERNAL IOC_IOC3_WUCFGSD_WAKE_HIGH

§ GPIO_CFG_SHUTDOWN_WAKE_LOW_INTERNAL

#define GPIO_CFG_SHUTDOWN_WAKE_LOW_INTERNAL IOC_IOC3_WUCFGSD_WAKE_LOW

§ GPIO_CFG_SLEW_NORMAL_INTERNAL

#define GPIO_CFG_SLEW_NORMAL_INTERNAL IOC_IOC17_SLEWRED_NORMAL

§ GPIO_CFG_SLEW_REDUCED_INTERNAL

#define GPIO_CFG_SLEW_REDUCED_INTERNAL IOC_IOC17_SLEWRED_REDUCED

§ GPIO_CFG_DRVSTR_LOW_INTERNAL

#define GPIO_CFG_DRVSTR_LOW_INTERNAL IOC_IOC17_IOCURR_CUR_2MA

§ GPIO_CFG_DRVSTR_MED_INTERNAL

#define GPIO_CFG_DRVSTR_MED_INTERNAL IOC_IOC17_IOCURR_CUR_4MA

§ GPIO_CFG_DRVSTR_HIGH_INTERNAL

#define GPIO_CFG_DRVSTR_HIGH_INTERNAL IOC_IOC17_IOCURR_CUR_8MA

§ GPIO_CFG_OUTPUT_DEFAULT_HIGH_INTERNAL

#define GPIO_CFG_OUTPUT_DEFAULT_HIGH_INTERNAL (0x1U)

§ GPIO_CFG_OUTPUT_DEFAULT_LOW_INTERNAL

#define GPIO_CFG_OUTPUT_DEFAULT_LOW_INTERNAL (0U)

§ GPIOLPF3_CFG_PIN_IS_INPUT_INTERNAL

#define GPIOLPF3_CFG_PIN_IS_INPUT_INTERNAL (0x2U)

§ GPIOLPF3_CFG_PIN_IS_OUTPUT_INTERNAL

#define GPIOLPF3_CFG_PIN_IS_OUTPUT_INTERNAL (0U)

§ GPIO_CFG_INT_ENABLE_INTERNAL

#define GPIO_CFG_INT_ENABLE_INTERNAL (0x4U)

§ GPIO_CFG_INT_DISABLE_INTERNAL

#define GPIO_CFG_INT_DISABLE_INTERNAL (0U)