CC27xxDriverLibrary

Structure type to access the Debug Control Block Registers (DCB). More...

#include <core_armv81mml.h>

Data Fields

__IOM uint32_t DHCSR
 
__OM uint32_t DCRSR
 
__IOM uint32_t DCRDR
 
__IOM uint32_t DEMCR
 
__OM uint32_t DSCEMCR
 
__IOM uint32_t DAUTHCTRL
 
__IOM uint32_t DSCSR
 
uint32_t RESERVED0 [1U]
 

Detailed Description

Structure type to access the Debug Control Block Registers (DCB).

Field Documentation

§ DHCSR

__IOM uint32_t DCB_Type::DHCSR

Offset: 0x000 (R/W) Debug Halting Control and Status Register

§ DCRSR

__OM uint32_t DCB_Type::DCRSR

Offset: 0x004 ( /W) Debug Core Register Selector Register

§ DCRDR

__IOM uint32_t DCB_Type::DCRDR

Offset: 0x008 (R/W) Debug Core Register Data Register

§ DEMCR

__IOM uint32_t DCB_Type::DEMCR

Offset: 0x00C (R/W) Debug Exception and Monitor Control Register

§ DSCEMCR

__OM uint32_t DCB_Type::DSCEMCR

Offset: 0x010 ( /W) Debug Set Clear Exception and Monitor Control Register

§ DAUTHCTRL

__IOM uint32_t DCB_Type::DAUTHCTRL

Offset: 0x014 (R/W) Debug Authentication Control Register

§ DSCSR

__IOM uint32_t DCB_Type::DSCSR

Offset: 0x018 (R/W) Debug Security Control and Status Register

§ RESERVED0

uint32_t DCB_Type::RESERVED0

The documentation for this struct was generated from the following files: