60 #include "../inc/hw_ints.h" 61 #include "../inc/hw_memmap.h" 62 #include "../inc/hw_types.h" 63 #include "../inc/hw_spi.h" 73 #define SPI_DMA_DONE_TX SPI_IMASK_DMATX 74 #define SPI_DMA_DONE_RX SPI_IMASK_DMARX 75 #define SPI_IDLE SPI_IMASK_IDLE 76 #define SPI_TXEMPTY SPI_IMASK_TXEMPTY 77 #define SPI_TX SPI_IMASK_TX 80 #define SPI_RTOUT SPI_IMASK_RTOUT 81 #define SPI_PER SPI_IMASK_PER 82 #define SPI_RXFIFO_OVF SPI_IMASK_RXOVF 89 #define SPI_BUSY SPI_STA_BUSY_ACTIVE 90 #define SPI_RX_NOT_FULL SPI_STA_RNF_NOT_FULL 91 #define SPI_RX_EMPTY SPI_STA_RFE_EMPTY 92 #define SPI_TX_NOT_FULL SPI_STA_TNF_NOT_FULL 93 #define SPI_TX_EMPTY SPI_STA_TFE_EMPTY 94 #define SPI_STATUS_MASK 0x0000001F 102 #define SPI_FRF_MOTO_MODE_0 (SPI_CTL0_FRF_MOTOROLA_3WIRE | SPI_CTL0_SPO_LO | SPI_CTL0_SPH_FIRST) 103 #define SPI_FRF_MOTO_MODE_1 (SPI_CTL0_FRF_MOTOROLA_3WIRE | SPI_CTL0_SPO_LO | SPI_CTL0_SPH_SECOND) 105 #define SPI_FRF_MOTO_MODE_2 (SPI_CTL0_FRF_MOTOROLA_3WIRE | SPI_CTL0_SPO_HI | SPI_CTL0_SPH_FIRST) 107 #define SPI_FRF_MOTO_MODE_3 (SPI_CTL0_FRF_MOTOROLA_3WIRE | SPI_CTL0_SPO_HI | SPI_CTL0_SPH_SECOND) 109 #define SPI_FRF_MOTO_MODE_4 (SPI_CTL0_FRF_MOTOROLA_4WIRE | SPI_CTL0_SPO_LO | SPI_CTL0_SPH_FIRST) 111 #define SPI_FRF_MOTO_MODE_5 (SPI_CTL0_FRF_MOTOROLA_4WIRE | SPI_CTL0_SPO_LO | SPI_CTL0_SPH_SECOND) 113 #define SPI_FRF_MOTO_MODE_6 (SPI_CTL0_FRF_MOTOROLA_4WIRE | SPI_CTL0_SPO_HI | SPI_CTL0_SPH_FIRST) 115 #define SPI_FRF_MOTO_MODE_7 (SPI_CTL0_FRF_MOTOROLA_4WIRE | SPI_CTL0_SPO_HI | SPI_CTL0_SPH_SECOND) 118 #define SPI_FRF_TI SPI_CTL0_FRF_TI_SYNC 119 #define SPI_FRF_NMW SPI_CTL0_FRF_MIRCOWIRE 121 #define SPI_MODE_CONTROLLER SPI_CTL1_MS_CONTROLLER 122 #define SPI_MODE_PERIPHERAL SPI_CTL1_MS_PERIPHERAL 123 #define SPI_MODE_PERIPHERAL_OD \ 132 #define SPI_DMA_TX SPI_DMACR_TXEN 133 #define SPI_DMA_RX SPI_DMACR_RXEN 141 #ifdef DRIVERLIB_DEBUG 156 static bool SPIBaseValid(uint32_t base)
158 return (base == SPI0_BASE);
244 ASSERT(SPIBaseValid(base));
247 HWREG(base + SPI_O_CTL1) |= SPI_CTL1_EN_EN;
264 ASSERT(SPIBaseValid(base));
267 HWREG(base + SPI_O_CTL1) &= ~SPI_CTL1_EN_EN;
288 extern void SPIPutData(uint32_t base, uint32_t data);
332 extern void SPIGetData(uint32_t base, uint32_t *data);
377 ASSERT(SPIBaseValid(base));
380 return ((HWREG(base + SPI_O_STA) & SPI_STA_BUSY) ?
true :
false);
404 ASSERT(SPIBaseValid(base));
434 extern void SPIRegisterInt(uint32_t base,
void (*pfnHandler)(
void));
481 ASSERT(SPIBaseValid(base));
484 HWREG(base + SPI_O_IMASK) |= intFlags;
511 ASSERT(SPIBaseValid(base));
514 HWREG(base + SPI_O_IMASK) &= ~intFlags;
560 ASSERT(SPIBaseValid(base));
563 HWREG(base + SPI_O_ICLR) = intFlags;
594 ASSERT(SPIBaseValid(base));
600 return (HWREG(base + SPI_O_MIS));
604 return (HWREG(base + SPI_O_RIS));
630 ASSERT(SPIBaseValid(base));
633 HWREG(base + SPI_O_DMACR) |= dmaFlags;
655 ASSERT(SPIBaseValid(base));
658 HWREG(base + SPI_O_DMACR) &= ~dmaFlags;
void SPIGetData(uint32_t base, uint32_t *data)
Gets a data element from the SPI receive FIFO.
Definition: spi.c:162
void SPIUnregisterInt(uint32_t base)
Unregisters an interrupt handler for the Serial Peripheral Interface in the dynamic interrupt table...
Definition: spi.c:217
int32_t SPIPutDataNonBlocking(uint32_t base, uint32_t data)
Puts a data element into the SPI transmit FIFO.
Definition: spi.c:124
__STATIC_INLINE void SPIEnableInt(uint32_t base, uint32_t intFlags)
Enables individual SPI interrupt sources.
Definition: spi.h:478
__STATIC_INLINE void SPIDisableInt(uint32_t base, uint32_t intFlags)
Disables individual SPI interrupt sources.
Definition: spi.h:508
void SPIConfigSetExpClk(uint32_t base, uint32_t spiClk, uint32_t protocol, uint32_t mode, uint32_t bitRate, uint32_t dataWidth)
Configures the serial peripheral port.
Definition: spi.c:96
__STATIC_INLINE void SPIDisableDMA(uint32_t base, uint32_t dmaFlags)
Disable SPI DMA operation.
Definition: spi.h:652
__STATIC_INLINE void SPIEnableDMA(uint32_t base, uint32_t dmaFlags)
Enable SPI DMA operation.
Definition: spi.h:627
void SPIRegisterInt(uint32_t base, void(*pfnHandler)(void))
Registers an interrupt handler for the Serial Peripheral Interface in the dynamic interrupt table...
Definition: spi.c:200
__STATIC_INLINE void SPIEnable(uint32_t base)
Enables the serial peripheral port.
Definition: spi.h:241
#define ASSERT(expr)
Definition: debug.h:71
__STATIC_INLINE void SPIClearInt(uint32_t base, uint32_t intFlags)
Clears SPI interrupt sources.
Definition: spi.h:557
__STATIC_INLINE uint32_t SPIStatus(uint32_t base)
Get the status of the SPI data buffers.
Definition: spi.h:401
#define SPI_STATUS_MASK
Mask for bits above.
Definition: spi.h:94
__STATIC_INLINE uint32_t SPIIntStatus(uint32_t base, bool isMasked)
Gets the current interrupt status.
Definition: spi.h:591
#define __STATIC_INLINE
Definition: cmsis_gcc.h:47
__STATIC_INLINE void SPIDisable(uint32_t base)
Disables the serial peripheral port.
Definition: spi.h:261
void SPIPutData(uint32_t base, uint32_t data)
Puts a data element into the SPI transmit FIFO.
Definition: spi.c:146
__STATIC_INLINE bool SPIBusy(uint32_t base)
Determines whether the SPI transmitter is busy or not.
Definition: spi.h:374
int32_t SPIGetDataNonBlocking(uint32_t base, uint32_t *data)
Gets a data element from the SPI receive FIFO.
Definition: spi.c:178