61 #include "../inc/hw_types.h" 62 #include "../inc/hw_memmap.h" 63 #include "../inc/hw_pmctl.h" 65 #include "../cmsis/cc27xx.h" 66 #include "../cmsis/core/core_cm33.h" 73 #define PMCTL_RESET_SHUTDOWN_IO (PMCTL_RSTSTA_SDDET | PMCTL_RSTSTA_IOWUSD) 74 #define PMCTL_RESET_SHUTDOWN_SWD PMCTL_RSTSTA_SDDET 76 #define PMCTL_RESET_WATCHDOG (PMCTL_RSTSTA_SYSSRC_WDTEV | PMCTL_RSTSTA_RESETSRC_SYSRESET) 78 #define PMCTL_RESET_SYSTEM (PMCTL_RSTSTA_SYSSRC_SYSRSTEV | PMCTL_RSTSTA_RESETSRC_SYSRESET) 80 #define PMCTL_RESET_CPU (PMCTL_RSTSTA_SYSSRC_CPURSTEV | PMCTL_RSTSTA_RESETSRC_SYSRESET) 82 #define PMCTL_RESET_LOCKUP (PMCTL_RSTSTA_SYSSRC_LOCKUPEV | PMCTL_RSTSTA_RESETSRC_SYSRESET) 84 #define PMCTL_RESET_ANALOG_FSM_TIMEOUT (PMCTL_RSTSTA_SYSSRC_AFSMEV | PMCTL_RSTSTA_RESETSRC_SYSRESET) 86 #define PMCTL_RESET_EM_SENSOR (PMCTL_RSTSTA_SYSSRC_EMSEV | PMCTL_RSTSTA_RESETSRC_SYSRESET) 88 #define PMCTL_RESET_TAMPER (PMCTL_RSTSTA_SYSSRC_TAMPEREV | PMCTL_RSTSTA_RESETSRC_SYSRESET) 90 #define PMCTL_RESET_SRAM_PARITY_ERROR (PMCTL_RSTSTA_SYSSRC_SRAMEV | PMCTL_RSTSTA_RESETSRC_SYSRESET) 92 #define PMCTL_RESET_ANALOG_ERROR (PMCTL_RSTSTA_SYSSRC_AERREV | PMCTL_RSTSTA_RESETSRC_SYSRESET) 94 #define PMCTL_RESET_DIGITAL_ERROR (PMCTL_RSTSTA_SYSSRC_DERREV | PMCTL_RSTSTA_RESETSRC_SYSRESET) 96 #define PMCTL_RESET_SWD (PMCTL_RSTSTA_SYSSRC_SWDRSTEV | PMCTL_RSTSTA_RESETSRC_SYSRESET) 98 #define PMCTL_RESET_LFXT (PMCTL_RSTSTA_SYSSRC_LFLOSSEV | PMCTL_RSTSTA_RESETSRC_SYSRESET) 100 #define PMCTL_RESET_TSD (PMCTL_RSTSTA_TSDEV | PMCTL_RSTSTA_RESETSRC_PINRESET) 102 #define PMCTL_RESET_VDDR PMCTL_RSTSTA_RESETSRC_VDDRLOSS 104 #define PMCTL_RESET_VDDS PMCTL_RSTSTA_RESETSRC_VDDSLOSS 106 #define PMCTL_RESET_PIN PMCTL_RSTSTA_RESETSRC_PINRESET 108 #define PMCTL_RESET_POR PMCTL_RSTSTA_RESETSRC_PWRON 117 #define PMCTL_VOLTAGE_REGULATOR_DCDC PMCTL_VDDRCTL_SELECT_DCDC 118 #define PMCTL_VOLTAGE_REGULATOR_GLDO PMCTL_VDDRCTL_SELECT_GLDO 169 return HWREG(PMCTL_BASE + PMCTL_O_RSTSTA) & ~PMCTL_RSTSTA_RTCSTA_M;
185 return (HWREG(PMCTL_BASE + PMCTL_O_RSTSTA) & PMCTL_RSTSTA_RTCSTA_M) == PMCTL_RSTSTA_RTCSTA_CLR;
204 HWREG(PMCTL_BASE + PMCTL_O_RSTCTL) |= PMCTL_RSTCTL_SYSRST_SET;
228 uint32_t tmp = HWREG(PMCTL_BASE + PMCTL_O_VDDRCTL) & ~PMCTL_VDDRCTL_SELECT_M;
229 HWREG(PMCTL_BASE + PMCTL_O_VDDRCTL) = tmp | regulator;
245 return (HWREG(PMCTL_BASE + PMCTL_O_VDDRCTL) & PMCTL_VDDRCTL_SELECT_M);
257 HWREG(PMCTL_BASE + PMCTL_O_AONRSET1) |= PMCTL_AONRSET1_VDDIOPGIO_SET;
271 #define PMCTLGetRtcResetStatus PMCTLGetRtcResetStatus_veneer 274 #define PMCTLEnableVddioGpioPadPower PMCTLEnableVddioGpioPadPower_veneer 295 #endif // __PMCTL_H__ __STATIC_INLINE void PMCTLResetSystem(void)
Issue a system reset.
Definition: pmctl.h:198
__tz_c_veneer void PMCTLEnableVddioGpioPadPower_veneer(void)
Definition: pmctl_veneers.c:46
__tz_c_veneer bool PMCTLGetRtcResetStatus_veneer(void)
Definition: pmctl_veneers.c:41
__STATIC_INLINE uint32_t PMCTLGetVoltageRegulator(void)
Get the current VDDR regulator.
Definition: pmctl.h:243
__STATIC_FORCEINLINE void __disable_irq(void)
Disable IRQ Interrupts.
Definition: cmsis_gcc.h:966
__STATIC_INLINE void PMCTLEnableVddioGpioPadPower(void)
Enable pad power for GPIOs that uses VDDIO.
Definition: pmctl.h:255
__STATIC_INLINE void PMCTLSetVoltageRegulator(uint32_t regulator)
Set the VDDR regulator.
Definition: pmctl.h:224
__STATIC_INLINE uint32_t PMCTLGetResetReason(void)
Get the reason for the system reset.
Definition: pmctl.h:166
#define __STATIC_INLINE
Definition: cmsis_gcc.h:47
__STATIC_INLINE bool PMCTLGetRtcResetStatus(void)
Get the RTC reset status.
Definition: pmctl.h:183