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CC27xxDriverLibrary
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Definitions for base addresses, unions, and structures. More...
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Macros | |
| #define | SCS_BASE (0xE000E000UL) |
| #define | ITM_BASE (0xE0000000UL) |
| #define | DWT_BASE (0xE0001000UL) |
| #define | TPI_BASE (0xE0040000UL) |
| #define | CoreDebug_BASE (0xE000EDF0UL) |
| #define | DCB_BASE (0xE000EDF0UL) |
| #define | DIB_BASE (0xE000EFB0UL) |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| #define | SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| #define | ITM ((ITM_Type *) ITM_BASE ) |
| #define | DWT ((DWT_Type *) DWT_BASE ) |
| #define | TPI ((TPI_Type *) TPI_BASE ) |
| #define | CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
| #define | DCB ((DCB_Type *) DCB_BASE ) |
| #define | DIB ((DIB_Type *) DIB_BASE ) |
| #define | FPU_BASE (SCS_BASE + 0x0F30UL) |
| #define | FPU ((FPU_Type *) FPU_BASE ) |
| #define | SCS_BASE (0xE000E000UL) |
| #define | DWT_BASE (0xE0001000UL) |
| #define | TPI_BASE (0xE0040000UL) |
| #define | CoreDebug_BASE (0xE000EDF0UL) |
| #define | DCB_BASE (0xE000EDF0UL) |
| #define | DIB_BASE (0xE000EFB0UL) |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| #define | DWT ((DWT_Type *) DWT_BASE ) |
| #define | TPI ((TPI_Type *) TPI_BASE ) |
| #define | CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
| #define | DCB ((DCB_Type *) DCB_BASE ) |
| #define | DIB ((DIB_Type *) DIB_BASE ) |
| #define | SCS_BASE (0xE000E000UL) |
| #define | ITM_BASE (0xE0000000UL) |
| #define | DWT_BASE (0xE0001000UL) |
| #define | TPI_BASE (0xE0040000UL) |
| #define | CoreDebug_BASE (0xE000EDF0UL) |
| #define | DCB_BASE (0xE000EDF0UL) |
| #define | DIB_BASE (0xE000EFB0UL) |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| #define | SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| #define | ITM ((ITM_Type *) ITM_BASE ) |
| #define | DWT ((DWT_Type *) DWT_BASE ) |
| #define | TPI ((TPI_Type *) TPI_BASE ) |
| #define | CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
| #define | DCB ((DCB_Type *) DCB_BASE ) |
| #define | DIB ((DIB_Type *) DIB_BASE ) |
| #define | FPU_BASE (SCS_BASE + 0x0F30UL) |
| #define | FPU ((FPU_Type *) FPU_BASE ) |
| #define | SCS_BASE (0xE000E000UL) |
| #define | ITM_BASE (0xE0000000UL) |
| #define | DWT_BASE (0xE0001000UL) |
| #define | TPI_BASE (0xE0040000UL) |
| #define | CoreDebug_BASE (0xE000EDF0UL) |
| #define | DCB_BASE_CMSIS (0xE000EDF0UL) |
| #define | DIB_BASE_CMSIS (0xE000EFB0UL) |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| #define | NVIC_BASE_CMSIS (SCS_BASE + 0x0100UL) |
| #define | SCB_BASE_CMSIS (SCS_BASE + 0x0D00UL) |
| #define | SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
| #define | SCB ((SCB_Type *) SCB_BASE_CMSIS ) |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| #define | NVIC ((NVIC_Type *) NVIC_BASE_CMSIS ) |
| #define | ITM ((ITM_Type *) ITM_BASE ) |
| #define | DWT ((DWT_Type *) DWT_BASE ) |
| #define | TPI ((TPI_Type *) TPI_BASE ) |
| #define | CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
| #define | DCB ((DCB_Type *) DCB_BASE_CMSIS ) |
| #define | DIB ((DIB_Type *) DIB_BASE_CMSIS ) |
| #define | FPU_BASE (SCS_BASE + 0x0F30UL) |
| #define | FPU ((FPU_Type *) FPU_BASE ) |
Definitions for base addresses, unions, and structures.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address
| #define ITM_BASE (0xE0000000UL) |
ITM Base Address
| #define DWT_BASE (0xE0001000UL) |
DWT Base Address
| #define TPI_BASE (0xE0040000UL) |
TPI Base Address
| #define CoreDebug_BASE (0xE000EDF0UL) |
| #define DCB_BASE (0xE000EDF0UL) |
DCB Base Address
| #define DIB_BASE (0xE000EFB0UL) |
DIB Base Address
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address
| #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
System control Register not in SCB
SCB configuration struct
Referenced by __attribute__(), __NVIC_GetPriority(), __NVIC_GetPriorityGrouping(), __NVIC_GetVector(), __NVIC_SetPriority(), __NVIC_SetPriorityGrouping(), __NVIC_SetVector(), __NVIC_SystemReset(), ARM_MPU_Disable(), ARM_MPU_Enable(), IntClearPend(), IntGetPriority(), IntSetPend(), and IntSetPriority().
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct
Referenced by DIB_GetAuthStatus(), IntDisable(), IntEnable(), and IntIsEnabled().
NVIC configuration struct
Referenced by __NVIC_ClearPendingIRQ(), __NVIC_DisableIRQ(), __NVIC_EnableIRQ(), __NVIC_GetActive(), __NVIC_GetEnableIRQ(), __NVIC_GetPendingIRQ(), __NVIC_GetPriority(), __NVIC_SetPendingIRQ(), __NVIC_SetPriority(), IntClearPend(), IntDisable(), IntEnable(), IntGetPend(), IntGetPriority(), IntIsEnabled(), IntSetPend(), and IntSetPriority().
ITM configuration struct
Referenced by ITM_SendChar().
| #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
DCB configuration struct
Referenced by DCB_GetAuthCtrl(), and DCB_SetAuthCtrl().
DIB configuration struct
Referenced by DIB_GetAuthStatus().
| #define FPU_BASE (SCS_BASE + 0x0F30UL) |
Floating Point Unit
Floating Point Unit
Referenced by SCB_GetFPUType(), and SCB_GetMVEType().
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address
| #define DWT_BASE (0xE0001000UL) |
DWT Base Address
| #define TPI_BASE (0xE0040000UL) |
TPI Base Address
| #define CoreDebug_BASE (0xE000EDF0UL) |
| #define DCB_BASE (0xE000EDF0UL) |
DCB Base Address
| #define DIB_BASE (0xE000EFB0UL) |
DIB Base Address
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct
| #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address
| #define ITM_BASE (0xE0000000UL) |
ITM Base Address
| #define DWT_BASE (0xE0001000UL) |
DWT Base Address
| #define TPI_BASE (0xE0040000UL) |
TPI Base Address
| #define CoreDebug_BASE (0xE000EDF0UL) |
| #define DCB_BASE (0xE000EDF0UL) |
DCB Base Address
| #define DIB_BASE (0xE000EFB0UL) |
DIB Base Address
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address
| #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
System control Register not in SCB
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct
| #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
| #define FPU_BASE (SCS_BASE + 0x0F30UL) |
Floating Point Unit
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address
| #define ITM_BASE (0xE0000000UL) |
ITM Base Address
| #define DWT_BASE (0xE0001000UL) |
DWT Base Address
| #define TPI_BASE (0xE0040000UL) |
TPI Base Address
| #define CoreDebug_BASE (0xE000EDF0UL) |
| #define DCB_BASE_CMSIS (0xE000EDF0UL) |
DCB Base Address
| #define DIB_BASE_CMSIS (0xE000EFB0UL) |
DIB Base Address
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address
| #define NVIC_BASE_CMSIS (SCS_BASE + 0x0100UL) |
NVIC Base Address
| #define SCB_BASE_CMSIS (SCS_BASE + 0x0D00UL) |
System Control Block Base Address
| #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
System control Register not in SCB
| #define SCB ((SCB_Type *) SCB_BASE_CMSIS ) |
SCB configuration struct
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct
| #define NVIC ((NVIC_Type *) NVIC_BASE_CMSIS ) |
NVIC configuration struct
| #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
| #define DCB ((DCB_Type *) DCB_BASE_CMSIS ) |
DCB configuration struct
| #define DIB ((DIB_Type *) DIB_BASE_CMSIS ) |
DIB configuration struct
| #define FPU_BASE (SCS_BASE + 0x0F30UL) |
Floating Point Unit