![]() |
![]() |
|
CC27xxDriverLibrary
|
Functions that manage interrupts and exceptions via the NVIC. More...
|
Macros | |
| #define | NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping |
| #define | NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping |
| #define | NVIC_EnableIRQ __NVIC_EnableIRQ |
| #define | NVIC_GetEnableIRQ __NVIC_GetEnableIRQ |
| #define | NVIC_DisableIRQ __NVIC_DisableIRQ |
| #define | NVIC_GetPendingIRQ __NVIC_GetPendingIRQ |
| #define | NVIC_SetPendingIRQ __NVIC_SetPendingIRQ |
| #define | NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ |
| #define | NVIC_GetActive __NVIC_GetActive |
| #define | NVIC_SetPriority __NVIC_SetPriority |
| #define | NVIC_GetPriority __NVIC_GetPriority |
| #define | NVIC_SystemReset __NVIC_SystemReset |
| #define | NVIC_SetVector __NVIC_SetVector |
| #define | NVIC_GetVector __NVIC_GetVector |
| #define | NVIC_USER_IRQ_OFFSET 16 |
| #define | FNC_RETURN (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */ |
| #define | EXC_RETURN_PREFIX (0xFF000000UL) /* bits [31:24] set to indicate an EXC_RETURN value */ |
| #define | EXC_RETURN_S (0x00000040UL) /* bit [6] stack used to push registers: 0=Non-secure 1=Secure */ |
| #define | EXC_RETURN_DCRS (0x00000020UL) /* bit [5] stacking rules for called registers: 0=skipped 1=saved */ |
| #define | EXC_RETURN_FTYPE (0x00000010UL) /* bit [4] allocate stack for floating-point context: 0=done 1=skipped */ |
| #define | EXC_RETURN_MODE (0x00000008UL) /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode */ |
| #define | EXC_RETURN_SPSEL (0x00000004UL) /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP */ |
| #define | EXC_RETURN_ES (0x00000001UL) /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */ |
| #define | EXC_INTEGRITY_SIGNATURE (0xFEFA125BUL) /* Value for processors without floating-point extension */ |
| #define | NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping |
| #define | NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping |
| #define | NVIC_EnableIRQ __NVIC_EnableIRQ |
| #define | NVIC_GetEnableIRQ __NVIC_GetEnableIRQ |
| #define | NVIC_DisableIRQ __NVIC_DisableIRQ |
| #define | NVIC_GetPendingIRQ __NVIC_GetPendingIRQ |
| #define | NVIC_SetPendingIRQ __NVIC_SetPendingIRQ |
| #define | NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ |
| #define | NVIC_GetActive __NVIC_GetActive |
| #define | NVIC_SetPriority __NVIC_SetPriority |
| #define | NVIC_GetPriority __NVIC_GetPriority |
| #define | NVIC_SystemReset __NVIC_SystemReset |
| #define | NVIC_SetVector __NVIC_SetVector |
| #define | NVIC_GetVector __NVIC_GetVector |
| #define | NVIC_USER_IRQ_OFFSET 16 |
| #define | FNC_RETURN (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */ |
| #define | EXC_RETURN_PREFIX (0xFF000000UL) /* bits [31:24] set to indicate an EXC_RETURN value */ |
| #define | EXC_RETURN_S (0x00000040UL) /* bit [6] stack used to push registers: 0=Non-secure 1=Secure */ |
| #define | EXC_RETURN_DCRS (0x00000020UL) /* bit [5] stacking rules for called registers: 0=skipped 1=saved */ |
| #define | EXC_RETURN_FTYPE (0x00000010UL) /* bit [4] allocate stack for floating-point context: 0=done 1=skipped */ |
| #define | EXC_RETURN_MODE (0x00000008UL) /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode */ |
| #define | EXC_RETURN_SPSEL (0x00000004UL) /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP */ |
| #define | EXC_RETURN_ES (0x00000001UL) /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */ |
| #define | EXC_INTEGRITY_SIGNATURE (0xFEFA125BUL) /* Value for processors without floating-point extension */ |
| #define | _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL) |
| #define | _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) ) |
| #define | _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) ) |
| #define | __NVIC_SetPriorityGrouping(X) (void)(X) |
| #define | __NVIC_GetPriorityGrouping() (0U) |
| Get Priority Grouping. More... | |
| #define | NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping |
| #define | NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping |
| #define | NVIC_EnableIRQ __NVIC_EnableIRQ |
| #define | NVIC_GetEnableIRQ __NVIC_GetEnableIRQ |
| #define | NVIC_DisableIRQ __NVIC_DisableIRQ |
| #define | NVIC_GetPendingIRQ __NVIC_GetPendingIRQ |
| #define | NVIC_SetPendingIRQ __NVIC_SetPendingIRQ |
| #define | NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ |
| #define | NVIC_GetActive __NVIC_GetActive |
| #define | NVIC_SetPriority __NVIC_SetPriority |
| #define | NVIC_GetPriority __NVIC_GetPriority |
| #define | NVIC_SystemReset __NVIC_SystemReset |
| #define | NVIC_SetVector __NVIC_SetVector |
| #define | NVIC_GetVector __NVIC_GetVector |
| #define | NVIC_USER_IRQ_OFFSET 16 |
| #define | FNC_RETURN (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */ |
| #define | EXC_RETURN_PREFIX (0xFF000000UL) /* bits [31:24] set to indicate an EXC_RETURN value */ |
| #define | EXC_RETURN_S (0x00000040UL) /* bit [6] stack used to push registers: 0=Non-secure 1=Secure */ |
| #define | EXC_RETURN_DCRS (0x00000020UL) /* bit [5] stacking rules for called registers: 0=skipped 1=saved */ |
| #define | EXC_RETURN_FTYPE (0x00000010UL) /* bit [4] allocate stack for floating-point context: 0=done 1=skipped */ |
| #define | EXC_RETURN_MODE (0x00000008UL) /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode */ |
| #define | EXC_RETURN_SPSEL (0x00000004UL) /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP */ |
| #define | EXC_RETURN_ES (0x00000001UL) /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */ |
| #define | EXC_INTEGRITY_SIGNATURE (0xFEFA125BUL) /* Value for processors without floating-point extension */ |
| #define | NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping |
| #define | NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping |
| #define | NVIC_EnableIRQ __NVIC_EnableIRQ |
| #define | NVIC_GetEnableIRQ __NVIC_GetEnableIRQ |
| #define | NVIC_DisableIRQ __NVIC_DisableIRQ |
| #define | NVIC_GetPendingIRQ __NVIC_GetPendingIRQ |
| #define | NVIC_SetPendingIRQ __NVIC_SetPendingIRQ |
| #define | NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ |
| #define | NVIC_GetActive __NVIC_GetActive |
| #define | NVIC_SetPriority __NVIC_SetPriority |
| #define | NVIC_GetPriority __NVIC_GetPriority |
| #define | NVIC_SystemReset __NVIC_SystemReset |
| #define | NVIC_SetVector __NVIC_SetVector |
| #define | NVIC_GetVector __NVIC_GetVector |
| #define | NVIC_USER_IRQ_OFFSET 16 |
| #define | FNC_RETURN (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */ |
| #define | EXC_RETURN_PREFIX (0xFF000000UL) /* bits [31:24] set to indicate an EXC_RETURN value */ |
| #define | EXC_RETURN_S (0x00000040UL) /* bit [6] stack used to push registers: 0=Non-secure 1=Secure */ |
| #define | EXC_RETURN_DCRS (0x00000020UL) /* bit [5] stacking rules for called registers: 0=skipped 1=saved */ |
| #define | EXC_RETURN_FTYPE (0x00000010UL) /* bit [4] allocate stack for floating-point context: 0=done 1=skipped */ |
| #define | EXC_RETURN_MODE (0x00000008UL) /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode */ |
| #define | EXC_RETURN_SPSEL (0x00000004UL) /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP */ |
| #define | EXC_RETURN_ES (0x00000001UL) /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */ |
| #define | EXC_INTEGRITY_SIGNATURE (0xFEFA125BUL) /* Value for processors without floating-point extension */ |
Functions that manage interrupts and exceptions via the NVIC.
| #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping |
| #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping |
| #define NVIC_EnableIRQ __NVIC_EnableIRQ |
| #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ |
| #define NVIC_DisableIRQ __NVIC_DisableIRQ |
| #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ |
| #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ |
| #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ |
| #define NVIC_GetActive __NVIC_GetActive |
| #define NVIC_SetPriority __NVIC_SetPriority |
Referenced by DIB_GetAuthStatus().
| #define NVIC_GetPriority __NVIC_GetPriority |
| #define NVIC_SystemReset __NVIC_SystemReset |
| #define NVIC_SetVector __NVIC_SetVector |
| #define NVIC_GetVector __NVIC_GetVector |
| #define NVIC_USER_IRQ_OFFSET 16 |
Referenced by __NVIC_GetVector(), and __NVIC_SetVector().
| #define FNC_RETURN (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */ |
| #define EXC_RETURN_PREFIX (0xFF000000UL) /* bits [31:24] set to indicate an EXC_RETURN value */ |
| #define EXC_RETURN_S (0x00000040UL) /* bit [6] stack used to push registers: 0=Non-secure 1=Secure */ |
| #define EXC_RETURN_DCRS (0x00000020UL) /* bit [5] stacking rules for called registers: 0=skipped 1=saved */ |
| #define EXC_RETURN_FTYPE (0x00000010UL) /* bit [4] allocate stack for floating-point context: 0=done 1=skipped */ |
| #define EXC_RETURN_MODE (0x00000008UL) /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode */ |
| #define EXC_RETURN_SPSEL (0x00000004UL) /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP */ |
| #define EXC_RETURN_ES (0x00000001UL) /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */ |
| #define EXC_INTEGRITY_SIGNATURE (0xFEFA125BUL) /* Value for processors without floating-point extension */ |
| #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping |
| #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping |
| #define NVIC_EnableIRQ __NVIC_EnableIRQ |
| #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ |
| #define NVIC_DisableIRQ __NVIC_DisableIRQ |
| #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ |
| #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ |
| #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ |
| #define NVIC_GetActive __NVIC_GetActive |
| #define NVIC_SetPriority __NVIC_SetPriority |
| #define NVIC_GetPriority __NVIC_GetPriority |
| #define NVIC_SystemReset __NVIC_SystemReset |
| #define NVIC_SetVector __NVIC_SetVector |
| #define NVIC_GetVector __NVIC_GetVector |
| #define NVIC_USER_IRQ_OFFSET 16 |
| #define FNC_RETURN (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */ |
| #define EXC_RETURN_PREFIX (0xFF000000UL) /* bits [31:24] set to indicate an EXC_RETURN value */ |
| #define EXC_RETURN_S (0x00000040UL) /* bit [6] stack used to push registers: 0=Non-secure 1=Secure */ |
| #define EXC_RETURN_DCRS (0x00000020UL) /* bit [5] stacking rules for called registers: 0=skipped 1=saved */ |
| #define EXC_RETURN_FTYPE (0x00000010UL) /* bit [4] allocate stack for floating-point context: 0=done 1=skipped */ |
| #define EXC_RETURN_MODE (0x00000008UL) /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode */ |
| #define EXC_RETURN_SPSEL (0x00000004UL) /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP */ |
| #define EXC_RETURN_ES (0x00000001UL) /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */ |
| #define EXC_INTEGRITY_SIGNATURE (0xFEFA125BUL) /* Value for processors without floating-point extension */ |
| #define __NVIC_SetPriorityGrouping | ( | X | ) | (void)(X) |
| __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping | ( | void | ) | (0U) |
Get Priority Grouping.
Reads the priority grouping field from the NVIC Interrupt Controller.
| #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping |
| #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping |
| #define NVIC_EnableIRQ __NVIC_EnableIRQ |
| #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ |
| #define NVIC_DisableIRQ __NVIC_DisableIRQ |
| #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ |
| #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ |
| #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ |
| #define NVIC_GetActive __NVIC_GetActive |
| #define NVIC_SetPriority __NVIC_SetPriority |
| #define NVIC_GetPriority __NVIC_GetPriority |
| #define NVIC_SystemReset __NVIC_SystemReset |
| #define NVIC_SetVector __NVIC_SetVector |
| #define NVIC_GetVector __NVIC_GetVector |
| #define NVIC_USER_IRQ_OFFSET 16 |
| #define FNC_RETURN (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */ |
| #define EXC_RETURN_PREFIX (0xFF000000UL) /* bits [31:24] set to indicate an EXC_RETURN value */ |
| #define EXC_RETURN_S (0x00000040UL) /* bit [6] stack used to push registers: 0=Non-secure 1=Secure */ |
| #define EXC_RETURN_DCRS (0x00000020UL) /* bit [5] stacking rules for called registers: 0=skipped 1=saved */ |
| #define EXC_RETURN_FTYPE (0x00000010UL) /* bit [4] allocate stack for floating-point context: 0=done 1=skipped */ |
| #define EXC_RETURN_MODE (0x00000008UL) /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode */ |
| #define EXC_RETURN_SPSEL (0x00000004UL) /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP */ |
| #define EXC_RETURN_ES (0x00000001UL) /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */ |
| #define EXC_INTEGRITY_SIGNATURE (0xFEFA125BUL) /* Value for processors without floating-point extension */ |
| #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping |
| #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping |
| #define NVIC_EnableIRQ __NVIC_EnableIRQ |
| #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ |
| #define NVIC_DisableIRQ __NVIC_DisableIRQ |
| #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ |
| #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ |
| #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ |
| #define NVIC_GetActive __NVIC_GetActive |
| #define NVIC_SetPriority __NVIC_SetPriority |
| #define NVIC_GetPriority __NVIC_GetPriority |
| #define NVIC_SystemReset __NVIC_SystemReset |
| #define NVIC_SetVector __NVIC_SetVector |
| #define NVIC_GetVector __NVIC_GetVector |
| #define NVIC_USER_IRQ_OFFSET 16 |
| #define FNC_RETURN (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */ |
| #define EXC_RETURN_PREFIX (0xFF000000UL) /* bits [31:24] set to indicate an EXC_RETURN value */ |
| #define EXC_RETURN_S (0x00000040UL) /* bit [6] stack used to push registers: 0=Non-secure 1=Secure */ |
| #define EXC_RETURN_DCRS (0x00000020UL) /* bit [5] stacking rules for called registers: 0=skipped 1=saved */ |
| #define EXC_RETURN_FTYPE (0x00000010UL) /* bit [4] allocate stack for floating-point context: 0=done 1=skipped */ |
| #define EXC_RETURN_MODE (0x00000008UL) /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode */ |
| #define EXC_RETURN_SPSEL (0x00000004UL) /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP */ |
| #define EXC_RETURN_ES (0x00000001UL) /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */ |
| #define EXC_INTEGRITY_SIGNATURE (0xFEFA125BUL) /* Value for processors without floating-point extension */ |
| __STATIC_INLINE void __NVIC_SetPriorityGrouping | ( | uint32_t | PriorityGroup | ) |
Set Priority Grouping.
Sets the priority grouping field using the required unlock sequence. The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. Only values from 0..7 are used. In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
| [in] | PriorityGroup | Priority grouping field. |
References SCB, SCB_AIRCR_PRIGROUP_Msk, SCB_AIRCR_PRIGROUP_Pos, SCB_AIRCR_VECTKEY_Msk, and SCB_AIRCR_VECTKEY_Pos.
| __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping | ( | void | ) |
Get Priority Grouping.
Reads the priority grouping field from the NVIC Interrupt Controller.
References SCB, SCB_AIRCR_PRIGROUP_Msk, and SCB_AIRCR_PRIGROUP_Pos.
| __STATIC_INLINE void __NVIC_EnableIRQ | ( | IRQn_Type | IRQn | ) |
Enable Interrupt.
Enables a device specific interrupt in the NVIC interrupt controller.
| [in] | IRQn | Device specific interrupt number. |
References __COMPILER_BARRIER, and NVIC.
| __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ | ( | IRQn_Type | IRQn | ) |
Get Interrupt Enable status.
Returns a device specific interrupt enable status from the NVIC interrupt controller.
| [in] | IRQn | Device specific interrupt number. |
References NVIC.
| __STATIC_INLINE void __NVIC_DisableIRQ | ( | IRQn_Type | IRQn | ) |
| __STATIC_INLINE uint32_t __NVIC_GetPendingIRQ | ( | IRQn_Type | IRQn | ) |
Get Pending Interrupt.
Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
| [in] | IRQn | Device specific interrupt number. |
References NVIC.
| __STATIC_INLINE void __NVIC_SetPendingIRQ | ( | IRQn_Type | IRQn | ) |
Set Pending Interrupt.
Sets the pending bit of a device specific interrupt in the NVIC pending register.
| [in] | IRQn | Device specific interrupt number. |
References NVIC.
| __STATIC_INLINE void __NVIC_ClearPendingIRQ | ( | IRQn_Type | IRQn | ) |
Clear Pending Interrupt.
Clears the pending bit of a device specific interrupt in the NVIC pending register.
| [in] | IRQn | Device specific interrupt number. |
References NVIC.
| __STATIC_INLINE uint32_t __NVIC_GetActive | ( | IRQn_Type | IRQn | ) |
Get Active Interrupt.
Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
| [in] | IRQn | Device specific interrupt number. |
References __STATIC_INLINE, and NVIC.
| __STATIC_INLINE void __NVIC_SetPriority | ( | IRQn_Type | IRQn, |
| uint32_t | priority | ||
| ) |
Set Interrupt Priority.
Sets the priority of a device specific interrupt or a processor exception. The interrupt number can be positive to specify a device specific interrupt, or negative to specify a processor exception.
| [in] | IRQn | Interrupt number. |
| [in] | priority | Priority to set. |
References __NVIC_PRIO_BITS, NVIC, and SCB.
| __STATIC_INLINE uint32_t __NVIC_GetPriority | ( | IRQn_Type | IRQn | ) |
Get Interrupt Priority.
Reads the priority of a device specific interrupt or a processor exception. The interrupt number can be positive to specify a device specific interrupt, or negative to specify a processor exception.
| [in] | IRQn | Interrupt number. |
References __NVIC_PRIO_BITS, NVIC, and SCB.
| __STATIC_INLINE uint32_t NVIC_EncodePriority | ( | uint32_t | PriorityGroup, |
| uint32_t | PreemptPriority, | ||
| uint32_t | SubPriority | ||
| ) |
Encode Priority.
Encodes the priority for an interrupt with the given priority group, preemptive priority value, and subpriority value. In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
| [in] | PriorityGroup | Used priority group. |
| [in] | PreemptPriority | Preemptive priority value (starting from 0). |
| [in] | SubPriority | Subpriority value (starting from 0). |
References __NVIC_PRIO_BITS.
| __STATIC_INLINE void NVIC_DecodePriority | ( | uint32_t | Priority, |
| uint32_t | PriorityGroup, | ||
| uint32_t *const | pPreemptPriority, | ||
| uint32_t *const | pSubPriority | ||
| ) |
Decode Priority.
Decodes an interrupt priority value with a given priority group to preemptive priority value and subpriority value. In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
| [in] | Priority | Priority value, which can be retrieved with the function NVIC_GetPriority(). |
| [in] | PriorityGroup | Used priority group. |
| [out] | pPreemptPriority | Preemptive priority value (starting from 0). |
| [out] | pSubPriority | Subpriority value (starting from 0). |
References __NVIC_PRIO_BITS.
| __STATIC_INLINE void __NVIC_SetVector | ( | IRQn_Type | IRQn, |
| uint32_t | vector | ||
| ) |
Set Interrupt Vector.
Sets an interrupt vector in SRAM based interrupt vector table. The interrupt number can be positive to specify a device specific interrupt, or negative to specify a processor exception. VTOR must been relocated to SRAM before.
| [in] | IRQn | Interrupt number |
| [in] | vector | Address of interrupt handler function |
Sets an interrupt vector in SRAM based interrupt vector table. The interrupt number can be positive to specify a device specific interrupt, or negative to specify a processor exception. VTOR must been relocated to SRAM before. If VTOR is not present address 0 must be mapped to SRAM.
| [in] | IRQn | Interrupt number |
| [in] | vector | Address of interrupt handler function |
References __DSB(), NVIC_USER_IRQ_OFFSET, and SCB.
| __STATIC_INLINE uint32_t __NVIC_GetVector | ( | IRQn_Type | IRQn | ) |
Get Interrupt Vector.
Reads an interrupt vector from interrupt vector table. The interrupt number can be positive to specify a device specific interrupt, or negative to specify a processor exception.
| [in] | IRQn | Interrupt number. |
References NVIC_USER_IRQ_OFFSET, and SCB.
| __NO_RETURN __STATIC_INLINE void __NVIC_SystemReset | ( | void | ) |
System Reset.
Initiates a system reset request to reset the MCU.
References __DSB(), __NOP, __NVIC_PRIO_BITS, __STATIC_INLINE, SCB, SCB_AIRCR_PRIGROUP_Msk, SCB_AIRCR_PRIGROUP_Pos, SCB_AIRCR_SYSRESETREQ_Msk, SCB_AIRCR_VECTKEY_Msk, and SCB_AIRCR_VECTKEY_Pos.