Structure type to access the Nested Vectored Interrupt Controller (NVIC).
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#include <core_cm0plus.h>
Structure type to access the Nested Vectored Interrupt Controller (NVIC).
§ ISER
| __IOM uint32_t NVIC_Type::ISER[1U] |
Offset: 0x000 (R/W) Interrupt Set Enable Register
§ RESERVED0
| uint32_t NVIC_Type::RESERVED0[31U] |
§ ICER
| __IOM uint32_t NVIC_Type::ICER[1U] |
Offset: 0x080 (R/W) Interrupt Clear Enable Register
§ RESERVED1
| uint32_t NVIC_Type::RESERVED1[31U] |
§ ISPR
| __IOM uint32_t NVIC_Type::ISPR[1U] |
Offset: 0x100 (R/W) Interrupt Set Pending Register
§ RESERVED2
| uint32_t NVIC_Type::RESERVED2[31U] |
§ ICPR
| __IOM uint32_t NVIC_Type::ICPR[1U] |
Offset: 0x180 (R/W) Interrupt Clear Pending Register
§ RESERVED3
| uint32_t NVIC_Type::RESERVED3[31U] |
§ RESERVED4
| uint32_t NVIC_Type::RESERVED4[64U] |
§ IP
| __IOM uint32_t NVIC_Type::IP[8U] |
Offset: 0x300 (R/W) Interrupt Priority Register
The documentation for this struct was generated from the following file: