CC23x0R5DriverLibrary
adc.h
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1 /******************************************************************************
2  * Filename: adc.h
3  *
4  * Description: Prototypes and defines for the ADC API.
5  *
6  * Copyright (c) 2022-2025 Texas Instruments Incorporated
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions are met:
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12  * this list of conditions and the following disclaimer.
13  *
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15  * this list of conditions and the following disclaimer in the documentation
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22  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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35 
36 #ifndef __ADC_H__
37 #define __ADC_H__
38 
39 //*****************************************************************************
40 //
45 //
46 //*****************************************************************************
47 
48 #include <stdint.h>
49 #include "../inc/hw_adc.h"
50 #include "../inc/hw_fcfg.h"
51 #include "../inc/hw_memmap.h"
52 #include "../inc/hw_sys0.h"
53 #include "../inc/hw_types.h"
54 
55 //*****************************************************************************
56 //
57 // If building with a C++ compiler, make all of the definitions in this header
58 // have a C binding.
59 //
60 //*****************************************************************************
61 #ifdef __cplusplus
62 extern "C" {
63 #endif
64 
65 //*****************************************************************************
66 //
67 // Values
68 //
69 //*****************************************************************************
70 
72 #define ADC_CLOCK_DIVIDER_1 ADC_CTL0_SCLKDIV_DIV_BY_1
73 
75 #define ADC_CLOCK_DIVIDER_2 ADC_CTL0_SCLKDIV_DIV_BY_2
76 
78 #define ADC_CLOCK_DIVIDER_4 ADC_CTL0_SCLKDIV_DIV_BY_4
79 
81 #define ADC_CLOCK_DIVIDER_8 ADC_CTL0_SCLKDIV_DIV_BY_8
82 
84 #define ADC_CLOCK_DIVIDER_16 ADC_CTL0_SCLKDIV_DIV_BY_16
85 
87 #define ADC_CLOCK_DIVIDER_24 ADC_CTL0_SCLKDIV_DIV_BY_24
88 
90 #define ADC_CLOCK_DIVIDER_32 ADC_CTL0_SCLKDIV_DIV_BY_32
91 
93 #define ADC_CLOCK_DIVIDER_48 ADC_CTL0_SCLKDIV_DIV_BY_48
94 
96 #define ADC_RESOLUTION_12_BIT ADC_CTL2_RES_BIT_12
97 
99 #define ADC_RESOLUTION_10_BIT ADC_CTL2_RES_BIT_10
100 
102 #define ADC_RESOLUTION_8_BIT ADC_CTL2_RES_BIT_8
103 
105 #define ADC_FIXED_REFERENCE_1V4 0
106 
108 #define ADC_FIXED_REFERENCE_2V5 1
109 
111 #define ADC_EXTERNAL_REFERENCE 2
112 
114 #define ADC_VDDS_REFERENCE 3
115 
118 #define ADC_POWER_DOWN_POLICY_AUTO ADC_CTL0_PWRDN_AUTO
119 
122 #define ADC_POWER_DOWN_POLICY_MANUAL ADC_CTL0_PWRDN_MANUAL
123 
126 #define ADC_SEQUENCE_REPEATSEQUENCE ADC_CTL1_CONSEQ_REPEATSEQUENCE
127 
129 #define ADC_SEQUENCE_REPEATSINGLE ADC_CTL1_CONSEQ_REPEATSINGLE
130 
133 #define ADC_SEQUENCE_SEQUENCE ADC_CTL1_CONSEQ_SEQUENCE
134 
137 #define ADC_SEQUENCE_SINGLE ADC_CTL1_CONSEQ_SINGLE
138 
141 #define ADC_SAMPLE_MODE_AUTO ADC_CTL1_SAMPMODE_AUTO
142 
148 #define ADC_SAMPLE_MODE_MANUAL ADC_CTL1_SAMPMODE_MANUAL
149 
154 #define ADC_TRIGGER_SOURCE_EVENT ADC_CTL1_TRIGSRC_EVENT
155 
162 #define ADC_TRIGGER_SOURCE_SOFTWARE ADC_CTL1_TRIGSRC_SOFTWARE
163 
168 #define ADC_TRIGGER_POLICY_AUTO_NEXT ADC_MEMCTL0_TRG_AUTO_NEXT
169 
171 #define ADC_TRIGGER_POLICY_TRIGGER_NEXT ADC_MEMCTL0_TRG_TRIGGER_NEXT
172 
174 #define ADC_INT_MEMRES_23 ADC_IMASK0_MEMRESIFG23
175 
177 #define ADC_INT_MEMRES_22 ADC_IMASK0_MEMRESIFG22
178 
180 #define ADC_INT_MEMRES_21 ADC_IMASK0_MEMRESIFG21
181 
183 #define ADC_INT_MEMRES_20 ADC_IMASK0_MEMRESIFG20
184 
186 #define ADC_INT_MEMRES_19 ADC_IMASK0_MEMRESIFG19
187 
189 #define ADC_INT_MEMRES_18 ADC_IMASK0_MEMRESIFG18
190 
192 #define ADC_INT_MEMRES_17 ADC_IMASK0_MEMRESIFG17
193 
195 #define ADC_INT_MEMRES_16 ADC_IMASK0_MEMRESIFG16
196 
198 #define ADC_INT_MEMRES_15 ADC_IMASK0_MEMRESIFG15
199 
201 #define ADC_INT_MEMRES_14 ADC_IMASK0_MEMRESIFG14
202 
204 #define ADC_INT_MEMRES_13 ADC_IMASK0_MEMRESIFG13
205 
207 #define ADC_INT_MEMRES_12 ADC_IMASK0_MEMRESIFG12
208 
210 #define ADC_INT_MEMRES_11 ADC_IMASK0_MEMRESIFG11
211 
213 #define ADC_INT_MEMRES_10 ADC_IMASK0_MEMRESIFG10
214 
216 #define ADC_INT_MEMRES_09 ADC_IMASK0_MEMRESIFG9
217 
219 #define ADC_INT_MEMRES_08 ADC_IMASK0_MEMRESIFG8
220 
222 #define ADC_INT_MEMRES_07 ADC_IMASK0_MEMRESIFG7
223 
225 #define ADC_INT_MEMRES_06 ADC_IMASK0_MEMRESIFG6
226 
228 #define ADC_INT_MEMRES_05 ADC_IMASK0_MEMRESIFG5
229 
231 #define ADC_INT_MEMRES_04 ADC_IMASK0_MEMRESIFG4
232 
234 #define ADC_INT_MEMRES_03 ADC_IMASK0_MEMRESIFG3
235 
237 #define ADC_INT_MEMRES_02 ADC_IMASK0_MEMRESIFG2
238 
240 #define ADC_INT_MEMRES_01 ADC_IMASK0_MEMRESIFG1
241 
243 #define ADC_INT_MEMRES_00 ADC_IMASK0_MEMRESIFG0
244 
246 #define ADC_INT_ASCDONE ADC_IMASK0_ASCDONE
247 
249 #define ADC_INT_UVIFG ADC_IMASK0_UVIFG
250 
252 #define ADC_INT_DMADONE ADC_IMASK0_DMADONE
253 
255 #define ADC_INT_INIFG ADC_IMASK0_INIFG
256 
258 #define ADC_INT_LOWIFG ADC_IMASK0_LOWIFG
259 
261 #define ADC_INT_HIGHIFG ADC_IMASK0_HIGHIFG
262 
264 #define ADC_INT_TOVIFG ADC_IMASK0_TOVIFG
265 
267 #define ADC_INT_OVIFG ADC_IMASK0_OVIFG
268 
269 //*****************************************************************************
270 //
271 // API Functions and prototypes
272 //
273 //*****************************************************************************
274 
275 //*****************************************************************************
276 //
305 //
306 //*****************************************************************************
307 extern void ADCSetSampleDuration(uint32_t clkDiv, uint16_t clkCycles);
308 
309 //*****************************************************************************
310 //
327 //
328 //*****************************************************************************
329 extern void ADCSetResolution(uint32_t resolution);
330 
331 //*****************************************************************************
332 //
350 //
351 //*****************************************************************************
352 extern void ADCSetInput(uint32_t reference, uint8_t channel, uint32_t index);
353 
354 //*****************************************************************************
355 //
366 //
367 //*****************************************************************************
368 extern void ADCSetMemctlRange(uint32_t start, uint32_t stop);
369 
370 //*****************************************************************************
371 //
381 //
382 //*****************************************************************************
383 extern void ADCSetPowerDownPolicy(uint32_t powerDownPolicy);
384 
385 //*****************************************************************************
386 //
400 //
401 //*****************************************************************************
402 extern void ADCSetSequence(uint32_t sequence);
403 
404 //*****************************************************************************
405 //
413 //
414 //*****************************************************************************
415 extern void ADCSetSamplingMode(uint32_t samplingMode);
416 
417 //*****************************************************************************
418 //
426 //
427 //*****************************************************************************
428 extern void ADCSetTriggerSource(uint32_t triggerSource);
429 
430 //*****************************************************************************
431 //
445 //
446 //*****************************************************************************
447 extern void ADCSetTriggerPolicy(uint32_t triggerPolicy, uint32_t index);
448 
449 //*****************************************************************************
450 //
460 //
461 //*****************************************************************************
463 {
464  HWREG(ADC_BASE + ADC_O_CTL1) |= ADC_CTL1_SC_START;
465 }
466 
467 //*****************************************************************************
468 //
477 //
478 //*****************************************************************************
480 {
481  HWREG(ADC_BASE + ADC_O_CTL1) &= ~ADC_CTL1_SC_M;
482 }
483 
484 //*****************************************************************************
485 //
500 //
501 //*****************************************************************************
503 {
504  HWREG(ADC_BASE + ADC_O_CTL0) |= ADC_CTL0_ENC_ON;
505 }
506 
507 //*****************************************************************************
508 //
517 //
518 //*****************************************************************************
520 {
521  HWREG(ADC_BASE + ADC_O_CTL0) &= ~ADC_CTL0_ENC_M;
522 }
523 
524 //*****************************************************************************
525 //
533 //
534 //*****************************************************************************
536 {
537  HWREG(ADC_BASE + ADC_O_CTL2) |= ADC_CTL2_DMAEN_EN;
538 }
539 
540 //*****************************************************************************
541 //
545 //
546 //*****************************************************************************
548 {
549  HWREG(ADC_BASE + ADC_O_CTL2) &= ~ADC_CTL2_DMAEN_M;
550 }
551 
552 //*****************************************************************************
553 //
563 //
564 //*****************************************************************************
565 __STATIC_INLINE uint32_t ADCReadResult(uint32_t index)
566 {
567 
568  while (HWREG(ADC_BASE + ADC_O_STA) & ADC_STA_BUSY_ACTIVE) {}
569 
570  /* Return data from result register */
571  return HWREG(ADC_BASE + ADC_O_MEMRES0 + (4 * index));
572 }
573 
574 //*****************************************************************************
575 //
586 //
587 //*****************************************************************************
589 {
590 
591  if (HWREG(ADC_BASE + ADC_O_STA) & ADC_STA_BUSY_ACTIVE)
592  {
593  return true;
594  }
595  else
596  {
597  return false;
598  }
599 }
600 
601 //*****************************************************************************
602 //
611 //
612 //*****************************************************************************
614 {
615  /* Return data from result register */
616  return HWREG(ADC_BASE + ADC_O_MEMRES0 + (4 * index));
617 }
618 
619 //*****************************************************************************
620 //
631 //
632 //*****************************************************************************
633 extern uint32_t ADCValueToMicrovolts(uint32_t adcCode, uint32_t bitResolution, uint32_t referenceVoltageMicroVolt);
634 
635 //*****************************************************************************
636 //
654 //
655 //*****************************************************************************
656 __STATIC_INLINE void ADCEnableInterrupt(uint32_t intFlags)
657 {
658  // Enable the specified interrupts.
659  HWREG(ADC_BASE + ADC_O_IMASK0) |= intFlags;
660 }
661 
662 //*****************************************************************************
663 //
681 //
682 //*****************************************************************************
683 __STATIC_INLINE void ADCDisableInterrupt(uint32_t intFlags)
684 {
685  // Disable the specified interrupts.
686  HWREG(ADC_BASE + ADC_O_IMASK0) &= ~(intFlags);
687 }
688 
689 //*****************************************************************************
690 //
705 //
706 //*****************************************************************************
708 {
709  return (HWREG(ADC_BASE + ADC_O_RIS0));
710 }
711 
712 //*****************************************************************************
713 //
728 //
729 //*****************************************************************************
731 {
732  return (HWREG(ADC_BASE + ADC_O_MIS0));
733 }
734 
735 //*****************************************************************************
736 //
771 //
772 //*****************************************************************************
773 __STATIC_INLINE void ADCClearInterrupt(uint32_t intFlags)
774 {
775  // Clear the requested interrupt sources
776  HWREG(ADC_BASE + ADC_O_ICLR0) = intFlags;
777 }
778 
779 //*****************************************************************************
780 //
793 //
794 //*****************************************************************************
795 extern uint16_t ADCGetAdjustmentGain(uint32_t reference);
796 
797 //*****************************************************************************
798 //
809 //
810 //*****************************************************************************
811 extern void ADCSetAdjustmentOffset(uint32_t reference);
812 
813 //*****************************************************************************
814 //
832 //
833 //*****************************************************************************
834 extern uint32_t ADCAdjustValueForGain(uint32_t adcValue, uint32_t bitResolution, uint16_t gain);
835 
836 //*****************************************************************************
837 //
838 // Mark the end of the C bindings section for C++ compilers.
839 //
840 //*****************************************************************************
841 #ifdef __cplusplus
842 }
843 #endif
844 
845 //*****************************************************************************
846 //
850 //
851 //*****************************************************************************
852 
853 #endif // __ADC_H__
void ADCSetAdjustmentOffset(uint32_t reference)
Write correct offset value to ADC-peripheral trim register.
Definition: adc.c:429
void ADCSetTriggerSource(uint32_t triggerSource)
Set ADC trigger source.
Definition: adc.c:179
__STATIC_INLINE uint32_t ADCReadResultNonBlocking(uint32_t index)
Read conversion result from ADC.
Definition: adc.h:613
void ADCSetSequence(uint32_t sequence)
Set conversion sequence.
Definition: adc.c:274
__STATIC_INLINE void ADCStartConversion(void)
Start conversion.
Definition: adc.h:462
uint16_t ADCGetAdjustmentGain(uint32_t reference)
Returns ADC gain value for given reference.
Definition: adc.c:374
__STATIC_INLINE uint32_t ADCReadResult(uint32_t index)
Read conversion result from ADC.
Definition: adc.h:565
__STATIC_INLINE uint32_t ADCRawInterruptStatus(void)
Gets the current raw interrupt status.
Definition: adc.h:707
uint32_t ADCValueToMicrovolts(uint32_t adcCode, uint32_t bitResolution, uint32_t referenceVoltageMicroVolt)
Convert ADC code to microvolts.
Definition: adc.c:334
void ADCSetInput(uint32_t reference, uint8_t channel, uint32_t index)
Sets the ADC reference source and input channel.
Definition: adc.c:96
uint32_t ADCAdjustValueForGain(uint32_t adcValue, uint32_t bitResolution, uint16_t gain)
Performs ADC value gain adjustment.
Definition: adc.c:298
void ADCSetSamplingMode(uint32_t samplingMode)
Set ADC sampling mode.
Definition: adc.c:155
__STATIC_INLINE void ADCStopConversion(void)
Stop sample phase of a conversion.
Definition: adc.h:479
__STATIC_INLINE void ADCDisableDmaTrigger(void)
Disable DMA trigger for data transfer.
Definition: adc.h:547
__STATIC_INLINE void ADCEnableDmaTrigger(void)
Enable DMA trigger for data transfer.
Definition: adc.h:535
__STATIC_INLINE void ADCDisableConversion(void)
Disable conversion.
Definition: adc.h:519
void ADCSetPowerDownPolicy(uint32_t powerDownPolicy)
Set power down policy.
Definition: adc.c:250
__STATIC_INLINE void ADCClearInterrupt(uint32_t intFlags)
Clears ADC interrupt sources.
Definition: adc.h:773
__STATIC_INLINE bool ADCIsBusy(void)
Check if ADC is busy.
Definition: adc.h:588
__STATIC_INLINE void ADCDisableInterrupt(uint32_t intFlags)
Disables individual ADC interrupt sources.
Definition: adc.h:683
void ADCSetSampleDuration(uint32_t clkDiv, uint16_t clkCycles)
Sets the clock-divider value, and sample duration.
Definition: adc.c:44
__STATIC_INLINE void ADCEnableInterrupt(uint32_t intFlags)
Enables individual ADC interrupt sources.
Definition: adc.h:656
__STATIC_INLINE uint32_t ADCMaskedInterruptStatus(void)
Gets the current masked interrupt status.
Definition: adc.h:730
#define __STATIC_INLINE
Definition: cmsis_gcc.h:47
void ADCSetResolution(uint32_t resolution)
Sets the ADC bit resolution.
Definition: adc.c:72
__STATIC_INLINE void ADCEnableConversion(void)
Enable conversion.
Definition: adc.h:502
void ADCSetMemctlRange(uint32_t start, uint32_t stop)
Set start and stop control registers.
Definition: adc.c:227
void ADCSetTriggerPolicy(uint32_t triggerPolicy, uint32_t index)
Set ADC trigger policy.
Definition: adc.c:203