CC23x0r2DriverLibrary
i2c.h
Go to the documentation of this file.
1 /******************************************************************************
2  * Filename: i2c.h
3  *
4  * Description: Prototypes and defines for the I2C API.
5  *
6  * Copyright (c) 2022 Texas Instruments Incorporated
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions are met:
10  *
11  * 1) Redistributions of source code must retain the above copyright notice,
12  * this list of conditions and the following disclaimer.
13  *
14  * 2) Redistributions in binary form must reproduce the above copyright notice,
15  * this list of conditions and the following disclaimer in the documentation
16  * and/or other materials provided with the distribution.
17  *
18  * 3) Neither the name of the copyright holder nor the names of its
19  * contributors may be used to endorse or promote products derived from this
20  * software without specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
26  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
32  * POSSIBILITY OF SUCH DAMAGE.
33  *
34  ******************************************************************************/
35 
36 #ifndef __I2C_H__
37 #define __I2C_H__
38 
39 //*****************************************************************************
40 //
45 //
46 //*****************************************************************************
47 
48 //*****************************************************************************
49 //
50 // If building with a C++ compiler, make all of the definitions in this header
51 // have a C binding.
52 //
53 //*****************************************************************************
54 #ifdef __cplusplus
55 extern "C" {
56 #endif
57 
58 #include <stdbool.h>
59 #include <stdint.h>
60 #include "../inc/hw_types.h"
61 #include "../inc/hw_ints.h"
62 #include "../inc/hw_memmap.h"
63 #include "../inc/hw_i2c.h"
64 #include "debug.h"
65 #include "interrupt.h"
66 #include "cpu.h"
67 
68 //*****************************************************************************
69 //
70 // I2C Controller commands
71 //
72 //*****************************************************************************
73 #define I2C_CONTROLLER_CMD_SINGLE_SEND 0x00000007
74 #define I2C_CONTROLLER_CMD_SINGLE_RECEIVE 0x00000007
75 #define I2C_CONTROLLER_CMD_BURST_SEND_START 0x00000003
76 #define I2C_CONTROLLER_CMD_BURST_SEND_CONT 0x00000001
77 #define I2C_CONTROLLER_CMD_BURST_SEND_FINISH 0x00000005
78 #define I2C_CONTROLLER_CMD_BURST_SEND_ERROR_STOP 0x00000004
79 #define I2C_CONTROLLER_CMD_BURST_RECEIVE_START 0x0000000b
80 #define I2C_CONTROLLER_CMD_BURST_RECEIVE_CONT 0x00000009
81 #define I2C_CONTROLLER_CMD_BURST_RECEIVE_FINISH 0x00000005
82 #define I2C_CONTROLLER_CMD_BURST_RECEIVE_ERROR_STOP 0x00000004
83 
84 //*****************************************************************************
85 //
86 // I2C Controller error status
87 //
88 //*****************************************************************************
89 #define I2C_CONTROLLER_ERR_NONE 0
90 #define I2C_CONTROLLER_ERR_ADDR_ACK 0x00000004
91 #define I2C_CONTROLLER_ERR_DATA_ACK 0x00000008
92 #define I2C_CONTROLLER_ERR_ARB_LOST 0x00000010
93 
94 //*****************************************************************************
95 //
96 // I2C Target action requests
97 //
98 //*****************************************************************************
99 #define I2C_TARGET_ACT_NONE 0
100 #define I2C_TARGET_ACT_RREQ 0x00000001 // Controller has sent data
101 #define I2C_TARGET_ACT_TREQ 0x00000002 // Controller has requested data
102 #define I2C_TARGET_ACT_RREQ_FBR 0x00000005 // Controller has sent first byte
103 
104 //*****************************************************************************
105 //
106 // I2C Target interrupts
107 //
108 //*****************************************************************************
109 #define I2C_TARGET_INT_STOP 0x00000004 // Stop Condition Interrupt.
110 #define I2C_TARGET_INT_START 0x00000002 // Start Condition Interrupt.
111 #define I2C_TARGET_INT_DATA 0x00000001 // Data Interrupt.
112 
113 //*****************************************************************************
114 //
115 // I2C module clock frequency
116 //
117 //*****************************************************************************
118 #define I2C_CLK_FREQ 48000000 // Clock supplied to I2C periph in Hz
119 
120 //*****************************************************************************
121 //
122 // API Functions and prototypes
123 //
124 //*****************************************************************************
125 
126 #ifdef DRIVERLIB_DEBUG
127 //*****************************************************************************
128 //
139 //
140 //*****************************************************************************
141 static bool I2CBaseValid(uint32_t base)
142 {
143  return (base == I2C0_BASE);
144 }
145 #endif
146 
147 //*****************************************************************************
148 //
163 //
164 //*****************************************************************************
165 extern void I2CControllerInitExpClk(uint32_t base, bool fast);
166 
167 //*****************************************************************************
168 //
189 //
190 //*****************************************************************************
191 __STATIC_INLINE void I2CControllerCommand(uint32_t base, uint32_t cmd)
192 {
193  // Check the arguments.
194  ASSERT(I2CBaseValid(base));
196  // (cmd == I2C_CONTROLLER_CMD_SINGLE_RECEIVE) || -> Equal to SINGLE_SEND
201 
202  // Send the command.
203  HWREG(base + I2C_O_CCTL) = cmd;
204 
205  // Delay minimum four cycles in order to ensure that the I2C_O_CCTL
206  // register has been correctly updated before function exit
207  CPUDelay(2);
208 }
209 
210 //*****************************************************************************
211 //
227 //
228 //*****************************************************************************
229 __STATIC_INLINE void I2CControllerSetTargetAddr(uint32_t base, uint8_t targetAddr, bool receive)
230 {
231  // Check the arguments.
232  ASSERT(I2CBaseValid(base));
233  ASSERT(!(targetAddr & 0x80));
234 
235  // Set the address of the target with which the controller will communicate.
236  HWREG(base + I2C_O_CTA) = (targetAddr << 1) | receive;
237 }
238 
239 //*****************************************************************************
240 //
248 //
249 //*****************************************************************************
251 {
252  // Check the arguments.
253  ASSERT(I2CBaseValid(base));
254 
255  // Enable the clock for the controller.
256  HWREG(base + I2C_O_CCR) |= I2C_CCR_CFE_M;
257 
258  // Enable the controller module.
259  HWREG(base + I2C_O_CCTL) = I2C_CCTL_RUN_EN;
260 }
261 
262 //*****************************************************************************
263 //
271 //
272 //*****************************************************************************
274 {
275  // Check the arguments.
276  ASSERT(I2CBaseValid(base));
277 
278  // Disable the controller module.
279  HWREG(base + I2C_O_CCTL) = 0;
280 
281  // Disable the clock for the controller.
282  HWREG(base + I2C_O_CCR) &= ~I2C_CCR_CFE_M;
283 }
284 
285 //*****************************************************************************
286 //
297 //
298 //*****************************************************************************
300 {
301  // Check the arguments.
302  ASSERT(I2CBaseValid(base));
303 
304  // Return the busy status.
305  if (HWREG(base + I2C_O_CSTA) & I2C_CSTA_BUSY_M)
306  {
307  return (true);
308  }
309  else
310  {
311  return (false);
312  }
313 }
314 
315 //*****************************************************************************
316 //
328 //
329 //*****************************************************************************
331 {
332  // Check the arguments.
333  ASSERT(I2CBaseValid(base));
334 
335  // Return the bus busy status.
336  if (HWREG(base + I2C_O_CSTA) & I2C_CSTA_BUSBSY_M)
337  {
338  return (true);
339  }
340  else
341  {
342  return (false);
343  }
344 }
345 
346 //*****************************************************************************
347 //
356 //
357 //*****************************************************************************
358 __STATIC_INLINE uint32_t I2CControllerGetData(uint32_t base)
359 {
360  // Check the arguments.
361  ASSERT(I2CBaseValid(base));
362 
363  // Read a byte.
364  return (HWREG(base + I2C_O_CDR));
365 }
366 
367 //*****************************************************************************
368 //
377 //
378 //*****************************************************************************
379 __STATIC_INLINE void I2CControllerPutData(uint32_t base, uint8_t data)
380 {
381  // Check the arguments.
382  ASSERT(I2CBaseValid(base));
383 
384  // Write the byte.
385  HWREG(base + I2C_O_CDR) = data;
386 }
387 
388 //*****************************************************************************
389 //
402 //
403 //*****************************************************************************
404 extern uint32_t I2CControllerError(uint32_t base);
405 
406 //*****************************************************************************
407 //
415 //
416 //*****************************************************************************
418 {
419  // Check the arguments.
420  ASSERT(I2CBaseValid(base));
421 
422  // Enable the controller interrupt.
423  HWREG(base + I2C_O_CIMR) = I2C_CIMR_IM;
424 }
425 
426 //*****************************************************************************
427 //
435 //
436 //*****************************************************************************
438 {
439  // Check the arguments.
440  ASSERT(I2CBaseValid(base));
441 
442  // Disable the controller interrupt.
443  HWREG(base + I2C_O_CIMR) = 0;
444 }
445 
446 //*****************************************************************************
447 //
473 //
474 //*****************************************************************************
476 {
477  // Check the arguments.
478  ASSERT(I2CBaseValid(base));
479 
480  // Clear the I2C controller interrupt source.
481  HWREG(base + I2C_O_CICR) = I2C_CICR_IC;
482 }
483 
484 //*****************************************************************************
485 //
500 //
501 //*****************************************************************************
502 __STATIC_INLINE bool I2CControllerIntStatus(uint32_t base, bool masked)
503 {
504  // Check the arguments.
505  ASSERT(I2CBaseValid(base));
506 
507  // Return either the interrupt status or the raw interrupt status as
508  // requested.
509  if (masked)
510  {
511  return ((HWREG(base + I2C_O_CMIS)) ? true : false);
512  }
513  else
514  {
515  return ((HWREG(base + I2C_O_CRIS)) ? true : false);
516  }
517 }
518 
519 //*****************************************************************************
520 //
528 //
529 //*****************************************************************************
530 __STATIC_INLINE void I2CTargetEnable(uint32_t base)
531 {
532  // Check the arguments.
533  ASSERT(I2CBaseValid(base));
534 
535  // Enable the clock to the target module.
536  HWREG(base + I2C_O_CCR) |= I2C_CCR_TFE_M;
537 
538  // Enable the target.
539  HWREG(base + I2C_O_TCTL) = I2C_TCTL_DA_EN;
540 }
541 
542 //*****************************************************************************
543 //
557 //
558 //*****************************************************************************
559 __STATIC_INLINE void I2CTargetInit(uint32_t base, uint8_t targetAddr)
560 {
561  // Check the arguments.
562  ASSERT(I2CBaseValid(base));
563  ASSERT(!(targetAddr & 0x80));
564 
565  // Must enable the device before doing anything else.
566  I2CTargetEnable(base);
567 
568  // Set up the target address.
569  HWREG(base + I2C_O_TOAR) = targetAddr;
570 }
571 
572 //*****************************************************************************
573 //
582 //
583 //*****************************************************************************
584 __STATIC_INLINE void I2CTargetSetAddress(uint32_t base, uint8_t targetAddr)
585 {
586  // Check the arguments.
587  ASSERT(I2CBaseValid(base));
588  ASSERT(!(targetAddr & 0x80));
589 
590  // Set up the primary target address.
591  HWREG(base + I2C_O_TOAR) = targetAddr;
592 }
593 
594 //*****************************************************************************
595 //
603 //
604 //*****************************************************************************
606 {
607  // Check the arguments.
608  ASSERT(I2CBaseValid(base));
609 
610  // Disable the target.
611  HWREG(base + I2C_O_TCTL) = 0x0;
612 
613  // Disable the clock to the target module.
614  HWREG(base + I2C_O_CCR) &= ~I2C_CCR_TFE_M;
615 }
616 
617 //*****************************************************************************
618 //
631 //
632 //*****************************************************************************
633 __STATIC_INLINE uint32_t I2CTargetStatus(uint32_t base)
634 {
635  // Check the arguments.
636  ASSERT(I2CBaseValid(base));
637 
638  // Return the target status.
639  return (HWREG(base + I2C_O_TSTA));
640 }
641 
642 //*****************************************************************************
643 //
652 //
653 //*****************************************************************************
654 __STATIC_INLINE uint32_t I2CTargetGetData(uint32_t base)
655 {
656  // Check the arguments.
657  ASSERT(I2CBaseValid(base));
658 
659  // Read a byte.
660  return (HWREG(base + I2C_O_TDR));
661 }
662 
663 //*****************************************************************************
664 //
673 //
674 //*****************************************************************************
675 __STATIC_INLINE void I2CTargetPutData(uint32_t base, uint8_t data)
676 {
677  // Check the arguments.
678  ASSERT(I2CBaseValid(base));
679 
680  // Write the byte.
681  HWREG(base + I2C_O_TDR) = data;
682 }
683 
684 //*****************************************************************************
685 //
700 //
701 //*****************************************************************************
702 __STATIC_INLINE void I2CTargetEnableInt(uint32_t base, uint32_t intFlags)
703 {
704  uint32_t val;
705 
706  // Check the arguments.
707  ASSERT(I2CBaseValid(base));
709 
710  // Enable the target interrupt.
711  val = HWREG(base + I2C_O_TIMR);
712  val |= intFlags;
713  HWREG(base + I2C_O_TIMR) = val;
714 }
715 
716 //*****************************************************************************
717 //
732 //
733 //*****************************************************************************
734 __STATIC_INLINE void I2CTargetDisableInt(uint32_t base, uint32_t intFlags)
735 {
736  uint32_t val;
737 
738  // Check the arguments.
739  ASSERT(I2CBaseValid(base));
741 
742  // Disable the target interrupt.
743  val = HWREG(base + I2C_O_TIMR);
744  val &= ~intFlags;
745  HWREG(base + I2C_O_TIMR) = val;
746 }
747 
748 //*****************************************************************************
749 //
780 //
781 //*****************************************************************************
782 __STATIC_INLINE void I2CTargetClearInt(uint32_t base, uint32_t intFlags)
783 {
784  // Check the arguments.
785  ASSERT(I2CBaseValid(base));
786 
787  // Clear the I2C target interrupt source.
788  HWREG(base + I2C_O_TICR) = intFlags;
789 }
790 
791 //*****************************************************************************
792 //
808 //
809 //*****************************************************************************
810 __STATIC_INLINE uint32_t I2CTargetIntStatus(uint32_t base, bool masked)
811 {
812  // Check the arguments.
813  ASSERT(I2CBaseValid(base));
814 
815  // Return either the interrupt status or the raw interrupt status as
816  // requested.
817  if (masked)
818  {
819  return (HWREG(base + I2C_O_TMIS));
820  }
821  else
822  {
823  return (HWREG(base + I2C_O_TRIS));
824  }
825 }
826 
827 //*****************************************************************************
828 //
829 // Mark the end of the C bindings section for C++ compilers.
830 //
831 //*****************************************************************************
832 #ifdef __cplusplus
833 }
834 #endif
835 
836 //*****************************************************************************
837 //
841 //
842 //*****************************************************************************
843 
844 #endif // __I2C_H__
void CPUDelay(uint32_t count)
Provide a small non-zero delay using a simple loop counter.
#define I2C_CONTROLLER_CMD_BURST_SEND_CONT
Definition: i2c.h:76
__STATIC_INLINE void I2CControllerDisableInt(uint32_t base)
Disables the I2C Controller interrupt.
Definition: i2c.h:437
#define I2C_CONTROLLER_CMD_BURST_SEND_FINISH
Definition: i2c.h:77
__STATIC_INLINE void I2CTargetClearInt(uint32_t base, uint32_t intFlags)
Clears I2C Target interrupt sources.
Definition: i2c.h:782
__STATIC_INLINE void I2CTargetInit(uint32_t base, uint8_t targetAddr)
Initializes the I2C Target module.
Definition: i2c.h:559
#define I2C_CONTROLLER_CMD_BURST_SEND_ERROR_STOP
Definition: i2c.h:78
void I2CControllerInitExpClk(uint32_t base, bool fast)
Initializes the I2C Controller module.
Definition: i2c.c:43
__STATIC_INLINE void I2CControllerClearInt(uint32_t base)
Clears I2C Controller interrupt sources.
Definition: i2c.h:475
#define I2C_TARGET_INT_DATA
Definition: i2c.h:111
#define I2C_CONTROLLER_CMD_BURST_RECEIVE_START
Definition: i2c.h:79
__STATIC_INLINE void I2CControllerCommand(uint32_t base, uint32_t cmd)
Controls the state of the I2C Controller module.
Definition: i2c.h:191
__STATIC_INLINE void I2CTargetEnable(uint32_t base)
Enables the I2C Target module.
Definition: i2c.h:530
__STATIC_INLINE uint32_t I2CTargetIntStatus(uint32_t base, bool masked)
Gets the current I2C Target interrupt status.
Definition: i2c.h:810
__STATIC_INLINE void I2CControllerDisable(uint32_t base)
Disables the I2C controller module.
Definition: i2c.h:273
__STATIC_INLINE bool I2CControllerIntStatus(uint32_t base, bool masked)
Gets the current I2C Controller interrupt status.
Definition: i2c.h:502
#define I2C_CONTROLLER_CMD_BURST_RECEIVE_FINISH
Definition: i2c.h:81
__STATIC_INLINE void I2CTargetPutData(uint32_t base, uint8_t data)
Transmits a byte from the I2C Target.
Definition: i2c.h:675
#define I2C_CONTROLLER_CMD_BURST_SEND_START
Definition: i2c.h:75
__STATIC_INLINE void I2CControllerSetTargetAddr(uint32_t base, uint8_t targetAddr, bool receive)
Sets the address that the I2C Controller will place on the bus.
Definition: i2c.h:229
#define ASSERT(expr)
Definition: debug.h:71
__STATIC_INLINE uint32_t I2CTargetStatus(uint32_t base)
Gets the I2C Target module status.
Definition: i2c.h:633
__STATIC_INLINE void I2CControllerEnable(uint32_t base)
Enables the I2C Controller module.
Definition: i2c.h:250
__STATIC_INLINE uint32_t I2CControllerGetData(uint32_t base)
Receives a byte that has been sent to the I2C Controller.
Definition: i2c.h:358
__STATIC_INLINE void I2CTargetSetAddress(uint32_t base, uint8_t targetAddr)
Sets the I2C target address.
Definition: i2c.h:584
__STATIC_INLINE void I2CTargetEnableInt(uint32_t base, uint32_t intFlags)
Enables individual I2C Target interrupt sources.
Definition: i2c.h:702
__STATIC_INLINE void I2CTargetDisable(uint32_t base)
Disables the I2C target module.
Definition: i2c.h:605
__STATIC_INLINE void I2CTargetDisableInt(uint32_t base, uint32_t intFlags)
Disables individual I2C Target interrupt sources.
Definition: i2c.h:734
__STATIC_INLINE bool I2CControllerBusBusy(uint32_t base)
Indicates whether or not the I2C bus is busy.
Definition: i2c.h:330
__STATIC_INLINE void I2CControllerEnableInt(uint32_t base)
Enables the I2C Controller interrupt.
Definition: i2c.h:417
#define __STATIC_INLINE
Definition: cmsis_gcc.h:47
#define I2C_CONTROLLER_CMD_BURST_RECEIVE_CONT
Definition: i2c.h:80
__STATIC_INLINE uint32_t I2CTargetGetData(uint32_t base)
Receives a byte that has been sent to the I2C Target.
Definition: i2c.h:654
#define I2C_TARGET_INT_STOP
Definition: i2c.h:109
__STATIC_INLINE void I2CControllerPutData(uint32_t base, uint8_t data)
Transmits a byte from the I2C Controller.
Definition: i2c.h:379
#define I2C_CONTROLLER_CMD_BURST_RECEIVE_ERROR_STOP
Definition: i2c.h:82
#define I2C_CONTROLLER_CMD_SINGLE_SEND
Definition: i2c.h:73
#define I2C_TARGET_INT_START
Definition: i2c.h:110
__STATIC_INLINE bool I2CControllerBusy(uint32_t base)
Indicates whether or not the I2C Controller is busy.
Definition: i2c.h:299
uint32_t I2CControllerError(uint32_t base)
Gets the error status of the I2C Controller module.
Definition: i2c.c:77