I2CCC26XX.h

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/*!****************************************************************************
 *  @file       I2CCC26XX.h
 *
 *  @brief      I2C driver implementation for a CC26XX I2C controller.
 *
 *  # Driver Include #
 *  The I2C header file should be included in an application as follows:
 *  @code
 *  #include <ti/drivers/I2C.h>
 *  #include <ti/drivers/i2c/I2CCC26XX.h>
 *  @endcode
 *
 *  Refer to @ref I2C.h for a complete description of APIs.
 *
 * # Overview #
 * Refer to @ref I2C.h for a complete description of APIs.
 *
 * ## General Behavior #
 * Before using the I2C in CC26XX:
 *   - The I2C driver is initialized by calling I2C_init().
 *   - The I2C HW is configured and system dependencies are declared (e.g. IOs,
 *     power, etc.) by calling I2C_open().
 *   .
 * The following is true for receive operation:
 *   - RX is enabled by calling I2C_transfer().
 *     The readCount of the ::I2C_Transaction must be set to a non-zero value.
 *   - If the I2C_transfer() succeeds, the I2C remains enabled.
 *   - The application must check the return value from I2C_transfer()
 *     to verify that the transfer succeeded.
 *   .
 * The following apply for transmit operation:
 *   - TX is enabled by calling I2C_transfer().
 *     The writeCount of the ::I2C_Transaction must be set to a non-zero value.
 *   - If the I2C_transfer() succeeds, the I2C remains enabled.
 *   - The application must check the return value from I2C_transfer()
 *     to verify that the transfer succeeded.
 *   .
 * After I2C operation has ended:
 *   - Release system dependencies for I2C by calling I2C_close().
 *
 * ### Known Issue #
 * @warning The I2C will transmit a single data byte in the event that the
 * I2C target address is not acknowledged (NACK'd). This is due to a known
 * hardware bug.
 *
 * ## Error handling #
 * If an error occurs during operation:
 *   - The I2C Controller transmits a stop bit and remains enabled.
 *   .
 *
 * ## Power Management #
 *  The I2CCC26XX driver sets a power constraint during transactions to keep
 *  the device out of standby; so when all tasks are blocked, the device will
 *  enter idle mode instead of standby.  When the transactions have finished,
 *  the power constraint to prohibit standby is released.
 *  The following statements are valid:
 *    - After I2C_open() call: I2C is enabled, there are no active I2C
 *      transactions, the device can enter standby.
 *    - After I2C_transfer() call: active I2C transactions exist, the device
 *      might enter idle, but not standby.
 *    - When I2C_transfer() completes, either after success or error, I2C
 *      remains enabled, and the device can enter standby.
 *    - After I2C_close() call: I2C is disabled
 *    - If the device goes into idle during a transaction, the state of
 *      SDA is undefined in the time between the transaction completing and
 *      the device waking up. SCL will go low until the device wakes up and
 *      starts another transaction or releases the bus. If this is a problem
 *      for another device on the I2C bus, you can set a power constraint for
 *      #PowerCC26XX_DISALLOW_IDLE before the transaction and release it
 *      when the transaction completes.
 *
 * ## Supported Functions ##
 *  | Generic API Function   | Description                                       |
 *  |------------------------|---------------------------------------------------|
 *  | #I2C_init()            | Initialize I2C driver                             |
 *  | #I2C_Params_init()     | Initialize an #I2C_Params structure               |
 *  | #I2C_open()            | Initialize I2C HW and set system dependencies     |
 *  | #I2C_close()           | Disable I2C HW and release system dependencies    |
 *  | #I2C_transfer()        | Start I2C transfer                                |
 *  | #I2C_transferTimeout() | Start I2C transfer with a timeout                 |
 *  | #I2C_cancel()          | Cancels all I2C transfers                         |
 *
 *  ## Supported Bit Rates ##
 *    - #I2C_100kHz
 *    - #I2C_400kHz
 *
 * ## Supported Address Modes ##
 *  - #I2C_ADDRESS_MODE_7_BIT
 *
 *  ## Unsupported Functionality #
 *  The CC26XX I2C driver currently does not support:
 *    - Multi-controller mode
 *    - I2C target mode
 *
 *  # Instrumentation #
 *  The I2C driver interface produces log statements if instrumentation is
 *  enabled.
 *
 *  Diagnostics Mask | Log details |
 *  ---------------- | ----------- |
 *  Diags_USER1      | basic I2C operations performed |
 *  Diags_USER2      | detailed I2C operations performed |
 *
 ******************************************************************************
 */

#ifndef ti_drivers_i2c_I2CCC26XX__include
#define ti_drivers_i2c_I2CCC26XX__include

#include <stdint.h>
#include <stdbool.h>

#include <ti/drivers/I2C.h>
#include <ti/drivers/Power.h>
#include <ti/drivers/power/PowerCC26XX.h>

#include <ti/drivers/dpl/SwiP.h>

#ifdef __cplusplus
extern "C" {
#endif

typedef struct
{
    uint8_t pinSDA;
    uint8_t pinSCL;
} I2CCC26XX_I2CPinCfg;

typedef struct
{
    I2C_BASE_HWATTRS

    /*
     *  I2C Swi priority.
     *  The higher the number, the higher the priority.
     *  The minimum is 0 and the maximum is 15 by default.
     *  The maximum can be reduced to save RAM by adding or modifying
     *  Swi.numPriorities in the kernel configuration file.
     */
    uint32_t swiPriority;

    /* I2C peripheral's Power driver ID */
    PowerCC26XX_Resource powerMngrId;

    /* SDA pin index and mux */
    uint8_t sdaPin;
    uint8_t sdaPinMux;
    /* SCL pin index and mux */
    uint8_t sclPin;
    uint8_t sclPinMux;
} I2CCC26XX_HWAttrsV1;

typedef struct
{
    I2C_BASE_OBJECT

    /* Swi object */
    SwiP_Struct swi;

    /* Bitrate of the I2C module */
    uint32_t bitRate;

    /* Pin indexes. We need to cache these because we might have custom pins */
    uint8_t sdaPin;
    uint8_t sclPin;

    /* I2C power notification */
    void *i2cPostFxn;
    Power_NotifyObj i2cPostObj;
} I2CCC26XX_Object;

#ifdef __cplusplus
}
#endif

#endif /* ti_drivers_i2c_I2CCC26XX__include */