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CC27xxDriverLibrary
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Macros | |
| #define | I2S_SD0_DIS I2S_AIFDIRCFG_AD0_DIS |
| SD0 is disabled. More... | |
| #define | I2S_SD0_IN I2S_AIFDIRCFG_AD0_IN |
| SD0 is an input. More... | |
| #define | I2S_SD0_OUT I2S_AIFDIRCFG_AD0_OUT |
| SD0 is an output. More... | |
| #define | I2S_SD1_DIS I2S_AIFDIRCFG_AD1_DIS |
| SD1 is disabled. More... | |
| #define | I2S_SD1_IN I2S_AIFDIRCFG_AD1_IN |
| SD1 is an input. More... | |
| #define | I2S_SD1_OUT I2S_AIFDIRCFG_AD1_OUT |
| SD1 is an output. More... | |
| #define | I2S_CHAN0_MASK 0x00000001 |
| #define | I2S_CHAN1_MASK 0x00000002 |
| #define | I2S_CHAN2_MASK 0x00000004 |
| #define | I2S_CHAN3_MASK 0x00000008 |
| #define | I2S_CHAN4_MASK 0x00000010 |
| #define | I2S_CHAN5_MASK 0x00000020 |
| #define | I2S_CHAN6_MASK 0x00000040 |
| #define | I2S_CHAN7_MASK 0x00000080 |
| #define | I2S_MEM_LENGTH_16 I2S_FMTCFG_MEMLEN32_DIS |
| 16 bit size of word in memory More... | |
| #define | I2S_MEM_LENGTH_32 I2S_FMTCFG_MEMLEN32_EN |
| 24 bit size of word in memory More... | |
| #define | I2S_POS_EDGE I2S_FMTCFG_SMPLEDGE_POSEDGE |
| Sample on positive edge. More... | |
| #define | I2S_NEG_EDGE I2S_FMTCFG_SMPLEDGE_NEGEDGE |
| Sample on negative edge. More... | |
| #define | I2S_STMP_SATURATION 0x0000FFFF |
| The saturation value used when calculating the sample stamp. More... | |
| #define | I2S_INT_XCNT_CAPTURE I2S_IRQFLAGS_XCNTCAPT |
| MCUCLK Capture. More... | |
| #define | I2S_INT_DMA_IN I2S_IRQFLAGS_DMAIN |
| DMA output buffer full interrupt. More... | |
| #define | I2S_INT_DMA_OUT I2S_IRQFLAGS_DMAOUT |
| DMA input buffer empty interrupt. More... | |
| #define | I2S_INT_TIMEOUT I2S_IRQFLAGS_WCLKTIMEOUT |
| Word Clock Timeout. More... | |
| #define | I2S_INT_BUS_ERR I2S_IRQFLAGS_BUSERR |
| DMA Bus error. More... | |
| #define | I2S_INT_WCLK_ERR I2S_IRQFLAGS_WCLKERR |
| Word Clock error. More... | |
| #define | I2S_INT_PTR_ERR I2S_IRQFLAGS_PTRERR |
| Data pointer error (DMA data was not updated in time) More... | |
| #define | I2S_INT_ALL |
| All interrupts. More... | |
Functions | |
| __STATIC_INLINE void | I2SEnableInt (uint32_t base, uint32_t intFlags) |
| Enables individual I2S interrupt sources. More... | |
| __STATIC_INLINE void | I2SDisableInt (uint32_t base, uint32_t intFlags) |
| Disables individual I2S interrupt sources. More... | |
| __STATIC_INLINE uint32_t | I2SIntStatus (uint32_t base, bool masked) |
| Gets the current interrupt status. More... | |
| __STATIC_INLINE void | I2SClearInt (uint32_t base, uint32_t intFlags) |
| Clears I2S interrupt sources. More... | |
| __STATIC_INLINE void | I2SEnableSampleStamp (uint32_t base) |
| Enable the Sample Stamp generator. More... | |
| __STATIC_INLINE void | I2SDisableSampleStamp (uint32_t base) |
| Disable the Sample Stamp generator. More... | |
| uint32_t | I2SGetSampleStamp (uint32_t base, uint32_t channel) |
| Get the current value of a sample stamp counter. More... | |
| __STATIC_INLINE void | I2SStart (uint32_t base, uint16_t dmaLength) |
| Starts the I2S. More... | |
| __STATIC_INLINE void | I2SStop (uint32_t base) |
| Stops the I2S module for operation. More... | |
| __STATIC_INLINE void | I2SConfigureFormat (uint32_t base, uint8_t dataDelay, uint32_t memoryLength, uint32_t samplingEdge, bool dualPhase, uint8_t bitsPerSample) |
| Configure the serial format of the I2S module. More... | |
| __STATIC_INLINE void | I2SConfigureFrame (uint32_t base, uint8_t sd0Usage, uint8_t sd0Channels, uint8_t sd1Usage, uint8_t sd1Channels) |
| Setup the two interfaces SD0 and SD1 (also called AD0 and AD1). More... | |
| __STATIC_INLINE void | I2SConfigureClocks (uint32_t base, bool isController, bool invertWclk, bool dualPhase, uint32_t cclkDiv, uint32_t wclkDiv, uint32_t bclkDiv) |
| Configure the I2S clocks (CCLK, WCLK and BCLK). More... | |
| __STATIC_INLINE void | I2SEnableControllerClocks (uint32_t base) |
| Enable the I2S controller clocks (CCLK, WCLK and BCLK). More... | |
| __STATIC_INLINE void | I2SDisableControllerClocks (uint32_t base) |
| Disable the I2S controller clocks (CCLK, WCLK and BCLK). More... | |
| __STATIC_INLINE void | I2SSetInPointer (uint32_t base, uint32_t nextPointer) |
| Set the next input buffer pointer. More... | |
| __STATIC_INLINE void | I2SSetOutPointer (uint32_t base, uint32_t nextPointer) |
| Set the next output buffer pointer. More... | |
| __STATIC_INLINE uint32_t | I2SGetInPointerNext (uint32_t base) |
| Get value of the next input pointer. More... | |
| __STATIC_INLINE uint32_t | I2SGetOutPointerNext (uint32_t base) |
| Get value of the next output pointer. More... | |
| __STATIC_INLINE uint32_t | I2SGetInPointer (uint32_t base) |
| Get value of the current input pointer. More... | |
| __STATIC_INLINE uint32_t | I2SGetOutPointer (uint32_t base) |
| Get value of the current output pointer. More... | |
| __STATIC_INLINE void | I2SConfigureInSampleStampTrigger (uint32_t base, uint16_t trigValue) |
| Configure the input sample stamp trigger. More... | |
| __STATIC_INLINE void | I2SConfigureOutSampleStampTrigger (uint32_t base, uint16_t trigValue) |
| Configure the output sample stamp trigger. More... | |
| __STATIC_INLINE void | I2SConfigureWclkCounterPeriod (uint32_t base, uint16_t period) |
| Configure the WCLK counter period. More... | |
| __STATIC_INLINE void | I2SConfigureWclkCounter (uint32_t base, int16_t value) |
| Confiugre the WCLK counter value. More... | |
| __STATIC_INLINE void | I2SResetWclkCounter (uint32_t base) |
| Reset the WCLK count. More... | |
The I2S API provides a set of functions for using the I2S module. This module provides a standardized serial interface to transfer audio samples from and to external audio devices such as a codec, DAC, or ADC.
The I2S module has the following features:
The I2S module is configured through the functions I2SConfigureFormat(), I2SConfigureFrame() and I2SConfigureClocks(). If controller mode is used, then the internally generated clocks can be enabled and disabled using I2SEnableControllerClocks() and I2SDisableControllerClocks(), respectively. Transfers are enabled using I2SStart(). Transfers are disabled using I2SStop(). Please note that a specific procedure exists to disable transfers without losing data (refer to I2SStop()).
Data are transmitted using the two double-buffered pointers. For each interface, two registers are set with the address of the data to transfer. These registers are named INPTR and INPTRNEXT for the input interface and OUTPTR and OUTPTRNEXT for the output. When PTR is consumed, the hardware copies the content of PTRNEXT into PTR and the next transfer begins. The address of the next value to write or to read in memory (i.e. to receive or to send out) is set using I2SSetInPointer() and I2SSetOutPointer(). The values stored in INPTRNEXT, OUTPTRNEXT, INPTR and OUTPTR can be read using I2SGetInPointerNext(), I2SGetOutPointerNext(), I2SGetInPointer() and I2SGetOutPointer() functions.
Interrupts can help the user to refresh pointers on time. Interrupts can also be used to detect I2S errors. I2SEnableInt() and I2SDisableInt() activate and deactivate interrupt(s). Interrupt status can be read through I2SIntStatus() and pending interrupt flags can be cleared by I2SClearInt() function.
The sample stamps generator can be configured to start the emission or the reception of the data at specified WCLK counter trigger values using I2SConfigureInSampleStampTrigger(), I2SConfigureOutSampleStampTrigger(), I2SResetWclkCounter() and I2SConfigureWclkCounter(). The current sample stamp can be computed using I2SGetSampleStamp(). To finish, the sample stamps generator can be enabled and disabled using the following functions: I2SEnableSampleStamp() and I2SDisableSampleStamp(). The sample stamps generator must be enabled prior to any transfer.
Functions to perform I2S configuration:
Functions to perform transfers:
Functions to handle interruptions:
Functions to handle sample stamps:
| #define I2S_SD0_DIS I2S_AIFDIRCFG_AD0_DIS |
SD0 is disabled.
| #define I2S_SD0_IN I2S_AIFDIRCFG_AD0_IN |
SD0 is an input.
| #define I2S_SD0_OUT I2S_AIFDIRCFG_AD0_OUT |
SD0 is an output.
| #define I2S_SD1_DIS I2S_AIFDIRCFG_AD1_DIS |
SD1 is disabled.
| #define I2S_SD1_IN I2S_AIFDIRCFG_AD1_IN |
SD1 is an input.
| #define I2S_SD1_OUT I2S_AIFDIRCFG_AD1_OUT |
SD1 is an output.
| #define I2S_CHAN0_MASK 0x00000001 |
| #define I2S_CHAN1_MASK 0x00000002 |
| #define I2S_CHAN2_MASK 0x00000004 |
| #define I2S_CHAN3_MASK 0x00000008 |
| #define I2S_CHAN4_MASK 0x00000010 |
| #define I2S_CHAN5_MASK 0x00000020 |
| #define I2S_CHAN6_MASK 0x00000040 |
| #define I2S_CHAN7_MASK 0x00000080 |
| #define I2S_MEM_LENGTH_16 I2S_FMTCFG_MEMLEN32_DIS |
16 bit size of word in memory
| #define I2S_MEM_LENGTH_32 I2S_FMTCFG_MEMLEN32_EN |
24 bit size of word in memory
| #define I2S_POS_EDGE I2S_FMTCFG_SMPLEDGE_POSEDGE |
Sample on positive edge.
| #define I2S_NEG_EDGE I2S_FMTCFG_SMPLEDGE_NEGEDGE |
Sample on negative edge.
| #define I2S_STMP_SATURATION 0x0000FFFF |
The saturation value used when calculating the sample stamp.
Referenced by I2SGetSampleStamp().
| #define I2S_INT_XCNT_CAPTURE I2S_IRQFLAGS_XCNTCAPT |
MCUCLK Capture.
| #define I2S_INT_DMA_IN I2S_IRQFLAGS_DMAIN |
DMA output buffer full interrupt.
| #define I2S_INT_DMA_OUT I2S_IRQFLAGS_DMAOUT |
DMA input buffer empty interrupt.
| #define I2S_INT_TIMEOUT I2S_IRQFLAGS_WCLKTIMEOUT |
Word Clock Timeout.
| #define I2S_INT_BUS_ERR I2S_IRQFLAGS_BUSERR |
DMA Bus error.
| #define I2S_INT_WCLK_ERR I2S_IRQFLAGS_WCLKERR |
Word Clock error.
| #define I2S_INT_PTR_ERR I2S_IRQFLAGS_PTRERR |
Data pointer error (DMA data was not updated in time)
| #define I2S_INT_ALL |
All interrupts.
| __STATIC_INLINE void I2SEnableInt | ( | uint32_t | base, |
| uint32_t | intFlags | ||
| ) |
Enables individual I2S interrupt sources.
This function enables the indicated I2S interrupt sources. Only the sources that are enabled can propagate to the processor interrupt; disabled sources have no effect on the processor.
| base | is the base address of the I2S module. |
| intFlags | is the bit mask of the interrupt sources to be enabled. The parameter is the bitwise OR of any of the following: |
References ASSERT.
| __STATIC_INLINE void I2SDisableInt | ( | uint32_t | base, |
| uint32_t | intFlags | ||
| ) |
Disables individual I2S interrupt sources.
This function disables the indicated I2S interrupt sources. Only the sources that are enabled propagate to the processor interrupt; disabled sources have no effect on the processor.
| base | is the base address of the I2S module. |
| intFlags | is the bit mask of the interrupt sources to be disabled. The parameter is the bitwise OR of any of the following: |
References ASSERT.
| __STATIC_INLINE uint32_t I2SIntStatus | ( | uint32_t | base, |
| bool | masked | ||
| ) |
Gets the current interrupt status.
This function returns the interrupt status for the specified I2S. Either the raw interrupt status or the status of interrupts that propagate to the processor can be returned.
| base | is the base address of the I2S module. |
| masked | selects between raw and masked interrupt status:
|
References ASSERT.
| __STATIC_INLINE void I2SClearInt | ( | uint32_t | base, |
| uint32_t | intFlags | ||
| ) |
Clears I2S interrupt sources.
The specified I2S interrupt sources are cleared, so that they no longer assert. This function must be called in the interrupt handler to keep the interrupt from being recognized again immediately upon exit.
| base | is the base address of the I2S module. |
| intFlags | is a bit mask of the interrupt sources to be cleared. The parameter is the bitwise OR of any of the following: |
References ASSERT.
| __STATIC_INLINE void I2SEnableSampleStamp | ( | uint32_t | base | ) |
Enable the Sample Stamp generator.
Use this function to enable the sample stamp generators.
| base | is the base address of the I2S module. |
References ASSERT.
| __STATIC_INLINE void I2SDisableSampleStamp | ( | uint32_t | base | ) |
Disable the Sample Stamp generator.
Use this function to disable the sample stamp generator. When the sample stamp generator is disabled, the clock counters are automatically cleared.
| base | is the base address of the I2S module. |
References ASSERT, and I2SGetSampleStamp().
| uint32_t I2SGetSampleStamp | ( | uint32_t | base, |
| uint32_t | channel | ||
| ) |
Get the current value of a sample stamp counter.
| base | is the base address of the I2S module. |
| channel | is the sample stamp counter to sample. |
References I2S_STMP_SATURATION.
Referenced by I2SDisableSampleStamp().
| __STATIC_INLINE void I2SStart | ( | uint32_t | base, |
| uint16_t | dmaLength | ||
| ) |
Starts the I2S.
I2S must be configured before it is started.
| base | is the I2S module base address. |
| dmaLength | is the number of frames in the DMA buffer. This will allow the DMA to read dmaLength frames between two pointer refreshes. Valued values are integers in the range [2, 256], both included. |
References ASSERT.
| __STATIC_INLINE void I2SStop | ( | uint32_t | base | ) |
Stops the I2S module for operation.
This function will immediately disable the I2S module. To ensure that all buffer operations are completed before shutting down, the correct procedure is:
| base | is the I2S module base address. |
References ASSERT.
| __STATIC_INLINE void I2SConfigureFormat | ( | uint32_t | base, |
| uint8_t | dataDelay, | ||
| uint32_t | memoryLength, | ||
| uint32_t | samplingEdge, | ||
| bool | dualPhase, | ||
| uint8_t | bitsPerSample | ||
| ) |
Configure the serial format of the I2S module.
The word length defines the size of the word transmitted on the data lines. For single phased formats bitsPerSample is the exact number of bits per word. In dual phased format this is the maximum number of bits per word.
| base | is the I2S module base address. |
| dataDelay | is the number of BCLK periods between the first WCLK edge and the MSB of the first audio channel data transferred during the phase. Valued values are integers in the range [0, 255], both included. |
| memoryLength | selects the memory length of the samples in memory. Possible values are: |
| samplingEdge | selects if sampling on falling or rising edges. Possible values are: |
| dualPhase | must be set to true for dual phase and to false for single phase. This must be the same value as configured in I2SConfigureClocks() |
| bitsPerSample | is the number of bits transmitted for each sample. Valued values are integers in the range [8, 24], both included. If this number does not match with the memory length selected (16 bits or 32 bits), samples will be truncated or padded. |
References ASSERT.
| __STATIC_INLINE void I2SConfigureFrame | ( | uint32_t | base, |
| uint8_t | sd0Usage, | ||
| uint8_t | sd0Channels, | ||
| uint8_t | sd1Usage, | ||
| uint8_t | sd1Channels | ||
| ) |
Setup the two interfaces SD0 and SD1 (also called AD0 and AD1).
This function sets interface's direction and activated channels.
| base | is base address of the I2S module. |
| sd0Usage | defines the usage of SD0. Valid values are: |
| sd0Channels | defines the channel mask for SD0. Use a bitwise OR'ed combination of: |
| sd1Usage | defines the usage of SD1. Valid values are: |
| sd1Channels | defines the channel mask for SD1. Use a bitwise OR'ed combination of: |
References ASSERT.
| __STATIC_INLINE void I2SConfigureClocks | ( | uint32_t | base, |
| bool | isController, | ||
| bool | invertWclk, | ||
| bool | dualPhase, | ||
| uint32_t | cclkDiv, | ||
| uint32_t | wclkDiv, | ||
| uint32_t | bclkDiv | ||
| ) |
Configure the I2S clocks (CCLK, WCLK and BCLK).
This function does the following:
invertWclk.isController is true, the I2S module will be configured to use internally generated clocks based on dualPhase, cclkDiv, wclkDiv and bclkDiv.| base | is the base address of the I2S module. |
| isController | selects if the device is a Target or a Controller:
|
| invertWclk | selects if the WCLK should be internally inverted:
|
| dualPhase | must be set to true for dual phase and to false for single phase. This must be the same value as configured in I2SConfigureFormat(). |
| cclkDiv | is the desired controller clock (CCLK) divider. I.e. the number of AFCLK periods in one CCLK period. Valid values are integers in the range [2, 1024], both included. |
| wclkDiv | is the desired word clock (WCLK) divider. The interpretation of this value depends on the value of dualPhase:
|
| bclkDiv | is the desired bit clock (BCLK) divider. I.e. the number of AFCLK periods in one BCLK period. Valid values are integers in the range [2, 1024], both included. |
References ASSERT.
| __STATIC_INLINE void I2SEnableControllerClocks | ( | uint32_t | base | ) |
Enable the I2S controller clocks (CCLK, WCLK and BCLK).
Use this function to enable the controller clocks CCLK, WCLK and BCLK (internally generated).
isController parameter set to true.| __STATIC_INLINE void I2SDisableControllerClocks | ( | uint32_t | base | ) |
Disable the I2S controller clocks (CCLK, WCLK and BCLK).
Use this function to disable the controller clocks CCLK, WCLK and BCLK (internally generated).
| __STATIC_INLINE void I2SSetInPointer | ( | uint32_t | base, |
| uint32_t | nextPointer | ||
| ) |
Set the next input buffer pointer.
The next pointer should always be written while the DMA is using the previously written pointer. If not written in time, an I2S_INT_PTR_ERR will occur and all inputs and outputs will be disabled. This function assumes nextPointer is pointing to a valid address.
| base | is the base address of the I2S module. |
| nextPointer | is the address of the data. |
References ASSERT.
| __STATIC_INLINE void I2SSetOutPointer | ( | uint32_t | base, |
| uint32_t | nextPointer | ||
| ) |
Set the next output buffer pointer.
The next pointer should always be written while the DMA is using the previously written pointer. If not written in time, an I2S_INT_PTR_ERR will occur and all inputs and outputs will be disabled. This function assumes nextPointer is pointing to a valid address.
| base | is the base address of the I2S module. |
| nextPointer | is the address of the data. |
References ASSERT.
| __STATIC_INLINE uint32_t I2SGetInPointerNext | ( | uint32_t | base | ) |
Get value of the next input pointer.
| base | is the base address of the I2S module. |
References ASSERT.
| __STATIC_INLINE uint32_t I2SGetOutPointerNext | ( | uint32_t | base | ) |
Get value of the next output pointer.
| base | is the base address of the I2S module. |
References ASSERT.
| __STATIC_INLINE uint32_t I2SGetInPointer | ( | uint32_t | base | ) |
Get value of the current input pointer.
| base | is the base address of the I2S module. |
References ASSERT.
| __STATIC_INLINE uint32_t I2SGetOutPointer | ( | uint32_t | base | ) |
Get value of the current output pointer.
| base | is the base address of the I2S module. |
References ASSERT.
| __STATIC_INLINE void I2SConfigureInSampleStampTrigger | ( | uint32_t | base, |
| uint16_t | trigValue | ||
| ) |
Configure the input sample stamp trigger.
Use this function to configure the input sample stamp trigger.
| base | is the base address of the I2S module. |
| trigValue | value used to set the trigger. |
References ASSERT.
| __STATIC_INLINE void I2SConfigureOutSampleStampTrigger | ( | uint32_t | base, |
| uint16_t | trigValue | ||
| ) |
Configure the output sample stamp trigger.
Use this function to configure the output sample stamp trigger.
| base | is the base address of the I2S module. |
| trigValue | value used to set the trigger. |
References ASSERT.
| __STATIC_INLINE void I2SConfigureWclkCounterPeriod | ( | uint32_t | base, |
| uint16_t | period | ||
| ) |
Configure the WCLK counter period.
Use this function to configure the period of the WCLK counter.
| base | is the base address of the I2S module. |
| period | value used to define when the WCLK counter should reset. This should be configured the size of the sample buffer, in number of frames. |
References ASSERT.
| __STATIC_INLINE void I2SConfigureWclkCounter | ( | uint32_t | base, |
| int16_t | value | ||
| ) |
Confiugre the WCLK counter value.
| base | is the base address of the I2S module. |
| value | is the offset to add to the counter (this value can be negative). |
References ASSERT.
| __STATIC_INLINE void I2SResetWclkCounter | ( | uint32_t | base | ) |
Reset the WCLK count.
| base | is the base address of the I2S module. |
References ASSERT.