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Macros
#define	PMUD_O_CTL 0x00000000U

#define	PMUD_O_MEASCFG 0x00000004U

#define	PMUD_O_BAT 0x00000028U

#define	PMUD_O_BATUPD 0x0000002CU

#define	PMUD_O_TEMP 0x00000030U

#define	PMUD_O_TEMPUPD 0x00000034U

#define	PMUD_O_EVENTMASK 0x00000048U

#define	PMUD_O_EVENT 0x0000004CU

#define	PMUD_O_BATTUL 0x00000050U

#define	PMUD_O_BATTLL 0x00000054U

#define	PMUD_O_TEMPUL 0x00000058U

#define	PMUD_O_TEMPLL 0x0000005CU

#define	PMUD_O_PREG0 0x00000090U

#define	PMUD_O_PREG1 0x00000094U

#define	PMUD_O_PREG2 0x00000098U

#define	PMUD_O_DCDCCFG 0x0000009CU

#define	PMUD_O_DCDCSTAT 0x000000A0U

#define	PMUD_CTL_HYST_EN 0x00000004U

#define	PMUD_CTL_HYST_EN_M 0x00000004U

#define	PMUD_CTL_HYST_EN_S 2U

#define	PMUD_CTL_HYST_EN_EN 0x00000004U

#define	PMUD_CTL_HYST_EN_DIS 0x00000000U

#define	PMUD_CTL_CALC_EN 0x00000002U

#define	PMUD_CTL_CALC_EN_M 0x00000002U

#define	PMUD_CTL_CALC_EN_S 1U

#define	PMUD_CTL_CALC_EN_EN 0x00000002U

#define	PMUD_CTL_CALC_EN_DIS 0x00000000U

#define	PMUD_CTL_MEAS_EN 0x00000001U

#define	PMUD_CTL_MEAS_EN_M 0x00000001U

#define	PMUD_CTL_MEAS_EN_S 0U

#define	PMUD_CTL_MEAS_EN_EN 0x00000001U

#define	PMUD_CTL_MEAS_EN_DIS 0x00000000U

#define	PMUD_MEASCFG_PER_W 2U

#define	PMUD_MEASCFG_PER_M 0x00000003U

#define	PMUD_MEASCFG_PER_S 0U

#define	PMUD_MEASCFG_PER__32CYC 0x00000003U

#define	PMUD_MEASCFG_PER__16CYC 0x00000002U

#define	PMUD_MEASCFG_PER__8CYC 0x00000001U

#define	PMUD_MEASCFG_PER_CONT 0x00000000U

#define	PMUD_BAT_INT_W 3U

#define	PMUD_BAT_INT_M 0x00000700U

#define	PMUD_BAT_INT_S 8U

#define	PMUD_BAT_FRAC_W 8U

#define	PMUD_BAT_FRAC_M 0x000000FFU

#define	PMUD_BAT_FRAC_S 0U

#define	PMUD_BATUPD_STA 0x00000001U

#define	PMUD_BATUPD_STA_M 0x00000001U

#define	PMUD_BATUPD_STA_S 0U

#define	PMUD_BATUPD_STA_UPD 0x00000001U

#define	PMUD_BATUPD_STA_NOUPD 0x00000000U

#define	PMUD_TEMP_INT_W 9U

#define	PMUD_TEMP_INT_M 0x0001FF00U

#define	PMUD_TEMP_INT_S 8U

#define	PMUD_TEMP_FRAC_W 2U

#define	PMUD_TEMP_FRAC_M 0x000000C0U

#define	PMUD_TEMP_FRAC_S 6U

#define	PMUD_TEMPUPD_STA 0x00000001U

#define	PMUD_TEMPUPD_STA_M 0x00000001U

#define	PMUD_TEMPUPD_STA_S 0U

#define	PMUD_TEMPUPD_STA_UPD 0x00000001U

#define	PMUD_TEMPUPD_STA_NOUPD 0x00000000U

#define	PMUD_EVENTMASK_TEMP_UPDATE_MASK 0x00000020U

#define	PMUD_EVENTMASK_TEMP_UPDATE_MASK_M 0x00000020U

#define	PMUD_EVENTMASK_TEMP_UPDATE_MASK_S 5U

#define	PMUD_EVENTMASK_BATT_UPDATE_MASK 0x00000010U

#define	PMUD_EVENTMASK_BATT_UPDATE_MASK_M 0x00000010U

#define	PMUD_EVENTMASK_BATT_UPDATE_MASK_S 4U

#define	PMUD_EVENTMASK_TEMP_BELOW_LL_MASK 0x00000008U

#define	PMUD_EVENTMASK_TEMP_BELOW_LL_MASK_M 0x00000008U

#define	PMUD_EVENTMASK_TEMP_BELOW_LL_MASK_S 3U

#define	PMUD_EVENTMASK_TEMP_OVER_UL_MASK 0x00000004U

#define	PMUD_EVENTMASK_TEMP_OVER_UL_MASK_M 0x00000004U

#define	PMUD_EVENTMASK_TEMP_OVER_UL_MASK_S 2U

#define	PMUD_EVENTMASK_BATT_BELOW_LL_MASK 0x00000002U

#define	PMUD_EVENTMASK_BATT_BELOW_LL_MASK_M 0x00000002U

#define	PMUD_EVENTMASK_BATT_BELOW_LL_MASK_S 1U

#define	PMUD_EVENTMASK_BATT_OVER_UL_MASK 0x00000001U

#define	PMUD_EVENTMASK_BATT_OVER_UL_MASK_M 0x00000001U

#define	PMUD_EVENTMASK_BATT_OVER_UL_MASK_S 0U

#define	PMUD_EVENT_TEMP_UPDATE 0x00000020U

#define	PMUD_EVENT_TEMP_UPDATE_M 0x00000020U

#define	PMUD_EVENT_TEMP_UPDATE_S 5U

#define	PMUD_EVENT_BATT_UPDATE 0x00000010U

#define	PMUD_EVENT_BATT_UPDATE_M 0x00000010U

#define	PMUD_EVENT_BATT_UPDATE_S 4U

#define	PMUD_EVENT_TEMP_BELOW_LL 0x00000008U

#define	PMUD_EVENT_TEMP_BELOW_LL_M 0x00000008U

#define	PMUD_EVENT_TEMP_BELOW_LL_S 3U

#define	PMUD_EVENT_TEMP_OVER_UL 0x00000004U

#define	PMUD_EVENT_TEMP_OVER_UL_M 0x00000004U

#define	PMUD_EVENT_TEMP_OVER_UL_S 2U

#define	PMUD_EVENT_BATT_BELOW_LL 0x00000002U

#define	PMUD_EVENT_BATT_BELOW_LL_M 0x00000002U

#define	PMUD_EVENT_BATT_BELOW_LL_S 1U

#define	PMUD_EVENT_BATT_OVER_UL 0x00000001U

#define	PMUD_EVENT_BATT_OVER_UL_M 0x00000001U

#define	PMUD_EVENT_BATT_OVER_UL_S 0U

#define	PMUD_BATTUL_INT_W 3U

#define	PMUD_BATTUL_INT_M 0x00000700U

#define	PMUD_BATTUL_INT_S 8U

#define	PMUD_BATTUL_FRAC_W 8U

#define	PMUD_BATTUL_FRAC_M 0x000000FFU

#define	PMUD_BATTUL_FRAC_S 0U

#define	PMUD_BATTLL_INT_W 3U

#define	PMUD_BATTLL_INT_M 0x00000700U

#define	PMUD_BATTLL_INT_S 8U

#define	PMUD_BATTLL_FRAC_W 8U

#define	PMUD_BATTLL_FRAC_M 0x000000FFU

#define	PMUD_BATTLL_FRAC_S 0U

#define	PMUD_TEMPUL_INT_W 9U

#define	PMUD_TEMPUL_INT_M 0x0001FF00U

#define	PMUD_TEMPUL_INT_S 8U

#define	PMUD_TEMPUL_FRAC_W 2U

#define	PMUD_TEMPUL_FRAC_M 0x000000C0U

#define	PMUD_TEMPUL_FRAC_S 6U

#define	PMUD_TEMPLL_INT_W 9U

#define	PMUD_TEMPLL_INT_M 0x0001FF00U

#define	PMUD_TEMPLL_INT_S 8U

#define	PMUD_TEMPLL_FRAC_W 2U

#define	PMUD_TEMPLL_FRAC_M 0x000000C0U

#define	PMUD_TEMPLL_FRAC_S 6U

#define	PMUD_PREG0_LOW_IPEAK_DIS 0x00000800U

#define	PMUD_PREG0_LOW_IPEAK_DIS_M 0x00000800U

#define	PMUD_PREG0_LOW_IPEAK_DIS_S 11U

#define	PMUD_PREG0_LOW_IPEAK_DIS_SET 0x00000800U

#define	PMUD_PREG0_LOW_IPEAK_DIS_CLR 0x00000000U

#define	PMUD_PREG0_SOCLDO_ITESTEN 0x00000400U

#define	PMUD_PREG0_SOCLDO_ITESTEN_M 0x00000400U

#define	PMUD_PREG0_SOCLDO_ITESTEN_S 10U

#define	PMUD_PREG0_SOCLDO_ITESTEN_EN 0x00000400U

#define	PMUD_PREG0_SOCLDO_ITESTEN_DIS 0x00000000U

#define	PMUD_PREG0_SOCLDO_ATBSEL_W 3U

#define	PMUD_PREG0_SOCLDO_ATBSEL_M 0x00000380U

#define	PMUD_PREG0_SOCLDO_ATBSEL_S 7U

#define	PMUD_PREG0_SOCLDO_ATBSEL_VDD_AON 0x00000200U

#define	PMUD_PREG0_SOCLDO_ATBSEL_SOCLDO_VREF_AMP_OUT 0x00000100U

#define	PMUD_PREG0_SOCLDO_ATBSEL_SOCLDO_ITEST 0x00000080U

#define	PMUD_PREG0_SOCLDO_ATBSEL_NC 0x00000000U

#define	PMUD_PREG0_UDIGLDO_ATBSEL_W 2U

#define	PMUD_PREG0_UDIGLDO_ATBSEL_M 0x00000060U

#define	PMUD_PREG0_UDIGLDO_ATBSEL_S 5U

#define	PMUD_PREG0_UDIGLDO_ATBSEL_VAL3 0x00000060U

#define	PMUD_PREG0_UDIGLDO_ATBSEL_VAL2 0x00000040U

#define	PMUD_PREG0_UDIGLDO_ATBSEL_VAL1 0x00000020U

#define	PMUD_PREG0_UDIGLDO_ATBSEL_VAL0 0x00000000U

#define	PMUD_PREG0_DIGLDO_ATBSEL_W 3U

#define	PMUD_PREG0_DIGLDO_ATBSEL_M 0x0000001CU

#define	PMUD_PREG0_DIGLDO_ATBSEL_S 2U

#define	PMUD_PREG0_DIGLDO_ATBSEL_VAL4 0x00000010U

#define	PMUD_PREG0_DIGLDO_ATBSEL_VAL2 0x00000008U

#define	PMUD_PREG0_DIGLDO_ATBSEL_VAL1 0x00000004U

#define	PMUD_PREG0_DIGLDO_ATBSEL_VAL0 0x00000000U

#define	PMUD_PREG0_SPARE 0x00000002U

#define	PMUD_PREG0_SPARE_M 0x00000002U

#define	PMUD_PREG0_SPARE_S 1U

#define	PMUD_PREG0_UDIGLDO_EN 0x00000001U

#define	PMUD_PREG0_UDIGLDO_EN_M 0x00000001U

#define	PMUD_PREG0_UDIGLDO_EN_S 0U

#define	PMUD_PREG0_UDIGLDO_EN_EN 0x00000001U

#define	PMUD_PREG0_UDIGLDO_EN_DIS 0x00000000U

#define	PMUD_PREG1_TEST_DCDC_NMOS 0x00080000U

#define	PMUD_PREG1_TEST_DCDC_NMOS_M 0x00080000U

#define	PMUD_PREG1_TEST_DCDC_NMOS_S 19U

#define	PMUD_PREG1_TEST_DCDC_NMOS_EN 0x00080000U

#define	PMUD_PREG1_TEST_DCDC_NMOS_DIS 0x00000000U

#define	PMUD_PREG1_TEST_DCDC_PMOS 0x00040000U

#define	PMUD_PREG1_TEST_DCDC_PMOS_M 0x00040000U

#define	PMUD_PREG1_TEST_DCDC_PMOS_S 18U

#define	PMUD_PREG1_TEST_DCDC_PMOS_EN 0x00040000U

#define	PMUD_PREG1_TEST_DCDC_PMOS_DIS 0x00000000U

#define	PMUD_PREG1_DITHER_EN 0x00020000U

#define	PMUD_PREG1_DITHER_EN_M 0x00020000U

#define	PMUD_PREG1_DITHER_EN_S 17U

#define	PMUD_PREG1_DITHER_EN_EN 0x00020000U

#define	PMUD_PREG1_DITHER_EN_DIS 0x00000000U

#define	PMUD_PREG1_GLDO_AON 0x00010000U

#define	PMUD_PREG1_GLDO_AON_M 0x00010000U

#define	PMUD_PREG1_GLDO_AON_S 16U

#define	PMUD_PREG1_GLDO_AON_EN 0x00010000U

#define	PMUD_PREG1_GLDO_AON_DIS 0x00000000U

#define	PMUD_PREG1_RCHG_BLK_VTRIG_EN 0x00008000U

#define	PMUD_PREG1_RCHG_BLK_VTRIG_EN_M 0x00008000U

#define	PMUD_PREG1_RCHG_BLK_VTRIG_EN_S 15U

#define	PMUD_PREG1_RCHG_BLK_VTRIG_EN_EN 0x00008000U

#define	PMUD_PREG1_RCHG_BLK_VTRIG_EN_DIS 0x00000000U

#define	PMUD_PREG1_RCHG_BLK_ATEST_EN 0x00004000U

#define	PMUD_PREG1_RCHG_BLK_ATEST_EN_M 0x00004000U

#define	PMUD_PREG1_RCHG_BLK_ATEST_EN_S 14U

#define	PMUD_PREG1_RCHG_BLK_ATEST_EN_EN 0x00004000U

#define	PMUD_PREG1_RCHG_BLK_ATEST_EN_DIS 0x00000000U

#define	PMUD_PREG1_RCHG_FORCE_SAMP_VREF 0x00002000U

#define	PMUD_PREG1_RCHG_FORCE_SAMP_VREF_M 0x00002000U

#define	PMUD_PREG1_RCHG_FORCE_SAMP_VREF_S 13U

#define	PMUD_PREG1_RCHG_FORCE_SAMP_VREF_EN 0x00002000U

#define	PMUD_PREG1_RCHG_FORCE_SAMP_VREF_DIS 0x00000000U

#define	PMUD_PREG1_RCHG_COMP_CLK_DIS 0x00001000U

#define	PMUD_PREG1_RCHG_COMP_CLK_DIS_M 0x00001000U

#define	PMUD_PREG1_RCHG_COMP_CLK_DIS_S 12U

#define	PMUD_PREG1_RCHG_COMP_CLK_DIS_DIS 0x00001000U

#define	PMUD_PREG1_RCHG_COMP_CLK_DIS_EN 0x00000000U

#define	PMUD_PREG1_SPARE 0x00000080U

#define	PMUD_PREG1_SPARE_M 0x00000080U

#define	PMUD_PREG1_SPARE_S 7U

#define	PMUD_PREG1_VDDR_ATBSEL 0x00000040U

#define	PMUD_PREG1_VDDR_ATBSEL_M 0x00000040U

#define	PMUD_PREG1_VDDR_ATBSEL_S 6U

#define	PMUD_PREG1_VDDR_ATBSEL_EN 0x00000040U

#define	PMUD_PREG1_VDDR_ATBSEL_DIS 0x00000000U

#define	PMUD_PREG1_GLDO_EA_BIAS_DIS 0x00000020U

#define	PMUD_PREG1_GLDO_EA_BIAS_DIS_M 0x00000020U

#define	PMUD_PREG1_GLDO_EA_BIAS_DIS_S 5U

#define	PMUD_PREG1_GLDO_EA_BIAS_DIS_OFF 0x00000020U

#define	PMUD_PREG1_GLDO_EA_BIAS_DIS_ON 0x00000000U

#define	PMUD_PREG1_GLDO_ATBSEL_W 4U

#define	PMUD_PREG1_GLDO_ATBSEL_M 0x0000001EU

#define	PMUD_PREG1_GLDO_ATBSEL_S 1U

#define	PMUD_PREG1_GLDO_ATBSEL_VDDROK 0x00000010U

#define	PMUD_PREG1_GLDO_ATBSEL_IB1U 0x00000008U

#define	PMUD_PREG1_GLDO_ATBSEL_PASSGATE 0x00000004U

#define	PMUD_PREG1_GLDO_ATBSEL_ERRAMP_OUT 0x00000002U

#define	PMUD_PREG1_GLDO_ATBSEL_NC 0x00000000U

#define	PMUD_PREG2_RSTNMASK 0x00000020U

#define	PMUD_PREG2_RSTNMASK_M 0x00000020U

#define	PMUD_PREG2_RSTNMASK_S 5U

#define	PMUD_PREG2_RSTNMASK_BM 0x00000020U

#define	PMUD_PREG2_RSTNMASK_BNM 0x00000000U

#define	PMUD_PREG2_DCDC_RCHG_ATBSEL 0x00000010U

#define	PMUD_PREG2_DCDC_RCHG_ATBSEL_M 0x00000010U

#define	PMUD_PREG2_DCDC_RCHG_ATBSEL_S 4U

#define	PMUD_PREG2_DCDC_RCHG_ATBSEL_RCHG_BLK 0x00000010U

#define	PMUD_PREG2_DCDC_RCHG_ATBSEL_DCDC_GLDO 0x00000000U

#define	PMUD_PREG2_PMUREG_ATBSEL_W 4U

#define	PMUD_PREG2_PMUREG_ATBSEL_M 0x0000000FU

#define	PMUD_PREG2_PMUREG_ATBSEL_S 0U

#define	PMUD_PREG2_PMUREG_ATBSEL_DCDC_ATEST0_RCHG_ATEST1 0x00000008U

#define	PMUD_PREG2_PMUREG_ATBSEL_SOCLDOI_A0 0x00000004U

#define	PMUD_PREG2_PMUREG_ATBSEL_RESERVED 0x00000002U

#define	PMUD_PREG2_PMUREG_ATBSEL_SOCLDOV_A1 0x00000001U

#define	PMUD_PREG2_PMUREG_ATBSEL_NC 0x00000000U

#define	PMUD_DCDCCFG_LM_HIGHTH_W 7U

#define	PMUD_DCDCCFG_LM_HIGHTH_M 0x007F0000U

#define	PMUD_DCDCCFG_LM_HIGHTH_S 16U

#define	PMUD_DCDCCFG_LM_LOWTH_W 7U

#define	PMUD_DCDCCFG_LM_LOWTH_M 0x00007F00U

#define	PMUD_DCDCCFG_LM_LOWTH_S 8U

#define	PMUD_DCDCCFG_ADP_IPEAK_EN 0x00000010U

#define	PMUD_DCDCCFG_ADP_IPEAK_EN_M 0x00000010U

#define	PMUD_DCDCCFG_ADP_IPEAK_EN_S 4U

#define	PMUD_DCDCCFG_ADP_IPEAK_EN_EN 0x00000010U

#define	PMUD_DCDCCFG_ADP_IPEAK_EN_DIS 0x00000000U

#define	PMUD_DCDCCFG_LMEN 0x00000001U

#define	PMUD_DCDCCFG_LMEN_M 0x00000001U

#define	PMUD_DCDCCFG_LMEN_S 0U

#define	PMUD_DCDCCFG_LMEN_EN 0x00000001U

#define	PMUD_DCDCCFG_LMEN_DIS 0x00000000U

#define	PMUD_DCDCSTAT_IPEAK_W 3U

#define	PMUD_DCDCSTAT_IPEAK_M 0x00000700U

#define	PMUD_DCDCSTAT_IPEAK_S 8U

#define	PMUD_DCDCSTAT_LOAD_W 7U

#define	PMUD_DCDCSTAT_LOAD_M 0x0000007FU

#define	PMUD_DCDCSTAT_LOAD_S 0U

Macro Definition Documentation

§ PMUD_O_CTL

#define PMUD_O_CTL 0x00000000U

§ PMUD_O_MEASCFG

#define PMUD_O_MEASCFG 0x00000004U

§ PMUD_O_BAT

#define PMUD_O_BAT 0x00000028U

§ PMUD_O_BATUPD

#define PMUD_O_BATUPD 0x0000002CU

§ PMUD_O_TEMP

#define PMUD_O_TEMP 0x00000030U

§ PMUD_O_TEMPUPD

#define PMUD_O_TEMPUPD 0x00000034U

§ PMUD_O_EVENTMASK

#define PMUD_O_EVENTMASK 0x00000048U

§ PMUD_O_EVENT

#define PMUD_O_EVENT 0x0000004CU

§ PMUD_O_BATTUL

#define PMUD_O_BATTUL 0x00000050U

§ PMUD_O_BATTLL

#define PMUD_O_BATTLL 0x00000054U

§ PMUD_O_TEMPUL

#define PMUD_O_TEMPUL 0x00000058U

§ PMUD_O_TEMPLL

#define PMUD_O_TEMPLL 0x0000005CU

§ PMUD_O_PREG0

#define PMUD_O_PREG0 0x00000090U

§ PMUD_O_PREG1

#define PMUD_O_PREG1 0x00000094U

§ PMUD_O_PREG2

#define PMUD_O_PREG2 0x00000098U

§ PMUD_O_DCDCCFG

#define PMUD_O_DCDCCFG 0x0000009CU

§ PMUD_O_DCDCSTAT

#define PMUD_O_DCDCSTAT 0x000000A0U

§ PMUD_CTL_HYST_EN

#define PMUD_CTL_HYST_EN 0x00000004U

§ PMUD_CTL_HYST_EN_M

#define PMUD_CTL_HYST_EN_M 0x00000004U

§ PMUD_CTL_HYST_EN_S

#define PMUD_CTL_HYST_EN_S 2U

§ PMUD_CTL_HYST_EN_EN

#define PMUD_CTL_HYST_EN_EN 0x00000004U

§ PMUD_CTL_HYST_EN_DIS

#define PMUD_CTL_HYST_EN_DIS 0x00000000U

§ PMUD_CTL_CALC_EN

#define PMUD_CTL_CALC_EN 0x00000002U

§ PMUD_CTL_CALC_EN_M

#define PMUD_CTL_CALC_EN_M 0x00000002U

§ PMUD_CTL_CALC_EN_S

#define PMUD_CTL_CALC_EN_S 1U

§ PMUD_CTL_CALC_EN_EN

#define PMUD_CTL_CALC_EN_EN 0x00000002U

§ PMUD_CTL_CALC_EN_DIS

#define PMUD_CTL_CALC_EN_DIS 0x00000000U

§ PMUD_CTL_MEAS_EN

#define PMUD_CTL_MEAS_EN 0x00000001U

§ PMUD_CTL_MEAS_EN_M

#define PMUD_CTL_MEAS_EN_M 0x00000001U

§ PMUD_CTL_MEAS_EN_S

#define PMUD_CTL_MEAS_EN_S 0U

§ PMUD_CTL_MEAS_EN_EN

#define PMUD_CTL_MEAS_EN_EN 0x00000001U

§ PMUD_CTL_MEAS_EN_DIS

#define PMUD_CTL_MEAS_EN_DIS 0x00000000U

§ PMUD_MEASCFG_PER_W

#define PMUD_MEASCFG_PER_W 2U

§ PMUD_MEASCFG_PER_M

#define PMUD_MEASCFG_PER_M 0x00000003U

§ PMUD_MEASCFG_PER_S

#define PMUD_MEASCFG_PER_S 0U

§ PMUD_MEASCFG_PER__32CYC

#define PMUD_MEASCFG_PER__32CYC 0x00000003U

§ PMUD_MEASCFG_PER__16CYC

#define PMUD_MEASCFG_PER__16CYC 0x00000002U

§ PMUD_MEASCFG_PER__8CYC

#define PMUD_MEASCFG_PER__8CYC 0x00000001U

§ PMUD_MEASCFG_PER_CONT

#define PMUD_MEASCFG_PER_CONT 0x00000000U

§ PMUD_BAT_INT_W

#define PMUD_BAT_INT_W 3U

§ PMUD_BAT_INT_M

#define PMUD_BAT_INT_M 0x00000700U

§ PMUD_BAT_INT_S

#define PMUD_BAT_INT_S 8U

§ PMUD_BAT_FRAC_W

#define PMUD_BAT_FRAC_W 8U

§ PMUD_BAT_FRAC_M

#define PMUD_BAT_FRAC_M 0x000000FFU

§ PMUD_BAT_FRAC_S

#define PMUD_BAT_FRAC_S 0U

§ PMUD_BATUPD_STA

#define PMUD_BATUPD_STA 0x00000001U

§ PMUD_BATUPD_STA_M

#define PMUD_BATUPD_STA_M 0x00000001U

§ PMUD_BATUPD_STA_S

#define PMUD_BATUPD_STA_S 0U

§ PMUD_BATUPD_STA_UPD

#define PMUD_BATUPD_STA_UPD 0x00000001U

§ PMUD_BATUPD_STA_NOUPD

#define PMUD_BATUPD_STA_NOUPD 0x00000000U

§ PMUD_TEMP_INT_W

#define PMUD_TEMP_INT_W 9U

§ PMUD_TEMP_INT_M

#define PMUD_TEMP_INT_M 0x0001FF00U

§ PMUD_TEMP_INT_S

#define PMUD_TEMP_INT_S 8U

§ PMUD_TEMP_FRAC_W

#define PMUD_TEMP_FRAC_W 2U

§ PMUD_TEMP_FRAC_M

#define PMUD_TEMP_FRAC_M 0x000000C0U

§ PMUD_TEMP_FRAC_S

#define PMUD_TEMP_FRAC_S 6U

§ PMUD_TEMPUPD_STA

#define PMUD_TEMPUPD_STA 0x00000001U

§ PMUD_TEMPUPD_STA_M

#define PMUD_TEMPUPD_STA_M 0x00000001U

§ PMUD_TEMPUPD_STA_S

#define PMUD_TEMPUPD_STA_S 0U

§ PMUD_TEMPUPD_STA_UPD

#define PMUD_TEMPUPD_STA_UPD 0x00000001U

§ PMUD_TEMPUPD_STA_NOUPD

#define PMUD_TEMPUPD_STA_NOUPD 0x00000000U

§ PMUD_EVENTMASK_TEMP_UPDATE_MASK

#define PMUD_EVENTMASK_TEMP_UPDATE_MASK 0x00000020U

§ PMUD_EVENTMASK_TEMP_UPDATE_MASK_M

#define PMUD_EVENTMASK_TEMP_UPDATE_MASK_M 0x00000020U

§ PMUD_EVENTMASK_TEMP_UPDATE_MASK_S

#define PMUD_EVENTMASK_TEMP_UPDATE_MASK_S 5U

§ PMUD_EVENTMASK_BATT_UPDATE_MASK

#define PMUD_EVENTMASK_BATT_UPDATE_MASK 0x00000010U

§ PMUD_EVENTMASK_BATT_UPDATE_MASK_M

#define PMUD_EVENTMASK_BATT_UPDATE_MASK_M 0x00000010U

§ PMUD_EVENTMASK_BATT_UPDATE_MASK_S

#define PMUD_EVENTMASK_BATT_UPDATE_MASK_S 4U

§ PMUD_EVENTMASK_TEMP_BELOW_LL_MASK

#define PMUD_EVENTMASK_TEMP_BELOW_LL_MASK 0x00000008U

§ PMUD_EVENTMASK_TEMP_BELOW_LL_MASK_M

#define PMUD_EVENTMASK_TEMP_BELOW_LL_MASK_M 0x00000008U

§ PMUD_EVENTMASK_TEMP_BELOW_LL_MASK_S

#define PMUD_EVENTMASK_TEMP_BELOW_LL_MASK_S 3U

§ PMUD_EVENTMASK_TEMP_OVER_UL_MASK

#define PMUD_EVENTMASK_TEMP_OVER_UL_MASK 0x00000004U

§ PMUD_EVENTMASK_TEMP_OVER_UL_MASK_M

#define PMUD_EVENTMASK_TEMP_OVER_UL_MASK_M 0x00000004U

§ PMUD_EVENTMASK_TEMP_OVER_UL_MASK_S

#define PMUD_EVENTMASK_TEMP_OVER_UL_MASK_S 2U

§ PMUD_EVENTMASK_BATT_BELOW_LL_MASK

#define PMUD_EVENTMASK_BATT_BELOW_LL_MASK 0x00000002U

§ PMUD_EVENTMASK_BATT_BELOW_LL_MASK_M

#define PMUD_EVENTMASK_BATT_BELOW_LL_MASK_M 0x00000002U

§ PMUD_EVENTMASK_BATT_BELOW_LL_MASK_S

#define PMUD_EVENTMASK_BATT_BELOW_LL_MASK_S 1U

§ PMUD_EVENTMASK_BATT_OVER_UL_MASK

#define PMUD_EVENTMASK_BATT_OVER_UL_MASK 0x00000001U

§ PMUD_EVENTMASK_BATT_OVER_UL_MASK_M

#define PMUD_EVENTMASK_BATT_OVER_UL_MASK_M 0x00000001U

§ PMUD_EVENTMASK_BATT_OVER_UL_MASK_S

#define PMUD_EVENTMASK_BATT_OVER_UL_MASK_S 0U

§ PMUD_EVENT_TEMP_UPDATE

#define PMUD_EVENT_TEMP_UPDATE 0x00000020U

§ PMUD_EVENT_TEMP_UPDATE_M

#define PMUD_EVENT_TEMP_UPDATE_M 0x00000020U

§ PMUD_EVENT_TEMP_UPDATE_S

#define PMUD_EVENT_TEMP_UPDATE_S 5U

§ PMUD_EVENT_BATT_UPDATE

#define PMUD_EVENT_BATT_UPDATE 0x00000010U

§ PMUD_EVENT_BATT_UPDATE_M

#define PMUD_EVENT_BATT_UPDATE_M 0x00000010U

§ PMUD_EVENT_BATT_UPDATE_S

#define PMUD_EVENT_BATT_UPDATE_S 4U

§ PMUD_EVENT_TEMP_BELOW_LL

#define PMUD_EVENT_TEMP_BELOW_LL 0x00000008U

§ PMUD_EVENT_TEMP_BELOW_LL_M

#define PMUD_EVENT_TEMP_BELOW_LL_M 0x00000008U

§ PMUD_EVENT_TEMP_BELOW_LL_S

#define PMUD_EVENT_TEMP_BELOW_LL_S 3U

§ PMUD_EVENT_TEMP_OVER_UL

#define PMUD_EVENT_TEMP_OVER_UL 0x00000004U

§ PMUD_EVENT_TEMP_OVER_UL_M

#define PMUD_EVENT_TEMP_OVER_UL_M 0x00000004U

§ PMUD_EVENT_TEMP_OVER_UL_S

#define PMUD_EVENT_TEMP_OVER_UL_S 2U

§ PMUD_EVENT_BATT_BELOW_LL

#define PMUD_EVENT_BATT_BELOW_LL 0x00000002U

§ PMUD_EVENT_BATT_BELOW_LL_M

#define PMUD_EVENT_BATT_BELOW_LL_M 0x00000002U

§ PMUD_EVENT_BATT_BELOW_LL_S

#define PMUD_EVENT_BATT_BELOW_LL_S 1U

§ PMUD_EVENT_BATT_OVER_UL

#define PMUD_EVENT_BATT_OVER_UL 0x00000001U

§ PMUD_EVENT_BATT_OVER_UL_M

#define PMUD_EVENT_BATT_OVER_UL_M 0x00000001U

§ PMUD_EVENT_BATT_OVER_UL_S

#define PMUD_EVENT_BATT_OVER_UL_S 0U

§ PMUD_BATTUL_INT_W

#define PMUD_BATTUL_INT_W 3U

§ PMUD_BATTUL_INT_M

#define PMUD_BATTUL_INT_M 0x00000700U

§ PMUD_BATTUL_INT_S

#define PMUD_BATTUL_INT_S 8U

§ PMUD_BATTUL_FRAC_W

#define PMUD_BATTUL_FRAC_W 8U

§ PMUD_BATTUL_FRAC_M

#define PMUD_BATTUL_FRAC_M 0x000000FFU

§ PMUD_BATTUL_FRAC_S

#define PMUD_BATTUL_FRAC_S 0U

§ PMUD_BATTLL_INT_W

#define PMUD_BATTLL_INT_W 3U

§ PMUD_BATTLL_INT_M

#define PMUD_BATTLL_INT_M 0x00000700U

§ PMUD_BATTLL_INT_S

#define PMUD_BATTLL_INT_S 8U

§ PMUD_BATTLL_FRAC_W

#define PMUD_BATTLL_FRAC_W 8U

§ PMUD_BATTLL_FRAC_M

#define PMUD_BATTLL_FRAC_M 0x000000FFU

§ PMUD_BATTLL_FRAC_S

#define PMUD_BATTLL_FRAC_S 0U

§ PMUD_TEMPUL_INT_W

#define PMUD_TEMPUL_INT_W 9U

§ PMUD_TEMPUL_INT_M

#define PMUD_TEMPUL_INT_M 0x0001FF00U

§ PMUD_TEMPUL_INT_S

#define PMUD_TEMPUL_INT_S 8U

§ PMUD_TEMPUL_FRAC_W

#define PMUD_TEMPUL_FRAC_W 2U

§ PMUD_TEMPUL_FRAC_M

#define PMUD_TEMPUL_FRAC_M 0x000000C0U

§ PMUD_TEMPUL_FRAC_S

#define PMUD_TEMPUL_FRAC_S 6U

§ PMUD_TEMPLL_INT_W

#define PMUD_TEMPLL_INT_W 9U

§ PMUD_TEMPLL_INT_M

#define PMUD_TEMPLL_INT_M 0x0001FF00U

§ PMUD_TEMPLL_INT_S

#define PMUD_TEMPLL_INT_S 8U

§ PMUD_TEMPLL_FRAC_W

#define PMUD_TEMPLL_FRAC_W 2U

§ PMUD_TEMPLL_FRAC_M

#define PMUD_TEMPLL_FRAC_M 0x000000C0U

§ PMUD_TEMPLL_FRAC_S

#define PMUD_TEMPLL_FRAC_S 6U

§ PMUD_PREG0_LOW_IPEAK_DIS

#define PMUD_PREG0_LOW_IPEAK_DIS 0x00000800U

§ PMUD_PREG0_LOW_IPEAK_DIS_M

#define PMUD_PREG0_LOW_IPEAK_DIS_M 0x00000800U

§ PMUD_PREG0_LOW_IPEAK_DIS_S

#define PMUD_PREG0_LOW_IPEAK_DIS_S 11U

§ PMUD_PREG0_LOW_IPEAK_DIS_SET

#define PMUD_PREG0_LOW_IPEAK_DIS_SET 0x00000800U

§ PMUD_PREG0_LOW_IPEAK_DIS_CLR

#define PMUD_PREG0_LOW_IPEAK_DIS_CLR 0x00000000U

§ PMUD_PREG0_SOCLDO_ITESTEN

#define PMUD_PREG0_SOCLDO_ITESTEN 0x00000400U

§ PMUD_PREG0_SOCLDO_ITESTEN_M

#define PMUD_PREG0_SOCLDO_ITESTEN_M 0x00000400U

§ PMUD_PREG0_SOCLDO_ITESTEN_S

#define PMUD_PREG0_SOCLDO_ITESTEN_S 10U

§ PMUD_PREG0_SOCLDO_ITESTEN_EN

#define PMUD_PREG0_SOCLDO_ITESTEN_EN 0x00000400U

§ PMUD_PREG0_SOCLDO_ITESTEN_DIS

#define PMUD_PREG0_SOCLDO_ITESTEN_DIS 0x00000000U

§ PMUD_PREG0_SOCLDO_ATBSEL_W

#define PMUD_PREG0_SOCLDO_ATBSEL_W 3U

§ PMUD_PREG0_SOCLDO_ATBSEL_M

#define PMUD_PREG0_SOCLDO_ATBSEL_M 0x00000380U

§ PMUD_PREG0_SOCLDO_ATBSEL_S

#define PMUD_PREG0_SOCLDO_ATBSEL_S 7U

§ PMUD_PREG0_SOCLDO_ATBSEL_VDD_AON

#define PMUD_PREG0_SOCLDO_ATBSEL_VDD_AON 0x00000200U

§ PMUD_PREG0_SOCLDO_ATBSEL_SOCLDO_VREF_AMP_OUT

#define PMUD_PREG0_SOCLDO_ATBSEL_SOCLDO_VREF_AMP_OUT 0x00000100U

§ PMUD_PREG0_SOCLDO_ATBSEL_SOCLDO_ITEST

#define PMUD_PREG0_SOCLDO_ATBSEL_SOCLDO_ITEST 0x00000080U

§ PMUD_PREG0_SOCLDO_ATBSEL_NC

#define PMUD_PREG0_SOCLDO_ATBSEL_NC 0x00000000U

§ PMUD_PREG0_UDIGLDO_ATBSEL_W

#define PMUD_PREG0_UDIGLDO_ATBSEL_W 2U

§ PMUD_PREG0_UDIGLDO_ATBSEL_M

#define PMUD_PREG0_UDIGLDO_ATBSEL_M 0x00000060U

§ PMUD_PREG0_UDIGLDO_ATBSEL_S

#define PMUD_PREG0_UDIGLDO_ATBSEL_S 5U

§ PMUD_PREG0_UDIGLDO_ATBSEL_VAL3

#define PMUD_PREG0_UDIGLDO_ATBSEL_VAL3 0x00000060U

§ PMUD_PREG0_UDIGLDO_ATBSEL_VAL2

#define PMUD_PREG0_UDIGLDO_ATBSEL_VAL2 0x00000040U

§ PMUD_PREG0_UDIGLDO_ATBSEL_VAL1

#define PMUD_PREG0_UDIGLDO_ATBSEL_VAL1 0x00000020U

§ PMUD_PREG0_UDIGLDO_ATBSEL_VAL0

#define PMUD_PREG0_UDIGLDO_ATBSEL_VAL0 0x00000000U

§ PMUD_PREG0_DIGLDO_ATBSEL_W

#define PMUD_PREG0_DIGLDO_ATBSEL_W 3U

§ PMUD_PREG0_DIGLDO_ATBSEL_M

#define PMUD_PREG0_DIGLDO_ATBSEL_M 0x0000001CU

§ PMUD_PREG0_DIGLDO_ATBSEL_S

#define PMUD_PREG0_DIGLDO_ATBSEL_S 2U

§ PMUD_PREG0_DIGLDO_ATBSEL_VAL4

#define PMUD_PREG0_DIGLDO_ATBSEL_VAL4 0x00000010U

§ PMUD_PREG0_DIGLDO_ATBSEL_VAL2

#define PMUD_PREG0_DIGLDO_ATBSEL_VAL2 0x00000008U

§ PMUD_PREG0_DIGLDO_ATBSEL_VAL1

#define PMUD_PREG0_DIGLDO_ATBSEL_VAL1 0x00000004U

§ PMUD_PREG0_DIGLDO_ATBSEL_VAL0

#define PMUD_PREG0_DIGLDO_ATBSEL_VAL0 0x00000000U

§ PMUD_PREG0_SPARE

#define PMUD_PREG0_SPARE 0x00000002U

§ PMUD_PREG0_SPARE_M

#define PMUD_PREG0_SPARE_M 0x00000002U

§ PMUD_PREG0_SPARE_S

#define PMUD_PREG0_SPARE_S 1U

§ PMUD_PREG0_UDIGLDO_EN

#define PMUD_PREG0_UDIGLDO_EN 0x00000001U

§ PMUD_PREG0_UDIGLDO_EN_M

#define PMUD_PREG0_UDIGLDO_EN_M 0x00000001U

§ PMUD_PREG0_UDIGLDO_EN_S

#define PMUD_PREG0_UDIGLDO_EN_S 0U

§ PMUD_PREG0_UDIGLDO_EN_EN

#define PMUD_PREG0_UDIGLDO_EN_EN 0x00000001U

§ PMUD_PREG0_UDIGLDO_EN_DIS

#define PMUD_PREG0_UDIGLDO_EN_DIS 0x00000000U

§ PMUD_PREG1_TEST_DCDC_NMOS

#define PMUD_PREG1_TEST_DCDC_NMOS 0x00080000U

§ PMUD_PREG1_TEST_DCDC_NMOS_M

#define PMUD_PREG1_TEST_DCDC_NMOS_M 0x00080000U

§ PMUD_PREG1_TEST_DCDC_NMOS_S

#define PMUD_PREG1_TEST_DCDC_NMOS_S 19U

§ PMUD_PREG1_TEST_DCDC_NMOS_EN

#define PMUD_PREG1_TEST_DCDC_NMOS_EN 0x00080000U

§ PMUD_PREG1_TEST_DCDC_NMOS_DIS

#define PMUD_PREG1_TEST_DCDC_NMOS_DIS 0x00000000U

§ PMUD_PREG1_TEST_DCDC_PMOS

#define PMUD_PREG1_TEST_DCDC_PMOS 0x00040000U

§ PMUD_PREG1_TEST_DCDC_PMOS_M

#define PMUD_PREG1_TEST_DCDC_PMOS_M 0x00040000U

§ PMUD_PREG1_TEST_DCDC_PMOS_S

#define PMUD_PREG1_TEST_DCDC_PMOS_S 18U

§ PMUD_PREG1_TEST_DCDC_PMOS_EN

#define PMUD_PREG1_TEST_DCDC_PMOS_EN 0x00040000U

§ PMUD_PREG1_TEST_DCDC_PMOS_DIS

#define PMUD_PREG1_TEST_DCDC_PMOS_DIS 0x00000000U

§ PMUD_PREG1_DITHER_EN

#define PMUD_PREG1_DITHER_EN 0x00020000U

§ PMUD_PREG1_DITHER_EN_M

#define PMUD_PREG1_DITHER_EN_M 0x00020000U

§ PMUD_PREG1_DITHER_EN_S

#define PMUD_PREG1_DITHER_EN_S 17U

§ PMUD_PREG1_DITHER_EN_EN

#define PMUD_PREG1_DITHER_EN_EN 0x00020000U

§ PMUD_PREG1_DITHER_EN_DIS

#define PMUD_PREG1_DITHER_EN_DIS 0x00000000U

§ PMUD_PREG1_GLDO_AON

#define PMUD_PREG1_GLDO_AON 0x00010000U

§ PMUD_PREG1_GLDO_AON_M

#define PMUD_PREG1_GLDO_AON_M 0x00010000U

§ PMUD_PREG1_GLDO_AON_S

#define PMUD_PREG1_GLDO_AON_S 16U

§ PMUD_PREG1_GLDO_AON_EN

#define PMUD_PREG1_GLDO_AON_EN 0x00010000U

§ PMUD_PREG1_GLDO_AON_DIS

#define PMUD_PREG1_GLDO_AON_DIS 0x00000000U

§ PMUD_PREG1_RCHG_BLK_VTRIG_EN

#define PMUD_PREG1_RCHG_BLK_VTRIG_EN 0x00008000U

§ PMUD_PREG1_RCHG_BLK_VTRIG_EN_M

#define PMUD_PREG1_RCHG_BLK_VTRIG_EN_M 0x00008000U

§ PMUD_PREG1_RCHG_BLK_VTRIG_EN_S

#define PMUD_PREG1_RCHG_BLK_VTRIG_EN_S 15U

§ PMUD_PREG1_RCHG_BLK_VTRIG_EN_EN

#define PMUD_PREG1_RCHG_BLK_VTRIG_EN_EN 0x00008000U

§ PMUD_PREG1_RCHG_BLK_VTRIG_EN_DIS

#define PMUD_PREG1_RCHG_BLK_VTRIG_EN_DIS 0x00000000U

§ PMUD_PREG1_RCHG_BLK_ATEST_EN

#define PMUD_PREG1_RCHG_BLK_ATEST_EN 0x00004000U

§ PMUD_PREG1_RCHG_BLK_ATEST_EN_M

#define PMUD_PREG1_RCHG_BLK_ATEST_EN_M 0x00004000U

§ PMUD_PREG1_RCHG_BLK_ATEST_EN_S

#define PMUD_PREG1_RCHG_BLK_ATEST_EN_S 14U

§ PMUD_PREG1_RCHG_BLK_ATEST_EN_EN

#define PMUD_PREG1_RCHG_BLK_ATEST_EN_EN 0x00004000U

§ PMUD_PREG1_RCHG_BLK_ATEST_EN_DIS

#define PMUD_PREG1_RCHG_BLK_ATEST_EN_DIS 0x00000000U

§ PMUD_PREG1_RCHG_FORCE_SAMP_VREF

#define PMUD_PREG1_RCHG_FORCE_SAMP_VREF 0x00002000U

§ PMUD_PREG1_RCHG_FORCE_SAMP_VREF_M

#define PMUD_PREG1_RCHG_FORCE_SAMP_VREF_M 0x00002000U

§ PMUD_PREG1_RCHG_FORCE_SAMP_VREF_S

#define PMUD_PREG1_RCHG_FORCE_SAMP_VREF_S 13U

§ PMUD_PREG1_RCHG_FORCE_SAMP_VREF_EN

#define PMUD_PREG1_RCHG_FORCE_SAMP_VREF_EN 0x00002000U

§ PMUD_PREG1_RCHG_FORCE_SAMP_VREF_DIS

#define PMUD_PREG1_RCHG_FORCE_SAMP_VREF_DIS 0x00000000U

§ PMUD_PREG1_RCHG_COMP_CLK_DIS

#define PMUD_PREG1_RCHG_COMP_CLK_DIS 0x00001000U

§ PMUD_PREG1_RCHG_COMP_CLK_DIS_M

#define PMUD_PREG1_RCHG_COMP_CLK_DIS_M 0x00001000U

§ PMUD_PREG1_RCHG_COMP_CLK_DIS_S

#define PMUD_PREG1_RCHG_COMP_CLK_DIS_S 12U

§ PMUD_PREG1_RCHG_COMP_CLK_DIS_DIS

#define PMUD_PREG1_RCHG_COMP_CLK_DIS_DIS 0x00001000U

§ PMUD_PREG1_RCHG_COMP_CLK_DIS_EN

#define PMUD_PREG1_RCHG_COMP_CLK_DIS_EN 0x00000000U

§ PMUD_PREG1_SPARE

#define PMUD_PREG1_SPARE 0x00000080U

§ PMUD_PREG1_SPARE_M

#define PMUD_PREG1_SPARE_M 0x00000080U

§ PMUD_PREG1_SPARE_S

#define PMUD_PREG1_SPARE_S 7U

§ PMUD_PREG1_VDDR_ATBSEL

#define PMUD_PREG1_VDDR_ATBSEL 0x00000040U

§ PMUD_PREG1_VDDR_ATBSEL_M

#define PMUD_PREG1_VDDR_ATBSEL_M 0x00000040U

§ PMUD_PREG1_VDDR_ATBSEL_S

#define PMUD_PREG1_VDDR_ATBSEL_S 6U

§ PMUD_PREG1_VDDR_ATBSEL_EN

#define PMUD_PREG1_VDDR_ATBSEL_EN 0x00000040U

§ PMUD_PREG1_VDDR_ATBSEL_DIS

#define PMUD_PREG1_VDDR_ATBSEL_DIS 0x00000000U

§ PMUD_PREG1_GLDO_EA_BIAS_DIS

#define PMUD_PREG1_GLDO_EA_BIAS_DIS 0x00000020U

§ PMUD_PREG1_GLDO_EA_BIAS_DIS_M

#define PMUD_PREG1_GLDO_EA_BIAS_DIS_M 0x00000020U

§ PMUD_PREG1_GLDO_EA_BIAS_DIS_S

#define PMUD_PREG1_GLDO_EA_BIAS_DIS_S 5U

§ PMUD_PREG1_GLDO_EA_BIAS_DIS_OFF

#define PMUD_PREG1_GLDO_EA_BIAS_DIS_OFF 0x00000020U

§ PMUD_PREG1_GLDO_EA_BIAS_DIS_ON

#define PMUD_PREG1_GLDO_EA_BIAS_DIS_ON 0x00000000U

§ PMUD_PREG1_GLDO_ATBSEL_W

#define PMUD_PREG1_GLDO_ATBSEL_W 4U

§ PMUD_PREG1_GLDO_ATBSEL_M

#define PMUD_PREG1_GLDO_ATBSEL_M 0x0000001EU

§ PMUD_PREG1_GLDO_ATBSEL_S

#define PMUD_PREG1_GLDO_ATBSEL_S 1U

§ PMUD_PREG1_GLDO_ATBSEL_VDDROK

#define PMUD_PREG1_GLDO_ATBSEL_VDDROK 0x00000010U

§ PMUD_PREG1_GLDO_ATBSEL_IB1U

#define PMUD_PREG1_GLDO_ATBSEL_IB1U 0x00000008U

§ PMUD_PREG1_GLDO_ATBSEL_PASSGATE

#define PMUD_PREG1_GLDO_ATBSEL_PASSGATE 0x00000004U

§ PMUD_PREG1_GLDO_ATBSEL_ERRAMP_OUT

#define PMUD_PREG1_GLDO_ATBSEL_ERRAMP_OUT 0x00000002U

§ PMUD_PREG1_GLDO_ATBSEL_NC

#define PMUD_PREG1_GLDO_ATBSEL_NC 0x00000000U

§ PMUD_PREG2_RSTNMASK

#define PMUD_PREG2_RSTNMASK 0x00000020U

§ PMUD_PREG2_RSTNMASK_M

#define PMUD_PREG2_RSTNMASK_M 0x00000020U

§ PMUD_PREG2_RSTNMASK_S

#define PMUD_PREG2_RSTNMASK_S 5U

§ PMUD_PREG2_RSTNMASK_BM

#define PMUD_PREG2_RSTNMASK_BM 0x00000020U

§ PMUD_PREG2_RSTNMASK_BNM

#define PMUD_PREG2_RSTNMASK_BNM 0x00000000U

§ PMUD_PREG2_DCDC_RCHG_ATBSEL

#define PMUD_PREG2_DCDC_RCHG_ATBSEL 0x00000010U

§ PMUD_PREG2_DCDC_RCHG_ATBSEL_M

#define PMUD_PREG2_DCDC_RCHG_ATBSEL_M 0x00000010U

§ PMUD_PREG2_DCDC_RCHG_ATBSEL_S

#define PMUD_PREG2_DCDC_RCHG_ATBSEL_S 4U

§ PMUD_PREG2_DCDC_RCHG_ATBSEL_RCHG_BLK

#define PMUD_PREG2_DCDC_RCHG_ATBSEL_RCHG_BLK 0x00000010U

§ PMUD_PREG2_DCDC_RCHG_ATBSEL_DCDC_GLDO

#define PMUD_PREG2_DCDC_RCHG_ATBSEL_DCDC_GLDO 0x00000000U

§ PMUD_PREG2_PMUREG_ATBSEL_W

#define PMUD_PREG2_PMUREG_ATBSEL_W 4U

§ PMUD_PREG2_PMUREG_ATBSEL_M

#define PMUD_PREG2_PMUREG_ATBSEL_M 0x0000000FU

§ PMUD_PREG2_PMUREG_ATBSEL_S

#define PMUD_PREG2_PMUREG_ATBSEL_S 0U

§ PMUD_PREG2_PMUREG_ATBSEL_DCDC_ATEST0_RCHG_ATEST1

#define PMUD_PREG2_PMUREG_ATBSEL_DCDC_ATEST0_RCHG_ATEST1 0x00000008U

§ PMUD_PREG2_PMUREG_ATBSEL_SOCLDOI_A0

#define PMUD_PREG2_PMUREG_ATBSEL_SOCLDOI_A0 0x00000004U

§ PMUD_PREG2_PMUREG_ATBSEL_RESERVED

#define PMUD_PREG2_PMUREG_ATBSEL_RESERVED 0x00000002U

§ PMUD_PREG2_PMUREG_ATBSEL_SOCLDOV_A1

#define PMUD_PREG2_PMUREG_ATBSEL_SOCLDOV_A1 0x00000001U

§ PMUD_PREG2_PMUREG_ATBSEL_NC

#define PMUD_PREG2_PMUREG_ATBSEL_NC 0x00000000U

§ PMUD_DCDCCFG_LM_HIGHTH_W

#define PMUD_DCDCCFG_LM_HIGHTH_W 7U

§ PMUD_DCDCCFG_LM_HIGHTH_M

#define PMUD_DCDCCFG_LM_HIGHTH_M 0x007F0000U

§ PMUD_DCDCCFG_LM_HIGHTH_S

#define PMUD_DCDCCFG_LM_HIGHTH_S 16U

§ PMUD_DCDCCFG_LM_LOWTH_W

#define PMUD_DCDCCFG_LM_LOWTH_W 7U

§ PMUD_DCDCCFG_LM_LOWTH_M

#define PMUD_DCDCCFG_LM_LOWTH_M 0x00007F00U

§ PMUD_DCDCCFG_LM_LOWTH_S

#define PMUD_DCDCCFG_LM_LOWTH_S 8U

§ PMUD_DCDCCFG_ADP_IPEAK_EN

#define PMUD_DCDCCFG_ADP_IPEAK_EN 0x00000010U

§ PMUD_DCDCCFG_ADP_IPEAK_EN_M

#define PMUD_DCDCCFG_ADP_IPEAK_EN_M 0x00000010U

§ PMUD_DCDCCFG_ADP_IPEAK_EN_S

#define PMUD_DCDCCFG_ADP_IPEAK_EN_S 4U

§ PMUD_DCDCCFG_ADP_IPEAK_EN_EN

#define PMUD_DCDCCFG_ADP_IPEAK_EN_EN 0x00000010U

§ PMUD_DCDCCFG_ADP_IPEAK_EN_DIS

#define PMUD_DCDCCFG_ADP_IPEAK_EN_DIS 0x00000000U

§ PMUD_DCDCCFG_LMEN

#define PMUD_DCDCCFG_LMEN 0x00000001U

§ PMUD_DCDCCFG_LMEN_M

#define PMUD_DCDCCFG_LMEN_M 0x00000001U

§ PMUD_DCDCCFG_LMEN_S

#define PMUD_DCDCCFG_LMEN_S 0U

§ PMUD_DCDCCFG_LMEN_EN

#define PMUD_DCDCCFG_LMEN_EN 0x00000001U

§ PMUD_DCDCCFG_LMEN_DIS

#define PMUD_DCDCCFG_LMEN_DIS 0x00000000U

§ PMUD_DCDCSTAT_IPEAK_W

#define PMUD_DCDCSTAT_IPEAK_W 3U

§ PMUD_DCDCSTAT_IPEAK_M

#define PMUD_DCDCSTAT_IPEAK_M 0x00000700U

§ PMUD_DCDCSTAT_IPEAK_S

#define PMUD_DCDCSTAT_IPEAK_S 8U

§ PMUD_DCDCSTAT_LOAD_W

#define PMUD_DCDCSTAT_LOAD_W 7U

§ PMUD_DCDCSTAT_LOAD_M

#define PMUD_DCDCSTAT_LOAD_M 0x0000007FU

§ PMUD_DCDCSTAT_LOAD_S

#define PMUD_DCDCSTAT_LOAD_S 0U

Macros