CC23x0R5DriverLibrary
Macros
hw_i2c.h File Reference
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Macros

#define I2C_O_TOAR   0x00000000U
 
#define I2C_O_TSTA   0x00000004U
 
#define I2C_O_TCTL   0x00000004U
 
#define I2C_O_TDR   0x00000008U
 
#define I2C_O_TIMR   0x0000000CU
 
#define I2C_O_TRIS   0x00000010U
 
#define I2C_O_TMIS   0x00000014U
 
#define I2C_O_TICR   0x00000018U
 
#define I2C_O_CTA   0x00000800U
 
#define I2C_O_CSTA   0x00000804U
 
#define I2C_O_CCTL   0x00000804U
 
#define I2C_O_CDR   0x00000808U
 
#define I2C_O_CTPR   0x0000080CU
 
#define I2C_O_CIMR   0x00000810U
 
#define I2C_O_CRIS   0x00000814U
 
#define I2C_O_CMIS   0x00000818U
 
#define I2C_O_CICR   0x0000081CU
 
#define I2C_O_CCR   0x00000820U
 
#define I2C_TOAR_OAR_W   7U
 
#define I2C_TOAR_OAR_M   0x0000007FU
 
#define I2C_TOAR_OAR_S   0U
 
#define I2C_TSTA_FBR   0x00000004U
 
#define I2C_TSTA_FBR_M   0x00000004U
 
#define I2C_TSTA_FBR_S   2U
 
#define I2C_TSTA_FBR_SET   0x00000004U
 
#define I2C_TSTA_FBR_CLR   0x00000000U
 
#define I2C_TSTA_TREQ   0x00000002U
 
#define I2C_TSTA_TREQ_M   0x00000002U
 
#define I2C_TSTA_TREQ_S   1U
 
#define I2C_TSTA_TREQ_SET   0x00000002U
 
#define I2C_TSTA_TREQ_CLR   0x00000000U
 
#define I2C_TSTA_RREQ   0x00000001U
 
#define I2C_TSTA_RREQ_M   0x00000001U
 
#define I2C_TSTA_RREQ_S   0U
 
#define I2C_TSTA_RREQ_SET   0x00000001U
 
#define I2C_TSTA_RREQ_CLR   0x00000000U
 
#define I2C_TCTL_DA   0x00000001U
 
#define I2C_TCTL_DA_M   0x00000001U
 
#define I2C_TCTL_DA_S   0U
 
#define I2C_TCTL_DA_EN   0x00000001U
 
#define I2C_TCTL_DA_DIS   0x00000000U
 
#define I2C_TDR_DATA_W   8U
 
#define I2C_TDR_DATA_M   0x000000FFU
 
#define I2C_TDR_DATA_S   0U
 
#define I2C_TIMR_STOPIM   0x00000004U
 
#define I2C_TIMR_STOPIM_M   0x00000004U
 
#define I2C_TIMR_STOPIM_S   2U
 
#define I2C_TIMR_STOPIM_EN   0x00000004U
 
#define I2C_TIMR_STOPIM_DIS   0x00000000U
 
#define I2C_TIMR_STARTIM   0x00000002U
 
#define I2C_TIMR_STARTIM_M   0x00000002U
 
#define I2C_TIMR_STARTIM_S   1U
 
#define I2C_TIMR_STARTIM_EN   0x00000002U
 
#define I2C_TIMR_STARTIM_DIS   0x00000000U
 
#define I2C_TIMR_DATAIM   0x00000001U
 
#define I2C_TIMR_DATAIM_M   0x00000001U
 
#define I2C_TIMR_DATAIM_S   0U
 
#define I2C_TIMR_DATAIM_EN   0x00000001U
 
#define I2C_TIMR_DATAIM_DIS   0x00000000U
 
#define I2C_TRIS_STOPRIS   0x00000004U
 
#define I2C_TRIS_STOPRIS_M   0x00000004U
 
#define I2C_TRIS_STOPRIS_S   2U
 
#define I2C_TRIS_STOPRIS_SET   0x00000004U
 
#define I2C_TRIS_STOPRIS_CLR   0x00000000U
 
#define I2C_TRIS_STARTRIS   0x00000002U
 
#define I2C_TRIS_STARTRIS_M   0x00000002U
 
#define I2C_TRIS_STARTRIS_S   1U
 
#define I2C_TRIS_STARTRIS_SET   0x00000002U
 
#define I2C_TRIS_STARTRIS_CLR   0x00000000U
 
#define I2C_TRIS_DATARIS   0x00000001U
 
#define I2C_TRIS_DATARIS_M   0x00000001U
 
#define I2C_TRIS_DATARIS_S   0U
 
#define I2C_TRIS_DATARIS_SET   0x00000001U
 
#define I2C_TRIS_DATARIS_CLR   0x00000000U
 
#define I2C_TMIS_STOPMIS   0x00000004U
 
#define I2C_TMIS_STOPMIS_M   0x00000004U
 
#define I2C_TMIS_STOPMIS_S   2U
 
#define I2C_TMIS_STOPMIS_SET   0x00000004U
 
#define I2C_TMIS_STOPMIS_CLR   0x00000000U
 
#define I2C_TMIS_STARTMIS   0x00000002U
 
#define I2C_TMIS_STARTMIS_M   0x00000002U
 
#define I2C_TMIS_STARTMIS_S   1U
 
#define I2C_TMIS_STARTMIS_SET   0x00000002U
 
#define I2C_TMIS_STARTMIS_CLR   0x00000000U
 
#define I2C_TMIS_DATAMIS   0x00000001U
 
#define I2C_TMIS_DATAMIS_M   0x00000001U
 
#define I2C_TMIS_DATAMIS_S   0U
 
#define I2C_TMIS_DATAMIS_SET   0x00000001U
 
#define I2C_TMIS_DATAMIS_CLR   0x00000000U
 
#define I2C_TICR_STOPIC   0x00000004U
 
#define I2C_TICR_STOPIC_M   0x00000004U
 
#define I2C_TICR_STOPIC_S   2U
 
#define I2C_TICR_STOPIC_EN   0x00000004U
 
#define I2C_TICR_STOPIC_DIS   0x00000000U
 
#define I2C_TICR_STARTIC   0x00000002U
 
#define I2C_TICR_STARTIC_M   0x00000002U
 
#define I2C_TICR_STARTIC_S   1U
 
#define I2C_TICR_STARTIC_EN   0x00000002U
 
#define I2C_TICR_STARTIC_DIS   0x00000000U
 
#define I2C_TICR_DATAIC   0x00000001U
 
#define I2C_TICR_DATAIC_M   0x00000001U
 
#define I2C_TICR_DATAIC_S   0U
 
#define I2C_TICR_DATAIC_EN   0x00000001U
 
#define I2C_TICR_DATAIC_DIS   0x00000000U
 
#define I2C_CTA_SA_W   7U
 
#define I2C_CTA_SA_M   0x000000FEU
 
#define I2C_CTA_SA_S   1U
 
#define I2C_CTA_RS   0x00000001U
 
#define I2C_CTA_RS_M   0x00000001U
 
#define I2C_CTA_RS_S   0U
 
#define I2C_CTA_RS_EN   0x00000001U
 
#define I2C_CTA_RS_DIS   0x00000000U
 
#define I2C_CSTA_BUSBSY   0x00000040U
 
#define I2C_CSTA_BUSBSY_M   0x00000040U
 
#define I2C_CSTA_BUSBSY_S   6U
 
#define I2C_CSTA_BUSBSY_SET   0x00000040U
 
#define I2C_CSTA_BUSBSY_CLR   0x00000000U
 
#define I2C_CSTA_IDLE   0x00000020U
 
#define I2C_CSTA_IDLE_M   0x00000020U
 
#define I2C_CSTA_IDLE_S   5U
 
#define I2C_CSTA_IDLE_SET   0x00000020U
 
#define I2C_CSTA_IDLE_CLR   0x00000000U
 
#define I2C_CSTA_ARBLST   0x00000010U
 
#define I2C_CSTA_ARBLST_M   0x00000010U
 
#define I2C_CSTA_ARBLST_S   4U
 
#define I2C_CSTA_ARBLST_SET   0x00000010U
 
#define I2C_CSTA_ARBLST_CLR   0x00000000U
 
#define I2C_CSTA_DATACKN   0x00000008U
 
#define I2C_CSTA_DATACKN_M   0x00000008U
 
#define I2C_CSTA_DATACKN_S   3U
 
#define I2C_CSTA_DATACKN_SET   0x00000008U
 
#define I2C_CSTA_DATACKN_CLR   0x00000000U
 
#define I2C_CSTA_ADRACKN   0x00000004U
 
#define I2C_CSTA_ADRACKN_M   0x00000004U
 
#define I2C_CSTA_ADRACKN_S   2U
 
#define I2C_CSTA_ADRACKN_SET   0x00000004U
 
#define I2C_CSTA_ADRACKN_CLR   0x00000000U
 
#define I2C_CSTA_ERR   0x00000002U
 
#define I2C_CSTA_ERR_M   0x00000002U
 
#define I2C_CSTA_ERR_S   1U
 
#define I2C_CSTA_ERR_SET   0x00000002U
 
#define I2C_CSTA_ERR_CLR   0x00000000U
 
#define I2C_CSTA_BUSY   0x00000001U
 
#define I2C_CSTA_BUSY_M   0x00000001U
 
#define I2C_CSTA_BUSY_S   0U
 
#define I2C_CSTA_BUSY_SET   0x00000001U
 
#define I2C_CSTA_BUSY_CLR   0x00000000U
 
#define I2C_CCTL_ACK   0x00000008U
 
#define I2C_CCTL_ACK_M   0x00000008U
 
#define I2C_CCTL_ACK_S   3U
 
#define I2C_CCTL_ACK_EN   0x00000008U
 
#define I2C_CCTL_ACK_DIS   0x00000000U
 
#define I2C_CCTL_STOP   0x00000004U
 
#define I2C_CCTL_STOP_M   0x00000004U
 
#define I2C_CCTL_STOP_S   2U
 
#define I2C_CCTL_STOP_EN   0x00000004U
 
#define I2C_CCTL_STOP_DIS   0x00000000U
 
#define I2C_CCTL_START   0x00000002U
 
#define I2C_CCTL_START_M   0x00000002U
 
#define I2C_CCTL_START_S   1U
 
#define I2C_CCTL_START_EN   0x00000002U
 
#define I2C_CCTL_START_DIS   0x00000000U
 
#define I2C_CCTL_RUN   0x00000001U
 
#define I2C_CCTL_RUN_M   0x00000001U
 
#define I2C_CCTL_RUN_S   0U
 
#define I2C_CCTL_RUN_EN   0x00000001U
 
#define I2C_CCTL_RUN_DIS   0x00000000U
 
#define I2C_CDR_DATA_W   8U
 
#define I2C_CDR_DATA_M   0x000000FFU
 
#define I2C_CDR_DATA_S   0U
 
#define I2C_CTPR_TPR_7   0x00000080U
 
#define I2C_CTPR_TPR_7_M   0x00000080U
 
#define I2C_CTPR_TPR_7_S   7U
 
#define I2C_CTPR_TPR_W   7U
 
#define I2C_CTPR_TPR_M   0x0000007FU
 
#define I2C_CTPR_TPR_S   0U
 
#define I2C_CIMR_IM   0x00000001U
 
#define I2C_CIMR_IM_M   0x00000001U
 
#define I2C_CIMR_IM_S   0U
 
#define I2C_CIMR_IM_EN   0x00000001U
 
#define I2C_CIMR_IM_DIS   0x00000000U
 
#define I2C_CRIS_RIS   0x00000001U
 
#define I2C_CRIS_RIS_M   0x00000001U
 
#define I2C_CRIS_RIS_S   0U
 
#define I2C_CRIS_RIS_SET   0x00000001U
 
#define I2C_CRIS_RIS_CLR   0x00000000U
 
#define I2C_CMIS_MIS   0x00000001U
 
#define I2C_CMIS_MIS_M   0x00000001U
 
#define I2C_CMIS_MIS_S   0U
 
#define I2C_CMIS_MIS_SET   0x00000001U
 
#define I2C_CMIS_MIS_CLR   0x00000000U
 
#define I2C_CICR_IC   0x00000001U
 
#define I2C_CICR_IC_M   0x00000001U
 
#define I2C_CICR_IC_S   0U
 
#define I2C_CICR_IC_EN   0x00000001U
 
#define I2C_CICR_IC_DIS   0x00000000U
 
#define I2C_CCR_TFE   0x00000020U
 
#define I2C_CCR_TFE_M   0x00000020U
 
#define I2C_CCR_TFE_S   5U
 
#define I2C_CCR_TFE_EN   0x00000020U
 
#define I2C_CCR_TFE_DIS   0x00000000U
 
#define I2C_CCR_CFE   0x00000010U
 
#define I2C_CCR_CFE_M   0x00000010U
 
#define I2C_CCR_CFE_S   4U
 
#define I2C_CCR_CFE_EN   0x00000010U
 
#define I2C_CCR_CFE_DIS   0x00000000U
 
#define I2C_CCR_LPBK   0x00000001U
 
#define I2C_CCR_LPBK_M   0x00000001U
 
#define I2C_CCR_LPBK_S   0U
 
#define I2C_CCR_LPBK_EN   0x00000001U
 
#define I2C_CCR_LPBK_DIS   0x00000000U
 

Macro Definition Documentation

§ I2C_O_TOAR

#define I2C_O_TOAR   0x00000000U

Referenced by I2CTargetInit(), and I2CTargetSetAddress().

§ I2C_O_TSTA

#define I2C_O_TSTA   0x00000004U

Referenced by I2CTargetStatus().

§ I2C_O_TCTL

#define I2C_O_TCTL   0x00000004U

Referenced by I2CTargetDisable(), and I2CTargetEnable().

§ I2C_O_TDR

#define I2C_O_TDR   0x00000008U

Referenced by I2CTargetGetData(), and I2CTargetPutData().

§ I2C_O_TIMR

#define I2C_O_TIMR   0x0000000CU

Referenced by I2CTargetDisableInt(), and I2CTargetEnableInt().

§ I2C_O_TRIS

#define I2C_O_TRIS   0x00000010U

Referenced by I2CTargetIntStatus().

§ I2C_O_TMIS

#define I2C_O_TMIS   0x00000014U

Referenced by I2CTargetIntStatus().

§ I2C_O_TICR

#define I2C_O_TICR   0x00000018U

Referenced by I2CTargetClearInt().

§ I2C_O_CTA

#define I2C_O_CTA   0x00000800U

Referenced by I2CControllerSetTargetAddr().

§ I2C_O_CSTA

#define I2C_O_CSTA   0x00000804U

Referenced by I2CControllerBusBusy(), I2CControllerBusy(), and I2CControllerError().

§ I2C_O_CCTL

#define I2C_O_CCTL   0x00000804U

Referenced by I2CControllerCommand(), I2CControllerDisable(), and I2CControllerEnable().

§ I2C_O_CDR

#define I2C_O_CDR   0x00000808U

Referenced by I2CControllerGetData(), and I2CControllerPutData().

§ I2C_O_CTPR

#define I2C_O_CTPR   0x0000080CU

Referenced by I2CControllerInitExpClk().

§ I2C_O_CIMR

#define I2C_O_CIMR   0x00000810U

Referenced by I2CControllerDisableInt(), and I2CControllerEnableInt().

§ I2C_O_CRIS

#define I2C_O_CRIS   0x00000814U

Referenced by I2CControllerIntStatus().

§ I2C_O_CMIS

#define I2C_O_CMIS   0x00000818U

Referenced by I2CControllerIntStatus().

§ I2C_O_CICR

#define I2C_O_CICR   0x0000081CU

Referenced by I2CControllerClearInt().

§ I2C_O_CCR

#define I2C_O_CCR   0x00000820U

Referenced by I2CControllerDisable(), I2CControllerEnable(), I2CTargetDisable(), and I2CTargetEnable().

§ I2C_TOAR_OAR_W

#define I2C_TOAR_OAR_W   7U

§ I2C_TOAR_OAR_M

#define I2C_TOAR_OAR_M   0x0000007FU

§ I2C_TOAR_OAR_S

#define I2C_TOAR_OAR_S   0U

§ I2C_TSTA_FBR

#define I2C_TSTA_FBR   0x00000004U

§ I2C_TSTA_FBR_M

#define I2C_TSTA_FBR_M   0x00000004U

§ I2C_TSTA_FBR_S

#define I2C_TSTA_FBR_S   2U

§ I2C_TSTA_FBR_SET

#define I2C_TSTA_FBR_SET   0x00000004U

§ I2C_TSTA_FBR_CLR

#define I2C_TSTA_FBR_CLR   0x00000000U

§ I2C_TSTA_TREQ

#define I2C_TSTA_TREQ   0x00000002U

§ I2C_TSTA_TREQ_M

#define I2C_TSTA_TREQ_M   0x00000002U

§ I2C_TSTA_TREQ_S

#define I2C_TSTA_TREQ_S   1U

§ I2C_TSTA_TREQ_SET

#define I2C_TSTA_TREQ_SET   0x00000002U

§ I2C_TSTA_TREQ_CLR

#define I2C_TSTA_TREQ_CLR   0x00000000U

§ I2C_TSTA_RREQ

#define I2C_TSTA_RREQ   0x00000001U

§ I2C_TSTA_RREQ_M

#define I2C_TSTA_RREQ_M   0x00000001U

§ I2C_TSTA_RREQ_S

#define I2C_TSTA_RREQ_S   0U

§ I2C_TSTA_RREQ_SET

#define I2C_TSTA_RREQ_SET   0x00000001U

§ I2C_TSTA_RREQ_CLR

#define I2C_TSTA_RREQ_CLR   0x00000000U

§ I2C_TCTL_DA

#define I2C_TCTL_DA   0x00000001U

§ I2C_TCTL_DA_M

#define I2C_TCTL_DA_M   0x00000001U

§ I2C_TCTL_DA_S

#define I2C_TCTL_DA_S   0U

§ I2C_TCTL_DA_EN

#define I2C_TCTL_DA_EN   0x00000001U

Referenced by I2CTargetEnable().

§ I2C_TCTL_DA_DIS

#define I2C_TCTL_DA_DIS   0x00000000U

§ I2C_TDR_DATA_W

#define I2C_TDR_DATA_W   8U

§ I2C_TDR_DATA_M

#define I2C_TDR_DATA_M   0x000000FFU

§ I2C_TDR_DATA_S

#define I2C_TDR_DATA_S   0U

§ I2C_TIMR_STOPIM

#define I2C_TIMR_STOPIM   0x00000004U

§ I2C_TIMR_STOPIM_M

#define I2C_TIMR_STOPIM_M   0x00000004U

§ I2C_TIMR_STOPIM_S

#define I2C_TIMR_STOPIM_S   2U

§ I2C_TIMR_STOPIM_EN

#define I2C_TIMR_STOPIM_EN   0x00000004U

§ I2C_TIMR_STOPIM_DIS

#define I2C_TIMR_STOPIM_DIS   0x00000000U

§ I2C_TIMR_STARTIM

#define I2C_TIMR_STARTIM   0x00000002U

§ I2C_TIMR_STARTIM_M

#define I2C_TIMR_STARTIM_M   0x00000002U

§ I2C_TIMR_STARTIM_S

#define I2C_TIMR_STARTIM_S   1U

§ I2C_TIMR_STARTIM_EN

#define I2C_TIMR_STARTIM_EN   0x00000002U

§ I2C_TIMR_STARTIM_DIS

#define I2C_TIMR_STARTIM_DIS   0x00000000U

§ I2C_TIMR_DATAIM

#define I2C_TIMR_DATAIM   0x00000001U

§ I2C_TIMR_DATAIM_M

#define I2C_TIMR_DATAIM_M   0x00000001U

§ I2C_TIMR_DATAIM_S

#define I2C_TIMR_DATAIM_S   0U

§ I2C_TIMR_DATAIM_EN

#define I2C_TIMR_DATAIM_EN   0x00000001U

§ I2C_TIMR_DATAIM_DIS

#define I2C_TIMR_DATAIM_DIS   0x00000000U

§ I2C_TRIS_STOPRIS

#define I2C_TRIS_STOPRIS   0x00000004U

§ I2C_TRIS_STOPRIS_M

#define I2C_TRIS_STOPRIS_M   0x00000004U

§ I2C_TRIS_STOPRIS_S

#define I2C_TRIS_STOPRIS_S   2U

§ I2C_TRIS_STOPRIS_SET

#define I2C_TRIS_STOPRIS_SET   0x00000004U

§ I2C_TRIS_STOPRIS_CLR

#define I2C_TRIS_STOPRIS_CLR   0x00000000U

§ I2C_TRIS_STARTRIS

#define I2C_TRIS_STARTRIS   0x00000002U

§ I2C_TRIS_STARTRIS_M

#define I2C_TRIS_STARTRIS_M   0x00000002U

§ I2C_TRIS_STARTRIS_S

#define I2C_TRIS_STARTRIS_S   1U

§ I2C_TRIS_STARTRIS_SET

#define I2C_TRIS_STARTRIS_SET   0x00000002U

§ I2C_TRIS_STARTRIS_CLR

#define I2C_TRIS_STARTRIS_CLR   0x00000000U

§ I2C_TRIS_DATARIS

#define I2C_TRIS_DATARIS   0x00000001U

§ I2C_TRIS_DATARIS_M

#define I2C_TRIS_DATARIS_M   0x00000001U

§ I2C_TRIS_DATARIS_S

#define I2C_TRIS_DATARIS_S   0U

§ I2C_TRIS_DATARIS_SET

#define I2C_TRIS_DATARIS_SET   0x00000001U

§ I2C_TRIS_DATARIS_CLR

#define I2C_TRIS_DATARIS_CLR   0x00000000U

§ I2C_TMIS_STOPMIS

#define I2C_TMIS_STOPMIS   0x00000004U

§ I2C_TMIS_STOPMIS_M

#define I2C_TMIS_STOPMIS_M   0x00000004U

§ I2C_TMIS_STOPMIS_S

#define I2C_TMIS_STOPMIS_S   2U

§ I2C_TMIS_STOPMIS_SET

#define I2C_TMIS_STOPMIS_SET   0x00000004U

§ I2C_TMIS_STOPMIS_CLR

#define I2C_TMIS_STOPMIS_CLR   0x00000000U

§ I2C_TMIS_STARTMIS

#define I2C_TMIS_STARTMIS   0x00000002U

§ I2C_TMIS_STARTMIS_M

#define I2C_TMIS_STARTMIS_M   0x00000002U

§ I2C_TMIS_STARTMIS_S

#define I2C_TMIS_STARTMIS_S   1U

§ I2C_TMIS_STARTMIS_SET

#define I2C_TMIS_STARTMIS_SET   0x00000002U

§ I2C_TMIS_STARTMIS_CLR

#define I2C_TMIS_STARTMIS_CLR   0x00000000U

§ I2C_TMIS_DATAMIS

#define I2C_TMIS_DATAMIS   0x00000001U

§ I2C_TMIS_DATAMIS_M

#define I2C_TMIS_DATAMIS_M   0x00000001U

§ I2C_TMIS_DATAMIS_S

#define I2C_TMIS_DATAMIS_S   0U

§ I2C_TMIS_DATAMIS_SET

#define I2C_TMIS_DATAMIS_SET   0x00000001U

§ I2C_TMIS_DATAMIS_CLR

#define I2C_TMIS_DATAMIS_CLR   0x00000000U

§ I2C_TICR_STOPIC

#define I2C_TICR_STOPIC   0x00000004U

§ I2C_TICR_STOPIC_M

#define I2C_TICR_STOPIC_M   0x00000004U

§ I2C_TICR_STOPIC_S

#define I2C_TICR_STOPIC_S   2U

§ I2C_TICR_STOPIC_EN

#define I2C_TICR_STOPIC_EN   0x00000004U

§ I2C_TICR_STOPIC_DIS

#define I2C_TICR_STOPIC_DIS   0x00000000U

§ I2C_TICR_STARTIC

#define I2C_TICR_STARTIC   0x00000002U

§ I2C_TICR_STARTIC_M

#define I2C_TICR_STARTIC_M   0x00000002U

§ I2C_TICR_STARTIC_S

#define I2C_TICR_STARTIC_S   1U

§ I2C_TICR_STARTIC_EN

#define I2C_TICR_STARTIC_EN   0x00000002U

§ I2C_TICR_STARTIC_DIS

#define I2C_TICR_STARTIC_DIS   0x00000000U

§ I2C_TICR_DATAIC

#define I2C_TICR_DATAIC   0x00000001U

§ I2C_TICR_DATAIC_M

#define I2C_TICR_DATAIC_M   0x00000001U

§ I2C_TICR_DATAIC_S

#define I2C_TICR_DATAIC_S   0U

§ I2C_TICR_DATAIC_EN

#define I2C_TICR_DATAIC_EN   0x00000001U

§ I2C_TICR_DATAIC_DIS

#define I2C_TICR_DATAIC_DIS   0x00000000U

§ I2C_CTA_SA_W

#define I2C_CTA_SA_W   7U

§ I2C_CTA_SA_M

#define I2C_CTA_SA_M   0x000000FEU

§ I2C_CTA_SA_S

#define I2C_CTA_SA_S   1U

§ I2C_CTA_RS

#define I2C_CTA_RS   0x00000001U

§ I2C_CTA_RS_M

#define I2C_CTA_RS_M   0x00000001U

§ I2C_CTA_RS_S

#define I2C_CTA_RS_S   0U

§ I2C_CTA_RS_EN

#define I2C_CTA_RS_EN   0x00000001U

§ I2C_CTA_RS_DIS

#define I2C_CTA_RS_DIS   0x00000000U

§ I2C_CSTA_BUSBSY

#define I2C_CSTA_BUSBSY   0x00000040U

§ I2C_CSTA_BUSBSY_M

#define I2C_CSTA_BUSBSY_M   0x00000040U

Referenced by I2CControllerBusBusy().

§ I2C_CSTA_BUSBSY_S

#define I2C_CSTA_BUSBSY_S   6U

§ I2C_CSTA_BUSBSY_SET

#define I2C_CSTA_BUSBSY_SET   0x00000040U

§ I2C_CSTA_BUSBSY_CLR

#define I2C_CSTA_BUSBSY_CLR   0x00000000U

§ I2C_CSTA_IDLE

#define I2C_CSTA_IDLE   0x00000020U

§ I2C_CSTA_IDLE_M

#define I2C_CSTA_IDLE_M   0x00000020U

§ I2C_CSTA_IDLE_S

#define I2C_CSTA_IDLE_S   5U

§ I2C_CSTA_IDLE_SET

#define I2C_CSTA_IDLE_SET   0x00000020U

§ I2C_CSTA_IDLE_CLR

#define I2C_CSTA_IDLE_CLR   0x00000000U

§ I2C_CSTA_ARBLST

#define I2C_CSTA_ARBLST   0x00000010U

§ I2C_CSTA_ARBLST_M

#define I2C_CSTA_ARBLST_M   0x00000010U

Referenced by I2CControllerError().

§ I2C_CSTA_ARBLST_S

#define I2C_CSTA_ARBLST_S   4U

§ I2C_CSTA_ARBLST_SET

#define I2C_CSTA_ARBLST_SET   0x00000010U

§ I2C_CSTA_ARBLST_CLR

#define I2C_CSTA_ARBLST_CLR   0x00000000U

§ I2C_CSTA_DATACKN

#define I2C_CSTA_DATACKN   0x00000008U

§ I2C_CSTA_DATACKN_M

#define I2C_CSTA_DATACKN_M   0x00000008U

Referenced by I2CControllerError().

§ I2C_CSTA_DATACKN_S

#define I2C_CSTA_DATACKN_S   3U

§ I2C_CSTA_DATACKN_SET

#define I2C_CSTA_DATACKN_SET   0x00000008U

§ I2C_CSTA_DATACKN_CLR

#define I2C_CSTA_DATACKN_CLR   0x00000000U

§ I2C_CSTA_ADRACKN

#define I2C_CSTA_ADRACKN   0x00000004U

§ I2C_CSTA_ADRACKN_M

#define I2C_CSTA_ADRACKN_M   0x00000004U

Referenced by I2CControllerError().

§ I2C_CSTA_ADRACKN_S

#define I2C_CSTA_ADRACKN_S   2U

§ I2C_CSTA_ADRACKN_SET

#define I2C_CSTA_ADRACKN_SET   0x00000004U

§ I2C_CSTA_ADRACKN_CLR

#define I2C_CSTA_ADRACKN_CLR   0x00000000U

§ I2C_CSTA_ERR

#define I2C_CSTA_ERR   0x00000002U

§ I2C_CSTA_ERR_M

#define I2C_CSTA_ERR_M   0x00000002U

Referenced by I2CControllerError().

§ I2C_CSTA_ERR_S

#define I2C_CSTA_ERR_S   1U

§ I2C_CSTA_ERR_SET

#define I2C_CSTA_ERR_SET   0x00000002U

§ I2C_CSTA_ERR_CLR

#define I2C_CSTA_ERR_CLR   0x00000000U

§ I2C_CSTA_BUSY

#define I2C_CSTA_BUSY   0x00000001U

§ I2C_CSTA_BUSY_M

#define I2C_CSTA_BUSY_M   0x00000001U

Referenced by I2CControllerBusy(), and I2CControllerError().

§ I2C_CSTA_BUSY_S

#define I2C_CSTA_BUSY_S   0U

§ I2C_CSTA_BUSY_SET

#define I2C_CSTA_BUSY_SET   0x00000001U

§ I2C_CSTA_BUSY_CLR

#define I2C_CSTA_BUSY_CLR   0x00000000U

§ I2C_CCTL_ACK

#define I2C_CCTL_ACK   0x00000008U

§ I2C_CCTL_ACK_M

#define I2C_CCTL_ACK_M   0x00000008U

§ I2C_CCTL_ACK_S

#define I2C_CCTL_ACK_S   3U

§ I2C_CCTL_ACK_EN

#define I2C_CCTL_ACK_EN   0x00000008U

§ I2C_CCTL_ACK_DIS

#define I2C_CCTL_ACK_DIS   0x00000000U

§ I2C_CCTL_STOP

#define I2C_CCTL_STOP   0x00000004U

§ I2C_CCTL_STOP_M

#define I2C_CCTL_STOP_M   0x00000004U

§ I2C_CCTL_STOP_S

#define I2C_CCTL_STOP_S   2U

§ I2C_CCTL_STOP_EN

#define I2C_CCTL_STOP_EN   0x00000004U

§ I2C_CCTL_STOP_DIS

#define I2C_CCTL_STOP_DIS   0x00000000U

§ I2C_CCTL_START

#define I2C_CCTL_START   0x00000002U

§ I2C_CCTL_START_M

#define I2C_CCTL_START_M   0x00000002U

§ I2C_CCTL_START_S

#define I2C_CCTL_START_S   1U

§ I2C_CCTL_START_EN

#define I2C_CCTL_START_EN   0x00000002U

§ I2C_CCTL_START_DIS

#define I2C_CCTL_START_DIS   0x00000000U

§ I2C_CCTL_RUN

#define I2C_CCTL_RUN   0x00000001U

§ I2C_CCTL_RUN_M

#define I2C_CCTL_RUN_M   0x00000001U

§ I2C_CCTL_RUN_S

#define I2C_CCTL_RUN_S   0U

§ I2C_CCTL_RUN_EN

#define I2C_CCTL_RUN_EN   0x00000001U

Referenced by I2CControllerEnable().

§ I2C_CCTL_RUN_DIS

#define I2C_CCTL_RUN_DIS   0x00000000U

§ I2C_CDR_DATA_W

#define I2C_CDR_DATA_W   8U

§ I2C_CDR_DATA_M

#define I2C_CDR_DATA_M   0x000000FFU

§ I2C_CDR_DATA_S

#define I2C_CDR_DATA_S   0U

§ I2C_CTPR_TPR_7

#define I2C_CTPR_TPR_7   0x00000080U

§ I2C_CTPR_TPR_7_M

#define I2C_CTPR_TPR_7_M   0x00000080U

§ I2C_CTPR_TPR_7_S

#define I2C_CTPR_TPR_7_S   7U

§ I2C_CTPR_TPR_W

#define I2C_CTPR_TPR_W   7U

§ I2C_CTPR_TPR_M

#define I2C_CTPR_TPR_M   0x0000007FU

§ I2C_CTPR_TPR_S

#define I2C_CTPR_TPR_S   0U

§ I2C_CIMR_IM

#define I2C_CIMR_IM   0x00000001U

Referenced by I2CControllerEnableInt().

§ I2C_CIMR_IM_M

#define I2C_CIMR_IM_M   0x00000001U

§ I2C_CIMR_IM_S

#define I2C_CIMR_IM_S   0U

§ I2C_CIMR_IM_EN

#define I2C_CIMR_IM_EN   0x00000001U

§ I2C_CIMR_IM_DIS

#define I2C_CIMR_IM_DIS   0x00000000U

§ I2C_CRIS_RIS

#define I2C_CRIS_RIS   0x00000001U

§ I2C_CRIS_RIS_M

#define I2C_CRIS_RIS_M   0x00000001U

§ I2C_CRIS_RIS_S

#define I2C_CRIS_RIS_S   0U

§ I2C_CRIS_RIS_SET

#define I2C_CRIS_RIS_SET   0x00000001U

§ I2C_CRIS_RIS_CLR

#define I2C_CRIS_RIS_CLR   0x00000000U

§ I2C_CMIS_MIS

#define I2C_CMIS_MIS   0x00000001U

§ I2C_CMIS_MIS_M

#define I2C_CMIS_MIS_M   0x00000001U

§ I2C_CMIS_MIS_S

#define I2C_CMIS_MIS_S   0U

§ I2C_CMIS_MIS_SET

#define I2C_CMIS_MIS_SET   0x00000001U

§ I2C_CMIS_MIS_CLR

#define I2C_CMIS_MIS_CLR   0x00000000U

§ I2C_CICR_IC

#define I2C_CICR_IC   0x00000001U

Referenced by I2CControllerClearInt().

§ I2C_CICR_IC_M

#define I2C_CICR_IC_M   0x00000001U

§ I2C_CICR_IC_S

#define I2C_CICR_IC_S   0U

§ I2C_CICR_IC_EN

#define I2C_CICR_IC_EN   0x00000001U

§ I2C_CICR_IC_DIS

#define I2C_CICR_IC_DIS   0x00000000U

§ I2C_CCR_TFE

#define I2C_CCR_TFE   0x00000020U

§ I2C_CCR_TFE_M

#define I2C_CCR_TFE_M   0x00000020U

Referenced by I2CTargetDisable(), and I2CTargetEnable().

§ I2C_CCR_TFE_S

#define I2C_CCR_TFE_S   5U

§ I2C_CCR_TFE_EN

#define I2C_CCR_TFE_EN   0x00000020U

§ I2C_CCR_TFE_DIS

#define I2C_CCR_TFE_DIS   0x00000000U

§ I2C_CCR_CFE

#define I2C_CCR_CFE   0x00000010U

§ I2C_CCR_CFE_M

#define I2C_CCR_CFE_M   0x00000010U

Referenced by I2CControllerDisable(), and I2CControllerEnable().

§ I2C_CCR_CFE_S

#define I2C_CCR_CFE_S   4U

§ I2C_CCR_CFE_EN

#define I2C_CCR_CFE_EN   0x00000010U

§ I2C_CCR_CFE_DIS

#define I2C_CCR_CFE_DIS   0x00000000U

§ I2C_CCR_LPBK

#define I2C_CCR_LPBK   0x00000001U

§ I2C_CCR_LPBK_M

#define I2C_CCR_LPBK_M   0x00000001U

§ I2C_CCR_LPBK_S

#define I2C_CCR_LPBK_S   0U

§ I2C_CCR_LPBK_EN

#define I2C_CCR_LPBK_EN   0x00000001U

§ I2C_CCR_LPBK_DIS

#define I2C_CCR_LPBK_DIS   0x00000000U