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CC23x0R5DriverLibrary
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Go to the source code of this file.
| #define GPIO_O_DESC 0x00000000U |
| #define GPIO_O_DESCEX 0x00000004U |
| #define GPIO_O_IMASK 0x00000044U |
| #define GPIO_O_RIS 0x0000004CU |
Referenced by GPIOGetEventDio(), and GPIOGetEventMultiDio().
| #define GPIO_O_MIS 0x00000054U |
| #define GPIO_O_ISET 0x0000005CU |
| #define GPIO_O_ICLR 0x00000064U |
Referenced by GPIOClearEventDio(), and GPIOClearEventMultiDio().
| #define GPIO_O_IMSET 0x0000006CU |
| #define GPIO_O_IMCLR 0x00000074U |
| #define GPIO_O_DOUT3_0 0x00000100U |
Referenced by GPIOWriteDio().
| #define GPIO_O_DOUT7_4 0x00000104U |
| #define GPIO_O_DOUT11_8 0x00000108U |
| #define GPIO_O_DOUT15_12 0x0000010CU |
| #define GPIO_O_DOUT19_16 0x00000110U |
| #define GPIO_O_DOUT23_20 0x00000114U |
| #define GPIO_O_DOUT27_24 0x00000118U |
| #define GPIO_O_DOUT31_0 0x00000200U |
Referenced by GPIOWriteMultiDio().
| #define GPIO_O_DOUTSET31_0 0x00000210U |
Referenced by GPIOSetDio(), and GPIOSetMultiDio().
| #define GPIO_O_DOUTCLR31_0 0x00000220U |
Referenced by GPIOClearDio(), and GPIOClearMultiDio().
| #define GPIO_O_DOUTTGL31_0 0x00000230U |
Referenced by GPIOToggleDio(), and GPIOToggleMultiDio().
| #define GPIO_O_DOUTTGL3_0 0x00000300U |
| #define GPIO_O_DOUTTGL7_4 0x00000304U |
| #define GPIO_O_DOUTTGL11_8 0x00000308U |
| #define GPIO_O_DOUTTGL15_12 0x0000030CU |
| #define GPIO_O_DOUTTGL19_16 0x00000310U |
| #define GPIO_O_DOUTTGL23_20 0x00000314U |
| #define GPIO_O_DOUTTGL27_24 0x00000318U |
| #define GPIO_O_DOE3_0 0x00000400U |
| #define GPIO_O_DOE7_4 0x00000404U |
| #define GPIO_O_DOE11_8 0x00000408U |
| #define GPIO_O_DOE15_12 0x0000040CU |
| #define GPIO_O_DOE19_16 0x00000410U |
| #define GPIO_O_DOE23_20 0x00000414U |
| #define GPIO_O_DOE27_24 0x00000418U |
| #define GPIO_O_DOE31_0 0x00000500U |
| #define GPIO_O_DOESET31_0 0x00000510U |
| #define GPIO_O_DOECLR31_0 0x00000520U |
| #define GPIO_O_DOETGL31_0 0x00000530U |
| #define GPIO_O_DIN3_0 0x00000600U |
| #define GPIO_O_DIN7_4 0x00000604U |
| #define GPIO_O_DIN11_8 0x00000608U |
| #define GPIO_O_DIN15_12 0x0000060CU |
| #define GPIO_O_DIN19_16 0x00000610U |
| #define GPIO_O_DIN23_20 0x00000614U |
| #define GPIO_O_DIN27_24 0x00000618U |
| #define GPIO_O_DIN31_0 0x00000700U |
Referenced by GPIOReadDio(), and GPIOReadMultiDio().
| #define GPIO_O_EVTCFG 0x00000800U |
| #define GPIO_DESC_MODID_W 16U |
| #define GPIO_DESC_MODID_M 0xFFFF0000U |
| #define GPIO_DESC_MODID_S 16U |
| #define GPIO_DESC_STDIPOFF_W 4U |
| #define GPIO_DESC_STDIPOFF_M 0x0000F000U |
| #define GPIO_DESC_STDIPOFF_S 12U |
| #define GPIO_DESC_INSTIDX_W 4U |
| #define GPIO_DESC_INSTIDX_M 0x00000F00U |
| #define GPIO_DESC_INSTIDX_S 8U |
| #define GPIO_DESC_MAJREV_W 4U |
| #define GPIO_DESC_MAJREV_M 0x000000F0U |
| #define GPIO_DESC_MAJREV_S 4U |
| #define GPIO_DESC_MINREV_W 4U |
| #define GPIO_DESC_MINREV_M 0x0000000FU |
| #define GPIO_DESC_MINREV_S 0U |
| #define GPIO_DESCEX_NUMDIO_W 6U |
| #define GPIO_DESCEX_NUMDIO_M 0x0000003FU |
| #define GPIO_DESCEX_NUMDIO_S 0U |
| #define GPIO_IMASK_DIO25 0x02000000U |
| #define GPIO_IMASK_DIO25_M 0x02000000U |
| #define GPIO_IMASK_DIO25_S 25U |
| #define GPIO_IMASK_DIO25_SET 0x02000000U |
| #define GPIO_IMASK_DIO25_CLR 0x00000000U |
| #define GPIO_IMASK_DIO24 0x01000000U |
| #define GPIO_IMASK_DIO24_M 0x01000000U |
| #define GPIO_IMASK_DIO24_S 24U |
| #define GPIO_IMASK_DIO24_SET 0x01000000U |
| #define GPIO_IMASK_DIO24_CLR 0x00000000U |
| #define GPIO_IMASK_DIO23 0x00800000U |
| #define GPIO_IMASK_DIO23_M 0x00800000U |
| #define GPIO_IMASK_DIO23_S 23U |
| #define GPIO_IMASK_DIO23_SET 0x00800000U |
| #define GPIO_IMASK_DIO23_CLR 0x00000000U |
| #define GPIO_IMASK_DIO22 0x00400000U |
| #define GPIO_IMASK_DIO22_M 0x00400000U |
| #define GPIO_IMASK_DIO22_S 22U |
| #define GPIO_IMASK_DIO22_SET 0x00400000U |
| #define GPIO_IMASK_DIO22_CLR 0x00000000U |
| #define GPIO_IMASK_DIO21 0x00200000U |
| #define GPIO_IMASK_DIO21_M 0x00200000U |
| #define GPIO_IMASK_DIO21_S 21U |
| #define GPIO_IMASK_DIO21_SET 0x00200000U |
| #define GPIO_IMASK_DIO21_CLR 0x00000000U |
| #define GPIO_IMASK_DIO20 0x00100000U |
| #define GPIO_IMASK_DIO20_M 0x00100000U |
| #define GPIO_IMASK_DIO20_S 20U |
| #define GPIO_IMASK_DIO20_SET 0x00100000U |
| #define GPIO_IMASK_DIO20_CLR 0x00000000U |
| #define GPIO_IMASK_DIO19 0x00080000U |
| #define GPIO_IMASK_DIO19_M 0x00080000U |
| #define GPIO_IMASK_DIO19_S 19U |
| #define GPIO_IMASK_DIO19_SET 0x00080000U |
| #define GPIO_IMASK_DIO19_CLR 0x00000000U |
| #define GPIO_IMASK_DIO18 0x00040000U |
| #define GPIO_IMASK_DIO18_M 0x00040000U |
| #define GPIO_IMASK_DIO18_S 18U |
| #define GPIO_IMASK_DIO18_SET 0x00040000U |
| #define GPIO_IMASK_DIO18_CLR 0x00000000U |
| #define GPIO_IMASK_DIO17 0x00020000U |
| #define GPIO_IMASK_DIO17_M 0x00020000U |
| #define GPIO_IMASK_DIO17_S 17U |
| #define GPIO_IMASK_DIO17_SET 0x00020000U |
| #define GPIO_IMASK_DIO17_CLR 0x00000000U |
| #define GPIO_IMASK_DIO16 0x00010000U |
| #define GPIO_IMASK_DIO16_M 0x00010000U |
| #define GPIO_IMASK_DIO16_S 16U |
| #define GPIO_IMASK_DIO16_SET 0x00010000U |
| #define GPIO_IMASK_DIO16_CLR 0x00000000U |
| #define GPIO_IMASK_DIO15 0x00008000U |
| #define GPIO_IMASK_DIO15_M 0x00008000U |
| #define GPIO_IMASK_DIO15_S 15U |
| #define GPIO_IMASK_DIO15_SET 0x00008000U |
| #define GPIO_IMASK_DIO15_CLR 0x00000000U |
| #define GPIO_IMASK_DIO14 0x00004000U |
| #define GPIO_IMASK_DIO14_M 0x00004000U |
| #define GPIO_IMASK_DIO14_S 14U |
| #define GPIO_IMASK_DIO14_SET 0x00004000U |
| #define GPIO_IMASK_DIO14_CLR 0x00000000U |
| #define GPIO_IMASK_DIO13 0x00002000U |
| #define GPIO_IMASK_DIO13_M 0x00002000U |
| #define GPIO_IMASK_DIO13_S 13U |
| #define GPIO_IMASK_DIO13_SET 0x00002000U |
| #define GPIO_IMASK_DIO13_CLR 0x00000000U |
| #define GPIO_IMASK_DIO12 0x00001000U |
| #define GPIO_IMASK_DIO12_M 0x00001000U |
| #define GPIO_IMASK_DIO12_S 12U |
| #define GPIO_IMASK_DIO12_SET 0x00001000U |
| #define GPIO_IMASK_DIO12_CLR 0x00000000U |
| #define GPIO_IMASK_DIO11 0x00000800U |
| #define GPIO_IMASK_DIO11_M 0x00000800U |
| #define GPIO_IMASK_DIO11_S 11U |
| #define GPIO_IMASK_DIO11_SET 0x00000800U |
| #define GPIO_IMASK_DIO11_CLR 0x00000000U |
| #define GPIO_IMASK_DIO10 0x00000400U |
| #define GPIO_IMASK_DIO10_M 0x00000400U |
| #define GPIO_IMASK_DIO10_S 10U |
| #define GPIO_IMASK_DIO10_SET 0x00000400U |
| #define GPIO_IMASK_DIO10_CLR 0x00000000U |
| #define GPIO_IMASK_DIO9 0x00000200U |
| #define GPIO_IMASK_DIO9_M 0x00000200U |
| #define GPIO_IMASK_DIO9_S 9U |
| #define GPIO_IMASK_DIO9_SET 0x00000200U |
| #define GPIO_IMASK_DIO9_CLR 0x00000000U |
| #define GPIO_IMASK_DIO8 0x00000100U |
| #define GPIO_IMASK_DIO8_M 0x00000100U |
| #define GPIO_IMASK_DIO8_S 8U |
| #define GPIO_IMASK_DIO8_SET 0x00000100U |
| #define GPIO_IMASK_DIO8_CLR 0x00000000U |
| #define GPIO_IMASK_DIO7 0x00000080U |
| #define GPIO_IMASK_DIO7_M 0x00000080U |
| #define GPIO_IMASK_DIO7_S 7U |
| #define GPIO_IMASK_DIO7_SET 0x00000080U |
| #define GPIO_IMASK_DIO7_CLR 0x00000000U |
| #define GPIO_IMASK_DIO6 0x00000040U |
| #define GPIO_IMASK_DIO6_M 0x00000040U |
| #define GPIO_IMASK_DIO6_S 6U |
| #define GPIO_IMASK_DIO6_SET 0x00000040U |
| #define GPIO_IMASK_DIO6_CLR 0x00000000U |
| #define GPIO_IMASK_DIO5 0x00000020U |
| #define GPIO_IMASK_DIO5_M 0x00000020U |
| #define GPIO_IMASK_DIO5_S 5U |
| #define GPIO_IMASK_DIO5_SET 0x00000020U |
| #define GPIO_IMASK_DIO5_CLR 0x00000000U |
| #define GPIO_IMASK_DIO4 0x00000010U |
| #define GPIO_IMASK_DIO4_M 0x00000010U |
| #define GPIO_IMASK_DIO4_S 4U |
| #define GPIO_IMASK_DIO4_SET 0x00000010U |
| #define GPIO_IMASK_DIO4_CLR 0x00000000U |
| #define GPIO_IMASK_DIO3 0x00000008U |
| #define GPIO_IMASK_DIO3_M 0x00000008U |
| #define GPIO_IMASK_DIO3_S 3U |
| #define GPIO_IMASK_DIO3_SET 0x00000008U |
| #define GPIO_IMASK_DIO3_CLR 0x00000000U |
| #define GPIO_IMASK_DIO2 0x00000004U |
| #define GPIO_IMASK_DIO2_M 0x00000004U |
| #define GPIO_IMASK_DIO2_S 2U |
| #define GPIO_IMASK_DIO2_SET 0x00000004U |
| #define GPIO_IMASK_DIO2_CLR 0x00000000U |
| #define GPIO_IMASK_DIO1 0x00000002U |
| #define GPIO_IMASK_DIO1_M 0x00000002U |
| #define GPIO_IMASK_DIO1_S 1U |
| #define GPIO_IMASK_DIO1_SET 0x00000002U |
| #define GPIO_IMASK_DIO1_CLR 0x00000000U |
| #define GPIO_IMASK_DIO0 0x00000001U |
| #define GPIO_IMASK_DIO0_M 0x00000001U |
| #define GPIO_IMASK_DIO0_S 0U |
| #define GPIO_IMASK_DIO0_SET 0x00000001U |
| #define GPIO_IMASK_DIO0_CLR 0x00000000U |
| #define GPIO_RIS_DIO25 0x02000000U |
| #define GPIO_RIS_DIO25_M 0x02000000U |
| #define GPIO_RIS_DIO25_S 25U |
| #define GPIO_RIS_DIO25_SET 0x02000000U |
| #define GPIO_RIS_DIO25_CLR 0x00000000U |
| #define GPIO_RIS_DIO24 0x01000000U |
| #define GPIO_RIS_DIO24_M 0x01000000U |
| #define GPIO_RIS_DIO24_S 24U |
| #define GPIO_RIS_DIO24_SET 0x01000000U |
| #define GPIO_RIS_DIO24_CLR 0x00000000U |
| #define GPIO_RIS_DIO23 0x00800000U |
| #define GPIO_RIS_DIO23_M 0x00800000U |
| #define GPIO_RIS_DIO23_S 23U |
| #define GPIO_RIS_DIO23_SET 0x00800000U |
| #define GPIO_RIS_DIO23_CLR 0x00000000U |
| #define GPIO_RIS_DIO22 0x00400000U |
| #define GPIO_RIS_DIO22_M 0x00400000U |
| #define GPIO_RIS_DIO22_S 22U |
| #define GPIO_RIS_DIO22_SET 0x00400000U |
| #define GPIO_RIS_DIO22_CLR 0x00000000U |
| #define GPIO_RIS_DIO21 0x00200000U |
| #define GPIO_RIS_DIO21_M 0x00200000U |
| #define GPIO_RIS_DIO21_S 21U |
| #define GPIO_RIS_DIO21_SET 0x00200000U |
| #define GPIO_RIS_DIO21_CLR 0x00000000U |
| #define GPIO_RIS_DIO20 0x00100000U |
| #define GPIO_RIS_DIO20_M 0x00100000U |
| #define GPIO_RIS_DIO20_S 20U |
| #define GPIO_RIS_DIO20_SET 0x00100000U |
| #define GPIO_RIS_DIO20_CLR 0x00000000U |
| #define GPIO_RIS_DIO19 0x00080000U |
| #define GPIO_RIS_DIO19_M 0x00080000U |
| #define GPIO_RIS_DIO19_S 19U |
| #define GPIO_RIS_DIO19_SET 0x00080000U |
| #define GPIO_RIS_DIO19_CLR 0x00000000U |
| #define GPIO_RIS_DIO18 0x00040000U |
| #define GPIO_RIS_DIO18_M 0x00040000U |
| #define GPIO_RIS_DIO18_S 18U |
| #define GPIO_RIS_DIO18_SET 0x00040000U |
| #define GPIO_RIS_DIO18_CLR 0x00000000U |
| #define GPIO_RIS_DIO17 0x00020000U |
| #define GPIO_RIS_DIO17_M 0x00020000U |
| #define GPIO_RIS_DIO17_S 17U |
| #define GPIO_RIS_DIO17_SET 0x00020000U |
| #define GPIO_RIS_DIO17_CLR 0x00000000U |
| #define GPIO_RIS_DIO16 0x00010000U |
| #define GPIO_RIS_DIO16_M 0x00010000U |
| #define GPIO_RIS_DIO16_S 16U |
| #define GPIO_RIS_DIO16_SET 0x00010000U |
| #define GPIO_RIS_DIO16_CLR 0x00000000U |
| #define GPIO_RIS_DIO15 0x00008000U |
| #define GPIO_RIS_DIO15_M 0x00008000U |
| #define GPIO_RIS_DIO15_S 15U |
| #define GPIO_RIS_DIO15_SET 0x00008000U |
| #define GPIO_RIS_DIO15_CLR 0x00000000U |
| #define GPIO_RIS_DIO14 0x00004000U |
| #define GPIO_RIS_DIO14_M 0x00004000U |
| #define GPIO_RIS_DIO14_S 14U |
| #define GPIO_RIS_DIO14_SET 0x00004000U |
| #define GPIO_RIS_DIO14_CLR 0x00000000U |
| #define GPIO_RIS_DIO13 0x00002000U |
| #define GPIO_RIS_DIO13_M 0x00002000U |
| #define GPIO_RIS_DIO13_S 13U |
| #define GPIO_RIS_DIO13_SET 0x00002000U |
| #define GPIO_RIS_DIO13_CLR 0x00000000U |
| #define GPIO_RIS_DIO12 0x00001000U |
| #define GPIO_RIS_DIO12_M 0x00001000U |
| #define GPIO_RIS_DIO12_S 12U |
| #define GPIO_RIS_DIO12_SET 0x00001000U |
| #define GPIO_RIS_DIO12_CLR 0x00000000U |
| #define GPIO_RIS_DIO11 0x00000800U |
| #define GPIO_RIS_DIO11_M 0x00000800U |
| #define GPIO_RIS_DIO11_S 11U |
| #define GPIO_RIS_DIO11_SET 0x00000800U |
| #define GPIO_RIS_DIO11_CLR 0x00000000U |
| #define GPIO_RIS_DIO10 0x00000400U |
| #define GPIO_RIS_DIO10_M 0x00000400U |
| #define GPIO_RIS_DIO10_S 10U |
| #define GPIO_RIS_DIO10_SET 0x00000400U |
| #define GPIO_RIS_DIO10_CLR 0x00000000U |
| #define GPIO_RIS_DIO9 0x00000200U |
| #define GPIO_RIS_DIO9_M 0x00000200U |
| #define GPIO_RIS_DIO9_S 9U |
| #define GPIO_RIS_DIO9_SET 0x00000200U |
| #define GPIO_RIS_DIO9_CLR 0x00000000U |
| #define GPIO_RIS_DIO8 0x00000100U |
| #define GPIO_RIS_DIO8_M 0x00000100U |
| #define GPIO_RIS_DIO8_S 8U |
| #define GPIO_RIS_DIO8_SET 0x00000100U |
| #define GPIO_RIS_DIO8_CLR 0x00000000U |
| #define GPIO_RIS_DIO7 0x00000080U |
| #define GPIO_RIS_DIO7_M 0x00000080U |
| #define GPIO_RIS_DIO7_S 7U |
| #define GPIO_RIS_DIO7_SET 0x00000080U |
| #define GPIO_RIS_DIO7_CLR 0x00000000U |
| #define GPIO_RIS_DIO6 0x00000040U |
| #define GPIO_RIS_DIO6_M 0x00000040U |
| #define GPIO_RIS_DIO6_S 6U |
| #define GPIO_RIS_DIO6_SET 0x00000040U |
| #define GPIO_RIS_DIO6_CLR 0x00000000U |
| #define GPIO_RIS_DIO5 0x00000020U |
| #define GPIO_RIS_DIO5_M 0x00000020U |
| #define GPIO_RIS_DIO5_S 5U |
| #define GPIO_RIS_DIO5_SET 0x00000020U |
| #define GPIO_RIS_DIO5_CLR 0x00000000U |
| #define GPIO_RIS_DIO4 0x00000010U |
| #define GPIO_RIS_DIO4_M 0x00000010U |
| #define GPIO_RIS_DIO4_S 4U |
| #define GPIO_RIS_DIO4_SET 0x00000010U |
| #define GPIO_RIS_DIO4_CLR 0x00000000U |
| #define GPIO_RIS_DIO3 0x00000008U |
| #define GPIO_RIS_DIO3_M 0x00000008U |
| #define GPIO_RIS_DIO3_S 3U |
| #define GPIO_RIS_DIO3_SET 0x00000008U |
| #define GPIO_RIS_DIO3_CLR 0x00000000U |
| #define GPIO_RIS_DIO2 0x00000004U |
| #define GPIO_RIS_DIO2_M 0x00000004U |
| #define GPIO_RIS_DIO2_S 2U |
| #define GPIO_RIS_DIO2_SET 0x00000004U |
| #define GPIO_RIS_DIO2_CLR 0x00000000U |
| #define GPIO_RIS_DIO1 0x00000002U |
| #define GPIO_RIS_DIO1_M 0x00000002U |
| #define GPIO_RIS_DIO1_S 1U |
| #define GPIO_RIS_DIO1_SET 0x00000002U |
| #define GPIO_RIS_DIO1_CLR 0x00000000U |
| #define GPIO_RIS_DIO0 0x00000001U |
| #define GPIO_RIS_DIO0_M 0x00000001U |
| #define GPIO_RIS_DIO0_S 0U |
| #define GPIO_RIS_DIO0_SET 0x00000001U |
| #define GPIO_RIS_DIO0_CLR 0x00000000U |
| #define GPIO_MIS_DIO25 0x02000000U |
| #define GPIO_MIS_DIO25_M 0x02000000U |
| #define GPIO_MIS_DIO25_S 25U |
| #define GPIO_MIS_DIO25_SET 0x02000000U |
| #define GPIO_MIS_DIO25_CLR 0x00000000U |
| #define GPIO_MIS_DIO24 0x01000000U |
| #define GPIO_MIS_DIO24_M 0x01000000U |
| #define GPIO_MIS_DIO24_S 24U |
| #define GPIO_MIS_DIO24_SET 0x01000000U |
| #define GPIO_MIS_DIO24_CLR 0x00000000U |
| #define GPIO_MIS_DIO23 0x00800000U |
| #define GPIO_MIS_DIO23_M 0x00800000U |
| #define GPIO_MIS_DIO23_S 23U |
| #define GPIO_MIS_DIO23_SET 0x00800000U |
| #define GPIO_MIS_DIO23_CLR 0x00000000U |
| #define GPIO_MIS_DIO22 0x00400000U |
| #define GPIO_MIS_DIO22_M 0x00400000U |
| #define GPIO_MIS_DIO22_S 22U |
| #define GPIO_MIS_DIO22_SET 0x00400000U |
| #define GPIO_MIS_DIO22_CLR 0x00000000U |
| #define GPIO_MIS_DIO21 0x00200000U |
| #define GPIO_MIS_DIO21_M 0x00200000U |
| #define GPIO_MIS_DIO21_S 21U |
| #define GPIO_MIS_DIO21_SET 0x00200000U |
| #define GPIO_MIS_DIO21_CLR 0x00000000U |
| #define GPIO_MIS_DIO20 0x00100000U |
| #define GPIO_MIS_DIO20_M 0x00100000U |
| #define GPIO_MIS_DIO20_S 20U |
| #define GPIO_MIS_DIO20_SET 0x00100000U |
| #define GPIO_MIS_DIO20_CLR 0x00000000U |
| #define GPIO_MIS_DIO19 0x00080000U |
| #define GPIO_MIS_DIO19_M 0x00080000U |
| #define GPIO_MIS_DIO19_S 19U |
| #define GPIO_MIS_DIO19_SET 0x00080000U |
| #define GPIO_MIS_DIO19_CLR 0x00000000U |
| #define GPIO_MIS_DIO18 0x00040000U |
| #define GPIO_MIS_DIO18_M 0x00040000U |
| #define GPIO_MIS_DIO18_S 18U |
| #define GPIO_MIS_DIO18_SET 0x00040000U |
| #define GPIO_MIS_DIO18_CLR 0x00000000U |
| #define GPIO_MIS_DIO17 0x00020000U |
| #define GPIO_MIS_DIO17_M 0x00020000U |
| #define GPIO_MIS_DIO17_S 17U |
| #define GPIO_MIS_DIO17_SET 0x00020000U |
| #define GPIO_MIS_DIO17_CLR 0x00000000U |
| #define GPIO_MIS_DIO16 0x00010000U |
| #define GPIO_MIS_DIO16_M 0x00010000U |
| #define GPIO_MIS_DIO16_S 16U |
| #define GPIO_MIS_DIO16_SET 0x00010000U |
| #define GPIO_MIS_DIO16_CLR 0x00000000U |
| #define GPIO_MIS_DIO15 0x00008000U |
| #define GPIO_MIS_DIO15_M 0x00008000U |
| #define GPIO_MIS_DIO15_S 15U |
| #define GPIO_MIS_DIO15_SET 0x00008000U |
| #define GPIO_MIS_DIO15_CLR 0x00000000U |
| #define GPIO_MIS_DIO14 0x00004000U |
| #define GPIO_MIS_DIO14_M 0x00004000U |
| #define GPIO_MIS_DIO14_S 14U |
| #define GPIO_MIS_DIO14_SET 0x00004000U |
| #define GPIO_MIS_DIO14_CLR 0x00000000U |
| #define GPIO_MIS_DIO13 0x00002000U |
| #define GPIO_MIS_DIO13_M 0x00002000U |
| #define GPIO_MIS_DIO13_S 13U |
| #define GPIO_MIS_DIO13_SET 0x00002000U |
| #define GPIO_MIS_DIO13_CLR 0x00000000U |
| #define GPIO_MIS_DIO12 0x00001000U |
| #define GPIO_MIS_DIO12_M 0x00001000U |
| #define GPIO_MIS_DIO12_S 12U |
| #define GPIO_MIS_DIO12_SET 0x00001000U |
| #define GPIO_MIS_DIO12_CLR 0x00000000U |
| #define GPIO_MIS_DIO11 0x00000800U |
| #define GPIO_MIS_DIO11_M 0x00000800U |
| #define GPIO_MIS_DIO11_S 11U |
| #define GPIO_MIS_DIO11_SET 0x00000800U |
| #define GPIO_MIS_DIO11_CLR 0x00000000U |
| #define GPIO_MIS_DIO10 0x00000400U |
| #define GPIO_MIS_DIO10_M 0x00000400U |
| #define GPIO_MIS_DIO10_S 10U |
| #define GPIO_MIS_DIO10_SET 0x00000400U |
| #define GPIO_MIS_DIO10_CLR 0x00000000U |
| #define GPIO_MIS_DIO9 0x00000200U |
| #define GPIO_MIS_DIO9_M 0x00000200U |
| #define GPIO_MIS_DIO9_S 9U |
| #define GPIO_MIS_DIO9_SET 0x00000200U |
| #define GPIO_MIS_DIO9_CLR 0x00000000U |
| #define GPIO_MIS_DIO8 0x00000100U |
| #define GPIO_MIS_DIO8_M 0x00000100U |
| #define GPIO_MIS_DIO8_S 8U |
| #define GPIO_MIS_DIO8_SET 0x00000100U |
| #define GPIO_MIS_DIO8_CLR 0x00000000U |
| #define GPIO_MIS_DIO7 0x00000080U |
| #define GPIO_MIS_DIO7_M 0x00000080U |
| #define GPIO_MIS_DIO7_S 7U |
| #define GPIO_MIS_DIO7_SET 0x00000080U |
| #define GPIO_MIS_DIO7_CLR 0x00000000U |
| #define GPIO_MIS_DIO6 0x00000040U |
| #define GPIO_MIS_DIO6_M 0x00000040U |
| #define GPIO_MIS_DIO6_S 6U |
| #define GPIO_MIS_DIO6_SET 0x00000040U |
| #define GPIO_MIS_DIO6_CLR 0x00000000U |
| #define GPIO_MIS_DIO5 0x00000020U |
| #define GPIO_MIS_DIO5_M 0x00000020U |
| #define GPIO_MIS_DIO5_S 5U |
| #define GPIO_MIS_DIO5_SET 0x00000020U |
| #define GPIO_MIS_DIO5_CLR 0x00000000U |
| #define GPIO_MIS_DIO4 0x00000010U |
| #define GPIO_MIS_DIO4_M 0x00000010U |
| #define GPIO_MIS_DIO4_S 4U |
| #define GPIO_MIS_DIO4_SET 0x00000010U |
| #define GPIO_MIS_DIO4_CLR 0x00000000U |
| #define GPIO_MIS_DIO3 0x00000008U |
| #define GPIO_MIS_DIO3_M 0x00000008U |
| #define GPIO_MIS_DIO3_S 3U |
| #define GPIO_MIS_DIO3_SET 0x00000008U |
| #define GPIO_MIS_DIO3_CLR 0x00000000U |
| #define GPIO_MIS_DIO2 0x00000004U |
| #define GPIO_MIS_DIO2_M 0x00000004U |
| #define GPIO_MIS_DIO2_S 2U |
| #define GPIO_MIS_DIO2_SET 0x00000004U |
| #define GPIO_MIS_DIO2_CLR 0x00000000U |
| #define GPIO_MIS_DIO1 0x00000002U |
| #define GPIO_MIS_DIO1_M 0x00000002U |
| #define GPIO_MIS_DIO1_S 1U |
| #define GPIO_MIS_DIO1_SET 0x00000002U |
| #define GPIO_MIS_DIO1_CLR 0x00000000U |
| #define GPIO_MIS_DIO0 0x00000001U |
| #define GPIO_MIS_DIO0_M 0x00000001U |
| #define GPIO_MIS_DIO0_S 0U |
| #define GPIO_MIS_DIO0_SET 0x00000001U |
| #define GPIO_MIS_DIO0_CLR 0x00000000U |
| #define GPIO_ISET_DIO25 0x02000000U |
| #define GPIO_ISET_DIO25_M 0x02000000U |
| #define GPIO_ISET_DIO25_S 25U |
| #define GPIO_ISET_DIO25_SET 0x02000000U |
| #define GPIO_ISET_DIO25_NOEFF 0x00000000U |
| #define GPIO_ISET_DIO24 0x01000000U |
| #define GPIO_ISET_DIO24_M 0x01000000U |
| #define GPIO_ISET_DIO24_S 24U |
| #define GPIO_ISET_DIO24_SET 0x01000000U |
| #define GPIO_ISET_DIO24_NOEFF 0x00000000U |
| #define GPIO_ISET_DIO23 0x00800000U |
| #define GPIO_ISET_DIO23_M 0x00800000U |
| #define GPIO_ISET_DIO23_S 23U |
| #define GPIO_ISET_DIO23_SET 0x00800000U |
| #define GPIO_ISET_DIO23_NOEFF 0x00000000U |
| #define GPIO_ISET_DIO22 0x00400000U |
| #define GPIO_ISET_DIO22_M 0x00400000U |
| #define GPIO_ISET_DIO22_S 22U |
| #define GPIO_ISET_DIO22_SET 0x00400000U |
| #define GPIO_ISET_DIO22_NOEFF 0x00000000U |
| #define GPIO_ISET_DIO21 0x00200000U |
| #define GPIO_ISET_DIO21_M 0x00200000U |
| #define GPIO_ISET_DIO21_S 21U |
| #define GPIO_ISET_DIO21_SET 0x00200000U |
| #define GPIO_ISET_DIO21_NOEFF 0x00000000U |
| #define GPIO_ISET_DIO20 0x00100000U |
| #define GPIO_ISET_DIO20_M 0x00100000U |
| #define GPIO_ISET_DIO20_S 20U |
| #define GPIO_ISET_DIO20_SET 0x00100000U |
| #define GPIO_ISET_DIO20_NOEFF 0x00000000U |
| #define GPIO_ISET_DIO19 0x00080000U |
| #define GPIO_ISET_DIO19_M 0x00080000U |
| #define GPIO_ISET_DIO19_S 19U |
| #define GPIO_ISET_DIO19_SET 0x00080000U |
| #define GPIO_ISET_DIO19_NOEFF 0x00000000U |
| #define GPIO_ISET_DIO18 0x00040000U |
| #define GPIO_ISET_DIO18_M 0x00040000U |
| #define GPIO_ISET_DIO18_S 18U |
| #define GPIO_ISET_DIO18_SET 0x00040000U |
| #define GPIO_ISET_DIO18_NOEFF 0x00000000U |
| #define GPIO_ISET_DIO17 0x00020000U |
| #define GPIO_ISET_DIO17_M 0x00020000U |
| #define GPIO_ISET_DIO17_S 17U |
| #define GPIO_ISET_DIO17_SET 0x00020000U |
| #define GPIO_ISET_DIO17_NOEFF 0x00000000U |
| #define GPIO_ISET_DIO16 0x00010000U |
| #define GPIO_ISET_DIO16_M 0x00010000U |
| #define GPIO_ISET_DIO16_S 16U |
| #define GPIO_ISET_DIO16_SET 0x00010000U |
| #define GPIO_ISET_DIO16_NOEFF 0x00000000U |
| #define GPIO_ISET_DIO15 0x00008000U |
| #define GPIO_ISET_DIO15_M 0x00008000U |
| #define GPIO_ISET_DIO15_S 15U |
| #define GPIO_ISET_DIO15_SET 0x00008000U |
| #define GPIO_ISET_DIO15_NOEFF 0x00000000U |
| #define GPIO_ISET_DIO14 0x00004000U |
| #define GPIO_ISET_DIO14_M 0x00004000U |
| #define GPIO_ISET_DIO14_S 14U |
| #define GPIO_ISET_DIO14_SET 0x00004000U |
| #define GPIO_ISET_DIO14_NOEFF 0x00000000U |
| #define GPIO_ISET_DIO13 0x00002000U |
| #define GPIO_ISET_DIO13_M 0x00002000U |
| #define GPIO_ISET_DIO13_S 13U |
| #define GPIO_ISET_DIO13_SET 0x00002000U |
| #define GPIO_ISET_DIO13_NOEFF 0x00000000U |
| #define GPIO_ISET_DIO12 0x00001000U |
| #define GPIO_ISET_DIO12_M 0x00001000U |
| #define GPIO_ISET_DIO12_S 12U |
| #define GPIO_ISET_DIO12_SET 0x00001000U |
| #define GPIO_ISET_DIO12_NOEFF 0x00000000U |
| #define GPIO_ISET_DIO11 0x00000800U |
| #define GPIO_ISET_DIO11_M 0x00000800U |
| #define GPIO_ISET_DIO11_S 11U |
| #define GPIO_ISET_DIO11_SET 0x00000800U |
| #define GPIO_ISET_DIO11_NOEFF 0x00000000U |
| #define GPIO_ISET_DIO10 0x00000400U |
| #define GPIO_ISET_DIO10_M 0x00000400U |
| #define GPIO_ISET_DIO10_S 10U |
| #define GPIO_ISET_DIO10_SET 0x00000400U |
| #define GPIO_ISET_DIO10_NOEFF 0x00000000U |
| #define GPIO_ISET_DIO9 0x00000200U |
| #define GPIO_ISET_DIO9_M 0x00000200U |
| #define GPIO_ISET_DIO9_S 9U |
| #define GPIO_ISET_DIO9_SET 0x00000200U |
| #define GPIO_ISET_DIO9_NOEFF 0x00000000U |
| #define GPIO_ISET_DIO8 0x00000100U |
| #define GPIO_ISET_DIO8_M 0x00000100U |
| #define GPIO_ISET_DIO8_S 8U |
| #define GPIO_ISET_DIO8_SET 0x00000100U |
| #define GPIO_ISET_DIO8_NOEFF 0x00000000U |
| #define GPIO_ISET_DIO7 0x00000080U |
| #define GPIO_ISET_DIO7_M 0x00000080U |
| #define GPIO_ISET_DIO7_S 7U |
| #define GPIO_ISET_DIO7_SET 0x00000080U |
| #define GPIO_ISET_DIO7_NOEFF 0x00000000U |
| #define GPIO_ISET_DIO6 0x00000040U |
| #define GPIO_ISET_DIO6_M 0x00000040U |
| #define GPIO_ISET_DIO6_S 6U |
| #define GPIO_ISET_DIO6_SET 0x00000040U |
| #define GPIO_ISET_DIO6_NOEFF 0x00000000U |
| #define GPIO_ISET_DIO5 0x00000020U |
| #define GPIO_ISET_DIO5_M 0x00000020U |
| #define GPIO_ISET_DIO5_S 5U |
| #define GPIO_ISET_DIO5_SET 0x00000020U |
| #define GPIO_ISET_DIO5_NOEFF 0x00000000U |
| #define GPIO_ISET_DIO4 0x00000010U |
| #define GPIO_ISET_DIO4_M 0x00000010U |
| #define GPIO_ISET_DIO4_S 4U |
| #define GPIO_ISET_DIO4_SET 0x00000010U |
| #define GPIO_ISET_DIO4_NOEFF 0x00000000U |
| #define GPIO_ISET_DIO3 0x00000008U |
| #define GPIO_ISET_DIO3_M 0x00000008U |
| #define GPIO_ISET_DIO3_S 3U |
| #define GPIO_ISET_DIO3_SET 0x00000008U |
| #define GPIO_ISET_DIO3_NOEFF 0x00000000U |
| #define GPIO_ISET_DIO2 0x00000004U |
| #define GPIO_ISET_DIO2_M 0x00000004U |
| #define GPIO_ISET_DIO2_S 2U |
| #define GPIO_ISET_DIO2_SET 0x00000004U |
| #define GPIO_ISET_DIO2_NOEFF 0x00000000U |
| #define GPIO_ISET_DIO1 0x00000002U |
| #define GPIO_ISET_DIO1_M 0x00000002U |
| #define GPIO_ISET_DIO1_S 1U |
| #define GPIO_ISET_DIO1_SET 0x00000002U |
| #define GPIO_ISET_DIO1_NOEFF 0x00000000U |
| #define GPIO_ISET_DIO0 0x00000001U |
| #define GPIO_ISET_DIO0_M 0x00000001U |
| #define GPIO_ISET_DIO0_S 0U |
| #define GPIO_ISET_DIO0_SET 0x00000001U |
| #define GPIO_ISET_DIO0_NOEFF 0x00000000U |
| #define GPIO_ICLR_DIO25 0x02000000U |
| #define GPIO_ICLR_DIO25_M 0x02000000U |
| #define GPIO_ICLR_DIO25_S 25U |
| #define GPIO_ICLR_DIO25_CLR 0x02000000U |
| #define GPIO_ICLR_DIO25_NOEFF 0x00000000U |
| #define GPIO_ICLR_DIO24 0x01000000U |
| #define GPIO_ICLR_DIO24_M 0x01000000U |
| #define GPIO_ICLR_DIO24_S 24U |
| #define GPIO_ICLR_DIO24_CLR 0x01000000U |
| #define GPIO_ICLR_DIO24_NOEFF 0x00000000U |
| #define GPIO_ICLR_DIO23 0x00800000U |
| #define GPIO_ICLR_DIO23_M 0x00800000U |
| #define GPIO_ICLR_DIO23_S 23U |
| #define GPIO_ICLR_DIO23_CLR 0x00800000U |
| #define GPIO_ICLR_DIO23_NOEFF 0x00000000U |
| #define GPIO_ICLR_DIO22 0x00400000U |
| #define GPIO_ICLR_DIO22_M 0x00400000U |
| #define GPIO_ICLR_DIO22_S 22U |
| #define GPIO_ICLR_DIO22_CLR 0x00400000U |
| #define GPIO_ICLR_DIO22_NOEFF 0x00000000U |
| #define GPIO_ICLR_DIO21 0x00200000U |
| #define GPIO_ICLR_DIO21_M 0x00200000U |
| #define GPIO_ICLR_DIO21_S 21U |
| #define GPIO_ICLR_DIO21_CLR 0x00200000U |
| #define GPIO_ICLR_DIO21_NOEFF 0x00000000U |
| #define GPIO_ICLR_DIO20 0x00100000U |
| #define GPIO_ICLR_DIO20_M 0x00100000U |
| #define GPIO_ICLR_DIO20_S 20U |
| #define GPIO_ICLR_DIO20_CLR 0x00100000U |
| #define GPIO_ICLR_DIO20_NOEFF 0x00000000U |
| #define GPIO_ICLR_DIO19 0x00080000U |
| #define GPIO_ICLR_DIO19_M 0x00080000U |
| #define GPIO_ICLR_DIO19_S 19U |
| #define GPIO_ICLR_DIO19_CLR 0x00080000U |
| #define GPIO_ICLR_DIO19_NOEFF 0x00000000U |
| #define GPIO_ICLR_DIO18 0x00040000U |
| #define GPIO_ICLR_DIO18_M 0x00040000U |
| #define GPIO_ICLR_DIO18_S 18U |
| #define GPIO_ICLR_DIO18_CLR 0x00040000U |
| #define GPIO_ICLR_DIO18_NOEFF 0x00000000U |
| #define GPIO_ICLR_DIO17 0x00020000U |
| #define GPIO_ICLR_DIO17_M 0x00020000U |
| #define GPIO_ICLR_DIO17_S 17U |
| #define GPIO_ICLR_DIO17_CLR 0x00020000U |
| #define GPIO_ICLR_DIO17_NOEFF 0x00000000U |
| #define GPIO_ICLR_DIO16 0x00010000U |
| #define GPIO_ICLR_DIO16_M 0x00010000U |
| #define GPIO_ICLR_DIO16_S 16U |
| #define GPIO_ICLR_DIO16_CLR 0x00010000U |
| #define GPIO_ICLR_DIO16_NOEFF 0x00000000U |
| #define GPIO_ICLR_DIO15 0x00008000U |
| #define GPIO_ICLR_DIO15_M 0x00008000U |
| #define GPIO_ICLR_DIO15_S 15U |
| #define GPIO_ICLR_DIO15_CLR 0x00008000U |
| #define GPIO_ICLR_DIO15_NOEFF 0x00000000U |
| #define GPIO_ICLR_DIO14 0x00004000U |
| #define GPIO_ICLR_DIO14_M 0x00004000U |
| #define GPIO_ICLR_DIO14_S 14U |
| #define GPIO_ICLR_DIO14_CLR 0x00004000U |
| #define GPIO_ICLR_DIO14_NOEFF 0x00000000U |
| #define GPIO_ICLR_DIO13 0x00002000U |
| #define GPIO_ICLR_DIO13_M 0x00002000U |
| #define GPIO_ICLR_DIO13_S 13U |
| #define GPIO_ICLR_DIO13_CLR 0x00002000U |
| #define GPIO_ICLR_DIO13_NOEFF 0x00000000U |
| #define GPIO_ICLR_DIO12 0x00001000U |
| #define GPIO_ICLR_DIO12_M 0x00001000U |
| #define GPIO_ICLR_DIO12_S 12U |
| #define GPIO_ICLR_DIO12_CLR 0x00001000U |
| #define GPIO_ICLR_DIO12_NOEFF 0x00000000U |
| #define GPIO_ICLR_DIO11 0x00000800U |
| #define GPIO_ICLR_DIO11_M 0x00000800U |
| #define GPIO_ICLR_DIO11_S 11U |
| #define GPIO_ICLR_DIO11_CLR 0x00000800U |
| #define GPIO_ICLR_DIO11_NOEFF 0x00000000U |
| #define GPIO_ICLR_DIO10 0x00000400U |
| #define GPIO_ICLR_DIO10_M 0x00000400U |
| #define GPIO_ICLR_DIO10_S 10U |
| #define GPIO_ICLR_DIO10_CLR 0x00000400U |
| #define GPIO_ICLR_DIO10_NOEFF 0x00000000U |
| #define GPIO_ICLR_DIO9 0x00000200U |
| #define GPIO_ICLR_DIO9_M 0x00000200U |
| #define GPIO_ICLR_DIO9_S 9U |
| #define GPIO_ICLR_DIO9_CLR 0x00000200U |
| #define GPIO_ICLR_DIO9_NOEFF 0x00000000U |
| #define GPIO_ICLR_DIO8 0x00000100U |
| #define GPIO_ICLR_DIO8_M 0x00000100U |
| #define GPIO_ICLR_DIO8_S 8U |
| #define GPIO_ICLR_DIO8_CLR 0x00000100U |
| #define GPIO_ICLR_DIO8_NOEFF 0x00000000U |
| #define GPIO_ICLR_DIO7 0x00000080U |
| #define GPIO_ICLR_DIO7_M 0x00000080U |
| #define GPIO_ICLR_DIO7_S 7U |
| #define GPIO_ICLR_DIO7_CLR 0x00000080U |
| #define GPIO_ICLR_DIO7_NOEFF 0x00000000U |
| #define GPIO_ICLR_DIO6 0x00000040U |
| #define GPIO_ICLR_DIO6_M 0x00000040U |
| #define GPIO_ICLR_DIO6_S 6U |
| #define GPIO_ICLR_DIO6_CLR 0x00000040U |
| #define GPIO_ICLR_DIO6_NOEFF 0x00000000U |
| #define GPIO_ICLR_DIO5 0x00000020U |
| #define GPIO_ICLR_DIO5_M 0x00000020U |
| #define GPIO_ICLR_DIO5_S 5U |
| #define GPIO_ICLR_DIO5_CLR 0x00000020U |
| #define GPIO_ICLR_DIO5_NOEFF 0x00000000U |
| #define GPIO_ICLR_DIO4 0x00000010U |
| #define GPIO_ICLR_DIO4_M 0x00000010U |
| #define GPIO_ICLR_DIO4_S 4U |
| #define GPIO_ICLR_DIO4_CLR 0x00000010U |
| #define GPIO_ICLR_DIO4_NOEFF 0x00000000U |
| #define GPIO_ICLR_DIO3 0x00000008U |
| #define GPIO_ICLR_DIO3_M 0x00000008U |
| #define GPIO_ICLR_DIO3_S 3U |
| #define GPIO_ICLR_DIO3_CLR 0x00000008U |
| #define GPIO_ICLR_DIO3_NOEFF 0x00000000U |
| #define GPIO_ICLR_DIO2 0x00000004U |
| #define GPIO_ICLR_DIO2_M 0x00000004U |
| #define GPIO_ICLR_DIO2_S 2U |
| #define GPIO_ICLR_DIO2_CLR 0x00000004U |
| #define GPIO_ICLR_DIO2_NOEFF 0x00000000U |
| #define GPIO_ICLR_DIO1 0x00000002U |
| #define GPIO_ICLR_DIO1_M 0x00000002U |
| #define GPIO_ICLR_DIO1_S 1U |
| #define GPIO_ICLR_DIO1_CLR 0x00000002U |
| #define GPIO_ICLR_DIO1_NOEFF 0x00000000U |
| #define GPIO_ICLR_DIO0 0x00000001U |
| #define GPIO_ICLR_DIO0_M 0x00000001U |
| #define GPIO_ICLR_DIO0_S 0U |
| #define GPIO_ICLR_DIO0_CLR 0x00000001U |
| #define GPIO_ICLR_DIO0_NOEFF 0x00000000U |
| #define GPIO_IMSET_DIO25 0x02000000U |
| #define GPIO_IMSET_DIO25_M 0x02000000U |
| #define GPIO_IMSET_DIO25_S 25U |
| #define GPIO_IMSET_DIO25_SET 0x02000000U |
| #define GPIO_IMSET_DIO25_NOEFF 0x00000000U |
| #define GPIO_IMSET_DIO24 0x01000000U |
| #define GPIO_IMSET_DIO24_M 0x01000000U |
| #define GPIO_IMSET_DIO24_S 24U |
| #define GPIO_IMSET_DIO24_SET 0x01000000U |
| #define GPIO_IMSET_DIO24_NOEFF 0x00000000U |
| #define GPIO_IMSET_DIO23 0x00800000U |
| #define GPIO_IMSET_DIO23_M 0x00800000U |
| #define GPIO_IMSET_DIO23_S 23U |
| #define GPIO_IMSET_DIO23_SET 0x00800000U |
| #define GPIO_IMSET_DIO23_NOEFF 0x00000000U |
| #define GPIO_IMSET_DIO22 0x00400000U |
| #define GPIO_IMSET_DIO22_M 0x00400000U |
| #define GPIO_IMSET_DIO22_S 22U |
| #define GPIO_IMSET_DIO22_SET 0x00400000U |
| #define GPIO_IMSET_DIO22_NOEFF 0x00000000U |
| #define GPIO_IMSET_DIO21 0x00200000U |
| #define GPIO_IMSET_DIO21_M 0x00200000U |
| #define GPIO_IMSET_DIO21_S 21U |
| #define GPIO_IMSET_DIO21_SET 0x00200000U |
| #define GPIO_IMSET_DIO21_NOEFF 0x00000000U |
| #define GPIO_IMSET_DIO20 0x00100000U |
| #define GPIO_IMSET_DIO20_M 0x00100000U |
| #define GPIO_IMSET_DIO20_S 20U |
| #define GPIO_IMSET_DIO20_SET 0x00100000U |
| #define GPIO_IMSET_DIO20_NOEFF 0x00000000U |
| #define GPIO_IMSET_DIO19 0x00080000U |
| #define GPIO_IMSET_DIO19_M 0x00080000U |
| #define GPIO_IMSET_DIO19_S 19U |
| #define GPIO_IMSET_DIO19_SET 0x00080000U |
| #define GPIO_IMSET_DIO19_NOEFF 0x00000000U |
| #define GPIO_IMSET_DIO18 0x00040000U |
| #define GPIO_IMSET_DIO18_M 0x00040000U |
| #define GPIO_IMSET_DIO18_S 18U |
| #define GPIO_IMSET_DIO18_SET 0x00040000U |
| #define GPIO_IMSET_DIO18_NOEFF 0x00000000U |
| #define GPIO_IMSET_DIO17 0x00020000U |
| #define GPIO_IMSET_DIO17_M 0x00020000U |
| #define GPIO_IMSET_DIO17_S 17U |
| #define GPIO_IMSET_DIO17_SET 0x00020000U |
| #define GPIO_IMSET_DIO17_NOEFF 0x00000000U |
| #define GPIO_IMSET_DIO16 0x00010000U |
| #define GPIO_IMSET_DIO16_M 0x00010000U |
| #define GPIO_IMSET_DIO16_S 16U |
| #define GPIO_IMSET_DIO16_SET 0x00010000U |
| #define GPIO_IMSET_DIO16_NOEFF 0x00000000U |
| #define GPIO_IMSET_DIO15 0x00008000U |
| #define GPIO_IMSET_DIO15_M 0x00008000U |
| #define GPIO_IMSET_DIO15_S 15U |
| #define GPIO_IMSET_DIO15_SET 0x00008000U |
| #define GPIO_IMSET_DIO15_NOEFF 0x00000000U |
| #define GPIO_IMSET_DIO14 0x00004000U |
| #define GPIO_IMSET_DIO14_M 0x00004000U |
| #define GPIO_IMSET_DIO14_S 14U |
| #define GPIO_IMSET_DIO14_SET 0x00004000U |
| #define GPIO_IMSET_DIO14_NOEFF 0x00000000U |
| #define GPIO_IMSET_DIO13 0x00002000U |
| #define GPIO_IMSET_DIO13_M 0x00002000U |
| #define GPIO_IMSET_DIO13_S 13U |
| #define GPIO_IMSET_DIO13_SET 0x00002000U |
| #define GPIO_IMSET_DIO13_NOEFF 0x00000000U |
| #define GPIO_IMSET_DIO12 0x00001000U |
| #define GPIO_IMSET_DIO12_M 0x00001000U |
| #define GPIO_IMSET_DIO12_S 12U |
| #define GPIO_IMSET_DIO12_SET 0x00001000U |
| #define GPIO_IMSET_DIO12_NOEFF 0x00000000U |
| #define GPIO_IMSET_DIO11 0x00000800U |
| #define GPIO_IMSET_DIO11_M 0x00000800U |
| #define GPIO_IMSET_DIO11_S 11U |
| #define GPIO_IMSET_DIO11_SET 0x00000800U |
| #define GPIO_IMSET_DIO11_NOEFF 0x00000000U |
| #define GPIO_IMSET_DIO10 0x00000400U |
| #define GPIO_IMSET_DIO10_M 0x00000400U |
| #define GPIO_IMSET_DIO10_S 10U |
| #define GPIO_IMSET_DIO10_SET 0x00000400U |
| #define GPIO_IMSET_DIO10_NOEFF 0x00000000U |
| #define GPIO_IMSET_DIO9 0x00000200U |
| #define GPIO_IMSET_DIO9_M 0x00000200U |
| #define GPIO_IMSET_DIO9_S 9U |
| #define GPIO_IMSET_DIO9_SET 0x00000200U |
| #define GPIO_IMSET_DIO9_NOEFF 0x00000000U |
| #define GPIO_IMSET_DIO8 0x00000100U |
| #define GPIO_IMSET_DIO8_M 0x00000100U |
| #define GPIO_IMSET_DIO8_S 8U |
| #define GPIO_IMSET_DIO8_SET 0x00000100U |
| #define GPIO_IMSET_DIO8_NOEFF 0x00000000U |
| #define GPIO_IMSET_DIO7 0x00000080U |
| #define GPIO_IMSET_DIO7_M 0x00000080U |
| #define GPIO_IMSET_DIO7_S 7U |
| #define GPIO_IMSET_DIO7_SET 0x00000080U |
| #define GPIO_IMSET_DIO7_NOEFF 0x00000000U |
| #define GPIO_IMSET_DIO6 0x00000040U |
| #define GPIO_IMSET_DIO6_M 0x00000040U |
| #define GPIO_IMSET_DIO6_S 6U |
| #define GPIO_IMSET_DIO6_SET 0x00000040U |
| #define GPIO_IMSET_DIO6_NOEFF 0x00000000U |
| #define GPIO_IMSET_DIO5 0x00000020U |
| #define GPIO_IMSET_DIO5_M 0x00000020U |
| #define GPIO_IMSET_DIO5_S 5U |
| #define GPIO_IMSET_DIO5_SET 0x00000020U |
| #define GPIO_IMSET_DIO5_NOEFF 0x00000000U |
| #define GPIO_IMSET_DIO4 0x00000010U |
| #define GPIO_IMSET_DIO4_M 0x00000010U |
| #define GPIO_IMSET_DIO4_S 4U |
| #define GPIO_IMSET_DIO4_SET 0x00000010U |
| #define GPIO_IMSET_DIO4_NOEFF 0x00000000U |
| #define GPIO_IMSET_DIO3 0x00000008U |
| #define GPIO_IMSET_DIO3_M 0x00000008U |
| #define GPIO_IMSET_DIO3_S 3U |
| #define GPIO_IMSET_DIO3_SET 0x00000008U |
| #define GPIO_IMSET_DIO3_NOEFF 0x00000000U |
| #define GPIO_IMSET_DIO2 0x00000004U |
| #define GPIO_IMSET_DIO2_M 0x00000004U |
| #define GPIO_IMSET_DIO2_S 2U |
| #define GPIO_IMSET_DIO2_SET 0x00000004U |
| #define GPIO_IMSET_DIO2_NOEFF 0x00000000U |
| #define GPIO_IMSET_DIO1 0x00000002U |
| #define GPIO_IMSET_DIO1_M 0x00000002U |
| #define GPIO_IMSET_DIO1_S 1U |
| #define GPIO_IMSET_DIO1_SET 0x00000002U |
| #define GPIO_IMSET_DIO1_NOEFF 0x00000000U |
| #define GPIO_IMSET_DIO0 0x00000001U |
| #define GPIO_IMSET_DIO0_M 0x00000001U |
| #define GPIO_IMSET_DIO0_S 0U |
| #define GPIO_IMSET_DIO0_SET 0x00000001U |
| #define GPIO_IMSET_DIO0_NOEFF 0x00000000U |
| #define GPIO_IMCLR_DIO25 0x02000000U |
| #define GPIO_IMCLR_DIO25_M 0x02000000U |
| #define GPIO_IMCLR_DIO25_S 25U |
| #define GPIO_IMCLR_DIO25_CLR 0x02000000U |
| #define GPIO_IMCLR_DIO25_NOEFF 0x00000000U |
| #define GPIO_IMCLR_DIO24 0x01000000U |
| #define GPIO_IMCLR_DIO24_M 0x01000000U |
| #define GPIO_IMCLR_DIO24_S 24U |
| #define GPIO_IMCLR_DIO24_CLR 0x01000000U |
| #define GPIO_IMCLR_DIO24_NOEFF 0x00000000U |
| #define GPIO_IMCLR_DIO23 0x00800000U |
| #define GPIO_IMCLR_DIO23_M 0x00800000U |
| #define GPIO_IMCLR_DIO23_S 23U |
| #define GPIO_IMCLR_DIO23_CLR 0x00800000U |
| #define GPIO_IMCLR_DIO23_NOEFF 0x00000000U |
| #define GPIO_IMCLR_DIO22 0x00400000U |
| #define GPIO_IMCLR_DIO22_M 0x00400000U |
| #define GPIO_IMCLR_DIO22_S 22U |
| #define GPIO_IMCLR_DIO22_CLR 0x00400000U |
| #define GPIO_IMCLR_DIO22_NOEFF 0x00000000U |
| #define GPIO_IMCLR_DIO21 0x00200000U |
| #define GPIO_IMCLR_DIO21_M 0x00200000U |
| #define GPIO_IMCLR_DIO21_S 21U |
| #define GPIO_IMCLR_DIO21_CLR 0x00200000U |
| #define GPIO_IMCLR_DIO21_NOEFF 0x00000000U |
| #define GPIO_IMCLR_DIO20 0x00100000U |
| #define GPIO_IMCLR_DIO20_M 0x00100000U |
| #define GPIO_IMCLR_DIO20_S 20U |
| #define GPIO_IMCLR_DIO20_CLR 0x00100000U |
| #define GPIO_IMCLR_DIO20_NOEFF 0x00000000U |
| #define GPIO_IMCLR_DIO19 0x00080000U |
| #define GPIO_IMCLR_DIO19_M 0x00080000U |
| #define GPIO_IMCLR_DIO19_S 19U |
| #define GPIO_IMCLR_DIO19_CLR 0x00080000U |
| #define GPIO_IMCLR_DIO19_NOEFF 0x00000000U |
| #define GPIO_IMCLR_DIO18 0x00040000U |
| #define GPIO_IMCLR_DIO18_M 0x00040000U |
| #define GPIO_IMCLR_DIO18_S 18U |
| #define GPIO_IMCLR_DIO18_CLR 0x00040000U |
| #define GPIO_IMCLR_DIO18_NOEFF 0x00000000U |
| #define GPIO_IMCLR_DIO17 0x00020000U |
| #define GPIO_IMCLR_DIO17_M 0x00020000U |
| #define GPIO_IMCLR_DIO17_S 17U |
| #define GPIO_IMCLR_DIO17_CLR 0x00020000U |
| #define GPIO_IMCLR_DIO17_NOEFF 0x00000000U |
| #define GPIO_IMCLR_DIO16 0x00010000U |
| #define GPIO_IMCLR_DIO16_M 0x00010000U |
| #define GPIO_IMCLR_DIO16_S 16U |
| #define GPIO_IMCLR_DIO16_CLR 0x00010000U |
| #define GPIO_IMCLR_DIO16_NOEFF 0x00000000U |
| #define GPIO_IMCLR_DIO15 0x00008000U |
| #define GPIO_IMCLR_DIO15_M 0x00008000U |
| #define GPIO_IMCLR_DIO15_S 15U |
| #define GPIO_IMCLR_DIO15_CLR 0x00008000U |
| #define GPIO_IMCLR_DIO15_NOEFF 0x00000000U |
| #define GPIO_IMCLR_DIO14 0x00004000U |
| #define GPIO_IMCLR_DIO14_M 0x00004000U |
| #define GPIO_IMCLR_DIO14_S 14U |
| #define GPIO_IMCLR_DIO14_CLR 0x00004000U |
| #define GPIO_IMCLR_DIO14_NOEFF 0x00000000U |
| #define GPIO_IMCLR_DIO13 0x00002000U |
| #define GPIO_IMCLR_DIO13_M 0x00002000U |
| #define GPIO_IMCLR_DIO13_S 13U |
| #define GPIO_IMCLR_DIO13_CLR 0x00002000U |
| #define GPIO_IMCLR_DIO13_NOEFF 0x00000000U |
| #define GPIO_IMCLR_DIO12 0x00001000U |
| #define GPIO_IMCLR_DIO12_M 0x00001000U |
| #define GPIO_IMCLR_DIO12_S 12U |
| #define GPIO_IMCLR_DIO12_CLR 0x00001000U |
| #define GPIO_IMCLR_DIO12_NOEFF 0x00000000U |
| #define GPIO_IMCLR_DIO11 0x00000800U |
| #define GPIO_IMCLR_DIO11_M 0x00000800U |
| #define GPIO_IMCLR_DIO11_S 11U |
| #define GPIO_IMCLR_DIO11_CLR 0x00000800U |
| #define GPIO_IMCLR_DIO11_NOEFF 0x00000000U |
| #define GPIO_IMCLR_DIO10 0x00000400U |
| #define GPIO_IMCLR_DIO10_M 0x00000400U |
| #define GPIO_IMCLR_DIO10_S 10U |
| #define GPIO_IMCLR_DIO10_CLR 0x00000400U |
| #define GPIO_IMCLR_DIO10_NOEFF 0x00000000U |
| #define GPIO_IMCLR_DIO9 0x00000200U |
| #define GPIO_IMCLR_DIO9_M 0x00000200U |
| #define GPIO_IMCLR_DIO9_S 9U |
| #define GPIO_IMCLR_DIO9_CLR 0x00000200U |
| #define GPIO_IMCLR_DIO9_NOEFF 0x00000000U |
| #define GPIO_IMCLR_DIO8 0x00000100U |
| #define GPIO_IMCLR_DIO8_M 0x00000100U |
| #define GPIO_IMCLR_DIO8_S 8U |
| #define GPIO_IMCLR_DIO8_CLR 0x00000100U |
| #define GPIO_IMCLR_DIO8_NOEFF 0x00000000U |
| #define GPIO_IMCLR_DIO7 0x00000080U |
| #define GPIO_IMCLR_DIO7_M 0x00000080U |
| #define GPIO_IMCLR_DIO7_S 7U |
| #define GPIO_IMCLR_DIO7_CLR 0x00000080U |
| #define GPIO_IMCLR_DIO7_NOEFF 0x00000000U |
| #define GPIO_IMCLR_DIO6 0x00000040U |
| #define GPIO_IMCLR_DIO6_M 0x00000040U |
| #define GPIO_IMCLR_DIO6_S 6U |
| #define GPIO_IMCLR_DIO6_CLR 0x00000040U |
| #define GPIO_IMCLR_DIO6_NOEFF 0x00000000U |
| #define GPIO_IMCLR_DIO5 0x00000020U |
| #define GPIO_IMCLR_DIO5_M 0x00000020U |
| #define GPIO_IMCLR_DIO5_S 5U |
| #define GPIO_IMCLR_DIO5_CLR 0x00000020U |
| #define GPIO_IMCLR_DIO5_NOEFF 0x00000000U |
| #define GPIO_IMCLR_DIO4 0x00000010U |
| #define GPIO_IMCLR_DIO4_M 0x00000010U |
| #define GPIO_IMCLR_DIO4_S 4U |
| #define GPIO_IMCLR_DIO4_CLR 0x00000010U |
| #define GPIO_IMCLR_DIO4_NOEFF 0x00000000U |
| #define GPIO_IMCLR_DIO3 0x00000008U |
| #define GPIO_IMCLR_DIO3_M 0x00000008U |
| #define GPIO_IMCLR_DIO3_S 3U |
| #define GPIO_IMCLR_DIO3_CLR 0x00000008U |
| #define GPIO_IMCLR_DIO3_NOEFF 0x00000000U |
| #define GPIO_IMCLR_DIO2 0x00000004U |
| #define GPIO_IMCLR_DIO2_M 0x00000004U |
| #define GPIO_IMCLR_DIO2_S 2U |
| #define GPIO_IMCLR_DIO2_CLR 0x00000004U |
| #define GPIO_IMCLR_DIO2_NOEFF 0x00000000U |
| #define GPIO_IMCLR_DIO1 0x00000002U |
| #define GPIO_IMCLR_DIO1_M 0x00000002U |
| #define GPIO_IMCLR_DIO1_S 1U |
| #define GPIO_IMCLR_DIO1_CLR 0x00000002U |
| #define GPIO_IMCLR_DIO1_NOEFF 0x00000000U |
| #define GPIO_IMCLR_DIO0 0x00000001U |
| #define GPIO_IMCLR_DIO0_M 0x00000001U |
| #define GPIO_IMCLR_DIO0_S 0U |
| #define GPIO_IMCLR_DIO0_CLR 0x00000001U |
| #define GPIO_IMCLR_DIO0_NOEFF 0x00000000U |
| #define GPIO_DOUT3_0_DIO3 0x01000000U |
| #define GPIO_DOUT3_0_DIO3_M 0x01000000U |
| #define GPIO_DOUT3_0_DIO3_S 24U |
| #define GPIO_DOUT3_0_DIO3_ONE 0x01000000U |
| #define GPIO_DOUT3_0_DIO3_ZERO 0x00000000U |
| #define GPIO_DOUT3_0_DIO2 0x00010000U |
| #define GPIO_DOUT3_0_DIO2_M 0x00010000U |
| #define GPIO_DOUT3_0_DIO2_S 16U |
| #define GPIO_DOUT3_0_DIO2_ONE 0x00010000U |
| #define GPIO_DOUT3_0_DIO2_ZERO 0x00000000U |
| #define GPIO_DOUT3_0_DIO1 0x00000100U |
| #define GPIO_DOUT3_0_DIO1_M 0x00000100U |
| #define GPIO_DOUT3_0_DIO1_S 8U |
| #define GPIO_DOUT3_0_DIO1_ONE 0x00000100U |
| #define GPIO_DOUT3_0_DIO1_ZERO 0x00000000U |
| #define GPIO_DOUT3_0_DIO0 0x00000001U |
| #define GPIO_DOUT3_0_DIO0_M 0x00000001U |
| #define GPIO_DOUT3_0_DIO0_S 0U |
| #define GPIO_DOUT3_0_DIO0_ONE 0x00000001U |
| #define GPIO_DOUT3_0_DIO0_ZERO 0x00000000U |
| #define GPIO_DOUT7_4_DIO7 0x01000000U |
| #define GPIO_DOUT7_4_DIO7_M 0x01000000U |
| #define GPIO_DOUT7_4_DIO7_S 24U |
| #define GPIO_DOUT7_4_DIO7_ONE 0x01000000U |
| #define GPIO_DOUT7_4_DIO7_ZERO 0x00000000U |
| #define GPIO_DOUT7_4_DIO6 0x00010000U |
| #define GPIO_DOUT7_4_DIO6_M 0x00010000U |
| #define GPIO_DOUT7_4_DIO6_S 16U |
| #define GPIO_DOUT7_4_DIO6_ONE 0x00010000U |
| #define GPIO_DOUT7_4_DIO6_ZERO 0x00000000U |
| #define GPIO_DOUT7_4_DIO5 0x00000100U |
| #define GPIO_DOUT7_4_DIO5_M 0x00000100U |
| #define GPIO_DOUT7_4_DIO5_S 8U |
| #define GPIO_DOUT7_4_DIO5_ONE 0x00000100U |
| #define GPIO_DOUT7_4_DIO5_ZERO 0x00000000U |
| #define GPIO_DOUT7_4_DIO4 0x00000001U |
| #define GPIO_DOUT7_4_DIO4_M 0x00000001U |
| #define GPIO_DOUT7_4_DIO4_S 0U |
| #define GPIO_DOUT7_4_DIO4_ONE 0x00000001U |
| #define GPIO_DOUT7_4_DIO4_ZERO 0x00000000U |
| #define GPIO_DOUT11_8_DIO11 0x01000000U |
| #define GPIO_DOUT11_8_DIO11_M 0x01000000U |
| #define GPIO_DOUT11_8_DIO11_S 24U |
| #define GPIO_DOUT11_8_DIO11_ONE 0x01000000U |
| #define GPIO_DOUT11_8_DIO11_ZERO 0x00000000U |
| #define GPIO_DOUT11_8_DIO10 0x00010000U |
| #define GPIO_DOUT11_8_DIO10_M 0x00010000U |
| #define GPIO_DOUT11_8_DIO10_S 16U |
| #define GPIO_DOUT11_8_DIO10_ONE 0x00010000U |
| #define GPIO_DOUT11_8_DIO10_ZERO 0x00000000U |
| #define GPIO_DOUT11_8_DIO9 0x00000100U |
| #define GPIO_DOUT11_8_DIO9_M 0x00000100U |
| #define GPIO_DOUT11_8_DIO9_S 8U |
| #define GPIO_DOUT11_8_DIO9_ONE 0x00000100U |
| #define GPIO_DOUT11_8_DIO9_ZERO 0x00000000U |
| #define GPIO_DOUT11_8_DIO8 0x00000001U |
| #define GPIO_DOUT11_8_DIO8_M 0x00000001U |
| #define GPIO_DOUT11_8_DIO8_S 0U |
| #define GPIO_DOUT11_8_DIO8_ONE 0x00000001U |
| #define GPIO_DOUT11_8_DIO8_ZERO 0x00000000U |
| #define GPIO_DOUT15_12_DIO15 0x01000000U |
| #define GPIO_DOUT15_12_DIO15_M 0x01000000U |
| #define GPIO_DOUT15_12_DIO15_S 24U |
| #define GPIO_DOUT15_12_DIO15_ONE 0x01000000U |
| #define GPIO_DOUT15_12_DIO15_ZERO 0x00000000U |
| #define GPIO_DOUT15_12_DIO14 0x00010000U |
| #define GPIO_DOUT15_12_DIO14_M 0x00010000U |
| #define GPIO_DOUT15_12_DIO14_S 16U |
| #define GPIO_DOUT15_12_DIO14_ONE 0x00010000U |
| #define GPIO_DOUT15_12_DIO14_ZERO 0x00000000U |
| #define GPIO_DOUT15_12_DIO13 0x00000100U |
| #define GPIO_DOUT15_12_DIO13_M 0x00000100U |
| #define GPIO_DOUT15_12_DIO13_S 8U |
| #define GPIO_DOUT15_12_DIO13_ONE 0x00000100U |
| #define GPIO_DOUT15_12_DIO13_ZERO 0x00000000U |
| #define GPIO_DOUT15_12_DIO12 0x00000001U |
| #define GPIO_DOUT15_12_DIO12_M 0x00000001U |
| #define GPIO_DOUT15_12_DIO12_S 0U |
| #define GPIO_DOUT15_12_DIO12_ONE 0x00000001U |
| #define GPIO_DOUT15_12_DIO12_ZERO 0x00000000U |
| #define GPIO_DOUT19_16_DIO19 0x01000000U |
| #define GPIO_DOUT19_16_DIO19_M 0x01000000U |
| #define GPIO_DOUT19_16_DIO19_S 24U |
| #define GPIO_DOUT19_16_DIO19_ONE 0x01000000U |
| #define GPIO_DOUT19_16_DIO19_ZERO 0x00000000U |
| #define GPIO_DOUT19_16_DIO18 0x00010000U |
| #define GPIO_DOUT19_16_DIO18_M 0x00010000U |
| #define GPIO_DOUT19_16_DIO18_S 16U |
| #define GPIO_DOUT19_16_DIO18_ONE 0x00010000U |
| #define GPIO_DOUT19_16_DIO18_ZERO 0x00000000U |
| #define GPIO_DOUT19_16_DIO17 0x00000100U |
| #define GPIO_DOUT19_16_DIO17_M 0x00000100U |
| #define GPIO_DOUT19_16_DIO17_S 8U |
| #define GPIO_DOUT19_16_DIO17_ONE 0x00000100U |
| #define GPIO_DOUT19_16_DIO17_ZERO 0x00000000U |
| #define GPIO_DOUT19_16_DIO16 0x00000001U |
| #define GPIO_DOUT19_16_DIO16_M 0x00000001U |
| #define GPIO_DOUT19_16_DIO16_S 0U |
| #define GPIO_DOUT19_16_DIO16_ONE 0x00000001U |
| #define GPIO_DOUT19_16_DIO16_ZERO 0x00000000U |
| #define GPIO_DOUT23_20_DIO23 0x01000000U |
| #define GPIO_DOUT23_20_DIO23_M 0x01000000U |
| #define GPIO_DOUT23_20_DIO23_S 24U |
| #define GPIO_DOUT23_20_DIO23_ONE 0x01000000U |
| #define GPIO_DOUT23_20_DIO23_ZERO 0x00000000U |
| #define GPIO_DOUT23_20_DIO22 0x00010000U |
| #define GPIO_DOUT23_20_DIO22_M 0x00010000U |
| #define GPIO_DOUT23_20_DIO22_S 16U |
| #define GPIO_DOUT23_20_DIO22_ONE 0x00010000U |
| #define GPIO_DOUT23_20_DIO22_ZERO 0x00000000U |
| #define GPIO_DOUT23_20_DIO21 0x00000100U |
| #define GPIO_DOUT23_20_DIO21_M 0x00000100U |
| #define GPIO_DOUT23_20_DIO21_S 8U |
| #define GPIO_DOUT23_20_DIO21_ONE 0x00000100U |
| #define GPIO_DOUT23_20_DIO21_ZERO 0x00000000U |
| #define GPIO_DOUT23_20_DIO20 0x00000001U |
| #define GPIO_DOUT23_20_DIO20_M 0x00000001U |
| #define GPIO_DOUT23_20_DIO20_S 0U |
| #define GPIO_DOUT23_20_DIO20_ONE 0x00000001U |
| #define GPIO_DOUT23_20_DIO20_ZERO 0x00000000U |
| #define GPIO_DOUT27_24_DIO25 0x00000100U |
| #define GPIO_DOUT27_24_DIO25_M 0x00000100U |
| #define GPIO_DOUT27_24_DIO25_S 8U |
| #define GPIO_DOUT27_24_DIO25_ONE 0x00000100U |
| #define GPIO_DOUT27_24_DIO25_ZERO 0x00000000U |
| #define GPIO_DOUT27_24_DIO24 0x00000001U |
| #define GPIO_DOUT27_24_DIO24_M 0x00000001U |
| #define GPIO_DOUT27_24_DIO24_S 0U |
| #define GPIO_DOUT27_24_DIO24_ONE 0x00000001U |
| #define GPIO_DOUT27_24_DIO24_ZERO 0x00000000U |
| #define GPIO_DOUT31_0_DIO25 0x02000000U |
| #define GPIO_DOUT31_0_DIO25_M 0x02000000U |
| #define GPIO_DOUT31_0_DIO25_S 25U |
| #define GPIO_DOUT31_0_DIO25_ONE 0x02000000U |
| #define GPIO_DOUT31_0_DIO25_ZERO 0x00000000U |
| #define GPIO_DOUT31_0_DIO24 0x01000000U |
| #define GPIO_DOUT31_0_DIO24_M 0x01000000U |
| #define GPIO_DOUT31_0_DIO24_S 24U |
| #define GPIO_DOUT31_0_DIO24_ONE 0x01000000U |
| #define GPIO_DOUT31_0_DIO24_ZERO 0x00000000U |
| #define GPIO_DOUT31_0_DIO23 0x00800000U |
| #define GPIO_DOUT31_0_DIO23_M 0x00800000U |
| #define GPIO_DOUT31_0_DIO23_S 23U |
| #define GPIO_DOUT31_0_DIO23_ONE 0x00800000U |
| #define GPIO_DOUT31_0_DIO23_ZERO 0x00000000U |
| #define GPIO_DOUT31_0_DIO22 0x00400000U |
| #define GPIO_DOUT31_0_DIO22_M 0x00400000U |
| #define GPIO_DOUT31_0_DIO22_S 22U |
| #define GPIO_DOUT31_0_DIO22_ONE 0x00400000U |
| #define GPIO_DOUT31_0_DIO22_ZERO 0x00000000U |
| #define GPIO_DOUT31_0_DIO21 0x00200000U |
| #define GPIO_DOUT31_0_DIO21_M 0x00200000U |
| #define GPIO_DOUT31_0_DIO21_S 21U |
| #define GPIO_DOUT31_0_DIO21_ONE 0x00200000U |
| #define GPIO_DOUT31_0_DIO21_ZERO 0x00000000U |
| #define GPIO_DOUT31_0_DIO20 0x00100000U |
| #define GPIO_DOUT31_0_DIO20_M 0x00100000U |
| #define GPIO_DOUT31_0_DIO20_S 20U |
| #define GPIO_DOUT31_0_DIO20_ONE 0x00100000U |
| #define GPIO_DOUT31_0_DIO20_ZERO 0x00000000U |
| #define GPIO_DOUT31_0_DIO19 0x00080000U |
| #define GPIO_DOUT31_0_DIO19_M 0x00080000U |
| #define GPIO_DOUT31_0_DIO19_S 19U |
| #define GPIO_DOUT31_0_DIO19_ONE 0x00080000U |
| #define GPIO_DOUT31_0_DIO19_ZERO 0x00000000U |
| #define GPIO_DOUT31_0_DIO18 0x00040000U |
| #define GPIO_DOUT31_0_DIO18_M 0x00040000U |
| #define GPIO_DOUT31_0_DIO18_S 18U |
| #define GPIO_DOUT31_0_DIO18_ONE 0x00040000U |
| #define GPIO_DOUT31_0_DIO18_ZERO 0x00000000U |
| #define GPIO_DOUT31_0_DIO17 0x00020000U |
| #define GPIO_DOUT31_0_DIO17_M 0x00020000U |
| #define GPIO_DOUT31_0_DIO17_S 17U |
| #define GPIO_DOUT31_0_DIO17_ONE 0x00020000U |
| #define GPIO_DOUT31_0_DIO17_ZERO 0x00000000U |
| #define GPIO_DOUT31_0_DIO16 0x00010000U |
| #define GPIO_DOUT31_0_DIO16_M 0x00010000U |
| #define GPIO_DOUT31_0_DIO16_S 16U |
| #define GPIO_DOUT31_0_DIO16_ONE 0x00010000U |
| #define GPIO_DOUT31_0_DIO16_ZERO 0x00000000U |
| #define GPIO_DOUT31_0_DIO15 0x00008000U |
| #define GPIO_DOUT31_0_DIO15_M 0x00008000U |
| #define GPIO_DOUT31_0_DIO15_S 15U |
| #define GPIO_DOUT31_0_DIO15_ONE 0x00008000U |
| #define GPIO_DOUT31_0_DIO15_ZERO 0x00000000U |
| #define GPIO_DOUT31_0_DIO14 0x00004000U |
| #define GPIO_DOUT31_0_DIO14_M 0x00004000U |
| #define GPIO_DOUT31_0_DIO14_S 14U |
| #define GPIO_DOUT31_0_DIO14_ONE 0x00004000U |
| #define GPIO_DOUT31_0_DIO14_ZERO 0x00000000U |
| #define GPIO_DOUT31_0_DIO13 0x00002000U |
| #define GPIO_DOUT31_0_DIO13_M 0x00002000U |
| #define GPIO_DOUT31_0_DIO13_S 13U |
| #define GPIO_DOUT31_0_DIO13_ONE 0x00002000U |
| #define GPIO_DOUT31_0_DIO13_ZERO 0x00000000U |
| #define GPIO_DOUT31_0_DIO12 0x00001000U |
| #define GPIO_DOUT31_0_DIO12_M 0x00001000U |
| #define GPIO_DOUT31_0_DIO12_S 12U |
| #define GPIO_DOUT31_0_DIO12_ONE 0x00001000U |
| #define GPIO_DOUT31_0_DIO12_ZERO 0x00000000U |
| #define GPIO_DOUT31_0_DIO11 0x00000800U |
| #define GPIO_DOUT31_0_DIO11_M 0x00000800U |
| #define GPIO_DOUT31_0_DIO11_S 11U |
| #define GPIO_DOUT31_0_DIO11_ONE 0x00000800U |
| #define GPIO_DOUT31_0_DIO11_ZERO 0x00000000U |
| #define GPIO_DOUT31_0_DIO10 0x00000400U |
| #define GPIO_DOUT31_0_DIO10_M 0x00000400U |
| #define GPIO_DOUT31_0_DIO10_S 10U |
| #define GPIO_DOUT31_0_DIO10_ONE 0x00000400U |
| #define GPIO_DOUT31_0_DIO10_ZERO 0x00000000U |
| #define GPIO_DOUT31_0_DIO9 0x00000200U |
| #define GPIO_DOUT31_0_DIO9_M 0x00000200U |
| #define GPIO_DOUT31_0_DIO9_S 9U |
| #define GPIO_DOUT31_0_DIO9_ONE 0x00000200U |
| #define GPIO_DOUT31_0_DIO9_ZERO 0x00000000U |
| #define GPIO_DOUT31_0_DIO8 0x00000100U |
| #define GPIO_DOUT31_0_DIO8_M 0x00000100U |
| #define GPIO_DOUT31_0_DIO8_S 8U |
| #define GPIO_DOUT31_0_DIO8_ONE 0x00000100U |
| #define GPIO_DOUT31_0_DIO8_ZERO 0x00000000U |
| #define GPIO_DOUT31_0_DIO7 0x00000080U |
| #define GPIO_DOUT31_0_DIO7_M 0x00000080U |
| #define GPIO_DOUT31_0_DIO7_S 7U |
| #define GPIO_DOUT31_0_DIO7_ONE 0x00000080U |
| #define GPIO_DOUT31_0_DIO7_ZERO 0x00000000U |
| #define GPIO_DOUT31_0_DIO6 0x00000040U |
| #define GPIO_DOUT31_0_DIO6_M 0x00000040U |
| #define GPIO_DOUT31_0_DIO6_S 6U |
| #define GPIO_DOUT31_0_DIO6_ONE 0x00000040U |
| #define GPIO_DOUT31_0_DIO6_ZERO 0x00000000U |
| #define GPIO_DOUT31_0_DIO5 0x00000020U |
| #define GPIO_DOUT31_0_DIO5_M 0x00000020U |
| #define GPIO_DOUT31_0_DIO5_S 5U |
| #define GPIO_DOUT31_0_DIO5_ONE 0x00000020U |
| #define GPIO_DOUT31_0_DIO5_ZERO 0x00000000U |
| #define GPIO_DOUT31_0_DIO4 0x00000010U |
| #define GPIO_DOUT31_0_DIO4_M 0x00000010U |
| #define GPIO_DOUT31_0_DIO4_S 4U |
| #define GPIO_DOUT31_0_DIO4_ONE 0x00000010U |
| #define GPIO_DOUT31_0_DIO4_ZERO 0x00000000U |
| #define GPIO_DOUT31_0_DIO3 0x00000008U |
| #define GPIO_DOUT31_0_DIO3_M 0x00000008U |
| #define GPIO_DOUT31_0_DIO3_S 3U |
| #define GPIO_DOUT31_0_DIO3_ONE 0x00000008U |
| #define GPIO_DOUT31_0_DIO3_ZERO 0x00000000U |
| #define GPIO_DOUT31_0_DIO2 0x00000004U |
| #define GPIO_DOUT31_0_DIO2_M 0x00000004U |
| #define GPIO_DOUT31_0_DIO2_S 2U |
| #define GPIO_DOUT31_0_DIO2_ONE 0x00000004U |
| #define GPIO_DOUT31_0_DIO2_ZERO 0x00000000U |
| #define GPIO_DOUT31_0_DIO1 0x00000002U |
| #define GPIO_DOUT31_0_DIO1_M 0x00000002U |
| #define GPIO_DOUT31_0_DIO1_S 1U |
| #define GPIO_DOUT31_0_DIO1_ONE 0x00000002U |
| #define GPIO_DOUT31_0_DIO1_ZERO 0x00000000U |
| #define GPIO_DOUT31_0_DIO0 0x00000001U |
| #define GPIO_DOUT31_0_DIO0_M 0x00000001U |
| #define GPIO_DOUT31_0_DIO0_S 0U |
| #define GPIO_DOUT31_0_DIO0_ONE 0x00000001U |
| #define GPIO_DOUT31_0_DIO0_ZERO 0x00000000U |
| #define GPIO_DOUTSET31_0_DIO25 0x02000000U |
| #define GPIO_DOUTSET31_0_DIO25_M 0x02000000U |
| #define GPIO_DOUTSET31_0_DIO25_S 25U |
| #define GPIO_DOUTSET31_0_DIO25_SET 0x02000000U |
| #define GPIO_DOUTSET31_0_DIO25_NOEFF 0x00000000U |
| #define GPIO_DOUTSET31_0_DIO24 0x01000000U |
| #define GPIO_DOUTSET31_0_DIO24_M 0x01000000U |
| #define GPIO_DOUTSET31_0_DIO24_S 24U |
| #define GPIO_DOUTSET31_0_DIO24_SET 0x01000000U |
| #define GPIO_DOUTSET31_0_DIO24_NOEFF 0x00000000U |
| #define GPIO_DOUTSET31_0_DIO23 0x00800000U |
| #define GPIO_DOUTSET31_0_DIO23_M 0x00800000U |
| #define GPIO_DOUTSET31_0_DIO23_S 23U |
| #define GPIO_DOUTSET31_0_DIO23_SET 0x00800000U |
| #define GPIO_DOUTSET31_0_DIO23_NOEFF 0x00000000U |
| #define GPIO_DOUTSET31_0_DIO22 0x00400000U |
| #define GPIO_DOUTSET31_0_DIO22_M 0x00400000U |
| #define GPIO_DOUTSET31_0_DIO22_S 22U |
| #define GPIO_DOUTSET31_0_DIO22_SET 0x00400000U |
| #define GPIO_DOUTSET31_0_DIO22_NOEFF 0x00000000U |
| #define GPIO_DOUTSET31_0_DIO21 0x00200000U |
| #define GPIO_DOUTSET31_0_DIO21_M 0x00200000U |
| #define GPIO_DOUTSET31_0_DIO21_S 21U |
| #define GPIO_DOUTSET31_0_DIO21_SET 0x00200000U |
| #define GPIO_DOUTSET31_0_DIO21_NOEFF 0x00000000U |
| #define GPIO_DOUTSET31_0_DIO20 0x00100000U |
| #define GPIO_DOUTSET31_0_DIO20_M 0x00100000U |
| #define GPIO_DOUTSET31_0_DIO20_S 20U |
| #define GPIO_DOUTSET31_0_DIO20_SET 0x00100000U |
| #define GPIO_DOUTSET31_0_DIO20_NOEFF 0x00000000U |
| #define GPIO_DOUTSET31_0_DIO19 0x00080000U |
| #define GPIO_DOUTSET31_0_DIO19_M 0x00080000U |
| #define GPIO_DOUTSET31_0_DIO19_S 19U |
| #define GPIO_DOUTSET31_0_DIO19_SET 0x00080000U |
| #define GPIO_DOUTSET31_0_DIO19_NOEFF 0x00000000U |
| #define GPIO_DOUTSET31_0_DIO18 0x00040000U |
| #define GPIO_DOUTSET31_0_DIO18_M 0x00040000U |
| #define GPIO_DOUTSET31_0_DIO18_S 18U |
| #define GPIO_DOUTSET31_0_DIO18_SET 0x00040000U |
| #define GPIO_DOUTSET31_0_DIO18_NOEFF 0x00000000U |
| #define GPIO_DOUTSET31_0_DIO17 0x00020000U |
| #define GPIO_DOUTSET31_0_DIO17_M 0x00020000U |
| #define GPIO_DOUTSET31_0_DIO17_S 17U |
| #define GPIO_DOUTSET31_0_DIO17_SET 0x00020000U |
| #define GPIO_DOUTSET31_0_DIO17_NOEFF 0x00000000U |
| #define GPIO_DOUTSET31_0_DIO16 0x00010000U |
| #define GPIO_DOUTSET31_0_DIO16_M 0x00010000U |
| #define GPIO_DOUTSET31_0_DIO16_S 16U |
| #define GPIO_DOUTSET31_0_DIO16_SET 0x00010000U |
| #define GPIO_DOUTSET31_0_DIO16_NOEFF 0x00000000U |
| #define GPIO_DOUTSET31_0_DIO15 0x00008000U |
| #define GPIO_DOUTSET31_0_DIO15_M 0x00008000U |
| #define GPIO_DOUTSET31_0_DIO15_S 15U |
| #define GPIO_DOUTSET31_0_DIO15_SET 0x00008000U |
| #define GPIO_DOUTSET31_0_DIO15_NOEFF 0x00000000U |
| #define GPIO_DOUTSET31_0_DIO14 0x00004000U |
| #define GPIO_DOUTSET31_0_DIO14_M 0x00004000U |
| #define GPIO_DOUTSET31_0_DIO14_S 14U |
| #define GPIO_DOUTSET31_0_DIO14_SET 0x00004000U |
| #define GPIO_DOUTSET31_0_DIO14_NOEFF 0x00000000U |
| #define GPIO_DOUTSET31_0_DIO13 0x00002000U |
| #define GPIO_DOUTSET31_0_DIO13_M 0x00002000U |
| #define GPIO_DOUTSET31_0_DIO13_S 13U |
| #define GPIO_DOUTSET31_0_DIO13_SET 0x00002000U |
| #define GPIO_DOUTSET31_0_DIO13_NOEFF 0x00000000U |
| #define GPIO_DOUTSET31_0_DIO12 0x00001000U |
| #define GPIO_DOUTSET31_0_DIO12_M 0x00001000U |
| #define GPIO_DOUTSET31_0_DIO12_S 12U |
| #define GPIO_DOUTSET31_0_DIO12_SET 0x00001000U |
| #define GPIO_DOUTSET31_0_DIO12_NOEFF 0x00000000U |
| #define GPIO_DOUTSET31_0_DIO11 0x00000800U |
| #define GPIO_DOUTSET31_0_DIO11_M 0x00000800U |
| #define GPIO_DOUTSET31_0_DIO11_S 11U |
| #define GPIO_DOUTSET31_0_DIO11_SET 0x00000800U |
| #define GPIO_DOUTSET31_0_DIO11_NOEFF 0x00000000U |
| #define GPIO_DOUTSET31_0_DIO10 0x00000400U |
| #define GPIO_DOUTSET31_0_DIO10_M 0x00000400U |
| #define GPIO_DOUTSET31_0_DIO10_S 10U |
| #define GPIO_DOUTSET31_0_DIO10_SET 0x00000400U |
| #define GPIO_DOUTSET31_0_DIO10_NOEFF 0x00000000U |
| #define GPIO_DOUTSET31_0_DIO9 0x00000200U |
| #define GPIO_DOUTSET31_0_DIO9_M 0x00000200U |
| #define GPIO_DOUTSET31_0_DIO9_S 9U |
| #define GPIO_DOUTSET31_0_DIO9_SET 0x00000200U |
| #define GPIO_DOUTSET31_0_DIO9_NOEFF 0x00000000U |
| #define GPIO_DOUTSET31_0_DIO8 0x00000100U |
| #define GPIO_DOUTSET31_0_DIO8_M 0x00000100U |
| #define GPIO_DOUTSET31_0_DIO8_S 8U |
| #define GPIO_DOUTSET31_0_DIO8_SET 0x00000100U |
| #define GPIO_DOUTSET31_0_DIO8_NOEFF 0x00000000U |
| #define GPIO_DOUTSET31_0_DIO7 0x00000080U |
| #define GPIO_DOUTSET31_0_DIO7_M 0x00000080U |
| #define GPIO_DOUTSET31_0_DIO7_S 7U |
| #define GPIO_DOUTSET31_0_DIO7_SET 0x00000080U |
| #define GPIO_DOUTSET31_0_DIO7_NOEFF 0x00000000U |
| #define GPIO_DOUTSET31_0_DIO6 0x00000040U |
| #define GPIO_DOUTSET31_0_DIO6_M 0x00000040U |
| #define GPIO_DOUTSET31_0_DIO6_S 6U |
| #define GPIO_DOUTSET31_0_DIO6_SET 0x00000040U |
| #define GPIO_DOUTSET31_0_DIO6_NOEFF 0x00000000U |
| #define GPIO_DOUTSET31_0_DIO5 0x00000020U |
| #define GPIO_DOUTSET31_0_DIO5_M 0x00000020U |
| #define GPIO_DOUTSET31_0_DIO5_S 5U |
| #define GPIO_DOUTSET31_0_DIO5_SET 0x00000020U |
| #define GPIO_DOUTSET31_0_DIO5_NOEFF 0x00000000U |
| #define GPIO_DOUTSET31_0_DIO4 0x00000010U |
| #define GPIO_DOUTSET31_0_DIO4_M 0x00000010U |
| #define GPIO_DOUTSET31_0_DIO4_S 4U |
| #define GPIO_DOUTSET31_0_DIO4_SET 0x00000010U |
| #define GPIO_DOUTSET31_0_DIO4_NOEFF 0x00000000U |
| #define GPIO_DOUTSET31_0_DIO3 0x00000008U |
| #define GPIO_DOUTSET31_0_DIO3_M 0x00000008U |
| #define GPIO_DOUTSET31_0_DIO3_S 3U |
| #define GPIO_DOUTSET31_0_DIO3_SET 0x00000008U |
| #define GPIO_DOUTSET31_0_DIO3_NOEFF 0x00000000U |
| #define GPIO_DOUTSET31_0_DIO2 0x00000004U |
| #define GPIO_DOUTSET31_0_DIO2_M 0x00000004U |
| #define GPIO_DOUTSET31_0_DIO2_S 2U |
| #define GPIO_DOUTSET31_0_DIO2_SET 0x00000004U |
| #define GPIO_DOUTSET31_0_DIO2_NOEFF 0x00000000U |
| #define GPIO_DOUTSET31_0_DIO1 0x00000002U |
| #define GPIO_DOUTSET31_0_DIO1_M 0x00000002U |
| #define GPIO_DOUTSET31_0_DIO1_S 1U |
| #define GPIO_DOUTSET31_0_DIO1_SET 0x00000002U |
| #define GPIO_DOUTSET31_0_DIO1_NOEFF 0x00000000U |
| #define GPIO_DOUTSET31_0_DIO0 0x00000001U |
| #define GPIO_DOUTSET31_0_DIO0_M 0x00000001U |
| #define GPIO_DOUTSET31_0_DIO0_S 0U |
| #define GPIO_DOUTSET31_0_DIO0_SET 0x00000001U |
| #define GPIO_DOUTSET31_0_DIO0_NOEFF 0x00000000U |
| #define GPIO_DOUTCLR31_0_DIO25 0x02000000U |
| #define GPIO_DOUTCLR31_0_DIO25_M 0x02000000U |
| #define GPIO_DOUTCLR31_0_DIO25_S 25U |
| #define GPIO_DOUTCLR31_0_DIO25_CLR 0x02000000U |
| #define GPIO_DOUTCLR31_0_DIO25_NOEFF 0x00000000U |
| #define GPIO_DOUTCLR31_0_DIO24 0x01000000U |
| #define GPIO_DOUTCLR31_0_DIO24_M 0x01000000U |
| #define GPIO_DOUTCLR31_0_DIO24_S 24U |
| #define GPIO_DOUTCLR31_0_DIO24_CLR 0x01000000U |
| #define GPIO_DOUTCLR31_0_DIO24_NOEFF 0x00000000U |
| #define GPIO_DOUTCLR31_0_DIO23 0x00800000U |
| #define GPIO_DOUTCLR31_0_DIO23_M 0x00800000U |
| #define GPIO_DOUTCLR31_0_DIO23_S 23U |
| #define GPIO_DOUTCLR31_0_DIO23_CLR 0x00800000U |
| #define GPIO_DOUTCLR31_0_DIO23_NOEFF 0x00000000U |
| #define GPIO_DOUTCLR31_0_DIO22 0x00400000U |
| #define GPIO_DOUTCLR31_0_DIO22_M 0x00400000U |
| #define GPIO_DOUTCLR31_0_DIO22_S 22U |
| #define GPIO_DOUTCLR31_0_DIO22_CLR 0x00400000U |
| #define GPIO_DOUTCLR31_0_DIO22_NOEFF 0x00000000U |
| #define GPIO_DOUTCLR31_0_DIO21 0x00200000U |
| #define GPIO_DOUTCLR31_0_DIO21_M 0x00200000U |
| #define GPIO_DOUTCLR31_0_DIO21_S 21U |
| #define GPIO_DOUTCLR31_0_DIO21_CLR 0x00200000U |
| #define GPIO_DOUTCLR31_0_DIO21_NOEFF 0x00000000U |
| #define GPIO_DOUTCLR31_0_DIO20 0x00100000U |
| #define GPIO_DOUTCLR31_0_DIO20_M 0x00100000U |
| #define GPIO_DOUTCLR31_0_DIO20_S 20U |
| #define GPIO_DOUTCLR31_0_DIO20_CLR 0x00100000U |
| #define GPIO_DOUTCLR31_0_DIO20_NOEFF 0x00000000U |
| #define GPIO_DOUTCLR31_0_DIO19 0x00080000U |
| #define GPIO_DOUTCLR31_0_DIO19_M 0x00080000U |
| #define GPIO_DOUTCLR31_0_DIO19_S 19U |
| #define GPIO_DOUTCLR31_0_DIO19_CLR 0x00080000U |
| #define GPIO_DOUTCLR31_0_DIO19_NOEFF 0x00000000U |
| #define GPIO_DOUTCLR31_0_DIO18 0x00040000U |
| #define GPIO_DOUTCLR31_0_DIO18_M 0x00040000U |
| #define GPIO_DOUTCLR31_0_DIO18_S 18U |
| #define GPIO_DOUTCLR31_0_DIO18_CLR 0x00040000U |
| #define GPIO_DOUTCLR31_0_DIO18_NOEFF 0x00000000U |
| #define GPIO_DOUTCLR31_0_DIO17 0x00020000U |
| #define GPIO_DOUTCLR31_0_DIO17_M 0x00020000U |
| #define GPIO_DOUTCLR31_0_DIO17_S 17U |
| #define GPIO_DOUTCLR31_0_DIO17_CLR 0x00020000U |
| #define GPIO_DOUTCLR31_0_DIO17_NOEFF 0x00000000U |
| #define GPIO_DOUTCLR31_0_DIO16 0x00010000U |
| #define GPIO_DOUTCLR31_0_DIO16_M 0x00010000U |
| #define GPIO_DOUTCLR31_0_DIO16_S 16U |
| #define GPIO_DOUTCLR31_0_DIO16_CLR 0x00010000U |
| #define GPIO_DOUTCLR31_0_DIO16_NOEFF 0x00000000U |
| #define GPIO_DOUTCLR31_0_DIO15 0x00008000U |
| #define GPIO_DOUTCLR31_0_DIO15_M 0x00008000U |
| #define GPIO_DOUTCLR31_0_DIO15_S 15U |
| #define GPIO_DOUTCLR31_0_DIO15_CLR 0x00008000U |
| #define GPIO_DOUTCLR31_0_DIO15_NOEFF 0x00000000U |
| #define GPIO_DOUTCLR31_0_DIO14 0x00004000U |
| #define GPIO_DOUTCLR31_0_DIO14_M 0x00004000U |
| #define GPIO_DOUTCLR31_0_DIO14_S 14U |
| #define GPIO_DOUTCLR31_0_DIO14_CLR 0x00004000U |
| #define GPIO_DOUTCLR31_0_DIO14_NOEFF 0x00000000U |
| #define GPIO_DOUTCLR31_0_DIO13 0x00002000U |
| #define GPIO_DOUTCLR31_0_DIO13_M 0x00002000U |
| #define GPIO_DOUTCLR31_0_DIO13_S 13U |
| #define GPIO_DOUTCLR31_0_DIO13_CLR 0x00002000U |
| #define GPIO_DOUTCLR31_0_DIO13_NOEFF 0x00000000U |
| #define GPIO_DOUTCLR31_0_DIO12 0x00001000U |
| #define GPIO_DOUTCLR31_0_DIO12_M 0x00001000U |
| #define GPIO_DOUTCLR31_0_DIO12_S 12U |
| #define GPIO_DOUTCLR31_0_DIO12_CLR 0x00001000U |
| #define GPIO_DOUTCLR31_0_DIO12_NOEFF 0x00000000U |
| #define GPIO_DOUTCLR31_0_DIO11 0x00000800U |
| #define GPIO_DOUTCLR31_0_DIO11_M 0x00000800U |
| #define GPIO_DOUTCLR31_0_DIO11_S 11U |
| #define GPIO_DOUTCLR31_0_DIO11_CLR 0x00000800U |
| #define GPIO_DOUTCLR31_0_DIO11_NOEFF 0x00000000U |
| #define GPIO_DOUTCLR31_0_DIO10 0x00000400U |
| #define GPIO_DOUTCLR31_0_DIO10_M 0x00000400U |
| #define GPIO_DOUTCLR31_0_DIO10_S 10U |
| #define GPIO_DOUTCLR31_0_DIO10_CLR 0x00000400U |
| #define GPIO_DOUTCLR31_0_DIO10_NOEFF 0x00000000U |
| #define GPIO_DOUTCLR31_0_DIO9 0x00000200U |
| #define GPIO_DOUTCLR31_0_DIO9_M 0x00000200U |
| #define GPIO_DOUTCLR31_0_DIO9_S 9U |
| #define GPIO_DOUTCLR31_0_DIO9_CLR 0x00000200U |
| #define GPIO_DOUTCLR31_0_DIO9_NOEFF 0x00000000U |
| #define GPIO_DOUTCLR31_0_DIO8 0x00000100U |
| #define GPIO_DOUTCLR31_0_DIO8_M 0x00000100U |
| #define GPIO_DOUTCLR31_0_DIO8_S 8U |
| #define GPIO_DOUTCLR31_0_DIO8_CLR 0x00000100U |
| #define GPIO_DOUTCLR31_0_DIO8_NOEFF 0x00000000U |
| #define GPIO_DOUTCLR31_0_DIO7 0x00000080U |
| #define GPIO_DOUTCLR31_0_DIO7_M 0x00000080U |
| #define GPIO_DOUTCLR31_0_DIO7_S 7U |
| #define GPIO_DOUTCLR31_0_DIO7_CLR 0x00000080U |
| #define GPIO_DOUTCLR31_0_DIO7_NOEFF 0x00000000U |
| #define GPIO_DOUTCLR31_0_DIO6 0x00000040U |
| #define GPIO_DOUTCLR31_0_DIO6_M 0x00000040U |
| #define GPIO_DOUTCLR31_0_DIO6_S 6U |
| #define GPIO_DOUTCLR31_0_DIO6_CLR 0x00000040U |
| #define GPIO_DOUTCLR31_0_DIO6_NOEFF 0x00000000U |
| #define GPIO_DOUTCLR31_0_DIO5 0x00000020U |
| #define GPIO_DOUTCLR31_0_DIO5_M 0x00000020U |
| #define GPIO_DOUTCLR31_0_DIO5_S 5U |
| #define GPIO_DOUTCLR31_0_DIO5_CLR 0x00000020U |
| #define GPIO_DOUTCLR31_0_DIO5_NOEFF 0x00000000U |
| #define GPIO_DOUTCLR31_0_DIO4 0x00000010U |
| #define GPIO_DOUTCLR31_0_DIO4_M 0x00000010U |
| #define GPIO_DOUTCLR31_0_DIO4_S 4U |
| #define GPIO_DOUTCLR31_0_DIO4_CLR 0x00000010U |
| #define GPIO_DOUTCLR31_0_DIO4_NOEFF 0x00000000U |
| #define GPIO_DOUTCLR31_0_DIO3 0x00000008U |
| #define GPIO_DOUTCLR31_0_DIO3_M 0x00000008U |
| #define GPIO_DOUTCLR31_0_DIO3_S 3U |
| #define GPIO_DOUTCLR31_0_DIO3_CLR 0x00000008U |
| #define GPIO_DOUTCLR31_0_DIO3_NOEFF 0x00000000U |
| #define GPIO_DOUTCLR31_0_DIO2 0x00000004U |
| #define GPIO_DOUTCLR31_0_DIO2_M 0x00000004U |
| #define GPIO_DOUTCLR31_0_DIO2_S 2U |
| #define GPIO_DOUTCLR31_0_DIO2_CLR 0x00000004U |
| #define GPIO_DOUTCLR31_0_DIO2_NOEFF 0x00000000U |
| #define GPIO_DOUTCLR31_0_DIO1 0x00000002U |
| #define GPIO_DOUTCLR31_0_DIO1_M 0x00000002U |
| #define GPIO_DOUTCLR31_0_DIO1_S 1U |
| #define GPIO_DOUTCLR31_0_DIO1_CLR 0x00000002U |
| #define GPIO_DOUTCLR31_0_DIO1_NOEFF 0x00000000U |
| #define GPIO_DOUTCLR31_0_DIO0 0x00000001U |
| #define GPIO_DOUTCLR31_0_DIO0_M 0x00000001U |
| #define GPIO_DOUTCLR31_0_DIO0_S 0U |
| #define GPIO_DOUTCLR31_0_DIO0_CLR 0x00000001U |
| #define GPIO_DOUTCLR31_0_DIO0_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL31_0_DIO25 0x02000000U |
| #define GPIO_DOUTTGL31_0_DIO25_M 0x02000000U |
| #define GPIO_DOUTTGL31_0_DIO25_S 25U |
| #define GPIO_DOUTTGL31_0_DIO25_TOGGLE 0x02000000U |
| #define GPIO_DOUTTGL31_0_DIO25_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL31_0_DIO24 0x01000000U |
| #define GPIO_DOUTTGL31_0_DIO24_M 0x01000000U |
| #define GPIO_DOUTTGL31_0_DIO24_S 24U |
| #define GPIO_DOUTTGL31_0_DIO24_TOGGLE 0x01000000U |
| #define GPIO_DOUTTGL31_0_DIO24_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL31_0_DIO23 0x00800000U |
| #define GPIO_DOUTTGL31_0_DIO23_M 0x00800000U |
| #define GPIO_DOUTTGL31_0_DIO23_S 23U |
| #define GPIO_DOUTTGL31_0_DIO23_TOGGLE 0x00800000U |
| #define GPIO_DOUTTGL31_0_DIO23_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL31_0_DIO22 0x00400000U |
| #define GPIO_DOUTTGL31_0_DIO22_M 0x00400000U |
| #define GPIO_DOUTTGL31_0_DIO22_S 22U |
| #define GPIO_DOUTTGL31_0_DIO22_TOGGLE 0x00400000U |
| #define GPIO_DOUTTGL31_0_DIO22_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL31_0_DIO21 0x00200000U |
| #define GPIO_DOUTTGL31_0_DIO21_M 0x00200000U |
| #define GPIO_DOUTTGL31_0_DIO21_S 21U |
| #define GPIO_DOUTTGL31_0_DIO21_TOGGLE 0x00200000U |
| #define GPIO_DOUTTGL31_0_DIO21_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL31_0_DIO20 0x00100000U |
| #define GPIO_DOUTTGL31_0_DIO20_M 0x00100000U |
| #define GPIO_DOUTTGL31_0_DIO20_S 20U |
| #define GPIO_DOUTTGL31_0_DIO20_TOGGLE 0x00100000U |
| #define GPIO_DOUTTGL31_0_DIO20_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL31_0_DIO19 0x00080000U |
| #define GPIO_DOUTTGL31_0_DIO19_M 0x00080000U |
| #define GPIO_DOUTTGL31_0_DIO19_S 19U |
| #define GPIO_DOUTTGL31_0_DIO19_TOGGLE 0x00080000U |
| #define GPIO_DOUTTGL31_0_DIO19_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL31_0_DIO18 0x00040000U |
| #define GPIO_DOUTTGL31_0_DIO18_M 0x00040000U |
| #define GPIO_DOUTTGL31_0_DIO18_S 18U |
| #define GPIO_DOUTTGL31_0_DIO18_TOGGLE 0x00040000U |
| #define GPIO_DOUTTGL31_0_DIO18_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL31_0_DIO17 0x00020000U |
| #define GPIO_DOUTTGL31_0_DIO17_M 0x00020000U |
| #define GPIO_DOUTTGL31_0_DIO17_S 17U |
| #define GPIO_DOUTTGL31_0_DIO17_TOGGLE 0x00020000U |
| #define GPIO_DOUTTGL31_0_DIO17_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL31_0_DIO16 0x00010000U |
| #define GPIO_DOUTTGL31_0_DIO16_M 0x00010000U |
| #define GPIO_DOUTTGL31_0_DIO16_S 16U |
| #define GPIO_DOUTTGL31_0_DIO16_TOGGLE 0x00010000U |
| #define GPIO_DOUTTGL31_0_DIO16_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL31_0_DIO15 0x00008000U |
| #define GPIO_DOUTTGL31_0_DIO15_M 0x00008000U |
| #define GPIO_DOUTTGL31_0_DIO15_S 15U |
| #define GPIO_DOUTTGL31_0_DIO15_TOGGLE 0x00008000U |
| #define GPIO_DOUTTGL31_0_DIO15_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL31_0_DIO14 0x00004000U |
| #define GPIO_DOUTTGL31_0_DIO14_M 0x00004000U |
| #define GPIO_DOUTTGL31_0_DIO14_S 14U |
| #define GPIO_DOUTTGL31_0_DIO14_TOGGLE 0x00004000U |
| #define GPIO_DOUTTGL31_0_DIO14_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL31_0_DIO13 0x00002000U |
| #define GPIO_DOUTTGL31_0_DIO13_M 0x00002000U |
| #define GPIO_DOUTTGL31_0_DIO13_S 13U |
| #define GPIO_DOUTTGL31_0_DIO13_TOGGLE 0x00002000U |
| #define GPIO_DOUTTGL31_0_DIO13_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL31_0_DIO12 0x00001000U |
| #define GPIO_DOUTTGL31_0_DIO12_M 0x00001000U |
| #define GPIO_DOUTTGL31_0_DIO12_S 12U |
| #define GPIO_DOUTTGL31_0_DIO12_TOGGLE 0x00001000U |
| #define GPIO_DOUTTGL31_0_DIO12_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL31_0_DIO11 0x00000800U |
| #define GPIO_DOUTTGL31_0_DIO11_M 0x00000800U |
| #define GPIO_DOUTTGL31_0_DIO11_S 11U |
| #define GPIO_DOUTTGL31_0_DIO11_TOGGLE 0x00000800U |
| #define GPIO_DOUTTGL31_0_DIO11_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL31_0_DIO10 0x00000400U |
| #define GPIO_DOUTTGL31_0_DIO10_M 0x00000400U |
| #define GPIO_DOUTTGL31_0_DIO10_S 10U |
| #define GPIO_DOUTTGL31_0_DIO10_TOGGLE 0x00000400U |
| #define GPIO_DOUTTGL31_0_DIO10_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL31_0_DIO9 0x00000200U |
| #define GPIO_DOUTTGL31_0_DIO9_M 0x00000200U |
| #define GPIO_DOUTTGL31_0_DIO9_S 9U |
| #define GPIO_DOUTTGL31_0_DIO9_TOGGLE 0x00000200U |
| #define GPIO_DOUTTGL31_0_DIO9_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL31_0_DIO8 0x00000100U |
| #define GPIO_DOUTTGL31_0_DIO8_M 0x00000100U |
| #define GPIO_DOUTTGL31_0_DIO8_S 8U |
| #define GPIO_DOUTTGL31_0_DIO8_TOGGLE 0x00000100U |
| #define GPIO_DOUTTGL31_0_DIO8_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL31_0_DIO7 0x00000080U |
| #define GPIO_DOUTTGL31_0_DIO7_M 0x00000080U |
| #define GPIO_DOUTTGL31_0_DIO7_S 7U |
| #define GPIO_DOUTTGL31_0_DIO7_TOGGLE 0x00000080U |
| #define GPIO_DOUTTGL31_0_DIO7_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL31_0_DIO6 0x00000040U |
| #define GPIO_DOUTTGL31_0_DIO6_M 0x00000040U |
| #define GPIO_DOUTTGL31_0_DIO6_S 6U |
| #define GPIO_DOUTTGL31_0_DIO6_TOGGLE 0x00000040U |
| #define GPIO_DOUTTGL31_0_DIO6_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL31_0_DIO5 0x00000020U |
| #define GPIO_DOUTTGL31_0_DIO5_M 0x00000020U |
| #define GPIO_DOUTTGL31_0_DIO5_S 5U |
| #define GPIO_DOUTTGL31_0_DIO5_TOGGLE 0x00000020U |
| #define GPIO_DOUTTGL31_0_DIO5_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL31_0_DIO4 0x00000010U |
| #define GPIO_DOUTTGL31_0_DIO4_M 0x00000010U |
| #define GPIO_DOUTTGL31_0_DIO4_S 4U |
| #define GPIO_DOUTTGL31_0_DIO4_TOGGLE 0x00000010U |
| #define GPIO_DOUTTGL31_0_DIO4_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL31_0_DIO3 0x00000008U |
| #define GPIO_DOUTTGL31_0_DIO3_M 0x00000008U |
| #define GPIO_DOUTTGL31_0_DIO3_S 3U |
| #define GPIO_DOUTTGL31_0_DIO3_TOGGLE 0x00000008U |
| #define GPIO_DOUTTGL31_0_DIO3_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL31_0_DIO2 0x00000004U |
| #define GPIO_DOUTTGL31_0_DIO2_M 0x00000004U |
| #define GPIO_DOUTTGL31_0_DIO2_S 2U |
| #define GPIO_DOUTTGL31_0_DIO2_TOGGLE 0x00000004U |
| #define GPIO_DOUTTGL31_0_DIO2_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL31_0_DIO1 0x00000002U |
| #define GPIO_DOUTTGL31_0_DIO1_M 0x00000002U |
| #define GPIO_DOUTTGL31_0_DIO1_S 1U |
| #define GPIO_DOUTTGL31_0_DIO1_TOGGLE 0x00000002U |
| #define GPIO_DOUTTGL31_0_DIO1_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL31_0_DIO0 0x00000001U |
| #define GPIO_DOUTTGL31_0_DIO0_M 0x00000001U |
| #define GPIO_DOUTTGL31_0_DIO0_S 0U |
| #define GPIO_DOUTTGL31_0_DIO0_TOGGLE 0x00000001U |
| #define GPIO_DOUTTGL31_0_DIO0_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL3_0_DIO3 0x01000000U |
| #define GPIO_DOUTTGL3_0_DIO3_M 0x01000000U |
| #define GPIO_DOUTTGL3_0_DIO3_S 24U |
| #define GPIO_DOUTTGL3_0_DIO3_TOGGLE 0x01000000U |
| #define GPIO_DOUTTGL3_0_DIO3_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL3_0_DIO2 0x00010000U |
| #define GPIO_DOUTTGL3_0_DIO2_M 0x00010000U |
| #define GPIO_DOUTTGL3_0_DIO2_S 16U |
| #define GPIO_DOUTTGL3_0_DIO2_TOGGLE 0x00010000U |
| #define GPIO_DOUTTGL3_0_DIO2_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL3_0_DIO1 0x00000100U |
| #define GPIO_DOUTTGL3_0_DIO1_M 0x00000100U |
| #define GPIO_DOUTTGL3_0_DIO1_S 8U |
| #define GPIO_DOUTTGL3_0_DIO1_TOGGLE 0x00000100U |
| #define GPIO_DOUTTGL3_0_DIO1_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL3_0_DIO0 0x00000001U |
| #define GPIO_DOUTTGL3_0_DIO0_M 0x00000001U |
| #define GPIO_DOUTTGL3_0_DIO0_S 0U |
| #define GPIO_DOUTTGL3_0_DIO0_TOGGLE 0x00000001U |
| #define GPIO_DOUTTGL3_0_DIO0_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL7_4_DIO7 0x01000000U |
| #define GPIO_DOUTTGL7_4_DIO7_M 0x01000000U |
| #define GPIO_DOUTTGL7_4_DIO7_S 24U |
| #define GPIO_DOUTTGL7_4_DIO7_TOGGLE 0x01000000U |
| #define GPIO_DOUTTGL7_4_DIO7_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL7_4_DIO6 0x00010000U |
| #define GPIO_DOUTTGL7_4_DIO6_M 0x00010000U |
| #define GPIO_DOUTTGL7_4_DIO6_S 16U |
| #define GPIO_DOUTTGL7_4_DIO6_TOGGLE 0x00010000U |
| #define GPIO_DOUTTGL7_4_DIO6_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL7_4_DIO5 0x00000100U |
| #define GPIO_DOUTTGL7_4_DIO5_M 0x00000100U |
| #define GPIO_DOUTTGL7_4_DIO5_S 8U |
| #define GPIO_DOUTTGL7_4_DIO5_TOGGLE 0x00000100U |
| #define GPIO_DOUTTGL7_4_DIO5_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL7_4_DIO4 0x00000001U |
| #define GPIO_DOUTTGL7_4_DIO4_M 0x00000001U |
| #define GPIO_DOUTTGL7_4_DIO4_S 0U |
| #define GPIO_DOUTTGL7_4_DIO4_TOGGLE 0x00000001U |
| #define GPIO_DOUTTGL7_4_DIO4_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL11_8_DIO11 0x01000000U |
| #define GPIO_DOUTTGL11_8_DIO11_M 0x01000000U |
| #define GPIO_DOUTTGL11_8_DIO11_S 24U |
| #define GPIO_DOUTTGL11_8_DIO11_TOGGLE 0x01000000U |
| #define GPIO_DOUTTGL11_8_DIO11_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL11_8_DIO10 0x00010000U |
| #define GPIO_DOUTTGL11_8_DIO10_M 0x00010000U |
| #define GPIO_DOUTTGL11_8_DIO10_S 16U |
| #define GPIO_DOUTTGL11_8_DIO10_TOGGLE 0x00010000U |
| #define GPIO_DOUTTGL11_8_DIO10_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL11_8_DIO9 0x00000100U |
| #define GPIO_DOUTTGL11_8_DIO9_M 0x00000100U |
| #define GPIO_DOUTTGL11_8_DIO9_S 8U |
| #define GPIO_DOUTTGL11_8_DIO9_TOGGLE 0x00000100U |
| #define GPIO_DOUTTGL11_8_DIO9_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL11_8_DIO8 0x00000001U |
| #define GPIO_DOUTTGL11_8_DIO8_M 0x00000001U |
| #define GPIO_DOUTTGL11_8_DIO8_S 0U |
| #define GPIO_DOUTTGL11_8_DIO8_TOGGLE 0x00000001U |
| #define GPIO_DOUTTGL11_8_DIO8_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL15_12_DIO15 0x01000000U |
| #define GPIO_DOUTTGL15_12_DIO15_M 0x01000000U |
| #define GPIO_DOUTTGL15_12_DIO15_S 24U |
| #define GPIO_DOUTTGL15_12_DIO15_TOGGLE 0x01000000U |
| #define GPIO_DOUTTGL15_12_DIO15_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL15_12_DIO14 0x00010000U |
| #define GPIO_DOUTTGL15_12_DIO14_M 0x00010000U |
| #define GPIO_DOUTTGL15_12_DIO14_S 16U |
| #define GPIO_DOUTTGL15_12_DIO14_TOGGLE 0x00010000U |
| #define GPIO_DOUTTGL15_12_DIO14_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL15_12_DIO13 0x00000100U |
| #define GPIO_DOUTTGL15_12_DIO13_M 0x00000100U |
| #define GPIO_DOUTTGL15_12_DIO13_S 8U |
| #define GPIO_DOUTTGL15_12_DIO13_TOGGLE 0x00000100U |
| #define GPIO_DOUTTGL15_12_DIO13_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL15_12_DIO12 0x00000001U |
| #define GPIO_DOUTTGL15_12_DIO12_M 0x00000001U |
| #define GPIO_DOUTTGL15_12_DIO12_S 0U |
| #define GPIO_DOUTTGL15_12_DIO12_TOGGLE 0x00000001U |
| #define GPIO_DOUTTGL15_12_DIO12_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL19_16_DIO19 0x01000000U |
| #define GPIO_DOUTTGL19_16_DIO19_M 0x01000000U |
| #define GPIO_DOUTTGL19_16_DIO19_S 24U |
| #define GPIO_DOUTTGL19_16_DIO19_TOGGLE 0x01000000U |
| #define GPIO_DOUTTGL19_16_DIO19_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL19_16_DIO18 0x00010000U |
| #define GPIO_DOUTTGL19_16_DIO18_M 0x00010000U |
| #define GPIO_DOUTTGL19_16_DIO18_S 16U |
| #define GPIO_DOUTTGL19_16_DIO18_TOGGLE 0x00010000U |
| #define GPIO_DOUTTGL19_16_DIO18_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL19_16_DIO17 0x00000100U |
| #define GPIO_DOUTTGL19_16_DIO17_M 0x00000100U |
| #define GPIO_DOUTTGL19_16_DIO17_S 8U |
| #define GPIO_DOUTTGL19_16_DIO17_TOGGLE 0x00000100U |
| #define GPIO_DOUTTGL19_16_DIO17_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL19_16_DIO16 0x00000001U |
| #define GPIO_DOUTTGL19_16_DIO16_M 0x00000001U |
| #define GPIO_DOUTTGL19_16_DIO16_S 0U |
| #define GPIO_DOUTTGL19_16_DIO16_TOGGLE 0x00000001U |
| #define GPIO_DOUTTGL19_16_DIO16_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL23_20_DIO23 0x01000000U |
| #define GPIO_DOUTTGL23_20_DIO23_M 0x01000000U |
| #define GPIO_DOUTTGL23_20_DIO23_S 24U |
| #define GPIO_DOUTTGL23_20_DIO23_TOGGLE 0x01000000U |
| #define GPIO_DOUTTGL23_20_DIO23_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL23_20_DIO22 0x00010000U |
| #define GPIO_DOUTTGL23_20_DIO22_M 0x00010000U |
| #define GPIO_DOUTTGL23_20_DIO22_S 16U |
| #define GPIO_DOUTTGL23_20_DIO22_TOGGLE 0x00010000U |
| #define GPIO_DOUTTGL23_20_DIO22_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL23_20_DIO21 0x00000100U |
| #define GPIO_DOUTTGL23_20_DIO21_M 0x00000100U |
| #define GPIO_DOUTTGL23_20_DIO21_S 8U |
| #define GPIO_DOUTTGL23_20_DIO21_TOGGLE 0x00000100U |
| #define GPIO_DOUTTGL23_20_DIO21_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL23_20_DIO20 0x00000001U |
| #define GPIO_DOUTTGL23_20_DIO20_M 0x00000001U |
| #define GPIO_DOUTTGL23_20_DIO20_S 0U |
| #define GPIO_DOUTTGL23_20_DIO20_TOGGLE 0x00000001U |
| #define GPIO_DOUTTGL23_20_DIO20_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL27_24_DIO25 0x00000100U |
| #define GPIO_DOUTTGL27_24_DIO25_M 0x00000100U |
| #define GPIO_DOUTTGL27_24_DIO25_S 8U |
| #define GPIO_DOUTTGL27_24_DIO25_TOGGLE 0x00000100U |
| #define GPIO_DOUTTGL27_24_DIO25_NOEFF 0x00000000U |
| #define GPIO_DOUTTGL27_24_DIO24 0x00000001U |
| #define GPIO_DOUTTGL27_24_DIO24_M 0x00000001U |
| #define GPIO_DOUTTGL27_24_DIO24_S 0U |
| #define GPIO_DOUTTGL27_24_DIO24_TOGGLE 0x00000001U |
| #define GPIO_DOUTTGL27_24_DIO24_NOEFF 0x00000000U |
| #define GPIO_DOE3_0_DIO3 0x01000000U |
| #define GPIO_DOE3_0_DIO3_M 0x01000000U |
| #define GPIO_DOE3_0_DIO3_S 24U |
| #define GPIO_DOE3_0_DIO3_EN 0x01000000U |
| #define GPIO_DOE3_0_DIO3_DIS 0x00000000U |
| #define GPIO_DOE3_0_DIO2 0x00010000U |
| #define GPIO_DOE3_0_DIO2_M 0x00010000U |
| #define GPIO_DOE3_0_DIO2_S 16U |
| #define GPIO_DOE3_0_DIO2_EN 0x00010000U |
| #define GPIO_DOE3_0_DIO2_DIS 0x00000000U |
| #define GPIO_DOE3_0_DIO1 0x00000100U |
| #define GPIO_DOE3_0_DIO1_M 0x00000100U |
| #define GPIO_DOE3_0_DIO1_S 8U |
| #define GPIO_DOE3_0_DIO1_EN 0x00000100U |
| #define GPIO_DOE3_0_DIO1_DIS 0x00000000U |
| #define GPIO_DOE3_0_DIO0 0x00000001U |
| #define GPIO_DOE3_0_DIO0_M 0x00000001U |
| #define GPIO_DOE3_0_DIO0_S 0U |
| #define GPIO_DOE3_0_DIO0_EN 0x00000001U |
| #define GPIO_DOE3_0_DIO0_DIS 0x00000000U |
| #define GPIO_DOE7_4_DIO7 0x01000000U |
| #define GPIO_DOE7_4_DIO7_M 0x01000000U |
| #define GPIO_DOE7_4_DIO7_S 24U |
| #define GPIO_DOE7_4_DIO7_EN 0x01000000U |
| #define GPIO_DOE7_4_DIO7_DIS 0x00000000U |
| #define GPIO_DOE7_4_DIO6 0x00010000U |
| #define GPIO_DOE7_4_DIO6_M 0x00010000U |
| #define GPIO_DOE7_4_DIO6_S 16U |
| #define GPIO_DOE7_4_DIO6_EN 0x00010000U |
| #define GPIO_DOE7_4_DIO6_DIS 0x00000000U |
| #define GPIO_DOE7_4_DIO5 0x00000100U |
| #define GPIO_DOE7_4_DIO5_M 0x00000100U |
| #define GPIO_DOE7_4_DIO5_S 8U |
| #define GPIO_DOE7_4_DIO5_EN 0x00000100U |
| #define GPIO_DOE7_4_DIO5_DIS 0x00000000U |
| #define GPIO_DOE7_4_DIO4 0x00000001U |
| #define GPIO_DOE7_4_DIO4_M 0x00000001U |
| #define GPIO_DOE7_4_DIO4_S 0U |
| #define GPIO_DOE7_4_DIO4_EN 0x00000001U |
| #define GPIO_DOE7_4_DIO4_DIS 0x00000000U |
| #define GPIO_DOE11_8_DIO11 0x01000000U |
| #define GPIO_DOE11_8_DIO11_M 0x01000000U |
| #define GPIO_DOE11_8_DIO11_S 24U |
| #define GPIO_DOE11_8_DIO11_EN 0x01000000U |
| #define GPIO_DOE11_8_DIO11_DIS 0x00000000U |
| #define GPIO_DOE11_8_DIO10 0x00010000U |
| #define GPIO_DOE11_8_DIO10_M 0x00010000U |
| #define GPIO_DOE11_8_DIO10_S 16U |
| #define GPIO_DOE11_8_DIO10_EN 0x00010000U |
| #define GPIO_DOE11_8_DIO10_DIS 0x00000000U |
| #define GPIO_DOE11_8_DIO9 0x00000100U |
| #define GPIO_DOE11_8_DIO9_M 0x00000100U |
| #define GPIO_DOE11_8_DIO9_S 8U |
| #define GPIO_DOE11_8_DIO9_EN 0x00000100U |
| #define GPIO_DOE11_8_DIO9_DIS 0x00000000U |
| #define GPIO_DOE11_8_DIO8 0x00000001U |
| #define GPIO_DOE11_8_DIO8_M 0x00000001U |
| #define GPIO_DOE11_8_DIO8_S 0U |
| #define GPIO_DOE11_8_DIO8_EN 0x00000001U |
| #define GPIO_DOE11_8_DIO8_DIS 0x00000000U |
| #define GPIO_DOE15_12_DIO15 0x01000000U |
| #define GPIO_DOE15_12_DIO15_M 0x01000000U |
| #define GPIO_DOE15_12_DIO15_S 24U |
| #define GPIO_DOE15_12_DIO15_EN 0x01000000U |
| #define GPIO_DOE15_12_DIO15_DIS 0x00000000U |
| #define GPIO_DOE15_12_DIO14 0x00010000U |
| #define GPIO_DOE15_12_DIO14_M 0x00010000U |
| #define GPIO_DOE15_12_DIO14_S 16U |
| #define GPIO_DOE15_12_DIO14_EN 0x00010000U |
| #define GPIO_DOE15_12_DIO14_DIS 0x00000000U |
| #define GPIO_DOE15_12_DIO13 0x00000100U |
| #define GPIO_DOE15_12_DIO13_M 0x00000100U |
| #define GPIO_DOE15_12_DIO13_S 8U |
| #define GPIO_DOE15_12_DIO13_EN 0x00000100U |
| #define GPIO_DOE15_12_DIO13_DIS 0x00000000U |
| #define GPIO_DOE15_12_DIO12 0x00000001U |
| #define GPIO_DOE15_12_DIO12_M 0x00000001U |
| #define GPIO_DOE15_12_DIO12_S 0U |
| #define GPIO_DOE15_12_DIO12_EN 0x00000001U |
| #define GPIO_DOE15_12_DIO12_DIS 0x00000000U |
| #define GPIO_DOE19_16_DIO19 0x01000000U |
| #define GPIO_DOE19_16_DIO19_M 0x01000000U |
| #define GPIO_DOE19_16_DIO19_S 24U |
| #define GPIO_DOE19_16_DIO19_EN 0x01000000U |
| #define GPIO_DOE19_16_DIO19_DIS 0x00000000U |
| #define GPIO_DOE19_16_DIO18 0x00010000U |
| #define GPIO_DOE19_16_DIO18_M 0x00010000U |
| #define GPIO_DOE19_16_DIO18_S 16U |
| #define GPIO_DOE19_16_DIO18_EN 0x00010000U |
| #define GPIO_DOE19_16_DIO18_DIS 0x00000000U |
| #define GPIO_DOE19_16_DIO17 0x00000100U |
| #define GPIO_DOE19_16_DIO17_M 0x00000100U |
| #define GPIO_DOE19_16_DIO17_S 8U |
| #define GPIO_DOE19_16_DIO17_EN 0x00000100U |
| #define GPIO_DOE19_16_DIO17_DIS 0x00000000U |
| #define GPIO_DOE19_16_DIO16 0x00000001U |
| #define GPIO_DOE19_16_DIO16_M 0x00000001U |
| #define GPIO_DOE19_16_DIO16_S 0U |
| #define GPIO_DOE19_16_DIO16_EN 0x00000001U |
| #define GPIO_DOE19_16_DIO16_DIS 0x00000000U |
| #define GPIO_DOE23_20_DIO23 0x01000000U |
| #define GPIO_DOE23_20_DIO23_M 0x01000000U |
| #define GPIO_DOE23_20_DIO23_S 24U |
| #define GPIO_DOE23_20_DIO23_EN 0x01000000U |
| #define GPIO_DOE23_20_DIO23_DIS 0x00000000U |
| #define GPIO_DOE23_20_DIO22 0x00010000U |
| #define GPIO_DOE23_20_DIO22_M 0x00010000U |
| #define GPIO_DOE23_20_DIO22_S 16U |
| #define GPIO_DOE23_20_DIO22_EN 0x00010000U |
| #define GPIO_DOE23_20_DIO22_DIS 0x00000000U |
| #define GPIO_DOE23_20_DIO21 0x00000100U |
| #define GPIO_DOE23_20_DIO21_M 0x00000100U |
| #define GPIO_DOE23_20_DIO21_S 8U |
| #define GPIO_DOE23_20_DIO21_EN 0x00000100U |
| #define GPIO_DOE23_20_DIO21_DIS 0x00000000U |
| #define GPIO_DOE23_20_DIO20 0x00000001U |
| #define GPIO_DOE23_20_DIO20_M 0x00000001U |
| #define GPIO_DOE23_20_DIO20_S 0U |
| #define GPIO_DOE23_20_DIO20_EN 0x00000001U |
| #define GPIO_DOE23_20_DIO20_DIS 0x00000000U |
| #define GPIO_DOE27_24_DIO25 0x00000100U |
| #define GPIO_DOE27_24_DIO25_M 0x00000100U |
| #define GPIO_DOE27_24_DIO25_S 8U |
| #define GPIO_DOE27_24_DIO25_EN 0x00000100U |
| #define GPIO_DOE27_24_DIO25_DIS 0x00000000U |
| #define GPIO_DOE27_24_DIO24 0x00000001U |
| #define GPIO_DOE27_24_DIO24_M 0x00000001U |
| #define GPIO_DOE27_24_DIO24_S 0U |
| #define GPIO_DOE27_24_DIO24_EN 0x00000001U |
| #define GPIO_DOE27_24_DIO24_DIS 0x00000000U |
| #define GPIO_DOE31_0_DIO25 0x02000000U |
| #define GPIO_DOE31_0_DIO25_M 0x02000000U |
| #define GPIO_DOE31_0_DIO25_S 25U |
| #define GPIO_DOE31_0_DIO25_EN 0x02000000U |
| #define GPIO_DOE31_0_DIO25_DIS 0x00000000U |
| #define GPIO_DOE31_0_DIO24 0x01000000U |
| #define GPIO_DOE31_0_DIO24_M 0x01000000U |
| #define GPIO_DOE31_0_DIO24_S 24U |
| #define GPIO_DOE31_0_DIO24_EN 0x01000000U |
| #define GPIO_DOE31_0_DIO24_DIS 0x00000000U |
| #define GPIO_DOE31_0_DIO23 0x00800000U |
| #define GPIO_DOE31_0_DIO23_M 0x00800000U |
| #define GPIO_DOE31_0_DIO23_S 23U |
| #define GPIO_DOE31_0_DIO23_EN 0x00800000U |
| #define GPIO_DOE31_0_DIO23_DIS 0x00000000U |
| #define GPIO_DOE31_0_DIO22 0x00400000U |
| #define GPIO_DOE31_0_DIO22_M 0x00400000U |
| #define GPIO_DOE31_0_DIO22_S 22U |
| #define GPIO_DOE31_0_DIO22_EN 0x00400000U |
| #define GPIO_DOE31_0_DIO22_DIS 0x00000000U |
| #define GPIO_DOE31_0_DIO21 0x00200000U |
| #define GPIO_DOE31_0_DIO21_M 0x00200000U |
| #define GPIO_DOE31_0_DIO21_S 21U |
| #define GPIO_DOE31_0_DIO21_EN 0x00200000U |
| #define GPIO_DOE31_0_DIO21_DIS 0x00000000U |
| #define GPIO_DOE31_0_DIO20 0x00100000U |
| #define GPIO_DOE31_0_DIO20_M 0x00100000U |
| #define GPIO_DOE31_0_DIO20_S 20U |
| #define GPIO_DOE31_0_DIO20_EN 0x00100000U |
| #define GPIO_DOE31_0_DIO20_DIS 0x00000000U |
| #define GPIO_DOE31_0_DIO19 0x00080000U |
| #define GPIO_DOE31_0_DIO19_M 0x00080000U |
| #define GPIO_DOE31_0_DIO19_S 19U |
| #define GPIO_DOE31_0_DIO19_EN 0x00080000U |
| #define GPIO_DOE31_0_DIO19_DIS 0x00000000U |
| #define GPIO_DOE31_0_DIO18 0x00040000U |
| #define GPIO_DOE31_0_DIO18_M 0x00040000U |
| #define GPIO_DOE31_0_DIO18_S 18U |
| #define GPIO_DOE31_0_DIO18_EN 0x00040000U |
| #define GPIO_DOE31_0_DIO18_DIS 0x00000000U |
| #define GPIO_DOE31_0_DIO17 0x00020000U |
| #define GPIO_DOE31_0_DIO17_M 0x00020000U |
| #define GPIO_DOE31_0_DIO17_S 17U |
| #define GPIO_DOE31_0_DIO17_EN 0x00020000U |
| #define GPIO_DOE31_0_DIO17_DIS 0x00000000U |
| #define GPIO_DOE31_0_DIO16 0x00010000U |
| #define GPIO_DOE31_0_DIO16_M 0x00010000U |
| #define GPIO_DOE31_0_DIO16_S 16U |
| #define GPIO_DOE31_0_DIO16_EN 0x00010000U |
| #define GPIO_DOE31_0_DIO16_DIS 0x00000000U |
| #define GPIO_DOE31_0_DIO15 0x00008000U |
| #define GPIO_DOE31_0_DIO15_M 0x00008000U |
| #define GPIO_DOE31_0_DIO15_S 15U |
| #define GPIO_DOE31_0_DIO15_EN 0x00008000U |
| #define GPIO_DOE31_0_DIO15_DIS 0x00000000U |
| #define GPIO_DOE31_0_DIO14 0x00004000U |
| #define GPIO_DOE31_0_DIO14_M 0x00004000U |
| #define GPIO_DOE31_0_DIO14_S 14U |
| #define GPIO_DOE31_0_DIO14_EN 0x00004000U |
| #define GPIO_DOE31_0_DIO14_DIS 0x00000000U |
| #define GPIO_DOE31_0_DIO13 0x00002000U |
| #define GPIO_DOE31_0_DIO13_M 0x00002000U |
| #define GPIO_DOE31_0_DIO13_S 13U |
| #define GPIO_DOE31_0_DIO13_EN 0x00002000U |
| #define GPIO_DOE31_0_DIO13_DIS 0x00000000U |
| #define GPIO_DOE31_0_DIO12 0x00001000U |
| #define GPIO_DOE31_0_DIO12_M 0x00001000U |
| #define GPIO_DOE31_0_DIO12_S 12U |
| #define GPIO_DOE31_0_DIO12_EN 0x00001000U |
| #define GPIO_DOE31_0_DIO12_DIS 0x00000000U |
| #define GPIO_DOE31_0_DIO11 0x00000800U |
| #define GPIO_DOE31_0_DIO11_M 0x00000800U |
| #define GPIO_DOE31_0_DIO11_S 11U |
| #define GPIO_DOE31_0_DIO11_EN 0x00000800U |
| #define GPIO_DOE31_0_DIO11_DIS 0x00000000U |
| #define GPIO_DOE31_0_DIO10 0x00000400U |
| #define GPIO_DOE31_0_DIO10_M 0x00000400U |
| #define GPIO_DOE31_0_DIO10_S 10U |
| #define GPIO_DOE31_0_DIO10_EN 0x00000400U |
| #define GPIO_DOE31_0_DIO10_DIS 0x00000000U |
| #define GPIO_DOE31_0_DIO9 0x00000200U |
| #define GPIO_DOE31_0_DIO9_M 0x00000200U |
| #define GPIO_DOE31_0_DIO9_S 9U |
| #define GPIO_DOE31_0_DIO9_EN 0x00000200U |
| #define GPIO_DOE31_0_DIO9_DIS 0x00000000U |
| #define GPIO_DOE31_0_DIO8 0x00000100U |
| #define GPIO_DOE31_0_DIO8_M 0x00000100U |
| #define GPIO_DOE31_0_DIO8_S 8U |
| #define GPIO_DOE31_0_DIO8_EN 0x00000100U |
| #define GPIO_DOE31_0_DIO8_DIS 0x00000000U |
| #define GPIO_DOE31_0_DIO7 0x00000080U |
| #define GPIO_DOE31_0_DIO7_M 0x00000080U |
| #define GPIO_DOE31_0_DIO7_S 7U |
| #define GPIO_DOE31_0_DIO7_EN 0x00000080U |
| #define GPIO_DOE31_0_DIO7_DIS 0x00000000U |
| #define GPIO_DOE31_0_DIO6 0x00000040U |
| #define GPIO_DOE31_0_DIO6_M 0x00000040U |
| #define GPIO_DOE31_0_DIO6_S 6U |
| #define GPIO_DOE31_0_DIO6_EN 0x00000040U |
| #define GPIO_DOE31_0_DIO6_DIS 0x00000000U |
| #define GPIO_DOE31_0_DIO5 0x00000020U |
| #define GPIO_DOE31_0_DIO5_M 0x00000020U |
| #define GPIO_DOE31_0_DIO5_S 5U |
| #define GPIO_DOE31_0_DIO5_EN 0x00000020U |
| #define GPIO_DOE31_0_DIO5_DIS 0x00000000U |
| #define GPIO_DOE31_0_DIO4 0x00000010U |
| #define GPIO_DOE31_0_DIO4_M 0x00000010U |
| #define GPIO_DOE31_0_DIO4_S 4U |
| #define GPIO_DOE31_0_DIO4_EN 0x00000010U |
| #define GPIO_DOE31_0_DIO4_DIS 0x00000000U |
| #define GPIO_DOE31_0_DIO3 0x00000008U |
| #define GPIO_DOE31_0_DIO3_M 0x00000008U |
| #define GPIO_DOE31_0_DIO3_S 3U |
| #define GPIO_DOE31_0_DIO3_EN 0x00000008U |
| #define GPIO_DOE31_0_DIO3_DIS 0x00000000U |
| #define GPIO_DOE31_0_DIO2 0x00000004U |
| #define GPIO_DOE31_0_DIO2_M 0x00000004U |
| #define GPIO_DOE31_0_DIO2_S 2U |
| #define GPIO_DOE31_0_DIO2_EN 0x00000004U |
| #define GPIO_DOE31_0_DIO2_DIS 0x00000000U |
| #define GPIO_DOE31_0_DIO1 0x00000002U |
| #define GPIO_DOE31_0_DIO1_M 0x00000002U |
| #define GPIO_DOE31_0_DIO1_S 1U |
| #define GPIO_DOE31_0_DIO1_EN 0x00000002U |
| #define GPIO_DOE31_0_DIO1_DIS 0x00000000U |
| #define GPIO_DOE31_0_DIO0 0x00000001U |
| #define GPIO_DOE31_0_DIO0_M 0x00000001U |
| #define GPIO_DOE31_0_DIO0_S 0U |
| #define GPIO_DOE31_0_DIO0_EN 0x00000001U |
| #define GPIO_DOE31_0_DIO0_DIS 0x00000000U |
| #define GPIO_DOESET31_0_DIO25 0x02000000U |
| #define GPIO_DOESET31_0_DIO25_M 0x02000000U |
| #define GPIO_DOESET31_0_DIO25_S 25U |
| #define GPIO_DOESET31_0_DIO25_SET 0x02000000U |
| #define GPIO_DOESET31_0_DIO25_NOEFF 0x00000000U |
| #define GPIO_DOESET31_0_DIO24 0x01000000U |
| #define GPIO_DOESET31_0_DIO24_M 0x01000000U |
| #define GPIO_DOESET31_0_DIO24_S 24U |
| #define GPIO_DOESET31_0_DIO24_SET 0x01000000U |
| #define GPIO_DOESET31_0_DIO24_NOEFF 0x00000000U |
| #define GPIO_DOESET31_0_DIO23 0x00800000U |
| #define GPIO_DOESET31_0_DIO23_M 0x00800000U |
| #define GPIO_DOESET31_0_DIO23_S 23U |
| #define GPIO_DOESET31_0_DIO23_SET 0x00800000U |
| #define GPIO_DOESET31_0_DIO23_NOEFF 0x00000000U |
| #define GPIO_DOESET31_0_DIO22 0x00400000U |
| #define GPIO_DOESET31_0_DIO22_M 0x00400000U |
| #define GPIO_DOESET31_0_DIO22_S 22U |
| #define GPIO_DOESET31_0_DIO22_SET 0x00400000U |
| #define GPIO_DOESET31_0_DIO22_NOEFF 0x00000000U |
| #define GPIO_DOESET31_0_DIO21 0x00200000U |
| #define GPIO_DOESET31_0_DIO21_M 0x00200000U |
| #define GPIO_DOESET31_0_DIO21_S 21U |
| #define GPIO_DOESET31_0_DIO21_SET 0x00200000U |
| #define GPIO_DOESET31_0_DIO21_NOEFF 0x00000000U |
| #define GPIO_DOESET31_0_DIO20 0x00100000U |
| #define GPIO_DOESET31_0_DIO20_M 0x00100000U |
| #define GPIO_DOESET31_0_DIO20_S 20U |
| #define GPIO_DOESET31_0_DIO20_SET 0x00100000U |
| #define GPIO_DOESET31_0_DIO20_NOEFF 0x00000000U |
| #define GPIO_DOESET31_0_DIO19 0x00080000U |
| #define GPIO_DOESET31_0_DIO19_M 0x00080000U |
| #define GPIO_DOESET31_0_DIO19_S 19U |
| #define GPIO_DOESET31_0_DIO19_SET 0x00080000U |
| #define GPIO_DOESET31_0_DIO19_NOEFF 0x00000000U |
| #define GPIO_DOESET31_0_DIO18 0x00040000U |
| #define GPIO_DOESET31_0_DIO18_M 0x00040000U |
| #define GPIO_DOESET31_0_DIO18_S 18U |
| #define GPIO_DOESET31_0_DIO18_SET 0x00040000U |
| #define GPIO_DOESET31_0_DIO18_NOEFF 0x00000000U |
| #define GPIO_DOESET31_0_DIO17 0x00020000U |
| #define GPIO_DOESET31_0_DIO17_M 0x00020000U |
| #define GPIO_DOESET31_0_DIO17_S 17U |
| #define GPIO_DOESET31_0_DIO17_SET 0x00020000U |
| #define GPIO_DOESET31_0_DIO17_NOEFF 0x00000000U |
| #define GPIO_DOESET31_0_DIO16 0x00010000U |
| #define GPIO_DOESET31_0_DIO16_M 0x00010000U |
| #define GPIO_DOESET31_0_DIO16_S 16U |
| #define GPIO_DOESET31_0_DIO16_SET 0x00010000U |
| #define GPIO_DOESET31_0_DIO16_NOEFF 0x00000000U |
| #define GPIO_DOESET31_0_DIO15 0x00008000U |
| #define GPIO_DOESET31_0_DIO15_M 0x00008000U |
| #define GPIO_DOESET31_0_DIO15_S 15U |
| #define GPIO_DOESET31_0_DIO15_SET 0x00008000U |
| #define GPIO_DOESET31_0_DIO15_NOEFF 0x00000000U |
| #define GPIO_DOESET31_0_DIO14 0x00004000U |
| #define GPIO_DOESET31_0_DIO14_M 0x00004000U |
| #define GPIO_DOESET31_0_DIO14_S 14U |
| #define GPIO_DOESET31_0_DIO14_SET 0x00004000U |
| #define GPIO_DOESET31_0_DIO14_NOEFF 0x00000000U |
| #define GPIO_DOESET31_0_DIO13 0x00002000U |
| #define GPIO_DOESET31_0_DIO13_M 0x00002000U |
| #define GPIO_DOESET31_0_DIO13_S 13U |
| #define GPIO_DOESET31_0_DIO13_SET 0x00002000U |
| #define GPIO_DOESET31_0_DIO13_NOEFF 0x00000000U |
| #define GPIO_DOESET31_0_DIO12 0x00001000U |
| #define GPIO_DOESET31_0_DIO12_M 0x00001000U |
| #define GPIO_DOESET31_0_DIO12_S 12U |
| #define GPIO_DOESET31_0_DIO12_SET 0x00001000U |
| #define GPIO_DOESET31_0_DIO12_NOEFF 0x00000000U |
| #define GPIO_DOESET31_0_DIO11 0x00000800U |
| #define GPIO_DOESET31_0_DIO11_M 0x00000800U |
| #define GPIO_DOESET31_0_DIO11_S 11U |
| #define GPIO_DOESET31_0_DIO11_SET 0x00000800U |
| #define GPIO_DOESET31_0_DIO11_NOEFF 0x00000000U |
| #define GPIO_DOESET31_0_DIO10 0x00000400U |
| #define GPIO_DOESET31_0_DIO10_M 0x00000400U |
| #define GPIO_DOESET31_0_DIO10_S 10U |
| #define GPIO_DOESET31_0_DIO10_SET 0x00000400U |
| #define GPIO_DOESET31_0_DIO10_NOEFF 0x00000000U |
| #define GPIO_DOESET31_0_DIO9 0x00000200U |
| #define GPIO_DOESET31_0_DIO9_M 0x00000200U |
| #define GPIO_DOESET31_0_DIO9_S 9U |
| #define GPIO_DOESET31_0_DIO9_SET 0x00000200U |
| #define GPIO_DOESET31_0_DIO9_NOEFF 0x00000000U |
| #define GPIO_DOESET31_0_DIO8 0x00000100U |
| #define GPIO_DOESET31_0_DIO8_M 0x00000100U |
| #define GPIO_DOESET31_0_DIO8_S 8U |
| #define GPIO_DOESET31_0_DIO8_SET 0x00000100U |
| #define GPIO_DOESET31_0_DIO8_NOEFF 0x00000000U |
| #define GPIO_DOESET31_0_DIO7 0x00000080U |
| #define GPIO_DOESET31_0_DIO7_M 0x00000080U |
| #define GPIO_DOESET31_0_DIO7_S 7U |
| #define GPIO_DOESET31_0_DIO7_SET 0x00000080U |
| #define GPIO_DOESET31_0_DIO7_NOEFF 0x00000000U |
| #define GPIO_DOESET31_0_DIO6 0x00000040U |
| #define GPIO_DOESET31_0_DIO6_M 0x00000040U |
| #define GPIO_DOESET31_0_DIO6_S 6U |
| #define GPIO_DOESET31_0_DIO6_SET 0x00000040U |
| #define GPIO_DOESET31_0_DIO6_NOEFF 0x00000000U |
| #define GPIO_DOESET31_0_DIO5 0x00000020U |
| #define GPIO_DOESET31_0_DIO5_M 0x00000020U |
| #define GPIO_DOESET31_0_DIO5_S 5U |
| #define GPIO_DOESET31_0_DIO5_SET 0x00000020U |
| #define GPIO_DOESET31_0_DIO5_NOEFF 0x00000000U |
| #define GPIO_DOESET31_0_DIO4 0x00000010U |
| #define GPIO_DOESET31_0_DIO4_M 0x00000010U |
| #define GPIO_DOESET31_0_DIO4_S 4U |
| #define GPIO_DOESET31_0_DIO4_SET 0x00000010U |
| #define GPIO_DOESET31_0_DIO4_NOEFF 0x00000000U |
| #define GPIO_DOESET31_0_DIO3 0x00000008U |
| #define GPIO_DOESET31_0_DIO3_M 0x00000008U |
| #define GPIO_DOESET31_0_DIO3_S 3U |
| #define GPIO_DOESET31_0_DIO3_SET 0x00000008U |
| #define GPIO_DOESET31_0_DIO3_NOEFF 0x00000000U |
| #define GPIO_DOESET31_0_DIO2 0x00000004U |
| #define GPIO_DOESET31_0_DIO2_M 0x00000004U |
| #define GPIO_DOESET31_0_DIO2_S 2U |
| #define GPIO_DOESET31_0_DIO2_SET 0x00000004U |
| #define GPIO_DOESET31_0_DIO2_NOEFF 0x00000000U |
| #define GPIO_DOESET31_0_DIO1 0x00000002U |
| #define GPIO_DOESET31_0_DIO1_M 0x00000002U |
| #define GPIO_DOESET31_0_DIO1_S 1U |
| #define GPIO_DOESET31_0_DIO1_SET 0x00000002U |
| #define GPIO_DOESET31_0_DIO1_NOEFF 0x00000000U |
| #define GPIO_DOESET31_0_DIO0 0x00000001U |
| #define GPIO_DOESET31_0_DIO0_M 0x00000001U |
| #define GPIO_DOESET31_0_DIO0_S 0U |
| #define GPIO_DOESET31_0_DIO0_SET 0x00000001U |
| #define GPIO_DOESET31_0_DIO0_NOEFF 0x00000000U |
| #define GPIO_DOECLR31_0_DIO25 0x02000000U |
| #define GPIO_DOECLR31_0_DIO25_M 0x02000000U |
| #define GPIO_DOECLR31_0_DIO25_S 25U |
| #define GPIO_DOECLR31_0_DIO25_CLR 0x02000000U |
| #define GPIO_DOECLR31_0_DIO25_NOEFF 0x00000000U |
| #define GPIO_DOECLR31_0_DIO24 0x01000000U |
| #define GPIO_DOECLR31_0_DIO24_M 0x01000000U |
| #define GPIO_DOECLR31_0_DIO24_S 24U |
| #define GPIO_DOECLR31_0_DIO24_CLR 0x01000000U |
| #define GPIO_DOECLR31_0_DIO24_NOEFF 0x00000000U |
| #define GPIO_DOECLR31_0_DIO23 0x00800000U |
| #define GPIO_DOECLR31_0_DIO23_M 0x00800000U |
| #define GPIO_DOECLR31_0_DIO23_S 23U |
| #define GPIO_DOECLR31_0_DIO23_CLR 0x00800000U |
| #define GPIO_DOECLR31_0_DIO23_NOEFF 0x00000000U |
| #define GPIO_DOECLR31_0_DIO22 0x00400000U |
| #define GPIO_DOECLR31_0_DIO22_M 0x00400000U |
| #define GPIO_DOECLR31_0_DIO22_S 22U |
| #define GPIO_DOECLR31_0_DIO22_CLR 0x00400000U |
| #define GPIO_DOECLR31_0_DIO22_NOEFF 0x00000000U |
| #define GPIO_DOECLR31_0_DIO21 0x00200000U |
| #define GPIO_DOECLR31_0_DIO21_M 0x00200000U |
| #define GPIO_DOECLR31_0_DIO21_S 21U |
| #define GPIO_DOECLR31_0_DIO21_CLR 0x00200000U |
| #define GPIO_DOECLR31_0_DIO21_NOEFF 0x00000000U |
| #define GPIO_DOECLR31_0_DIO20 0x00100000U |
| #define GPIO_DOECLR31_0_DIO20_M 0x00100000U |
| #define GPIO_DOECLR31_0_DIO20_S 20U |
| #define GPIO_DOECLR31_0_DIO20_CLR 0x00100000U |
| #define GPIO_DOECLR31_0_DIO20_NOEFF 0x00000000U |
| #define GPIO_DOECLR31_0_DIO19 0x00080000U |
| #define GPIO_DOECLR31_0_DIO19_M 0x00080000U |
| #define GPIO_DOECLR31_0_DIO19_S 19U |
| #define GPIO_DOECLR31_0_DIO19_CLR 0x00080000U |
| #define GPIO_DOECLR31_0_DIO19_NOEFF 0x00000000U |
| #define GPIO_DOECLR31_0_DIO18 0x00040000U |
| #define GPIO_DOECLR31_0_DIO18_M 0x00040000U |
| #define GPIO_DOECLR31_0_DIO18_S 18U |
| #define GPIO_DOECLR31_0_DIO18_CLR 0x00040000U |
| #define GPIO_DOECLR31_0_DIO18_NOEFF 0x00000000U |
| #define GPIO_DOECLR31_0_DIO17 0x00020000U |
| #define GPIO_DOECLR31_0_DIO17_M 0x00020000U |
| #define GPIO_DOECLR31_0_DIO17_S 17U |
| #define GPIO_DOECLR31_0_DIO17_CLR 0x00020000U |
| #define GPIO_DOECLR31_0_DIO17_NOEFF 0x00000000U |
| #define GPIO_DOECLR31_0_DIO16 0x00010000U |
| #define GPIO_DOECLR31_0_DIO16_M 0x00010000U |
| #define GPIO_DOECLR31_0_DIO16_S 16U |
| #define GPIO_DOECLR31_0_DIO16_CLR 0x00010000U |
| #define GPIO_DOECLR31_0_DIO16_NOEFF 0x00000000U |
| #define GPIO_DOECLR31_0_DIO15 0x00008000U |
| #define GPIO_DOECLR31_0_DIO15_M 0x00008000U |
| #define GPIO_DOECLR31_0_DIO15_S 15U |
| #define GPIO_DOECLR31_0_DIO15_CLR 0x00008000U |
| #define GPIO_DOECLR31_0_DIO15_NOEFF 0x00000000U |
| #define GPIO_DOECLR31_0_DIO14 0x00004000U |
| #define GPIO_DOECLR31_0_DIO14_M 0x00004000U |
| #define GPIO_DOECLR31_0_DIO14_S 14U |
| #define GPIO_DOECLR31_0_DIO14_CLR 0x00004000U |
| #define GPIO_DOECLR31_0_DIO14_NOEFF 0x00000000U |
| #define GPIO_DOECLR31_0_DIO13 0x00002000U |
| #define GPIO_DOECLR31_0_DIO13_M 0x00002000U |
| #define GPIO_DOECLR31_0_DIO13_S 13U |
| #define GPIO_DOECLR31_0_DIO13_CLR 0x00002000U |
| #define GPIO_DOECLR31_0_DIO13_NOEFF 0x00000000U |
| #define GPIO_DOECLR31_0_DIO12 0x00001000U |
| #define GPIO_DOECLR31_0_DIO12_M 0x00001000U |
| #define GPIO_DOECLR31_0_DIO12_S 12U |
| #define GPIO_DOECLR31_0_DIO12_CLR 0x00001000U |
| #define GPIO_DOECLR31_0_DIO12_NOEFF 0x00000000U |
| #define GPIO_DOECLR31_0_DIO11 0x00000800U |
| #define GPIO_DOECLR31_0_DIO11_M 0x00000800U |
| #define GPIO_DOECLR31_0_DIO11_S 11U |
| #define GPIO_DOECLR31_0_DIO11_CLR 0x00000800U |
| #define GPIO_DOECLR31_0_DIO11_NOEFF 0x00000000U |
| #define GPIO_DOECLR31_0_DIO10 0x00000400U |
| #define GPIO_DOECLR31_0_DIO10_M 0x00000400U |
| #define GPIO_DOECLR31_0_DIO10_S 10U |
| #define GPIO_DOECLR31_0_DIO10_CLR 0x00000400U |
| #define GPIO_DOECLR31_0_DIO10_NOEFF 0x00000000U |
| #define GPIO_DOECLR31_0_DIO9 0x00000200U |
| #define GPIO_DOECLR31_0_DIO9_M 0x00000200U |
| #define GPIO_DOECLR31_0_DIO9_S 9U |
| #define GPIO_DOECLR31_0_DIO9_CLR 0x00000200U |
| #define GPIO_DOECLR31_0_DIO9_NOEFF 0x00000000U |
| #define GPIO_DOECLR31_0_DIO8 0x00000100U |
| #define GPIO_DOECLR31_0_DIO8_M 0x00000100U |
| #define GPIO_DOECLR31_0_DIO8_S 8U |
| #define GPIO_DOECLR31_0_DIO8_CLR 0x00000100U |
| #define GPIO_DOECLR31_0_DIO8_NOEFF 0x00000000U |
| #define GPIO_DOECLR31_0_DIO7 0x00000080U |
| #define GPIO_DOECLR31_0_DIO7_M 0x00000080U |
| #define GPIO_DOECLR31_0_DIO7_S 7U |
| #define GPIO_DOECLR31_0_DIO7_CLR 0x00000080U |
| #define GPIO_DOECLR31_0_DIO7_NOEFF 0x00000000U |
| #define GPIO_DOECLR31_0_DIO6 0x00000040U |
| #define GPIO_DOECLR31_0_DIO6_M 0x00000040U |
| #define GPIO_DOECLR31_0_DIO6_S 6U |
| #define GPIO_DOECLR31_0_DIO6_CLR 0x00000040U |
| #define GPIO_DOECLR31_0_DIO6_NOEFF 0x00000000U |
| #define GPIO_DOECLR31_0_DIO5 0x00000020U |
| #define GPIO_DOECLR31_0_DIO5_M 0x00000020U |
| #define GPIO_DOECLR31_0_DIO5_S 5U |
| #define GPIO_DOECLR31_0_DIO5_CLR 0x00000020U |
| #define GPIO_DOECLR31_0_DIO5_NOEFF 0x00000000U |
| #define GPIO_DOECLR31_0_DIO4 0x00000010U |
| #define GPIO_DOECLR31_0_DIO4_M 0x00000010U |
| #define GPIO_DOECLR31_0_DIO4_S 4U |
| #define GPIO_DOECLR31_0_DIO4_CLR 0x00000010U |
| #define GPIO_DOECLR31_0_DIO4_NOEFF 0x00000000U |
| #define GPIO_DOECLR31_0_DIO3 0x00000008U |
| #define GPIO_DOECLR31_0_DIO3_M 0x00000008U |
| #define GPIO_DOECLR31_0_DIO3_S 3U |
| #define GPIO_DOECLR31_0_DIO3_CLR 0x00000008U |
| #define GPIO_DOECLR31_0_DIO3_NOEFF 0x00000000U |
| #define GPIO_DOECLR31_0_DIO2 0x00000004U |
| #define GPIO_DOECLR31_0_DIO2_M 0x00000004U |
| #define GPIO_DOECLR31_0_DIO2_S 2U |
| #define GPIO_DOECLR31_0_DIO2_CLR 0x00000004U |
| #define GPIO_DOECLR31_0_DIO2_NOEFF 0x00000000U |
| #define GPIO_DOECLR31_0_DIO1 0x00000002U |
| #define GPIO_DOECLR31_0_DIO1_M 0x00000002U |
| #define GPIO_DOECLR31_0_DIO1_S 1U |
| #define GPIO_DOECLR31_0_DIO1_CLR 0x00000002U |
| #define GPIO_DOECLR31_0_DIO1_NOEFF 0x00000000U |
| #define GPIO_DOECLR31_0_DIO0 0x00000001U |
| #define GPIO_DOECLR31_0_DIO0_M 0x00000001U |
| #define GPIO_DOECLR31_0_DIO0_S 0U |
| #define GPIO_DOECLR31_0_DIO0_CLR 0x00000001U |
| #define GPIO_DOECLR31_0_DIO0_NOEFF 0x00000000U |
| #define GPIO_DOETGL31_0_DIO25 0x02000000U |
| #define GPIO_DOETGL31_0_DIO25_M 0x02000000U |
| #define GPIO_DOETGL31_0_DIO25_S 25U |
| #define GPIO_DOETGL31_0_DIO25_TOGGLE 0x02000000U |
| #define GPIO_DOETGL31_0_DIO25_NOEFF 0x00000000U |
| #define GPIO_DOETGL31_0_DIO24 0x01000000U |
| #define GPIO_DOETGL31_0_DIO24_M 0x01000000U |
| #define GPIO_DOETGL31_0_DIO24_S 24U |
| #define GPIO_DOETGL31_0_DIO24_TOGGLE 0x01000000U |
| #define GPIO_DOETGL31_0_DIO24_NOEFF 0x00000000U |
| #define GPIO_DOETGL31_0_DIO23 0x00800000U |
| #define GPIO_DOETGL31_0_DIO23_M 0x00800000U |
| #define GPIO_DOETGL31_0_DIO23_S 23U |
| #define GPIO_DOETGL31_0_DIO23_TOGGLE 0x00800000U |
| #define GPIO_DOETGL31_0_DIO23_NOEFF 0x00000000U |
| #define GPIO_DOETGL31_0_DIO22 0x00400000U |
| #define GPIO_DOETGL31_0_DIO22_M 0x00400000U |
| #define GPIO_DOETGL31_0_DIO22_S 22U |
| #define GPIO_DOETGL31_0_DIO22_TOGGLE 0x00400000U |
| #define GPIO_DOETGL31_0_DIO22_NOEFF 0x00000000U |
| #define GPIO_DOETGL31_0_DIO21 0x00200000U |
| #define GPIO_DOETGL31_0_DIO21_M 0x00200000U |
| #define GPIO_DOETGL31_0_DIO21_S 21U |
| #define GPIO_DOETGL31_0_DIO21_TOGGLE 0x00200000U |
| #define GPIO_DOETGL31_0_DIO21_NOEFF 0x00000000U |
| #define GPIO_DOETGL31_0_DIO20 0x00100000U |
| #define GPIO_DOETGL31_0_DIO20_M 0x00100000U |
| #define GPIO_DOETGL31_0_DIO20_S 20U |
| #define GPIO_DOETGL31_0_DIO20_TOGGLE 0x00100000U |
| #define GPIO_DOETGL31_0_DIO20_NOEFF 0x00000000U |
| #define GPIO_DOETGL31_0_DIO19 0x00080000U |
| #define GPIO_DOETGL31_0_DIO19_M 0x00080000U |
| #define GPIO_DOETGL31_0_DIO19_S 19U |
| #define GPIO_DOETGL31_0_DIO19_TOGGLE 0x00080000U |
| #define GPIO_DOETGL31_0_DIO19_NOEFF 0x00000000U |
| #define GPIO_DOETGL31_0_DIO18 0x00040000U |
| #define GPIO_DOETGL31_0_DIO18_M 0x00040000U |
| #define GPIO_DOETGL31_0_DIO18_S 18U |
| #define GPIO_DOETGL31_0_DIO18_TOGGLE 0x00040000U |
| #define GPIO_DOETGL31_0_DIO18_NOEFF 0x00000000U |
| #define GPIO_DOETGL31_0_DIO17 0x00020000U |
| #define GPIO_DOETGL31_0_DIO17_M 0x00020000U |
| #define GPIO_DOETGL31_0_DIO17_S 17U |
| #define GPIO_DOETGL31_0_DIO17_TOGGLE 0x00020000U |
| #define GPIO_DOETGL31_0_DIO17_NOEFF 0x00000000U |
| #define GPIO_DOETGL31_0_DIO16 0x00010000U |
| #define GPIO_DOETGL31_0_DIO16_M 0x00010000U |
| #define GPIO_DOETGL31_0_DIO16_S 16U |
| #define GPIO_DOETGL31_0_DIO16_TOGGLE 0x00010000U |
| #define GPIO_DOETGL31_0_DIO16_NOEFF 0x00000000U |
| #define GPIO_DOETGL31_0_DIO15 0x00008000U |
| #define GPIO_DOETGL31_0_DIO15_M 0x00008000U |
| #define GPIO_DOETGL31_0_DIO15_S 15U |
| #define GPIO_DOETGL31_0_DIO15_TOGGLE 0x00008000U |
| #define GPIO_DOETGL31_0_DIO15_NOEFF 0x00000000U |
| #define GPIO_DOETGL31_0_DIO14 0x00004000U |
| #define GPIO_DOETGL31_0_DIO14_M 0x00004000U |
| #define GPIO_DOETGL31_0_DIO14_S 14U |
| #define GPIO_DOETGL31_0_DIO14_TOGGLE 0x00004000U |
| #define GPIO_DOETGL31_0_DIO14_NOEFF 0x00000000U |
| #define GPIO_DOETGL31_0_DIO13 0x00002000U |
| #define GPIO_DOETGL31_0_DIO13_M 0x00002000U |
| #define GPIO_DOETGL31_0_DIO13_S 13U |
| #define GPIO_DOETGL31_0_DIO13_TOGGLE 0x00002000U |
| #define GPIO_DOETGL31_0_DIO13_NOEFF 0x00000000U |
| #define GPIO_DOETGL31_0_DIO12 0x00001000U |
| #define GPIO_DOETGL31_0_DIO12_M 0x00001000U |
| #define GPIO_DOETGL31_0_DIO12_S 12U |
| #define GPIO_DOETGL31_0_DIO12_TOGGLE 0x00001000U |
| #define GPIO_DOETGL31_0_DIO12_NOEFF 0x00000000U |
| #define GPIO_DOETGL31_0_DIO11 0x00000800U |
| #define GPIO_DOETGL31_0_DIO11_M 0x00000800U |
| #define GPIO_DOETGL31_0_DIO11_S 11U |
| #define GPIO_DOETGL31_0_DIO11_TOGGLE 0x00000800U |
| #define GPIO_DOETGL31_0_DIO11_NOEFF 0x00000000U |
| #define GPIO_DOETGL31_0_DIO10 0x00000400U |
| #define GPIO_DOETGL31_0_DIO10_M 0x00000400U |
| #define GPIO_DOETGL31_0_DIO10_S 10U |
| #define GPIO_DOETGL31_0_DIO10_TOGGLE 0x00000400U |
| #define GPIO_DOETGL31_0_DIO10_NOEFF 0x00000000U |
| #define GPIO_DOETGL31_0_DIO9 0x00000200U |
| #define GPIO_DOETGL31_0_DIO9_M 0x00000200U |
| #define GPIO_DOETGL31_0_DIO9_S 9U |
| #define GPIO_DOETGL31_0_DIO9_TOGGLE 0x00000200U |
| #define GPIO_DOETGL31_0_DIO9_NOEFF 0x00000000U |
| #define GPIO_DOETGL31_0_DIO8 0x00000100U |
| #define GPIO_DOETGL31_0_DIO8_M 0x00000100U |
| #define GPIO_DOETGL31_0_DIO8_S 8U |
| #define GPIO_DOETGL31_0_DIO8_TOGGLE 0x00000100U |
| #define GPIO_DOETGL31_0_DIO8_NOEFF 0x00000000U |
| #define GPIO_DOETGL31_0_DIO7 0x00000080U |
| #define GPIO_DOETGL31_0_DIO7_M 0x00000080U |
| #define GPIO_DOETGL31_0_DIO7_S 7U |
| #define GPIO_DOETGL31_0_DIO7_TOGGLE 0x00000080U |
| #define GPIO_DOETGL31_0_DIO7_NOEFF 0x00000000U |
| #define GPIO_DOETGL31_0_DIO6 0x00000040U |
| #define GPIO_DOETGL31_0_DIO6_M 0x00000040U |
| #define GPIO_DOETGL31_0_DIO6_S 6U |
| #define GPIO_DOETGL31_0_DIO6_TOGGLE 0x00000040U |
| #define GPIO_DOETGL31_0_DIO6_NOEFF 0x00000000U |
| #define GPIO_DOETGL31_0_DIO5 0x00000020U |
| #define GPIO_DOETGL31_0_DIO5_M 0x00000020U |
| #define GPIO_DOETGL31_0_DIO5_S 5U |
| #define GPIO_DOETGL31_0_DIO5_TOGGLE 0x00000020U |
| #define GPIO_DOETGL31_0_DIO5_NOEFF 0x00000000U |
| #define GPIO_DOETGL31_0_DIO4 0x00000010U |
| #define GPIO_DOETGL31_0_DIO4_M 0x00000010U |
| #define GPIO_DOETGL31_0_DIO4_S 4U |
| #define GPIO_DOETGL31_0_DIO4_TOGGLE 0x00000010U |
| #define GPIO_DOETGL31_0_DIO4_NOEFF 0x00000000U |
| #define GPIO_DOETGL31_0_DIO3 0x00000008U |
| #define GPIO_DOETGL31_0_DIO3_M 0x00000008U |
| #define GPIO_DOETGL31_0_DIO3_S 3U |
| #define GPIO_DOETGL31_0_DIO3_TOGGLE 0x00000008U |
| #define GPIO_DOETGL31_0_DIO3_NOEFF 0x00000000U |
| #define GPIO_DOETGL31_0_DIO2 0x00000004U |
| #define GPIO_DOETGL31_0_DIO2_M 0x00000004U |
| #define GPIO_DOETGL31_0_DIO2_S 2U |
| #define GPIO_DOETGL31_0_DIO2_TOGGLE 0x00000004U |
| #define GPIO_DOETGL31_0_DIO2_NOEFF 0x00000000U |
| #define GPIO_DOETGL31_0_DIO1 0x00000002U |
| #define GPIO_DOETGL31_0_DIO1_M 0x00000002U |
| #define GPIO_DOETGL31_0_DIO1_S 1U |
| #define GPIO_DOETGL31_0_DIO1_TOGGLE 0x00000002U |
| #define GPIO_DOETGL31_0_DIO1_NOEFF 0x00000000U |
| #define GPIO_DOETGL31_0_DIO0 0x00000001U |
| #define GPIO_DOETGL31_0_DIO0_M 0x00000001U |
| #define GPIO_DOETGL31_0_DIO0_S 0U |
| #define GPIO_DOETGL31_0_DIO0_TOGGLE 0x00000001U |
| #define GPIO_DOETGL31_0_DIO0_NOEFF 0x00000000U |
| #define GPIO_DIN3_0_DIO3 0x01000000U |
| #define GPIO_DIN3_0_DIO3_M 0x01000000U |
| #define GPIO_DIN3_0_DIO3_S 24U |
| #define GPIO_DIN3_0_DIO3_ONE 0x01000000U |
| #define GPIO_DIN3_0_DIO3_ZERO 0x00000000U |
| #define GPIO_DIN3_0_DIO2 0x00010000U |
| #define GPIO_DIN3_0_DIO2_M 0x00010000U |
| #define GPIO_DIN3_0_DIO2_S 16U |
| #define GPIO_DIN3_0_DIO2_ONE 0x00010000U |
| #define GPIO_DIN3_0_DIO2_ZERO 0x00000000U |
| #define GPIO_DIN3_0_DIO1 0x00000100U |
| #define GPIO_DIN3_0_DIO1_M 0x00000100U |
| #define GPIO_DIN3_0_DIO1_S 8U |
| #define GPIO_DIN3_0_DIO1_ONE 0x00000100U |
| #define GPIO_DIN3_0_DIO1_ZERO 0x00000000U |
| #define GPIO_DIN3_0_DIO0 0x00000001U |
| #define GPIO_DIN3_0_DIO0_M 0x00000001U |
| #define GPIO_DIN3_0_DIO0_S 0U |
| #define GPIO_DIN3_0_DIO0_ONE 0x00000001U |
| #define GPIO_DIN3_0_DIO0_ZERO 0x00000000U |
| #define GPIO_DIN7_4_DIO7 0x01000000U |
| #define GPIO_DIN7_4_DIO7_M 0x01000000U |
| #define GPIO_DIN7_4_DIO7_S 24U |
| #define GPIO_DIN7_4_DIO7_ONE 0x01000000U |
| #define GPIO_DIN7_4_DIO7_ZERO 0x00000000U |
| #define GPIO_DIN7_4_DIO6 0x00010000U |
| #define GPIO_DIN7_4_DIO6_M 0x00010000U |
| #define GPIO_DIN7_4_DIO6_S 16U |
| #define GPIO_DIN7_4_DIO6_ONE 0x00010000U |
| #define GPIO_DIN7_4_DIO6_ZERO 0x00000000U |
| #define GPIO_DIN7_4_DIO5 0x00000100U |
| #define GPIO_DIN7_4_DIO5_M 0x00000100U |
| #define GPIO_DIN7_4_DIO5_S 8U |
| #define GPIO_DIN7_4_DIO5_ONE 0x00000100U |
| #define GPIO_DIN7_4_DIO5_ZERO 0x00000000U |
| #define GPIO_DIN7_4_DIO4 0x00000001U |
| #define GPIO_DIN7_4_DIO4_M 0x00000001U |
| #define GPIO_DIN7_4_DIO4_S 0U |
| #define GPIO_DIN7_4_DIO4_ONE 0x00000001U |
| #define GPIO_DIN7_4_DIO4_ZERO 0x00000000U |
| #define GPIO_DIN11_8_DIO11 0x01000000U |
| #define GPIO_DIN11_8_DIO11_M 0x01000000U |
| #define GPIO_DIN11_8_DIO11_S 24U |
| #define GPIO_DIN11_8_DIO11_ONE 0x01000000U |
| #define GPIO_DIN11_8_DIO11_ZERO 0x00000000U |
| #define GPIO_DIN11_8_DIO10 0x00010000U |
| #define GPIO_DIN11_8_DIO10_M 0x00010000U |
| #define GPIO_DIN11_8_DIO10_S 16U |
| #define GPIO_DIN11_8_DIO10_ONE 0x00010000U |
| #define GPIO_DIN11_8_DIO10_ZERO 0x00000000U |
| #define GPIO_DIN11_8_DIO9 0x00000100U |
| #define GPIO_DIN11_8_DIO9_M 0x00000100U |
| #define GPIO_DIN11_8_DIO9_S 8U |
| #define GPIO_DIN11_8_DIO9_ONE 0x00000100U |
| #define GPIO_DIN11_8_DIO9_ZERO 0x00000000U |
| #define GPIO_DIN11_8_DIO8 0x00000001U |
| #define GPIO_DIN11_8_DIO8_M 0x00000001U |
| #define GPIO_DIN11_8_DIO8_S 0U |
| #define GPIO_DIN11_8_DIO8_ONE 0x00000001U |
| #define GPIO_DIN11_8_DIO8_ZERO 0x00000000U |
| #define GPIO_DIN15_12_DIO15 0x01000000U |
| #define GPIO_DIN15_12_DIO15_M 0x01000000U |
| #define GPIO_DIN15_12_DIO15_S 24U |
| #define GPIO_DIN15_12_DIO15_ONE 0x01000000U |
| #define GPIO_DIN15_12_DIO15_ZERO 0x00000000U |
| #define GPIO_DIN15_12_DIO14 0x00010000U |
| #define GPIO_DIN15_12_DIO14_M 0x00010000U |
| #define GPIO_DIN15_12_DIO14_S 16U |
| #define GPIO_DIN15_12_DIO14_ONE 0x00010000U |
| #define GPIO_DIN15_12_DIO14_ZERO 0x00000000U |
| #define GPIO_DIN15_12_DIO13 0x00000100U |
| #define GPIO_DIN15_12_DIO13_M 0x00000100U |
| #define GPIO_DIN15_12_DIO13_S 8U |
| #define GPIO_DIN15_12_DIO13_ONE 0x00000100U |
| #define GPIO_DIN15_12_DIO13_ZERO 0x00000000U |
| #define GPIO_DIN15_12_DIO12 0x00000001U |
| #define GPIO_DIN15_12_DIO12_M 0x00000001U |
| #define GPIO_DIN15_12_DIO12_S 0U |
| #define GPIO_DIN15_12_DIO12_ONE 0x00000001U |
| #define GPIO_DIN15_12_DIO12_ZERO 0x00000000U |
| #define GPIO_DIN19_16_DIO19 0x01000000U |
| #define GPIO_DIN19_16_DIO19_M 0x01000000U |
| #define GPIO_DIN19_16_DIO19_S 24U |
| #define GPIO_DIN19_16_DIO19_ONE 0x01000000U |
| #define GPIO_DIN19_16_DIO19_ZERO 0x00000000U |
| #define GPIO_DIN19_16_DIO18 0x00010000U |
| #define GPIO_DIN19_16_DIO18_M 0x00010000U |
| #define GPIO_DIN19_16_DIO18_S 16U |
| #define GPIO_DIN19_16_DIO18_ONE 0x00010000U |
| #define GPIO_DIN19_16_DIO18_ZERO 0x00000000U |
| #define GPIO_DIN19_16_DIO17 0x00000100U |
| #define GPIO_DIN19_16_DIO17_M 0x00000100U |
| #define GPIO_DIN19_16_DIO17_S 8U |
| #define GPIO_DIN19_16_DIO17_ONE 0x00000100U |
| #define GPIO_DIN19_16_DIO17_ZERO 0x00000000U |
| #define GPIO_DIN19_16_DIO16 0x00000001U |
| #define GPIO_DIN19_16_DIO16_M 0x00000001U |
| #define GPIO_DIN19_16_DIO16_S 0U |
| #define GPIO_DIN19_16_DIO16_ONE 0x00000001U |
| #define GPIO_DIN19_16_DIO16_ZERO 0x00000000U |
| #define GPIO_DIN23_20_DIO23 0x01000000U |
| #define GPIO_DIN23_20_DIO23_M 0x01000000U |
| #define GPIO_DIN23_20_DIO23_S 24U |
| #define GPIO_DIN23_20_DIO23_ONE 0x01000000U |
| #define GPIO_DIN23_20_DIO23_ZERO 0x00000000U |
| #define GPIO_DIN23_20_DIO22 0x00010000U |
| #define GPIO_DIN23_20_DIO22_M 0x00010000U |
| #define GPIO_DIN23_20_DIO22_S 16U |
| #define GPIO_DIN23_20_DIO22_ONE 0x00010000U |
| #define GPIO_DIN23_20_DIO22_ZERO 0x00000000U |
| #define GPIO_DIN23_20_DIO21 0x00000100U |
| #define GPIO_DIN23_20_DIO21_M 0x00000100U |
| #define GPIO_DIN23_20_DIO21_S 8U |
| #define GPIO_DIN23_20_DIO21_ONE 0x00000100U |
| #define GPIO_DIN23_20_DIO21_ZERO 0x00000000U |
| #define GPIO_DIN23_20_DIO20 0x00000001U |
| #define GPIO_DIN23_20_DIO20_M 0x00000001U |
| #define GPIO_DIN23_20_DIO20_S 0U |
| #define GPIO_DIN23_20_DIO20_ONE 0x00000001U |
| #define GPIO_DIN23_20_DIO20_ZERO 0x00000000U |
| #define GPIO_DIN27_24_DIO25 0x00000100U |
| #define GPIO_DIN27_24_DIO25_M 0x00000100U |
| #define GPIO_DIN27_24_DIO25_S 8U |
| #define GPIO_DIN27_24_DIO25_ONE 0x00000100U |
| #define GPIO_DIN27_24_DIO25_ZERO 0x00000000U |
| #define GPIO_DIN27_24_DIO24 0x00000001U |
| #define GPIO_DIN27_24_DIO24_M 0x00000001U |
| #define GPIO_DIN27_24_DIO24_S 0U |
| #define GPIO_DIN27_24_DIO24_ONE 0x00000001U |
| #define GPIO_DIN27_24_DIO24_ZERO 0x00000000U |
| #define GPIO_DIN31_0_DIO25 0x02000000U |
| #define GPIO_DIN31_0_DIO25_M 0x02000000U |
| #define GPIO_DIN31_0_DIO25_S 25U |
| #define GPIO_DIN31_0_DIO25_ONE 0x02000000U |
| #define GPIO_DIN31_0_DIO25_ZERO 0x00000000U |
| #define GPIO_DIN31_0_DIO24 0x01000000U |
| #define GPIO_DIN31_0_DIO24_M 0x01000000U |
| #define GPIO_DIN31_0_DIO24_S 24U |
| #define GPIO_DIN31_0_DIO24_ONE 0x01000000U |
| #define GPIO_DIN31_0_DIO24_ZERO 0x00000000U |
| #define GPIO_DIN31_0_DIO23 0x00800000U |
| #define GPIO_DIN31_0_DIO23_M 0x00800000U |
| #define GPIO_DIN31_0_DIO23_S 23U |
| #define GPIO_DIN31_0_DIO23_ONE 0x00800000U |
| #define GPIO_DIN31_0_DIO23_ZERO 0x00000000U |
| #define GPIO_DIN31_0_DIO22 0x00400000U |
| #define GPIO_DIN31_0_DIO22_M 0x00400000U |
| #define GPIO_DIN31_0_DIO22_S 22U |
| #define GPIO_DIN31_0_DIO22_ONE 0x00400000U |
| #define GPIO_DIN31_0_DIO22_ZERO 0x00000000U |
| #define GPIO_DIN31_0_DIO21 0x00200000U |
| #define GPIO_DIN31_0_DIO21_M 0x00200000U |
| #define GPIO_DIN31_0_DIO21_S 21U |
| #define GPIO_DIN31_0_DIO21_ONE 0x00200000U |
| #define GPIO_DIN31_0_DIO21_ZERO 0x00000000U |
| #define GPIO_DIN31_0_DIO20 0x00100000U |
| #define GPIO_DIN31_0_DIO20_M 0x00100000U |
| #define GPIO_DIN31_0_DIO20_S 20U |
| #define GPIO_DIN31_0_DIO20_ONE 0x00100000U |
| #define GPIO_DIN31_0_DIO20_ZERO 0x00000000U |
| #define GPIO_DIN31_0_DIO19 0x00080000U |
| #define GPIO_DIN31_0_DIO19_M 0x00080000U |
| #define GPIO_DIN31_0_DIO19_S 19U |
| #define GPIO_DIN31_0_DIO19_ONE 0x00080000U |
| #define GPIO_DIN31_0_DIO19_ZERO 0x00000000U |
| #define GPIO_DIN31_0_DIO18 0x00040000U |
| #define GPIO_DIN31_0_DIO18_M 0x00040000U |
| #define GPIO_DIN31_0_DIO18_S 18U |
| #define GPIO_DIN31_0_DIO18_ONE 0x00040000U |
| #define GPIO_DIN31_0_DIO18_ZERO 0x00000000U |
| #define GPIO_DIN31_0_DIO17 0x00020000U |
| #define GPIO_DIN31_0_DIO17_M 0x00020000U |
| #define GPIO_DIN31_0_DIO17_S 17U |
| #define GPIO_DIN31_0_DIO17_ONE 0x00020000U |
| #define GPIO_DIN31_0_DIO17_ZERO 0x00000000U |
| #define GPIO_DIN31_0_DIO16 0x00010000U |
| #define GPIO_DIN31_0_DIO16_M 0x00010000U |
| #define GPIO_DIN31_0_DIO16_S 16U |
| #define GPIO_DIN31_0_DIO16_ONE 0x00010000U |
| #define GPIO_DIN31_0_DIO16_ZERO 0x00000000U |
| #define GPIO_DIN31_0_DIO15 0x00008000U |
| #define GPIO_DIN31_0_DIO15_M 0x00008000U |
| #define GPIO_DIN31_0_DIO15_S 15U |
| #define GPIO_DIN31_0_DIO15_ONE 0x00008000U |
| #define GPIO_DIN31_0_DIO15_ZERO 0x00000000U |
| #define GPIO_DIN31_0_DIO14 0x00004000U |
| #define GPIO_DIN31_0_DIO14_M 0x00004000U |
| #define GPIO_DIN31_0_DIO14_S 14U |
| #define GPIO_DIN31_0_DIO14_ONE 0x00004000U |
| #define GPIO_DIN31_0_DIO14_ZERO 0x00000000U |
| #define GPIO_DIN31_0_DIO13 0x00002000U |
| #define GPIO_DIN31_0_DIO13_M 0x00002000U |
| #define GPIO_DIN31_0_DIO13_S 13U |
| #define GPIO_DIN31_0_DIO13_ONE 0x00002000U |
| #define GPIO_DIN31_0_DIO13_ZERO 0x00000000U |
| #define GPIO_DIN31_0_DIO12 0x00001000U |
| #define GPIO_DIN31_0_DIO12_M 0x00001000U |
| #define GPIO_DIN31_0_DIO12_S 12U |
| #define GPIO_DIN31_0_DIO12_ONE 0x00001000U |
| #define GPIO_DIN31_0_DIO12_ZERO 0x00000000U |
| #define GPIO_DIN31_0_DIO11 0x00000800U |
| #define GPIO_DIN31_0_DIO11_M 0x00000800U |
| #define GPIO_DIN31_0_DIO11_S 11U |
| #define GPIO_DIN31_0_DIO11_ONE 0x00000800U |
| #define GPIO_DIN31_0_DIO11_ZERO 0x00000000U |
| #define GPIO_DIN31_0_DIO10 0x00000400U |
| #define GPIO_DIN31_0_DIO10_M 0x00000400U |
| #define GPIO_DIN31_0_DIO10_S 10U |
| #define GPIO_DIN31_0_DIO10_ONE 0x00000400U |
| #define GPIO_DIN31_0_DIO10_ZERO 0x00000000U |
| #define GPIO_DIN31_0_DIO9 0x00000200U |
| #define GPIO_DIN31_0_DIO9_M 0x00000200U |
| #define GPIO_DIN31_0_DIO9_S 9U |
| #define GPIO_DIN31_0_DIO9_ONE 0x00000200U |
| #define GPIO_DIN31_0_DIO9_ZERO 0x00000000U |
| #define GPIO_DIN31_0_DIO8 0x00000100U |
| #define GPIO_DIN31_0_DIO8_M 0x00000100U |
| #define GPIO_DIN31_0_DIO8_S 8U |
| #define GPIO_DIN31_0_DIO8_ONE 0x00000100U |
| #define GPIO_DIN31_0_DIO8_ZERO 0x00000000U |
| #define GPIO_DIN31_0_DIO7 0x00000080U |
| #define GPIO_DIN31_0_DIO7_M 0x00000080U |
| #define GPIO_DIN31_0_DIO7_S 7U |
| #define GPIO_DIN31_0_DIO7_ONE 0x00000080U |
| #define GPIO_DIN31_0_DIO7_ZERO 0x00000000U |
| #define GPIO_DIN31_0_DIO6 0x00000040U |
| #define GPIO_DIN31_0_DIO6_M 0x00000040U |
| #define GPIO_DIN31_0_DIO6_S 6U |
| #define GPIO_DIN31_0_DIO6_ONE 0x00000040U |
| #define GPIO_DIN31_0_DIO6_ZERO 0x00000000U |
| #define GPIO_DIN31_0_DIO5 0x00000020U |
| #define GPIO_DIN31_0_DIO5_M 0x00000020U |
| #define GPIO_DIN31_0_DIO5_S 5U |
| #define GPIO_DIN31_0_DIO5_ONE 0x00000020U |
| #define GPIO_DIN31_0_DIO5_ZERO 0x00000000U |
| #define GPIO_DIN31_0_DIO4 0x00000010U |
| #define GPIO_DIN31_0_DIO4_M 0x00000010U |
| #define GPIO_DIN31_0_DIO4_S 4U |
| #define GPIO_DIN31_0_DIO4_ONE 0x00000010U |
| #define GPIO_DIN31_0_DIO4_ZERO 0x00000000U |
| #define GPIO_DIN31_0_DIO3 0x00000008U |
| #define GPIO_DIN31_0_DIO3_M 0x00000008U |
| #define GPIO_DIN31_0_DIO3_S 3U |
| #define GPIO_DIN31_0_DIO3_ONE 0x00000008U |
| #define GPIO_DIN31_0_DIO3_ZERO 0x00000000U |
| #define GPIO_DIN31_0_DIO2 0x00000004U |
| #define GPIO_DIN31_0_DIO2_M 0x00000004U |
| #define GPIO_DIN31_0_DIO2_S 2U |
| #define GPIO_DIN31_0_DIO2_ONE 0x00000004U |
| #define GPIO_DIN31_0_DIO2_ZERO 0x00000000U |
| #define GPIO_DIN31_0_DIO1 0x00000002U |
| #define GPIO_DIN31_0_DIO1_M 0x00000002U |
| #define GPIO_DIN31_0_DIO1_S 1U |
| #define GPIO_DIN31_0_DIO1_ONE 0x00000002U |
| #define GPIO_DIN31_0_DIO1_ZERO 0x00000000U |
| #define GPIO_DIN31_0_DIO0 0x00000001U |
| #define GPIO_DIN31_0_DIO0_M 0x00000001U |
| #define GPIO_DIN31_0_DIO0_S 0U |
| #define GPIO_DIN31_0_DIO0_ONE 0x00000001U |
| #define GPIO_DIN31_0_DIO0_ZERO 0x00000000U |
| #define GPIO_EVTCFG_EVTEN 0x00000100U |
| #define GPIO_EVTCFG_EVTEN_M 0x00000100U |
| #define GPIO_EVTCFG_EVTEN_S 8U |
| #define GPIO_EVTCFG_EVTEN_EN 0x00000100U |
| #define GPIO_EVTCFG_EVTEN_DIS 0x00000000U |
| #define GPIO_EVTCFG_DIOSEL_W 6U |
| #define GPIO_EVTCFG_DIOSEL_M 0x0000003FU |
| #define GPIO_EVTCFG_DIOSEL_S 0U |
| #define GPIO_EVTCFG_DIOSEL_MAXIMUM 0x0000003FU |
| #define GPIO_EVTCFG_DIOSEL_MINIMUM 0x00000000U |