Macros
#define	DCB_O_DFSR 0x00000000U

#define	DCB_O_DHCSR 0x000000C0U

#define	DCB_O_DCRSR 0x000000C4U

#define	DCB_O_DCRDR 0x000000C8U

#define	DCB_O_DEMCR 0x000000CCU

#define	DCB_DFSR_EXTERNAL 0x00000010U

#define	DCB_DFSR_EXTERNAL_M 0x00000010U

#define	DCB_DFSR_EXTERNAL_S 4U

#define	DCB_DFSR_VCATCH 0x00000008U

#define	DCB_DFSR_VCATCH_M 0x00000008U

#define	DCB_DFSR_VCATCH_S 3U

#define	DCB_DFSR_DWTRAP 0x00000004U

#define	DCB_DFSR_DWTRAP_M 0x00000004U

#define	DCB_DFSR_DWTRAP_S 2U

#define	DCB_DFSR_BKPT 0x00000002U

#define	DCB_DFSR_BKPT_M 0x00000002U

#define	DCB_DFSR_BKPT_S 1U

#define	DCB_DFSR_HALTED 0x00000001U

#define	DCB_DFSR_HALTED_M 0x00000001U

#define	DCB_DFSR_HALTED_S 0U

#define	DCB_DHCSR_S_RESET_ST 0x02000000U

#define	DCB_DHCSR_S_RESET_ST_M 0x02000000U

#define	DCB_DHCSR_S_RESET_ST_S 25U

#define	DCB_DHCSR_S_RETIRE_ST 0x01000000U

#define	DCB_DHCSR_S_RETIRE_ST_M 0x01000000U

#define	DCB_DHCSR_S_RETIRE_ST_S 24U

#define	DCB_DHCSR_S_HALT 0x00020000U

#define	DCB_DHCSR_S_HALT_M 0x00020000U

#define	DCB_DHCSR_S_HALT_S 17U

#define	DCB_DHCSR_S_REGRDY 0x00010000U

#define	DCB_DHCSR_S_REGRDY_M 0x00010000U

#define	DCB_DHCSR_S_REGRDY_S 16U

#define	DCB_DHCSR_C_MASKINTS 0x00000008U

#define	DCB_DHCSR_C_MASKINTS_M 0x00000008U

#define	DCB_DHCSR_C_MASKINTS_S 3U

#define	DCB_DHCSR_C_STEP 0x00000004U

#define	DCB_DHCSR_C_STEP_M 0x00000004U

#define	DCB_DHCSR_C_STEP_S 2U

#define	DCB_DHCSR_C_HALT 0x00000002U

#define	DCB_DHCSR_C_HALT_M 0x00000002U

#define	DCB_DHCSR_C_HALT_S 1U

#define	DCB_DHCSR_C_DEBUGEN 0x00000001U

#define	DCB_DHCSR_C_DEBUGEN_M 0x00000001U

#define	DCB_DHCSR_C_DEBUGEN_S 0U

#define	DCB_DHCSR_C_DEBUGEN_DBG_EN 0x00000001U

#define	DCB_DHCSR_C_DEBUGEN_DBG_DIS 0x00000000U

#define	DCB_DCRSR_REGWNR 0x00010000U

#define	DCB_DCRSR_REGWNR_M 0x00010000U

#define	DCB_DCRSR_REGWNR_S 16U

#define	DCB_DCRSR_REGSEL_W 5U

#define	DCB_DCRSR_REGSEL_M 0x0000001FU

#define	DCB_DCRSR_REGSEL_S 0U

#define	DCB_DCRDR_DBGTMP_W 32U

#define	DCB_DCRDR_DBGTMP_M 0xFFFFFFFFU

#define	DCB_DCRDR_DBGTMP_S 0U

#define	DCB_DEMCR_DWTENA 0x01000000U

#define	DCB_DEMCR_DWTENA_M 0x01000000U

#define	DCB_DEMCR_DWTENA_S 24U

#define	DCB_DEMCR_VC_HARDERR 0x00000400U

#define	DCB_DEMCR_VC_HARDERR_M 0x00000400U

#define	DCB_DEMCR_VC_HARDERR_S 10U

#define	DCB_DEMCR_VC_CORERESET 0x00000001U

#define	DCB_DEMCR_VC_CORERESET_M 0x00000001U

#define	DCB_DEMCR_VC_CORERESET_S 0U

Macro Definition Documentation

§ DCB_O_DFSR

#define DCB_O_DFSR 0x00000000U

§ DCB_O_DHCSR

#define DCB_O_DHCSR 0x000000C0U

§ DCB_O_DCRSR

#define DCB_O_DCRSR 0x000000C4U

§ DCB_O_DCRDR

#define DCB_O_DCRDR 0x000000C8U

§ DCB_O_DEMCR

#define DCB_O_DEMCR 0x000000CCU

§ DCB_DFSR_EXTERNAL

#define DCB_DFSR_EXTERNAL 0x00000010U

§ DCB_DFSR_EXTERNAL_M

#define DCB_DFSR_EXTERNAL_M 0x00000010U

§ DCB_DFSR_EXTERNAL_S

#define DCB_DFSR_EXTERNAL_S 4U

§ DCB_DFSR_VCATCH

#define DCB_DFSR_VCATCH 0x00000008U

§ DCB_DFSR_VCATCH_M

#define DCB_DFSR_VCATCH_M 0x00000008U

§ DCB_DFSR_VCATCH_S

#define DCB_DFSR_VCATCH_S 3U

§ DCB_DFSR_DWTRAP

#define DCB_DFSR_DWTRAP 0x00000004U

§ DCB_DFSR_DWTRAP_M

#define DCB_DFSR_DWTRAP_M 0x00000004U

§ DCB_DFSR_DWTRAP_S

#define DCB_DFSR_DWTRAP_S 2U

§ DCB_DFSR_BKPT

#define DCB_DFSR_BKPT 0x00000002U

§ DCB_DFSR_BKPT_M

#define DCB_DFSR_BKPT_M 0x00000002U

§ DCB_DFSR_BKPT_S

#define DCB_DFSR_BKPT_S 1U

§ DCB_DFSR_HALTED

#define DCB_DFSR_HALTED 0x00000001U

§ DCB_DFSR_HALTED_M

#define DCB_DFSR_HALTED_M 0x00000001U

§ DCB_DFSR_HALTED_S

#define DCB_DFSR_HALTED_S 0U

§ DCB_DHCSR_S_RESET_ST

#define DCB_DHCSR_S_RESET_ST 0x02000000U

§ DCB_DHCSR_S_RESET_ST_M

#define DCB_DHCSR_S_RESET_ST_M 0x02000000U

§ DCB_DHCSR_S_RESET_ST_S

#define DCB_DHCSR_S_RESET_ST_S 25U

§ DCB_DHCSR_S_RETIRE_ST

#define DCB_DHCSR_S_RETIRE_ST 0x01000000U

§ DCB_DHCSR_S_RETIRE_ST_M

#define DCB_DHCSR_S_RETIRE_ST_M 0x01000000U

§ DCB_DHCSR_S_RETIRE_ST_S

#define DCB_DHCSR_S_RETIRE_ST_S 24U

§ DCB_DHCSR_S_HALT

#define DCB_DHCSR_S_HALT 0x00020000U

§ DCB_DHCSR_S_HALT_M

#define DCB_DHCSR_S_HALT_M 0x00020000U

§ DCB_DHCSR_S_HALT_S

#define DCB_DHCSR_S_HALT_S 17U

§ DCB_DHCSR_S_REGRDY

#define DCB_DHCSR_S_REGRDY 0x00010000U

§ DCB_DHCSR_S_REGRDY_M

#define DCB_DHCSR_S_REGRDY_M 0x00010000U

§ DCB_DHCSR_S_REGRDY_S

#define DCB_DHCSR_S_REGRDY_S 16U

§ DCB_DHCSR_C_MASKINTS

#define DCB_DHCSR_C_MASKINTS 0x00000008U

§ DCB_DHCSR_C_MASKINTS_M

#define DCB_DHCSR_C_MASKINTS_M 0x00000008U

§ DCB_DHCSR_C_MASKINTS_S

#define DCB_DHCSR_C_MASKINTS_S 3U

§ DCB_DHCSR_C_STEP

#define DCB_DHCSR_C_STEP 0x00000004U

§ DCB_DHCSR_C_STEP_M

#define DCB_DHCSR_C_STEP_M 0x00000004U

§ DCB_DHCSR_C_STEP_S

#define DCB_DHCSR_C_STEP_S 2U

§ DCB_DHCSR_C_HALT

#define DCB_DHCSR_C_HALT 0x00000002U

§ DCB_DHCSR_C_HALT_M

#define DCB_DHCSR_C_HALT_M 0x00000002U

§ DCB_DHCSR_C_HALT_S

#define DCB_DHCSR_C_HALT_S 1U

§ DCB_DHCSR_C_DEBUGEN

#define DCB_DHCSR_C_DEBUGEN 0x00000001U

§ DCB_DHCSR_C_DEBUGEN_M

#define DCB_DHCSR_C_DEBUGEN_M 0x00000001U

§ DCB_DHCSR_C_DEBUGEN_S

#define DCB_DHCSR_C_DEBUGEN_S 0U

§ DCB_DHCSR_C_DEBUGEN_DBG_EN

#define DCB_DHCSR_C_DEBUGEN_DBG_EN 0x00000001U

§ DCB_DHCSR_C_DEBUGEN_DBG_DIS

#define DCB_DHCSR_C_DEBUGEN_DBG_DIS 0x00000000U

§ DCB_DCRSR_REGWNR

#define DCB_DCRSR_REGWNR 0x00010000U

§ DCB_DCRSR_REGWNR_M

#define DCB_DCRSR_REGWNR_M 0x00010000U

§ DCB_DCRSR_REGWNR_S

#define DCB_DCRSR_REGWNR_S 16U

§ DCB_DCRSR_REGSEL_W

#define DCB_DCRSR_REGSEL_W 5U

§ DCB_DCRSR_REGSEL_M

#define DCB_DCRSR_REGSEL_M 0x0000001FU

§ DCB_DCRSR_REGSEL_S

#define DCB_DCRSR_REGSEL_S 0U

§ DCB_DCRDR_DBGTMP_W

#define DCB_DCRDR_DBGTMP_W 32U

§ DCB_DCRDR_DBGTMP_M

#define DCB_DCRDR_DBGTMP_M 0xFFFFFFFFU

§ DCB_DCRDR_DBGTMP_S

#define DCB_DCRDR_DBGTMP_S 0U

§ DCB_DEMCR_DWTENA

#define DCB_DEMCR_DWTENA 0x01000000U

§ DCB_DEMCR_DWTENA_M

#define DCB_DEMCR_DWTENA_M 0x01000000U

§ DCB_DEMCR_DWTENA_S

#define DCB_DEMCR_DWTENA_S 24U

§ DCB_DEMCR_VC_HARDERR

#define DCB_DEMCR_VC_HARDERR 0x00000400U

§ DCB_DEMCR_VC_HARDERR_M

#define DCB_DEMCR_VC_HARDERR_M 0x00000400U

§ DCB_DEMCR_VC_HARDERR_S

#define DCB_DEMCR_VC_HARDERR_S 10U

§ DCB_DEMCR_VC_CORERESET

#define DCB_DEMCR_VC_CORERESET 0x00000001U

§ DCB_DEMCR_VC_CORERESET_M

#define DCB_DEMCR_VC_CORERESET_M 0x00000001U

§ DCB_DEMCR_VC_CORERESET_S

#define DCB_DEMCR_VC_CORERESET_S 0U

Macros