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MCUSW Documentation
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This application demonstrates execute-in-place (XIP) feature provided by Octal SPI flash controller on J721E/AM65xx SoC. The application performs following actions:
This facilitates an early CAN response feature, typically required in an automotive ECU.
This application depends on multiple components and are detailed in sections below
This application depends on Secondary Boot Loader (SBL) component from Processor SDK RTOS.
We need have the following bianries built from processor_sdk_rtos_am65xx_xx.yy.xx.bb:
Apart from the above binaries, we need to build the can_boot_app that runs from OSPI flash in XIP mode, and does the following:
Go to processor_sdk_rtos_am65xx_xx.yy.xx.bb/pdk_am65xx_$version/packages/ti/build and run the following:
make BOARD=am65xx_evm SOC=am65xx sbl_cust_img
Go to processor_sdk_rtos_am65xx_xx.yy.xx.bb/pdk_am65xx_$version/packages/ti/build and run the following:
make BOARD=am65xx_evm SOC=am65xx sbl_boot_xip_entry
Go to processor_sdk_rtos_am65xx_xx.yy.xx.bb/pdk_am65xx_$version/packages/ti/build and run the following:
make BOARD=am65xx_evm SOC=am65xx CORE=mpu1_0 sbl_boot_test
Go to processor_sdk_rtos_am65xx_xx.yy.xx.bb/mcusw_xx.yy.xx.bb/build and run the following:
make can_boot_app
Flash the following binaries in OSPI memory at the respective offsets (in hex) as given below:
Refer Uniflash Programming Guide to learn how to program the binaries at the respective offset in the flash.
Detail Steps to run the demo is provided at User Guide
After bootlaoding of MPU1_0 is completed, MCU1 R5F prints the profiling information from the start of SBL to the point when can_boot_app starts execution.
Below is the log from one of the runs, when CAN is configured in loop-back mode.
BOOT_APP: Sample Application - STARTS !!! CAN_APP: Sample Application - STARTS !!! CAN_APP: Variant - Pre Compile being used !!! Successfully Enabled CAN Transceiver CAN_APP: Message Id Received a0 Message Length is 64 CAN_APP: Can Controller Instance MCAN 0 Internal LoopBack Mode Test Passed CAN_APP: Message Id Received 800000b0 Message Length is 64 CAN_APP: Can Controller Instance MCAN 1 Internal LoopBack Mode Test Passed CAN_APP: CAN Test Passed!!! Configuring DDR3 DDR3 config completed MPU1_0 running Profiling info .... MCU @ 400000000Hz. cycles per usec = 400 fxn: main line: 191 cycle: 183518 timestamp: 458us fxn: main line: 196 cycle: 252023 timestamp: 630us fxn: main line: 214 cycle: 269290 timestamp: 673us fxn: main line: 218 cycle: 269363 timestamp: 673us fxn: main line: 226 cycle: 280310 timestamp: 700us fxn: main line: 231 cycle: 280357 timestamp: 700us fxn: SBL_SciClientInit line: 115 cycle: 280521 timestamp: 701us fxn: SBL_ReadSysfwImage line: 214 cycle: 280719 timestamp: 701us fxn: SBL_ReadSysfwImage line: 236 cycle: 629492 timestamp: 1573us fxn: SBL_ReadSysfwImage line: 258 cycle: 3824940 timestamp: 9562us fxn: SBL_SciClientInit line: 125 cycle: 3825052 timestamp: 9562us fxn: SBL_IsSysfwEnc line: 64 cycle: 3825393 timestamp: 9563us fxn: SBL_GetCertLen line: 170 cycle: 3825525 timestamp: 9563us fxn: SBL_GetCertLen line: 216 cycle: 3825697 timestamp: 9564us fxn: SBL_GetCertLen line: 170 cycle: 3825794 timestamp: 9564us fxn: SBL_GetCertLen line: 176 cycle: 3825875 timestamp: 9564us fxn: SBL_IsSysfwEnc line: 98 cycle: 3826055 timestamp: 9565us fxn: SBL_SciClientInit line: 131 cycle: 3826152 timestamp: 9565us fxn: SBL_SciClientInit line: 139 cycle: 10085176 timestamp: 25212us fxn: SBL_SciClientInit line: 170 cycle: 10085597 timestamp: 25213us fxn: SBL_SciClientInit line: 182 cycle: 10369897 timestamp: 25924us fxn: SBL_SciClientInit line: 185 cycle: 10371663 timestamp: 25929us fxn: SBL_SciClientInit line: 197 cycle: 17294953 timestamp: 43237us fxn: SBL_SciClientInit line: 206 cycle: 17310369 timestamp: 43275us fxn: SBL_SciClientInit line: 216 cycle: 18979968 timestamp: 47449us fxn: SBL_SciClientInit line: 226 cycle: 19139313 timestamp: 47848us fxn: SBL_SciClientInit line: 268 cycle: 19223148 timestamp: 48057us fxn: main line: 236 cycle: 19223251 timestamp: 48058us fxn: main line: 240 cycle: 19223291 timestamp: 48058us fxn: main line: 247 cycle: 35416933 timestamp: 88542us fxn: SBL_ImageCopy line: 313 cycle: 35475927 timestamp: 88689us fxn: SBL_RequestAllCores line: 210 cycle: 35476066 timestamp: 88690us fxn: SBL_RequestAllCores line: 226 cycle: 35622359 timestamp: 89055us fxn: SBL_ImageCopy line: 322 cycle: 35622438 timestamp: 89056us fxn: SBL_ospiInit line: 267 cycle: 35622648 timestamp: 89056us fxn: SBL_ospiInit line: 272 cycle: 35625516 timestamp: 89063us fxn: SBL_ospiInit line: 320 cycle: 36004740 timestamp: 90011us fxn: SBL_VerifyMulticoreImage line: 328 cycle: 36005176 timestamp: 90012us fxn: SBL_ospiFlashRead line: 328 cycle: 36005468 timestamp: 90013us fxn: SBL_ospiFlashRead line: 364 cycle: 36005786 timestamp: 90014us fxn: SBL_GetCertLen line: 170 cycle: 36005936 timestamp: 90014us fxn: SBL_GetCertLen line: 176 cycle: 36005980 timestamp: 90014us fxn: SBL_IsSysfwEnc line: 64 cycle: 36006352 timestamp: 90015us fxn: SBL_IsSysfwEnc line: 98 cycle: 36006446 timestamp: 90016us fxn: SBL_VerifyMulticoreImage line: 422 cycle: 36006537 timestamp: 90016us fxn: SBL_ospiFlashRead line: 328 cycle: 36006614 timestamp: 90016us fxn: SBL_ospiFlashRead line: 364 cycle: 36006708 timestamp: 90016us fxn: SBL_ospiFlashRead line: 328 cycle: 36006949 timestamp: 90017us fxn: SBL_ospiFlashRead line: 364 cycle: 36007061 timestamp: 90017us fxn: SBL_ospiFlashRead line: 328 cycle: 36007199 timestamp: 90017us fxn: SBL_ospiFlashRead line: 364 cycle: 36007296 timestamp: 90018us fxn: SBL_ospiFlashRead line: 328 cycle: 36007710 timestamp: 90019us fxn: SBL_ospiFlashRead line: 364 cycle: 36007992 timestamp: 90019us fxn: SBL_SetupCoreMem line: 362 cycle: 36008260 timestamp: 90020us fxn: SBL_SetupCoreMem line: 494 cycle: 36099663 timestamp: 90249us fxn: SBL_ospiFlashRead line: 328 cycle: 36099825 timestamp: 90249us fxn: SBL_ospiFlashRead line: 364 cycle: 36100114 timestamp: 90250us fxn: SBL_ospiFlashRead line: 328 cycle: 36100256 timestamp: 90250us fxn: SBL_ospiFlashRead line: 364 cycle: 36100365 timestamp: 90250us fxn: SBL_ImageCopy line: 336 cycle: 36100750 timestamp: 90251us fxn: SBL_ReleaseAllCores line: 239 cycle: 36100791 timestamp: 90251us fxn: SBL_ReleaseAllCores line: 255 cycle: 36244403 timestamp: 90611us fxn: SBL_ImageCopy line: 341 cycle: 36244450 timestamp: 90611us fxn: SBL_SlaveCoreBoot line: 514 cycle: 36244805 timestamp: 90612us fxn: SBL_SlaveCoreBoot line: 556 cycle: 36268358 timestamp: 90670us fxn: SBL_SlaveCoreBoot line: 565 cycle: 36294831 timestamp: 90737us fxn: SBL_SlaveCoreBoot line: 571 cycle: 36347129 timestamp: 90867us fxn: SBL_SlaveCoreBoot line: 514 cycle: 36371049 timestamp: 90927us
Below is the log from one of the runs, when CAN is transmitting only
BOOT_APP: Sample Application - STARTS !!! CAN_APP: Sample Application - STARTS !!! CAN_APP: Variant - Pre Compile being used !!! CAN_APP: Successfully Enabled CAN Transceiver!!! Configuring DDR3 DDR3 config completed MPU1_0 running Profiling info .... MCU @ 400000000Hz. cycles per usec = 400 fxn: main line: 75 cycle: 183210 timestamp: 458us fxn: main line: 83 cycle: 194256 timestamp: 485us fxn: main line: 88 cycle: 194381 timestamp: 485us fxn: main line: 93 cycle: 262740 timestamp: 656us fxn: SBL_SciClientInit line: 151 cycle: 280089 timestamp: 700us fxn: SBL_ReadSysfwImage line: 210 cycle: 280260 timestamp: 700us fxn: SBL_ReadSysfwImage line: 232 cycle: 628209 timestamp: 1570us fxn: SBL_ReadSysfwImage line: 255 cycle: 3823675 timestamp: 9559us fxn: SBL_SciClientInit line: 161 cycle: 3823776 timestamp: 9559us fxn: SBL_IsSysfwEnc line: 100 cycle: 3824119 timestamp: 9560us fxn: SBL_GetCertLen line: 170 cycle: 3824291 timestamp: 9560us fxn: SBL_GetCertLen line: 216 cycle: 3824470 timestamp: 9561us fxn: SBL_GetCertLen line: 170 cycle: 3824530 timestamp: 9561us fxn: SBL_GetCertLen line: 176 cycle: 3824609 timestamp: 9561us fxn: SBL_IsSysfwEnc line: 134 cycle: 3824778 timestamp: 9561us fxn: SBL_SciClientInit line: 169 cycle: 3832257 timestamp: 9580us fxn: SBL_SciClientInit line: 177 cycle: 41115225 timestamp: 102788us fxn: SBL_SciClientInit line: 208 cycle: 41132054 timestamp: 102830us fxn: SBL_SciClientInit line: 218 cycle: 42865657 timestamp: 107164us fxn: SBL_SciClientInit line: 228 cycle: 71092320 timestamp: 177730us fxn: SBL_SciClientInit line: 238 cycle: 71262119 timestamp: 178155us fxn: SBL_SciClientInit line: 247 cycle: 77267226 timestamp: 193168us fxn: SBL_SciClientInit line: 291 cycle: 77336117 timestamp: 193340us fxn: main line: 108 cycle: 77336285 timestamp: 193340us fxn: main line: 115 cycle: 93400301 timestamp: 233500us fxn: SBL_ImageCopy line: 81 cycle: 93458545 timestamp: 233646us fxn: SBL_ospiInit line: 264 cycle: 93458769 timestamp: 233646us fxn: SBL_ospiInit line: 269 cycle: 93461635 timestamp: 233654us fxn: SBL_ospiInit line: 306 cycle: 93863821 timestamp: 234659us fxn: SBL_VerifyMulticoreImage line: 328 cycle: 93864247 timestamp: 234660us fxn: SBL_ospiFlashRead line: 314 cycle: 93864499 timestamp: 234661us fxn: SBL_ospiFlashRead line: 350 cycle: 93864773 timestamp: 234661us fxn: SBL_GetCertLen line: 170 cycle: 93864905 timestamp: 234662us fxn: SBL_GetCertLen line: 176 cycle: 93864950 timestamp: 234662us fxn: SBL_IsSysfwEnc line: 100 cycle: 93865273 timestamp: 234663us fxn: SBL_IsSysfwEnc line: 134 cycle: 93865368 timestamp: 234663us fxn: SBL_VerifyMulticoreImage line: 422 cycle: 93865462 timestamp: 234663us fxn: SBL_ospiFlashRead line: 314 cycle: 93865566 timestamp: 234663us fxn: SBL_ospiFlashRead line: 350 cycle: 93865663 timestamp: 234664us fxn: SBL_ospiFlashRead line: 314 cycle: 93865899 timestamp: 234664us fxn: SBL_ospiFlashRead line: 350 cycle: 93866000 timestamp: 234665us fxn: SBL_ospiFlashRead line: 314 cycle: 93866139 timestamp: 234665us fxn: SBL_ospiFlashRead line: 350 cycle: 93866225 timestamp: 234665us fxn: SBL_ospiFlashRead line: 314 cycle: 93866668 timestamp: 234666us fxn: SBL_ospiFlashRead line: 350 cycle: 93866956 timestamp: 234667us fxn: SBL_ospiFlashRead line: 314 cycle: 93867174 timestamp: 234667us fxn: SBL_ospiFlashRead line: 350 cycle: 93867454 timestamp: 234668us fxn: SBL_ospiFlashRead line: 314 cycle: 93867604 timestamp: 234669us fxn: SBL_ospiFlashRead line: 350 cycle: 93867702 timestamp: 234669us fxn: SBL_ImageCopy line: 97 cycle: 93868154 timestamp: 234670us fxn: SBL_SlaveCoreBoot line: 231 cycle: 93868967 timestamp: 234672us fxn: SBL_SlaveCoreBoot line: 231 cycle: 94049634 timestamp: 235124us
Revision | Date | Author | Description | Status |
---|---|---|---|---|
0.1 | 16 Apr 2019 | Somnath | Initial Version | Approved |
0.2 | 8 Aug 2019 | Sunil M S | Updates logs for release 00.09.01 | Approved |