MCUSW
Spi.h
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62 
116 /* Design : SPI_DesignId_001, SPI_DesignId_002, SPI_DesignId_005,
117  * SPI_DesignId_006, SPI_DesignId_024, SPI_DesignId_008 */
118 /*
119  * Below are the global requirements which are met by this SPI handler
120  * driver which can't be mapped to a particular source ID
121  */
122 /*
123  * Requirements : MCAL-1237, MCAL-1241, MCAL-1242, MCAL-1243,
124  * MCAL-1263, MCAL-1273, MCAL-1274, MCAL-1280,
125  * MCAL-1295, MCAL-1498, MCAL-1505, MCAL-1296,
126  * MCAL-1266, MCAL-1267, MCAL-1329, MCAL-1268
127  * MCAL-981, MCAL-4482, MCAL-4474
128  */
129 
130 /*
131  * Below are the SPI's module environment requirements which can't be mapped
132  * to this driver.
133  */
134 /* Design : SPI_DesignId_023 */
135 /*
136  * Requirements : MCAL-1446, MCAL-1456, MCAL-1461, MCAL-1238,
137  * MCAL-1429, MCAL-1501, MCAL-1479, MCAL-1271,
138  * MCAL-1270
139  */
140 
141 #ifndef SPI_H_
142 #define SPI_H_
143 
144 /* ========================================================================== */
145 /* Include Files */
146 /* ========================================================================== */
147 
148 #include "Std_Types.h"
149 #include "Spi_Cfg.h"
150 #include "Spi_Irq.h"
151 
152 #ifdef __cplusplus
153 extern "C"
154 {
155 #endif
156 
157 /* ========================================================================== */
158 /* Macros & Typedefs */
159 /* ========================================================================== */
160 
168 #define SPI_SW_MAJOR_VERSION (1U)
169 
170 #define SPI_SW_MINOR_VERSION (2U)
171 
172 #define SPI_SW_PATCH_VERSION (1U)
173 /* @} */
174 
182 #define SPI_AR_RELEASE_MAJOR_VERSION (4U)
183 
184 #define SPI_AR_RELEASE_MINOR_VERSION (3U)
185 
186 #define SPI_AR_RELEASE_REVISION_VERSION (1U)
187 /* @} */
188 
194 #define SPI_VENDOR_ID ((uint16) 44U)
195 
196 #define SPI_MODULE_ID ((uint16) 83U)
197 
198 #define SPI_INSTANCE_ID ((uint8) 0U)
199 /* @} */
200 
206 #define SPI_UNIT_MCU_MCSPI0 ((Spi_HWUnitType) CSIB0)
207 
208 #define SPI_UNIT_MCU_MCSPI1 ((Spi_HWUnitType) CSIB1)
209 
210 #define SPI_UNIT_MCU_MCSPI2 ((Spi_HWUnitType) CSIB2)
211 
212 #define SPI_UNIT_MCSPI0 ((Spi_HWUnitType) CSIB3)
213 
214 #define SPI_UNIT_MCSPI1 ((Spi_HWUnitType) CSIB4)
215 
216 #define SPI_UNIT_MCSPI2 ((Spi_HWUnitType) CSIB5)
217 
218 #define SPI_UNIT_MCSPI3 ((Spi_HWUnitType) CSIB6)
219 #if defined (SOC_J721E)
220 
221 #define SPI_UNIT_MCSPI4 ((Spi_HWUnitType) CSIB7)
222 
223 #define SPI_UNIT_MCSPI5 ((Spi_HWUnitType) CSIB8)
224 
225 #define SPI_UNIT_MCSPI6 ((Spi_HWUnitType) CSIB9)
226 
227 #define SPI_UNIT_MCSPI7 ((Spi_HWUnitType) CSIB10)
228 #endif
229 /* @} */
230 
235 #if defined (SOC_AM65XX)
236 #define SPI_HW_UNIT_CNT (7U)
237 #elif defined (SOC_J721E)
238 #define SPI_HW_UNIT_CNT (11U)
239 #endif
240 
246 #define SPI_IB (0U)
247 
248 #define SPI_EB (1U)
249 
250 #define SPI_IB_EB (2U)
251 /* @} */
252 
253 
255 /* Requirements : MCAL-1363, MCAL-1364, MCAL-1365 */
256 typedef uint8 Spi_DataBufferType;
261 /* Requirements : MCAL-1366, MCAL-1367 */
262 typedef uint16 Spi_NumberOfDataType;
264 /* Requirements : MCAL-1368, MCAL-1369, MCAL-1370 */
265 typedef uint8 Spi_ChannelType;
267 /* Requirements : MCAL-1371, MCAL-1372, MCAL-1373 */
268 typedef uint16 Spi_JobType;
270 /* Requirements : MCAL-1374, MCAL-1375, MCAL-1376 */
271 typedef uint8 Spi_SequenceType;
276 /* Requirements : MCAL-1377, MCAL-1378, MCAL-1379 */
277 typedef uint8 Spi_HWUnitType;
278 
285 #ifndef SPI_E_PARAM_CHANNEL
286 
287 #define SPI_E_PARAM_CHANNEL ((uint8) 0x0AU)
288 #endif
289 #ifndef SPI_E_PARAM_JOB
290 
291 #define SPI_E_PARAM_JOB ((uint8) 0x0BU)
292 #endif
293 #ifndef SPI_E_PARAM_SEQ
294 
295 #define SPI_E_PARAM_SEQ ((uint8) 0x0CU)
296 #endif
297 #ifndef SPI_E_PARAM_LENGTH
298 
299 #define SPI_E_PARAM_LENGTH ((uint8) 0x0DU)
300 #endif
301 #ifndef SPI_E_PARAM_UNIT
302 
303 #define SPI_E_PARAM_UNIT ((uint8) 0x0EU)
304 #endif
305 #ifndef SPI_E_PARAM_POINTER
306 
307 #define SPI_E_PARAM_POINTER ((uint8) 0x10U)
308 #endif
309 #ifndef SPI_E_UNINIT
310 
311 #define SPI_E_UNINIT ((uint8) 0x1AU)
312 #endif
313 #ifndef SPI_E_SEQ_PENDING
314 
315 #define SPI_E_SEQ_PENDING ((uint8) 0x2AU)
316 #endif
317 #ifndef SPI_E_SEQ_IN_PROCESS
318 
319 #define SPI_E_SEQ_IN_PROCESS ((uint8) 0x3AU)
320 #endif
321 #ifndef SPI_E_ALREADY_INITIALIZED
322 
326 #define SPI_E_ALREADY_INITIALIZED ((uint8) 0x4AU)
327 #endif
328 #ifndef SPI_E_SEQUENCE_NOT_OK
329 
330 #define SPI_E_SEQUENCE_NOT_OK ((uint8) 0x5AU)
331 #endif
332 
333 /* @} */
334 
343 #define SPI_SID_INIT ((uint8) 0x00U)
344 
345 #define SPI_SID_DEINIT ((uint8) 0x01U)
346 
347 #define SPI_SID_WRITE_IB ((uint8) 0x02U)
348 
349 #define SPI_SID_ASYNC_TRANSMIT ((uint8) 0x03U)
350 
351 #define SPI_SID_READ_IB ((uint8) 0x04U)
352 
353 #define SPI_SID_SETUP_EB ((uint8) 0x05U)
354 
355 #define SPI_SID_GET_STATUS ((uint8) 0x06U)
356 
357 #define SPI_SID_GET_JOB_RESULT ((uint8) 0x07U)
358 
359 #define SPI_SID_GET_SEQ_RESULT ((uint8) 0x08U)
360 
361 #define SPI_SID_GET_VERSION_INFO ((uint8) 0x09U)
362 
363 #define SPI_SID_SYNC_TRANSMIT ((uint8) 0x0AU)
364 
365 #define SPI_SID_GET_HW_UNIT_STATUS ((uint8) 0x0BU)
366 
367 #define SPI_SID_CANCEL ((uint8) 0x0CU)
368 
369 #define SPI_SID_SET_ASYNC_MODE ((uint8) 0x0DU)
370 
371 #define SPI_SID_MAINFUNCTION_HANDLING ((uint8) 0x10U)
372 /* @} */
373 
380 /* Requirements : MCAL-1232 */
381 #define SPI_MCSPI_FCLK (48000000U)
382 
391 #define SPI_CFG_ID_0 (0x01U)
392 
394 #define SPI_CFG_ID_1 (0x02U)
395 
396 #define SPI_CFG_ID_2 (0x04U)
397 
398 #define SPI_CFG_ID_3 (0x08U)
399 
400 #define SPI_CFG_ID_4 (0x10U)
401 
402 #define SPI_CFG_ID_5 (0x20U)
403 /* @} */
404 
405 /* ========================================================================== */
406 /* Structures and Enums */
407 /* ========================================================================== */
408 
417 /* Requirements : MCAL-1340, MCAL-1341, MCAL-1344 */
418 typedef enum
419 {
422  SPI_IDLE = 1U,
424  SPI_BUSY = 2U
427 
432 typedef enum
433 {
434  CSIB0 = 0U,
448 #if defined (SOC_J721E)
457 #endif
459 
464 /* Requirements : MCAL-1350, MCAL-1351, MCAL-1353 */
465 typedef enum
466 {
478 
483 /* Requirements : MCAL-1355, MCAL-1357, MCAL-1359 */
484 typedef enum
485 {
496 
501 typedef enum
502 {
510 
515 /* Requirements : MCAL-1380, MCAL-1381, MCAL-1382, MCAL-1383,
516  * MCAL-1384, MCAL-1385, MCAL-1300 */
517 typedef enum
518 {
527 
531 typedef enum
532 {
533  SPI_MSB = 0U,
535  SPI_LSB = 1U
538 
542 typedef enum
543 {
544  SPI_LOW = STD_LOW,
548 } Spi_LevelType;
549 
553 typedef enum
554 {
555  SPI_CS0 = 0U,
563 } Spi_CsPinType;
564 
569 typedef enum
570 {
571  SPI_CLK_MODE_0 = 0x00U,
573  SPI_CLK_MODE_1 = 0x01U,
575  SPI_CLK_MODE_2 = 0x02U,
577  SPI_CLK_MODE_3 = 0x03U,
579 } Spi_ClkMode;
580 
593 typedef enum
594 {
599 } Spi_TxRxMode;
600 
604 /* Requirements : MCAL-1277 */
605 typedef enum
606 {
616 
620 typedef enum
621 {
627 
632 typedef enum
633 {
643 
647 typedef enum
648 {
654 
658 typedef enum
659 {
669 
673 /*
674  * Requirements : MCAL-1256, MCAL-1257, MCAL-1264, MCAL-1265,
675  * MCAL-1336
676  */
677 typedef struct
678 {
681  uint8 dataWidth;
686  Spi_NumberOfDataType maxBufLength;
696  Spi_TransferType transferType;
700 
704 typedef struct
705 {
706  uint16 csEnable;
708  Spi_CsModeType csMode;
711  Spi_LevelType csPolarity;
713  Spi_DataDelayType csIdleTime;
721  uint32 clkDivider;
727  Spi_ClkMode clkMode;
729  Spi_TxRxMode txRxMode;
734  Spi_LevelType startBitLevel;
736  Spi_DataLineReceiveType receptionLineEnable;
738  Spi_DataLineTransmitType transmissionLineEnable;
741 
745 typedef struct
746 {
751 
755 /* Requirements : MCAL-1231, MCAL-1244
756  * MCAL-1248, MCAL-1249, MCAL-1276, MCAL-1337,
757  * MCAL-1339
758  */
759 typedef struct
760 {
761  Spi_JobPriorityType jobPriority;
763  Spi_HWUnitType hwUnitId;
765  Spi_JobEndNotifyType Spi_JobEndNotification;
770  Spi_ChannelType channelList[SPI_MAX_CHANNELS_PER_JOB];
773 
777 /* Requirements : MCAL-1251, MCAL-1338, MCAL-1286 */
778 typedef struct
779 {
782  Spi_SeqEndNotifyType Spi_SequenceEndNotification;
784  uint32 jobPerSeq;
787  Spi_JobType jobList[SPI_MAX_JOBS_PER_SEQ];
790 
794 typedef struct
795 {
796  Spi_HWUnitType hwUnitId;
799 
803 /*
804  * Requirements : MCAL-1333, MCAL-1334, MCAL-1335, MCAL-1502,
805  * MCAL-1503
806  */
807 typedef struct Spi_ConfigType_s
808 {
809  uint8 maxChannels;
812  uint8 maxJobs;
815  uint8 maxSeq;
818  uint8 maxHwUnit;
835 
839 typedef struct Spi_ChannelConfigType_PC_s
840 {
841  Spi_ChannelType channelId;
844 
845 /* Requirements : MCAL-1245, MCAL-1246 */
849 typedef struct Spi_JobConfigType_PC_s
850 {
851  Spi_JobType jobId;
853  Spi_CsPinType csPin;
859 
863 typedef struct Spi_SeqConfigType_PC_s
864 {
865  Spi_SequenceType seqId;
868 
869 #if (STD_ON == SPI_REGISTER_READBACK_API)
870 
874 typedef struct
875 {
876  /*
877  * McSPI related registers
878  */
879  uint32 mcspiHlRev;
885  uint32 mcspiRev;
889  uint32 mcspiSyst;
892 #endif /* #if (STD_ON == SPI_REGISTER_READBACK_API) */
893 
894 /* @} */
895 /* @} */
896 /* ========================================================================== */
897 /* Function Declarations */
898 /* ========================================================================== */
899 
916 FUNC(void, SPI_CODE) Spi_Init(
917  P2CONST(Spi_ConfigType, AUTOMATIC, SPI_CONFIG_DATA) CfgPtr);
918 
938 FUNC(Std_ReturnType, SPI_CODE) Spi_DeInit(void);
939 
956 FUNC(Spi_StatusType, SPI_CODE) Spi_GetStatus(void);
957 
976 FUNC(Spi_JobResultType, SPI_CODE) Spi_GetJobResult(Spi_JobType Job);
977 
998 FUNC(Spi_SeqResultType, SPI_CODE) Spi_GetSequenceResult(
999  Spi_SequenceType Sequence);
1000 
1001 #if (STD_ON == SPI_VERSION_INFO_API)
1002 
1021 FUNC(void, SPI_CODE) Spi_GetVersionInfo(
1022  P2VAR(Std_VersionInfoType, AUTOMATIC, SPI_APPL_DATA) versioninfo);
1023 #endif /* #if (STD_ON == SPI_VERSION_INFO_API) */
1024 
1025 #if (STD_ON == SPI_HW_STATUS_API)
1026 
1046 FUNC(Spi_StatusType, SPI_CODE) Spi_GetHWUnitStatus(Spi_HWUnitType HWUnit);
1047 #endif /* #if (STD_ON == SPI_HW_STATUS_API) */
1048 
1049 #if ((SPI_CHANNELBUFFERS == SPI_IB) || (SPI_CHANNELBUFFERS == SPI_IB_EB))
1050 
1077 FUNC(Std_ReturnType, SPI_CODE) Spi_WriteIB(
1078  Spi_ChannelType Channel,
1079  P2CONST(Spi_DataBufferType, AUTOMATIC, SPI_APPL_DATA) DataBufferPtr);
1080 
1105 FUNC(Std_ReturnType, SPI_CODE) Spi_ReadIB(
1106  Spi_ChannelType Channel,
1107  P2VAR(Spi_DataBufferType, AUTOMATIC, SPI_APPL_DATA) DataBufferPointer);
1108 #endif /* #if SPI_IB || SPI_IB_EB */
1109 
1110 #if ((SPI_CHANNELBUFFERS == SPI_EB) || (SPI_CHANNELBUFFERS == SPI_IB_EB))
1111 
1142 FUNC(Std_ReturnType, SPI_CODE) Spi_SetupEB(
1143  Spi_ChannelType Channel,
1144  P2CONST(Spi_DataBufferType, AUTOMATIC, SPI_APPL_DATA) SrcDataBufferPtr,
1145  P2VAR(Spi_DataBufferType, AUTOMATIC, SPI_APPL_DATA) DesDataBufferPtr,
1146  Spi_NumberOfDataType Length);
1147 #endif /* #if ((SPI_CHANNELBUFFERS == SPI_EB) || (SPI_CHANNELBUFFERS ==
1148  *SPI_IB_EB)) */
1149 
1150 #if ((SPI_SCALEABILITY == SPI_LEVEL_1) || (SPI_SCALEABILITY == \
1151  SPI_LEVEL_2))
1152 
1171 FUNC(Std_ReturnType, SPI_CODE) Spi_AsyncTransmit(Spi_SequenceType Sequence);
1172 #endif /* #if ((SPI_SCALEABILITY == SPI_LEVEL_1) ||
1173  *(SPI_SCALEABILITY == SPI_LEVEL_2)) */
1174 
1175 #if (STD_ON == SPI_CANCEL_API)
1176 
1193 FUNC(void, SPI_CODE) Spi_Cancel(Spi_SequenceType Sequence);
1194 #endif /* #if (STD_ON == SPI_CANCEL_API) */
1195 
1196 #if ((SPI_SCALEABILITY == SPI_LEVEL_0) || (SPI_SCALEABILITY == \
1197  SPI_LEVEL_2))
1198 
1217 FUNC(Std_ReturnType, SPI_CODE) Spi_SyncTransmit(Spi_SequenceType Sequence);
1218 #endif /* #if ((SPI_SCALEABILITY == SPI_LEVEL_0) ||
1219  *(SPI_SCALEABILITY == SPI_LEVEL_2)) */
1220 
1221 #if (SPI_SCALEABILITY == SPI_LEVEL_2)
1222 
1243 FUNC(Std_ReturnType, SPI_CODE) Spi_SetAsyncMode(Spi_AsyncModeType Mode);
1244 #endif /* #if (SPI_SCALEABILITY == SPI_LEVEL_2) */
1245 
1267 FUNC(void, SPI_CODE) Spi_MainFunction_Handling(void);
1268 
1269 #if (STD_ON == SPI_REGISTER_READBACK_API)
1270 
1298 FUNC(Std_ReturnType, SPI_CODE) Spi_RegisterReadback(
1299  Spi_HWUnitType HWUnit,
1300  P2VAR(Spi_RegisterReadbackType, AUTOMATIC, SPI_APPL_DATA) RegRbPtr);
1301 #endif /* #if (STD_ON == SPI_REGISTER_READBACK_API) */
1302 
1303 #ifdef __cplusplus
1304 }
1305 #endif
1306 
1307 #endif /* #ifndef SPI_H_ */
1308 
1309 /* @} */
Definition: Spi.h:535
SPI Sequence configuration structure.
Definition: Spi.h:778
uint8 Spi_SequenceType
Specifies the identification (ID) for a sequence of jobs.
Definition: Spi.h:271
Definition: Spi.h:660
Definition: Spi.h:595
Definition: Spi.h:442
Std_ReturnType Spi_RegisterReadback(Spi_HWUnitType HWUnit, Spi_RegisterReadbackType *RegRbPtr)
This function reads the important registers of the hardware unit and returns the value in the structu...
Spi_SeqEndNotifyType Spi_SequenceEndNotification
Definition: Spi.h:782
Std_ReturnType Spi_SyncTransmit(Spi_SequenceType Sequence)
Service to transmit data on the SPI bus.
Spi_SeqResultType Spi_GetSequenceResult(Spi_SequenceType Sequence)
This service returns the last transmission result of the specified Sequence.
#define SPI_MAX_JOBS
Maximum jobs across all sequence/hwunit.
Definition: Spi_Cfg.h:165
Definition: Spi.h:434
Spi_JobPriorityType jobPriority
Definition: Spi.h:761
Definition: Spi.h:444
Definition: Spi.h:638
Spi_AsyncModeType
Specifies the asynchronous mechanism mode for SPI busses handled asynchronously in LEVEL 2...
Definition: Spi.h:517
Spi_DataLineTransmitType transmissionLineEnable
Definition: Spi.h:738
Definition: Spi.h:557
#define SPI_MAX_CHANNELS_PER_JOB
Maximum channels allowed per job.
Definition: Spi_Cfg.h:156
Definition: Spi.h:505
Spi_StatusType Spi_GetHWUnitStatus(Spi_HWUnitType HWUnit)
This service returns the status of the specified SPI Hardware microcontroller peripheral.
Spi_NumberOfDataType maxBufLength
Definition: Spi.h:686
This file contains ISR function declaration for SPI MCAL driver.
Std_ReturnType Spi_WriteIB(Spi_ChannelType Channel, const Spi_DataBufferType *DataBufferPtr)
Service for writing one or more data to an IB SPI Handler/Driver Channel specified by parameter...
uint8 externalDeviceCfgId
Definition: Spi.h:855
Definition: Spi.h:664
void Spi_GetVersionInfo(Std_VersionInfoType *versioninfo)
This service returns the version information of this module.
Definition: Spi.h:440
Spi_JobResultType
This type defines a range of specific Jobs status for SPI Handler/Driver.
Definition: Spi.h:465
Spi_CsPinType
SPI Chip Select Pin.
Definition: Spi.h:553
Spi_TxRxMode
SPI TX/RX Mode.
Definition: Spi.h:593
uint8 Spi_HWUnitType
Specifies the identification (ID) for a SPI Hardware micro controller peripheral (unit) ...
Definition: Spi.h:277
#define SPI_MAX_HW_UNIT
Maximum HW unit - This should match the sum for the below units ISR which are ON. ...
Definition: Spi_Cfg.h:174
Definition: Spi.h:451
Spi_DataDelayType
Spi_DataDelayType defines the number of interface clock cycles between CS toggling and first or last ...
Definition: Spi.h:632
Definition: Spi.h:666
Std_ReturnType Spi_SetAsyncMode(Spi_AsyncModeType Mode)
Service to set the asynchronous mechanism mode for SPI busses handled asynchronously.
Spi_HWUnitType hwUnitId
Definition: Spi.h:796
Definition: Spi.h:488
uint16 Spi_NumberOfDataType
Type for defining the number of data elements of the type Spi_DataBufferType to send and / or receive...
Definition: Spi.h:262
Definition: Spi.h:575
Definition: Spi.h:546
Definition: Spi.h:607
uint8 Spi_DataBufferType
Type of application data buffer elements.
Definition: Spi.h:256
SPI channel config structure parameters Pre-Compile only.
Definition: Spi.h:839
Definition: Spi.h:446
uint32 clkDivider
Definition: Spi.h:721
uint32 defaultTxData
Definition: Spi.h:684
#define SPI_MAX_JOBS_PER_SEQ
Maximum jobs allowed per sequence.
Definition: Spi_Cfg.h:159
Definition: Spi.h:577
Definition: Spi.h:649
Definition: Spi.h:559
Spi_CsModeType
SPI Chip Select Mode.
Definition: Spi.h:620
uint16 Spi_JobType
Specifies the identification (ID) for a Job.
Definition: Spi.h:268
Spi_SeqResultType
This type defines a range of specific Sequences status for SPI Handler/Driver.
Definition: Spi.h:484
Spi_HwUnitResultType
This type defines a range of specific HW unit status for SPI Handler/Driver.
Definition: Spi.h:501
#define SPI_MAX_CHANNELS
Maximum channels across all jobs/sequence/hwunit.
Definition: Spi_Cfg.h:162
SPI job config structure parameters Pre-Compile only.
Definition: Spi.h:849
SPI sequence config structure parameters Pre-Compile only.
Definition: Spi.h:863
Definition: Spi.h:662
Spi_TransferType transferType
Definition: Spi.h:696
uint32 mcspiRev
Definition: Spi.h:885
Definition: Spi.h:544
uint16 startBitEnable
Definition: Spi.h:731
uint32 mcspiHlSysConfig
Definition: Spi.h:883
SPI Hardware unit configuration structure.
Definition: Spi.h:794
Definition: Spi.h:420
Definition: Spi.h:469
uint8 dataWidth
Definition: Spi.h:681
Definition: Spi.h:555
Spi_ChannelType channelId
Definition: Spi.h:841
Definition: Spi.h:424
Spi_StatusType Spi_GetStatus(void)
Service returns the SPI Handler/Driver software module status.
Spi_CsModeType csMode
Definition: Spi.h:708
Definition: Spi.h:640
Definition: Spi.h:634
Spi_ClkMode clkMode
Definition: Spi.h:727
uint8 maxExtDevCfg
Definition: Spi.h:821
Spi_LevelType csPolarity
Definition: Spi.h:711
Definition: Spi.h:571
Spi_DataLineReceiveType receptionLineEnable
Definition: Spi.h:736
This file contains generated pre compile configuration file for SPI MCAL driver.
#define SPI_MAX_EXT_DEV
Maximum external device cfg.
Definition: Spi_Cfg.h:179
Definition: Spi.h:613
Spi_DataDelayType csIdleTime
Definition: Spi.h:713
Spi_McspiExternalDeviceConfigType mcspi
Definition: Spi.h:747
Definition: Spi.h:474
Definition: Spi.h:624
Std_ReturnType Spi_DeInit(void)
Service for SPI de-initialization.
void Spi_Init(const Spi_ConfigType *CfgPtr)
Service for SPI initialization.
uint8 maxSeq
Definition: Spi.h:815
Definition: Spi.h:503
Spi_LevelType startBitLevel
Definition: Spi.h:734
void Spi_Cancel(Spi_SequenceType Sequence)
Service cancels the specified on-going sequence transmission.
Definition: Spi.h:533
uint8 maxHwUnit
Definition: Spi.h:818
#define SPI_MAX_SEQ
Maximum sequence across all hwunit.
Definition: Spi_Cfg.h:168
Spi_StatusType
This type defines a range of specific status for SPI Handler/Driver.
Definition: Spi.h:418
uint32 channelPerJob
Definition: Spi.h:767
Definition: Spi.h:597
Definition: Spi.h:449
Definition: Spi.h:455
Definition: Spi.h:493
Definition: Spi.h:622
uint8 seqInterruptible
Definition: Spi.h:780
SPI register readback structure.
Definition: Spi.h:874
uint32 jobPerSeq
Definition: Spi.h:784
Definition: Spi.h:422
Spi_ClkMode
SPI Clock Mode - sets the clock polarity and phase. Note: These values are a direct register mapping...
Definition: Spi.h:569
Definition: Spi.h:486
Definition: Spi.h:636
Definition: Spi.h:573
uint32 mcspiHlRev
Definition: Spi.h:879
Spi_HWUnitType hwUnitId
Definition: Spi.h:763
uint32 mcspiSyst
Definition: Spi.h:889
Spi_TxRxMode txRxMode
Definition: Spi.h:729
SPI external device specific configuration structure .
Definition: Spi.h:745
Definition: Spi.h:507
uint8 maxChannels
Definition: Spi.h:809
Definition: Spi.h:491
SPI Job configuration structure specific to McSPI peripheral.
Definition: Spi.h:704
Std_ReturnType Spi_ReadIB(Spi_ChannelType Channel, Spi_DataBufferType *DataBufferPointer)
Service for reading synchronously one or more data from an IB SPI Handler/Driver Channel specified by...
Definition: Spi.h:467
Definition: Spi.h:611
Spi_JobType jobId
Definition: Spi.h:851
Definition: Spi.h:561
SPI Job configuration structure.
Definition: Spi.h:759
Spi_HwUnitType
This type defines a range of HW SPI Hardware microcontroller peripheral allocated to this Job...
Definition: Spi.h:432
Definition: Spi.h:651
Definition: Spi.h:436
Definition: Spi.h:522
Spi_LevelType
Type for SPI Chip Select Polarity and Clock Idle Level.
Definition: Spi.h:542
Spi_JobEndNotifyType Spi_JobEndNotification
Definition: Spi.h:765
Spi_DataLineTransmitType
Spi_DataLineTransmitType defines the lines selected for transmission.
Definition: Spi.h:658
Definition: Spi.h:472
uint32 mcspiSysStatus
Definition: Spi.h:887
Definition: Spi.h:453
Spi_CsPinType csPin
Definition: Spi.h:853
Definition: Spi.h:438
uint32 mcspiHlHwInfo
Definition: Spi.h:881
Spi_JobPriorityType
SPI Job Priority.
Definition: Spi.h:605
Spi_DataLineReceiveType
Spi_DataLineReceiveType defines the lines selected for reception.
Definition: Spi.h:647
uint8 Spi_ChannelType
Specifies the identification (ID) for a Channel.
Definition: Spi.h:265
void Spi_MainFunction_Handling(void)
This function polls the SPI interrupts linked to HW Units allocated to the transmission of SPI sequen...
SPI Channel configuration structure.
Definition: Spi.h:677
Spi_SequenceType seqId
Definition: Spi.h:865
Std_ReturnType Spi_AsyncTransmit(Spi_SequenceType Sequence)
Service to transmit data on the SPI bus.
uint8 channelBufType
Definition: Spi.h:679
Definition: Spi.h:519
Definition: Spi.h:609
uint16 csEnable
Definition: Spi.h:706
Spi_TransferType
Word transfer order - MSB first or LSB first.
Definition: Spi.h:531
Spi_JobResultType Spi_GetJobResult(Spi_JobType Job)
This service returns the last transmission result of the specified Job.
SPI config structure.
Definition: Spi.h:807
uint8 maxJobs
Definition: Spi.h:812