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AM275 FreeRTOS SDK
11.01.00
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Go to the documentation of this file.
57 #include <drivers/hw_include/cslr.h>
58 #include <drivers/hw_include/cslr_adc.h>
69 #define ADC_INTR_STATUS_ALL (ADC_IRQSTATUS_END_OF_SEQUENCE_MASK | \
70 ADC_IRQSTATUS_FIFO0_THR_MASK | \
71 ADC_IRQSTATUS_FIFO0_OVERRUN_MASK | \
72 ADC_IRQSTATUS_FIFO0_UNDERFLOW_MASK | \
73 ADC_IRQSTATUS_FIFO1_THR_MASK | \
74 ADC_IRQSTATUS_FIFO1_OVERRUN_MASK | \
75 ADC_IRQSTATUS_FIFO1_UNDERFLOW_MASK | \
76 ADC_IRQSTATUS_OUT_OF_RANGE_MASK)
78 #define ADC_INTR_ENABLE_ALL (ADC_IRQENABLE_SET_END_OF_SEQUENCE_MASK | \
79 ADC_IRQENABLE_SET_FIFO0_THR_MASK | \
80 ADC_IRQENABLE_SET_FIFO0_OVERRUN_MASK | \
81 ADC_IRQENABLE_SET_FIFO0_UNDERFLOW_MASK | \
82 ADC_IRQENABLE_SET_FIFO1_THR_MASK | \
83 ADC_IRQENABLE_SET_FIFO1_OVERRUN_MASK | \
84 ADC_IRQENABLE_SET_FIFO1_UNDERFLOW_MASK | \
85 ADC_IRQENABLE_SET_OUT_OF_RANGE_MASK)
87 #define ADC_INTR_DISABLE_ALL (ADC_IRQENABLE_CLR_END_OF_SEQUENCE_MASK | \
88 ADC_IRQENABLE_CLR_FIFO0_THR_MASK | \
89 ADC_IRQENABLE_CLR_FIFO0_OVERRUN_MASK | \
90 ADC_IRQENABLE_CLR_FIFO0_UNDERFLOW_MASK | \
91 ADC_IRQENABLE_CLR_FIFO1_THR_MASK | \
92 ADC_IRQENABLE_CLR_FIFO1_OVERRUN_MASK | \
93 ADC_IRQENABLE_CLR_FIFO1_UNDERFLOW_MASK | \
94 ADC_IRQENABLE_CLR_OUT_OF_RANGE_MASK)
96 #define ADC_INTR_ALL (ADC_INTR_STATUS_ALL)
99 #define ADC_OPENDELAY_MAX (0x3FFFFU)
101 #define ADC_SAMPLEDELAY_MAX (0xFFU)
103 #define ADC_RANGE_MAX (0x3FFU)
105 #define ADC_RANGE_MIN (0x0U)
108 #define ADC_FIFO_SIZE (64U)
111 #define ADC_GET_RANGE(bit) (((uint32_t) 1U) << (bit))
127 #define ADC_CHANNEL_1 (ADC_STEPCONFIG_SEL_INM_SWC_CHANNEL_1)
129 #define ADC_CHANNEL_2 (ADC_STEPCONFIG_SEL_INM_SWC_CHANNEL_2)
131 #define ADC_CHANNEL_3 (ADC_STEPCONFIG_SEL_INM_SWC_CHANNEL_3)
133 #define ADC_CHANNEL_4 (ADC_STEPCONFIG_SEL_INM_SWC_CHANNEL_4)
135 #define ADC_CHANNEL_5 (ADC_STEPCONFIG_SEL_INM_SWC_CHANNEL_5)
137 #define ADC_CHANNEL_6 (ADC_STEPCONFIG_SEL_INM_SWC_CHANNEL_6)
139 #define ADC_CHANNEL_7 (ADC_STEPCONFIG_SEL_INM_SWC_CHANNEL_7)
141 #define ADC_CHANNEL_8 (ADC_STEPCONFIG_SEL_INM_SWC_CHANNEL_8)
155 #define ADC_STEP_1 (ADC_ADCSTAT_STEP_ID_STEP1)
157 #define ADC_STEP_2 (ADC_ADCSTAT_STEP_ID_STEP2)
159 #define ADC_STEP_3 (ADC_ADCSTAT_STEP_ID_STEP3)
161 #define ADC_STEP_4 (ADC_ADCSTAT_STEP_ID_STEP4)
163 #define ADC_STEP_5 (ADC_ADCSTAT_STEP_ID_STEP5)
165 #define ADC_STEP_6 (ADC_ADCSTAT_STEP_ID_STEP6)
167 #define ADC_STEP_7 (ADC_ADCSTAT_STEP_ID_STEP7)
169 #define ADC_STEP_8 (ADC_ADCSTAT_STEP_ID_STEP8)
171 #define ADC_STEP_9 (ADC_ADCSTAT_STEP_ID_STEP9)
173 #define ADC_STEP_10 (ADC_ADCSTAT_STEP_ID_STEP10)
175 #define ADC_STEP_11 (ADC_ADCSTAT_STEP_ID_STEP11)
177 #define ADC_STEP_12 (ADC_ADCSTAT_STEP_ID_STEP12)
179 #define ADC_STEP_13 (ADC_ADCSTAT_STEP_ID_STEP13)
181 #define ADC_STEP_14 (ADC_ADCSTAT_STEP_ID_STEP14)
183 #define ADC_STEP_15 (ADC_ADCSTAT_STEP_ID_STEP15)
185 #define ADC_STEP_16 (ADC_ADCSTAT_STEP_ID_STEP16)
202 #define ADC_OPERATION_MODE_SINGLE_SHOT (ADC_STEPCONFIG_MODE_SW_EN_ONESHOT)
204 #define ADC_OPERATION_MODE_CONTINUOUS (ADC_STEPCONFIG_MODE_SW_EN_CONTINUOUS)
220 #define ADC_AVERAGING_NONE (ADC_STEPCONFIG_AVERAGING_NOAVG)
222 #define ADC_AVERAGING_2_SAMPLES (ADC_STEPCONFIG_AVERAGING_2_SAMPLESAVG)
224 #define ADC_AVERAGING_4_SAMPLES (ADC_STEPCONFIG_AVERAGING_4_SAMPLESAVG)
226 #define ADC_AVERAGING_8_SAMPLES (ADC_STEPCONFIG_AVERAGING_8_SAMPLESAVG)
228 #define ADC_AVERAGING_16_SAMPLES (ADC_STEPCONFIG_AVERAGING_16_SAMPLESAV)
242 #define ADC_FIFO_NUM_0 (0x0U)
244 #define ADC_FIFO_NUM_1 (0x1U)
258 #define ADC_INTR_SRC_END_OF_SEQUENCE (ADC_IRQENABLE_SET_END_OF_SEQUENCE_MASK)
260 #define ADC_INTR_SRC_FIFO0_THRESHOLD (ADC_IRQENABLE_SET_FIFO0_THR_MASK)
262 #define ADC_INTR_SRC_FIFO0_OVERRUN (ADC_IRQENABLE_SET_FIFO0_OVERRUN_MASK)
264 #define ADC_INTR_SRC_FIFO0_UNDERFLOW (ADC_IRQENABLE_SET_FIFO0_UNDERFLOW_MASK)
266 #define ADC_INTR_SRC_FIFO1_THRESHOLD (ADC_IRQENABLE_SET_FIFO1_THR_MASK)
268 #define ADC_INTR_SRC_FIFO1_OVERRUN (ADC_IRQSTATUS_FIFO1_OVERRUN_MASK)
270 #define ADC_INTR_SRC_FIFO1_UNDERFLOW (ADC_IRQENABLE_SET_FIFO1_UNDERFLOW_MASK)
272 #define ADC_INTR_SRC_OUT_OF_RANGE (ADC_IRQENABLE_SET_OUT_OF_RANGE_MASK)
286 #define ADC_IDLE_MODE_FORCE_IDLE (ADC_SYSCONFIG_IDLEMODE_FORCE)
288 #define ADC_IDLE_MODE_NO_IDLE (ADC_SYSCONFIG_IDLEMODE_NO_IDLE)
290 #define ADC_IDLE_MODE_SMART_IDLE (ADC_SYSCONFIG_IDLEMODE_SMART_IDLE)
297 typedef struct adcRevisionId
316 typedef struct adcStepConfig
355 typedef struct adcSequencerStatus
427 uint32_t errCorrection,
429 uint32_t calibration);
442 uint32_t dmaLineEnable);
470 uint32_t stepEnable);
644 int32_t
ADC_setRange(uint32_t baseAddr, uint32_t highRange, uint32_t lowRange);
uint32_t ADC_getDMAFIFOThresholdLevel(uint32_t baseAddr, uint32_t fifoNum)
This API will read and return DMA request level for a FIFO.
uint32_t fsmBusy
Definition: adc/v0/adc.h:362
uint32_t sampleDelay
Definition: adc/v0/adc.h:332
uint32_t Adc_isPoweredUp(uint32_t baseAddr)
This function checks if the ADC module is powered up.
uint32_t status
Definition: tisci_lpm.h:1
void ADC_getSequencerStatus(uint32_t baseAddr, adcSequencerStatus_t *status)
This API is used to get the Sequencer status.
uint32_t adcOperationMode_t
Enum to select the ADC Operation Mode.
Definition: adc/v0/adc.h:200
uint32_t fifoNum
Definition: adc/v0/adc.h:346
uint32_t mode
Definition: adc/v0/adc.h:318
void ADC_clearAllSteps(uint32_t baseAddr)
This API will clear all the ADC steps.
uint32_t ADC_getCPUFIFOThresholdLevel(uint32_t baseAddr, uint32_t fifoNum)
This API will read and return threshold level for a FIFO.
Structure for accessing Revision ID of ADC module.
Definition: adc/v0/adc.h:298
uint32_t averaging
Definition: adc/v0/adc.h:342
void ADC_clearIntrStatus(uint32_t baseAddr, uint32_t intrMask)
This API is used to clear the interrupt status.
void ADC_powerUp(uint32_t baseAddr, uint32_t powerUp)
This API will power up ADC Module.
Structure containing parameters for ADC step configuration.
Definition: adc/v0/adc.h:317
void ADC_init(uint32_t baseAddr, uint32_t errCorrection, uint32_t errOffset, uint32_t calibration)
This API is used to initialize the ADC module.
int32_t ADC_setRange(uint32_t baseAddr, uint32_t highRange, uint32_t lowRange)
This API is used to configure the range for ADC.
void ADC_stepEnable(uint32_t baseAddr, uint32_t stepId, uint32_t stepEnable)
This API will enable ADC step.
void ADC_FIFODMAAccessEnable(uint32_t baseAddr, uint32_t fifoNum, uint32_t dmaLineEnable)
This API will enable DMA access for FIFO.
uint32_t ADC_getFIFOData(uint32_t baseAddr, uint32_t fifoNum)
This API will read and return FIFO data.
uint32_t ADC_getFIFOWordCount(uint32_t baseAddr, uint32_t fifoNum)
This API will return number of word present in the FIFO.
uint32_t adcFIFONum_t
Enum to select FIFO to store the data.
Definition: adc/v0/adc.h:240
int32_t ADC_setDMAFIFOThresholdLevel(uint32_t baseAddr, uint32_t fifoNum, uint32_t threshold)
This API will configure DMA request level for a FIFO.
void ADC_getRange(uint32_t baseAddr, uint32_t *highRange, uint32_t *lowRange)
This API is used to get the range for conversion.
uint32_t custom
Definition: adc/v0/adc.h:307
uint32_t rangeCheckEnable
Definition: adc/v0/adc.h:337
uint32_t afeBusy
Definition: adc/v0/adc.h:357
int32_t ADC_setClkDivider(uint32_t baseAddr, uint32_t clkDivider)
This API will configure clock divider for the ADC Module.
uint32_t scheme
Definition: adc/v0/adc.h:299
int32_t ADC_setStepParams(uint32_t baseAddr, uint32_t stepId, const adcStepConfig_t *configParams)
This API will configure a step for analog to digital conversion.
uint32_t stepId
Definition: adc/v0/adc.h:366
uint32_t rtlRev
Definition: adc/v0/adc.h:303
uint32_t ADC_getIntrRawStatus(uint32_t baseAddr)
This API is used to get the raw interrupt status.
void ADC_start(uint32_t baseAddr, uint32_t adcEnable)
This API will start ADC.
uint32_t adcStepId_t
Enum to select the step for operation.
Definition: adc/v0/adc.h:153
void ADC_disableIntr(uint32_t baseAddr, uint32_t intrMask)
This API is used to disable interrupts.
void ADC_setIdleMode(uint32_t baseAddr, uint32_t idleMode)
This API is used to configure ADC idle mode.
uint32_t minor
Definition: adc/v0/adc.h:309
uint32_t adcIntrSrc_t
Enum for ADC interrupts.
Definition: adc/v0/adc.h:256
void ADC_writeEOI(uint32_t baseAddr)
This API is used for EOI for ADC.
uint32_t func
Definition: adc/v0/adc.h:301
void ADC_getRevisionId(uint32_t baseAddr, adcRevisionId_t *revId)
This API is used get the ADC revision ID.
uint32_t openDelay
Definition: adc/v0/adc.h:326
void ADC_stepIdTagEnable(uint32_t baseAddr, uint32_t stepIdTag)
This API is used to configure the ADC module for storing step ID along with ADC data.
int32_t ADC_setCPUFIFOThresholdLevel(uint32_t baseAddr, uint32_t fifoNum, uint32_t threshold)
This API will configure threshold level for a FIFO.
uint32_t adcChannel_t
Enum to select the channel for input.
Definition: adc/v0/adc.h:125
uint32_t major
Definition: adc/v0/adc.h:305
uint32_t adcIdleMode_t
Enum to configure ADC idle mode.Applicable for TDA3XX Only.
Definition: adc/v0/adc.h:284
uint32_t adcAveraging_t
Enum to number of samplings to average.
Definition: adc/v0/adc.h:218
uint32_t channel
Definition: adc/v0/adc.h:322
void ADC_enableIntr(uint32_t baseAddr, uint32_t intrMask)
This API is used to enable interrupts.
Structure for reporting ADC sequencer status.
Definition: adc/v0/adc.h:356
uint32_t ADC_getIntrStatus(uint32_t baseAddr)
This API is used to get the pending interrupts.