AM275 FreeRTOS SDK  11.00.00
adc/v0/adc.h
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1 /*
2  * Copyright (C) 2021-2025 Texas Instruments Incorporated
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30  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  */
32 
50 #ifndef ADC_V0_H_
51 #define ADC_V0_H_
52 
53 /* ========================================================================== */
54 /* Include Files */
55 /* ========================================================================== */
56 
57 #include <drivers/hw_include/cslr.h>
58 #include <drivers/hw_include/cslr_adc.h>
59 
60 #ifdef __cplusplus
61 extern "C" {
62 #endif
63 
64 /* ========================================================================== */
65 /* Macros & Typedefs */
66 /* ========================================================================== */
67 
69 #define ADC_INTR_STATUS_ALL (ADC_IRQSTATUS_END_OF_SEQUENCE_MASK | \
70  ADC_IRQSTATUS_FIFO0_THR_MASK | \
71  ADC_IRQSTATUS_FIFO0_OVERRUN_MASK | \
72  ADC_IRQSTATUS_FIFO0_UNDERFLOW_MASK | \
73  ADC_IRQSTATUS_FIFO1_THR_MASK | \
74  ADC_IRQSTATUS_FIFO1_OVERRUN_MASK | \
75  ADC_IRQSTATUS_FIFO1_UNDERFLOW_MASK | \
76  ADC_IRQSTATUS_OUT_OF_RANGE_MASK)
77 
78 #define ADC_INTR_ENABLE_ALL (ADC_IRQENABLE_SET_END_OF_SEQUENCE_MASK | \
79  ADC_IRQENABLE_SET_FIFO0_THR_MASK | \
80  ADC_IRQENABLE_SET_FIFO0_OVERRUN_MASK | \
81  ADC_IRQENABLE_SET_FIFO0_UNDERFLOW_MASK | \
82  ADC_IRQENABLE_SET_FIFO1_THR_MASK | \
83  ADC_IRQENABLE_SET_FIFO1_OVERRUN_MASK | \
84  ADC_IRQENABLE_SET_FIFO1_UNDERFLOW_MASK | \
85  ADC_IRQENABLE_SET_OUT_OF_RANGE_MASK)
86 
87 #define ADC_INTR_DISABLE_ALL (ADC_IRQENABLE_CLR_END_OF_SEQUENCE_MASK | \
88  ADC_IRQENABLE_CLR_FIFO0_THR_MASK | \
89  ADC_IRQENABLE_CLR_FIFO0_OVERRUN_MASK | \
90  ADC_IRQENABLE_CLR_FIFO0_UNDERFLOW_MASK | \
91  ADC_IRQENABLE_CLR_FIFO1_THR_MASK | \
92  ADC_IRQENABLE_CLR_FIFO1_OVERRUN_MASK | \
93  ADC_IRQENABLE_CLR_FIFO1_UNDERFLOW_MASK | \
94  ADC_IRQENABLE_CLR_OUT_OF_RANGE_MASK)
95 
96 #define ADC_INTR_ALL (ADC_INTR_STATUS_ALL)
97 
99 #define ADC_OPENDELAY_MAX (0x3FFFFU)
100 
101 #define ADC_SAMPLEDELAY_MAX (0xFFU)
102 
103 #define ADC_RANGE_MAX (0x3FFU)
104 
105 #define ADC_RANGE_MIN (0x0U)
106 
108 #define ADC_FIFO_SIZE (64U)
109 
110 #define ADC_MAX_NUM_CHN (uint32_t)(8U)
111 
113 #define ADC_GET_RANGE(bit) (((uint32_t) 1U) << (bit))
114 
115 /* ========================================================================== */
116 /* Structures and Enums */
117 /* ========================================================================== */
118 
129 typedef uint32_t adcChannel_t;
130 
131 #define ADC_CHANNEL_1 (ADC_STEPCONFIG_SEL_INM_SWC_CHANNEL_1)
132 
133 #define ADC_CHANNEL_2 (ADC_STEPCONFIG_SEL_INM_SWC_CHANNEL_2)
134 
135 #define ADC_CHANNEL_3 (ADC_STEPCONFIG_SEL_INM_SWC_CHANNEL_3)
136 
137 #define ADC_CHANNEL_4 (ADC_STEPCONFIG_SEL_INM_SWC_CHANNEL_4)
138 
139 #define ADC_CHANNEL_5 (ADC_STEPCONFIG_SEL_INM_SWC_CHANNEL_5)
140 
141 #define ADC_CHANNEL_6 (ADC_STEPCONFIG_SEL_INM_SWC_CHANNEL_6)
142 
143 #define ADC_CHANNEL_7 (ADC_STEPCONFIG_SEL_INM_SWC_CHANNEL_7)
144 
145 #define ADC_CHANNEL_8 (ADC_STEPCONFIG_SEL_INM_SWC_CHANNEL_8)
146 
157 typedef uint32_t adcStepId_t;
158 
159 #define ADC_STEP_1 (ADC_ADCSTAT_STEP_ID_STEP1)
160 
161 #define ADC_STEP_2 (ADC_ADCSTAT_STEP_ID_STEP2)
162 
163 #define ADC_STEP_3 (ADC_ADCSTAT_STEP_ID_STEP3)
164 
165 #define ADC_STEP_4 (ADC_ADCSTAT_STEP_ID_STEP4)
166 
167 #define ADC_STEP_5 (ADC_ADCSTAT_STEP_ID_STEP5)
168 
169 #define ADC_STEP_6 (ADC_ADCSTAT_STEP_ID_STEP6)
170 
171 #define ADC_STEP_7 (ADC_ADCSTAT_STEP_ID_STEP7)
172 
173 #define ADC_STEP_8 (ADC_ADCSTAT_STEP_ID_STEP8)
174 
175 #define ADC_STEP_9 (ADC_ADCSTAT_STEP_ID_STEP9)
176 
177 #define ADC_STEP_10 (ADC_ADCSTAT_STEP_ID_STEP10)
178 
179 #define ADC_STEP_11 (ADC_ADCSTAT_STEP_ID_STEP11)
180 
181 #define ADC_STEP_12 (ADC_ADCSTAT_STEP_ID_STEP12)
182 
183 #define ADC_STEP_13 (ADC_ADCSTAT_STEP_ID_STEP13)
184 
185 #define ADC_STEP_14 (ADC_ADCSTAT_STEP_ID_STEP14)
186 
187 #define ADC_STEP_15 (ADC_ADCSTAT_STEP_ID_STEP15)
188 
189 #define ADC_STEP_16 (ADC_ADCSTAT_STEP_ID_STEP16)
190 
204 typedef uint32_t adcOperationMode_t;
205 
206 #define ADC_OPERATION_MODE_SINGLE_SHOT (ADC_STEPCONFIG_MODE_SW_EN_ONESHOT)
207 
208 #define ADC_OPERATION_MODE_CONTINUOUS (ADC_STEPCONFIG_MODE_SW_EN_CONTINUOUS)
209 
222 typedef uint32_t adcAveraging_t;
223 
224 #define ADC_AVERAGING_NONE (ADC_STEPCONFIG_AVERAGING_NOAVG)
225 
226 #define ADC_AVERAGING_2_SAMPLES (ADC_STEPCONFIG_AVERAGING_2_SAMPLESAVG)
227 
228 #define ADC_AVERAGING_4_SAMPLES (ADC_STEPCONFIG_AVERAGING_4_SAMPLESAVG)
229 
230 #define ADC_AVERAGING_8_SAMPLES (ADC_STEPCONFIG_AVERAGING_8_SAMPLESAVG)
231 
232 #define ADC_AVERAGING_16_SAMPLES (ADC_STEPCONFIG_AVERAGING_16_SAMPLESAV)
233 
244 typedef uint32_t adcFIFONum_t;
245 
246 #define ADC_FIFO_NUM_0 (0x0U)
247 
248 #define ADC_FIFO_NUM_1 (0x1U)
249 
260 typedef uint32_t adcIntrSrc_t;
261 
262 #define ADC_INTR_SRC_END_OF_SEQUENCE (ADC_IRQENABLE_SET_END_OF_SEQUENCE_MASK)
263 
264 #define ADC_INTR_SRC_FIFO0_THRESHOLD (ADC_IRQENABLE_SET_FIFO0_THR_MASK)
265 
266 #define ADC_INTR_SRC_FIFO0_OVERRUN (ADC_IRQENABLE_SET_FIFO0_OVERRUN_MASK)
267 
268 #define ADC_INTR_SRC_FIFO0_UNDERFLOW (ADC_IRQENABLE_SET_FIFO0_UNDERFLOW_MASK)
269 
270 #define ADC_INTR_SRC_FIFO1_THRESHOLD (ADC_IRQENABLE_SET_FIFO1_THR_MASK)
271 
272 #define ADC_INTR_SRC_FIFO1_OVERRUN (ADC_IRQSTATUS_FIFO1_OVERRUN_MASK)
273 
274 #define ADC_INTR_SRC_FIFO1_UNDERFLOW (ADC_IRQENABLE_SET_FIFO1_UNDERFLOW_MASK)
275 
276 #define ADC_INTR_SRC_OUT_OF_RANGE (ADC_IRQENABLE_SET_OUT_OF_RANGE_MASK)
277 
288 typedef uint32_t adcIdleMode_t;
289 
290 #define ADC_IDLE_MODE_FORCE_IDLE (ADC_SYSCONFIG_IDLEMODE_FORCE)
291 
292 #define ADC_IDLE_MODE_NO_IDLE (ADC_SYSCONFIG_IDLEMODE_NO_IDLE)
293 
294 #define ADC_IDLE_MODE_SMART_IDLE (ADC_SYSCONFIG_IDLEMODE_SMART_IDLE)
295 
301 typedef struct adcRevisionId
302 {
303  uint32_t scheme;
305  uint32_t func;
307  uint32_t rtlRev;
309  uint32_t major;
311  uint32_t custom;
313  uint32_t minor;
316 
320 typedef struct adcStepConfig
321 {
322  uint32_t mode;
326  uint32_t channel;
330  uint32_t openDelay;
336  uint32_t sampleDelay;
346  uint32_t averaging;
350  uint32_t fifoNum;
355 
359 typedef struct adcSequencerStatus
360 {
361  uint32_t afeBusy;
366  uint32_t fsmBusy;
370  uint32_t stepId;
375 
376 /* ========================================================================== */
377 /* Global Variables Declarations */
378 /* ========================================================================== */
379 
380 /* None */
381 
382 /* ========================================================================== */
383 /* Function Declarations */
384 /* ========================================================================== */
385 
393 void ADC_powerUp(uint32_t baseAddr, uint32_t powerUp);
394 
403 uint32_t Adc_isPoweredUp(uint32_t baseAddr);
404 
417 int32_t ADC_setClkDivider(uint32_t baseAddr, uint32_t clkDivider);
418 
430 void ADC_init(uint32_t baseAddr,
431  uint32_t errCorrection,
432  uint32_t errOffset,
433  uint32_t calibration);
434 
444 void ADC_FIFODMAAccessEnable(uint32_t baseAddr,
445  uint32_t fifoNum,
446  uint32_t dmaLineEnable);
447 
459 int32_t ADC_setStepParams(uint32_t baseAddr,
460  uint32_t stepId,
461  const adcStepConfig_t *configParams);
462 
472 void ADC_stepEnable(uint32_t baseAddr,
473  uint32_t stepId,
474  uint32_t stepEnable);
475 
481 void ADC_clearAllSteps(uint32_t baseAddr);
482 
490 void ADC_start(uint32_t baseAddr, uint32_t adcEnable);
491 
502 void ADC_stepIdTagEnable(uint32_t baseAddr, uint32_t stepIdTag);
503 
513 uint32_t ADC_getFIFOData(uint32_t baseAddr, uint32_t fifoNum);
514 
524 uint32_t ADC_getFIFOWordCount(uint32_t baseAddr, uint32_t fifoNum);
525 
541 int32_t ADC_setCPUFIFOThresholdLevel(uint32_t baseAddr,
542  uint32_t fifoNum,
543  uint32_t threshold);
544 
556 uint32_t ADC_getCPUFIFOThresholdLevel(uint32_t baseAddr, uint32_t fifoNum);
557 
573 int32_t ADC_setDMAFIFOThresholdLevel(uint32_t baseAddr,
574  uint32_t fifoNum,
575  uint32_t threshold);
576 
587 uint32_t ADC_getDMAFIFOThresholdLevel(uint32_t baseAddr, uint32_t fifoNum);
588 
596 void ADC_enableIntr(uint32_t baseAddr, uint32_t intrMask);
597 
604 void ADC_disableIntr(uint32_t baseAddr, uint32_t intrMask);
605 
611 void ADC_writeEOI(uint32_t baseAddr);
612 
620 uint32_t ADC_getIntrStatus(uint32_t baseAddr);
621 
628 void ADC_clearIntrStatus(uint32_t baseAddr, uint32_t intrMask);
629 
637 uint32_t ADC_getIntrRawStatus(uint32_t baseAddr);
638 
648 int32_t ADC_setRange(uint32_t baseAddr, uint32_t highRange, uint32_t lowRange);
649 
657 void ADC_getRange(uint32_t baseAddr,
658  uint32_t *highRange,
659  uint32_t *lowRange);
660 
668 void ADC_getSequencerStatus(uint32_t baseAddr,
670 
679 void ADC_setIdleMode(uint32_t baseAddr, uint32_t idleMode);
680 
688 void ADC_getRevisionId(uint32_t baseAddr, adcRevisionId_t *revId);
689 
690 /* ========================================================================== */
691 /* Static Function Definitions */
692 /* ========================================================================== */
693 
694 /* None */
695 
696 #ifdef __cplusplus
697 }
698 #endif
699 
700 #endif /* #ifndef ADC_V0_H_ */
701 
ADC_getDMAFIFOThresholdLevel
uint32_t ADC_getDMAFIFOThresholdLevel(uint32_t baseAddr, uint32_t fifoNum)
This API will read and return DMA request level for a FIFO.
adcSequencerStatus_t::fsmBusy
uint32_t fsmBusy
Definition: adc/v0/adc.h:366
adcStepConfig_t::sampleDelay
uint32_t sampleDelay
Definition: adc/v0/adc.h:336
Adc_isPoweredUp
uint32_t Adc_isPoweredUp(uint32_t baseAddr)
This function checks if the ADC module is powered up.
status
uint32_t status
Definition: tisci_lpm.h:1
ADC_getSequencerStatus
void ADC_getSequencerStatus(uint32_t baseAddr, adcSequencerStatus_t *status)
This API is used to get the Sequencer status.
adcOperationMode_t
uint32_t adcOperationMode_t
Enum to select the ADC Operation Mode.
Definition: adc/v0/adc.h:204
adcStepConfig_t::fifoNum
uint32_t fifoNum
Definition: adc/v0/adc.h:350
adcStepConfig_t::mode
uint32_t mode
Definition: adc/v0/adc.h:322
ADC_clearAllSteps
void ADC_clearAllSteps(uint32_t baseAddr)
This API will clear all the ADC steps.
ADC_getCPUFIFOThresholdLevel
uint32_t ADC_getCPUFIFOThresholdLevel(uint32_t baseAddr, uint32_t fifoNum)
This API will read and return threshold level for a FIFO.
adcRevisionId_t
Structure for accessing Revision ID of ADC module.
Definition: adc/v0/adc.h:302
adcStepConfig_t::averaging
uint32_t averaging
Definition: adc/v0/adc.h:346
ADC_clearIntrStatus
void ADC_clearIntrStatus(uint32_t baseAddr, uint32_t intrMask)
This API is used to clear the interrupt status.
ADC_powerUp
void ADC_powerUp(uint32_t baseAddr, uint32_t powerUp)
This API will power up ADC Module.
adcStepConfig_t
Structure containing parameters for ADC step configuration.
Definition: adc/v0/adc.h:321
ADC_init
void ADC_init(uint32_t baseAddr, uint32_t errCorrection, uint32_t errOffset, uint32_t calibration)
This API is used to initialize the ADC module.
ADC_setRange
int32_t ADC_setRange(uint32_t baseAddr, uint32_t highRange, uint32_t lowRange)
This API is used to configure the range for ADC.
ADC_stepEnable
void ADC_stepEnable(uint32_t baseAddr, uint32_t stepId, uint32_t stepEnable)
This API will enable ADC step.
ADC_FIFODMAAccessEnable
void ADC_FIFODMAAccessEnable(uint32_t baseAddr, uint32_t fifoNum, uint32_t dmaLineEnable)
This API will enable DMA access for FIFO.
ADC_getFIFOData
uint32_t ADC_getFIFOData(uint32_t baseAddr, uint32_t fifoNum)
This API will read and return FIFO data.
ADC_getFIFOWordCount
uint32_t ADC_getFIFOWordCount(uint32_t baseAddr, uint32_t fifoNum)
This API will return number of word present in the FIFO.
adcFIFONum_t
uint32_t adcFIFONum_t
Enum to select FIFO to store the data.
Definition: adc/v0/adc.h:244
ADC_setDMAFIFOThresholdLevel
int32_t ADC_setDMAFIFOThresholdLevel(uint32_t baseAddr, uint32_t fifoNum, uint32_t threshold)
This API will configure DMA request level for a FIFO.
ADC_getRange
void ADC_getRange(uint32_t baseAddr, uint32_t *highRange, uint32_t *lowRange)
This API is used to get the range for conversion.
adcRevisionId_t::custom
uint32_t custom
Definition: adc/v0/adc.h:311
adcStepConfig_t::rangeCheckEnable
uint32_t rangeCheckEnable
Definition: adc/v0/adc.h:341
adcSequencerStatus_t::afeBusy
uint32_t afeBusy
Definition: adc/v0/adc.h:361
ADC_setClkDivider
int32_t ADC_setClkDivider(uint32_t baseAddr, uint32_t clkDivider)
This API will configure clock divider for the ADC Module.
adcRevisionId_t::scheme
uint32_t scheme
Definition: adc/v0/adc.h:303
ADC_setStepParams
int32_t ADC_setStepParams(uint32_t baseAddr, uint32_t stepId, const adcStepConfig_t *configParams)
This API will configure a step for analog to digital conversion.
adcSequencerStatus_t::stepId
uint32_t stepId
Definition: adc/v0/adc.h:370
adcRevisionId_t::rtlRev
uint32_t rtlRev
Definition: adc/v0/adc.h:307
ADC_getIntrRawStatus
uint32_t ADC_getIntrRawStatus(uint32_t baseAddr)
This API is used to get the raw interrupt status.
ADC_start
void ADC_start(uint32_t baseAddr, uint32_t adcEnable)
This API will start ADC.
adcStepId_t
uint32_t adcStepId_t
Enum to select the step for operation.
Definition: adc/v0/adc.h:157
ADC_disableIntr
void ADC_disableIntr(uint32_t baseAddr, uint32_t intrMask)
This API is used to disable interrupts.
ADC_setIdleMode
void ADC_setIdleMode(uint32_t baseAddr, uint32_t idleMode)
This API is used to configure ADC idle mode.
adcRevisionId_t::minor
uint32_t minor
Definition: adc/v0/adc.h:313
adcIntrSrc_t
uint32_t adcIntrSrc_t
Enum for ADC interrupts.
Definition: adc/v0/adc.h:260
ADC_writeEOI
void ADC_writeEOI(uint32_t baseAddr)
This API is used for EOI for ADC.
adcRevisionId_t::func
uint32_t func
Definition: adc/v0/adc.h:305
ADC_getRevisionId
void ADC_getRevisionId(uint32_t baseAddr, adcRevisionId_t *revId)
This API is used get the ADC revision ID.
adcStepConfig_t::openDelay
uint32_t openDelay
Definition: adc/v0/adc.h:330
ADC_stepIdTagEnable
void ADC_stepIdTagEnable(uint32_t baseAddr, uint32_t stepIdTag)
This API is used to configure the ADC module for storing step ID along with ADC data.
ADC_setCPUFIFOThresholdLevel
int32_t ADC_setCPUFIFOThresholdLevel(uint32_t baseAddr, uint32_t fifoNum, uint32_t threshold)
This API will configure threshold level for a FIFO.
adcChannel_t
uint32_t adcChannel_t
Enum to select the channel for input.
Definition: adc/v0/adc.h:129
adcRevisionId_t::major
uint32_t major
Definition: adc/v0/adc.h:309
adcIdleMode_t
uint32_t adcIdleMode_t
Enum to configure ADC idle mode.Applicable for TDA3XX Only.
Definition: adc/v0/adc.h:288
adcAveraging_t
uint32_t adcAveraging_t
Enum to number of samplings to average.
Definition: adc/v0/adc.h:222
adcStepConfig_t::channel
uint32_t channel
Definition: adc/v0/adc.h:326
ADC_enableIntr
void ADC_enableIntr(uint32_t baseAddr, uint32_t intrMask)
This API is used to enable interrupts.
adcSequencerStatus_t
Structure for reporting ADC sequencer status.
Definition: adc/v0/adc.h:360
ADC_getIntrStatus
uint32_t ADC_getIntrStatus(uint32_t baseAddr)
This API is used to get the pending interrupts.