Various resources of the SOC like the number of DMA channels, number of interrupt router outputs, number of interrupt aggregator virtual interrupt numbers etc. are usually managed by a resource management system or a resource manager.
In the case of AM275X devices, this is managed by the DM Firmware (Divice Manager Firmware) running on the WKUP R5 / DM R5 core. Once the DM firmware is loaded on DM R5 and is initialized, it will read a certain configuration data regarding the resources we would be using. Rom bootloader (RBL) should have loaded this as part of bootflow. This is largely an array of resource assignment entries, with each entry specifying the start number of the resource, count or number of resource needed, type of resource, host id of the core which will request for this resource, etc. Later when the request for a specific resource is made, the DM firmware will cross check the request parameters with this already sent configuration data, and the requested resources will only be allocated if that falls within the range in this configuration data. We call this the Resource Management Board Configuration or RM boardcfg.
Refer TISCI documentation for more details on the RM board configuration.
RM Boardcfg is stored in a C file {SDK_ROOT_DIRECTORY}\source\drivers\sciclient\sciclient_default_boardcfg\@VAR_SOC_NAME_LOWER\sciclient_defaultBoardcfg_rm.c
. Ultimately this file needs to be changed and rebuilt for the boardcfg change to take effect. This file is autogenerated using a SysConfig based GUI tool (K3 Respart Tool). This tool can be invoked from the commandline. To invoke the tool, run the following from the SDK root directory
HOST ID | Core |
---|---|
TISCI_HOST_ID_TIFS (0U) | TIFS ARM Cortex M4 |
TISCI_HOST_ID_WKUP_0_R5_0 (35U) | Cortex R5_0 (Secure Context) |
TISCI_HOST_ID_WKUP_0_R5_1 (36U) | Cortex R5_0 (Non Secure Context) |
TISCI_HOST_ID_MAIN_0_R5_0 (40U) | Cortex R5FSS0_0 (Secure Context) |
TISCI_HOST_ID_MAIN_0_R5_1 (41U) | Cortex R5FSS0_0 (Non-Secure Context) |
TISCI_HOST_ID_MAIN_0_R5_2 (42U) | Cortex R5FSS0_1 (Secure Context) |
TISCI_HOST_ID_MAIN_0_R5_3 (43U) | Cortex R5FSS0_1 (Non-Secure Context) |
TISCI_HOST_ID_MAIN_1_R5_0 (45U) | Cortex R5FSS1_0 (Secure Context) |
TISCI_HOST_ID_MAIN_1_R5_1 (46U) | Cortex R5FSS1_0 (Non-Secure Context) |
TISCI_HOST_ID_MAIN_1_R5_2 (47U) | Cortex R5FSS1_1 (Secure Context) |
TISCI_HOST_ID_MAIN_1_R5_3 (48U) | Cortex R5FSS1_1 (Non-Secure Context) |
TISCI_HOST_ID_C7X_0_0 (20U) | C7X_0_0 (Non-Secure Context) |
TISCI_HOST_ID_C7X_1_0 (22U) | C7X_1_0 (Non-Secure Context) |
TISCI_HOST_ID_DM2TIFS (250U) | DM2TIFS(Secure): DM to TIFS communication |
TISCI_HOST_ID_TIFS2DM (251U) | TIFS2DM(Non Secure): TIFS to DM communication |
TISCI_HOST_ID_HSM (253U) | HSM (Secure) |
TISCI_HOST_ID_DM (254U) | DM(Non Secure): Device Management |
{SDK_ROOT_DIRECTORY}\source\drivers\sciclient\sciclient_default_boardcfg\{SOC}\sciclient_defaultBoardcfg_rm.c
file.sciclient_set_boardcfg
application are updated with these changes. For this one can follow SYSFW Board Config Generation section