Optional processor specific message for sequence control.
| hdr | Message header |
| processor_id | ID of processor |
| control_flags_1_set | Optional Processor specific Control Flags to set. Setting a bit here implies required bit has to be set to 1. |
| control_flags_1_clear | Optional Processor specific Control Flags to clear. Setting a bit here implies required bit has to be cleared to 0. |
Data Fields | |
| struct tisci_header | hdr |
| uint8_t | processor_id |
| uint32_t | control_flags_1_set |
| uint32_t | control_flags_1_clear |
| struct tisci_header tisci_msg_proc_set_control_req::hdr |
| uint8_t tisci_msg_proc_set_control_req::processor_id |
| uint32_t tisci_msg_proc_set_control_req::control_flags_1_set |
| uint32_t tisci_msg_proc_set_control_req::control_flags_1_clear |