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AM64x MCU+ SDK
07.03.00
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Go to the documentation of this file.
54 #include <drivers/hw_include/csl_types.h>
65 #define ICSS_EMAC_MAX_PORTS_PER_INSTANCE (2)
74 #define ICSS_EMAC_MODE_MAC1 (1U)
76 #define ICSS_EMAC_MODE_MAC2 (2U)
78 #define ICSS_EMAC_MODE_SWITCH (3U)
80 #define ICSS_EMAC_MODE_DUALMAC (4U)
90 #define ICSS_EMAC_LEARNING_DISABLE (0U)
92 #define ICSS_EMAC_LEARNING_ENABLE (1U)
102 #define ICSS_EMAC_ENABLE_PACING (0)
104 #define ICSS_EMAC_DISABLE_PACING (1)
114 #define ICSS_EMAC_INTR_PACING_MODE1 (0)
124 #define ICSS_EMAC_QUEUE1 ((uint32_t)0U)
126 #define ICSS_EMAC_QUEUE2 ((uint32_t)1U)
128 #define ICSS_EMAC_QUEUE3 ((uint32_t)2U)
130 #define ICSS_EMAC_QUEUE4 ((uint32_t)3U)
132 #define ICSS_EMAC_QUEUE5 ((uint32_t)4U)
134 #define ICSS_EMAC_QUEUE6 ((uint32_t)5U)
136 #define ICSS_EMAC_QUEUE7 ((uint32_t)6U)
138 #define ICSS_EMAC_QUEUE8 ((uint32_t)7U)
140 #define ICSS_EMAC_QUEUE9 ((uint32_t)8U)
142 #define ICSS_EMAC_QUEUE10 ((uint32_t)9U)
144 #define ICSS_EMAC_QUEUE11 ((uint32_t)10U)
146 #define ICSS_EMAC_QUEUE12 ((uint32_t)11U)
148 #define ICSS_EMAC_QUEUE13 ((uint32_t)12U)
150 #define ICSS_EMAC_QUEUE14 ((uint32_t)13U)
152 #define ICSS_EMAC_QUEUE15 ((uint32_t)14U)
154 #define ICSS_EMAC_QUEUE16 ((uint32_t)15U)
156 #define ICSS_EMAC_COLQUEUE ((uint32_t)16U)
160 #define ICSS_EMAC_NUMQUEUES ((uint32_t)17U)
167 #define ICSS_EMAC_SWITCH_INSTANCE_CODE ((uint32_t)0u)
169 #define ICSS_EMAC_SWITCH_ERROR_BASE ((uint32_t)0x200001Fu)
171 #define ICSS_EMAC_SWITCH_ERROR_CODE ((ICSS_EMAC_SWITCH_ERROR_BASE | ((ICSS_EMAC_SWITCH_INSTANCE_CODE) << 16)))
173 #define ICSS_EMAC_SWITCH_ERROR_INFO (ICSS_EMAC_SWITCH_ERROR_CODE)
175 #define ICSS_EMAC_SWITCH_ERROR_WARNING (ICSS_EMAC_SWITCH_ERROR_CODE | 0x10000000u)
177 #define ICSS_EMAC_SWITCH_ERROR_MINOR (ICSS_EMAC_SWITCH_ERROR_CODE | 0x20000000u)
179 #define ICSS_EMAC_SWITCH_ERROR_MAJOR (ICSS_EMAC_SWITCH_ERROR_CODE | 0x30000000u)
181 #define ICSS_EMAC_SWITCH_ERROR_CRITICAL (ICSS_EMAC_SWITCH_ERROR_CODE | 0x40000000u)
185 #define ICSS_EMAC_SWITCH_SUCCESS (0u)
188 #define ICSS_EMAC_ERR_DEV_ALREADY_INSTANTIATED(instID) (0x30000000u + ICSS_EMAC_SWITCH_ERROR_BASE + ((instId) << 16) )
190 #define ICSS_EMAC_ERR_DEV_NOT_INSTANTIATED (ICSS_EMAC_SWITCH_ERROR_MAJOR + 1u)
192 #define ICSS_EMAC_ERR_SWITCH_INVALID_PARAM (ICSS_EMAC_SWITCH_ERROR_MAJOR + 2u)
194 #define ICSS_EMAC_ERR_CH_INVALID (ICSS_EMAC_SWITCH_ERROR_CRITICAL + 3u)
196 #define ICSS_EMAC_ERR_CH_ALREADY_INIT (ICSS_EMAC_SWITCH_ERROR_MAJOR + 4u)
198 #define ICSS_EMAC_ERR_TX_CH_ALREADY_CLOSED (ICSS_EMAC_SWITCH_ERROR_MAJOR + 5u)
200 #define ICSS_EMAC_ERR_TX_CH_NOT_OPEN (ICSS_EMAC_SWITCH_ERROR_MAJOR + 6u)
202 #define ICSS_EMAC_ERR_TX_NO_LINK (ICSS_EMAC_SWITCH_ERROR_MAJOR + 7u)
204 #define ICSS_EMAC_ERR_TX_OUT_OF_BD (ICSS_EMAC_SWITCH_ERROR_MAJOR + 8u)
206 #define ICSS_EMAC_ERR_RX_CH_INVALID (ICSS_EMAC_SWITCH_ERROR_CRITICAL + 9u)
208 #define ICSS_EMAC_ERR_RX_CH_ALREADY_INIT (ICSS_EMAC_SWITCH_ERROR_MAJOR + 10u)
210 #define ICSS_EMAC_ERR_RX_CH_ALREADY_CLOSED (ICSS_EMAC_SWITCH_ERROR_MAJOR + 11u)
212 #define ICSS_EMAC_ERR_RX_CH_NOT_OPEN (ICSS_EMAC_SWITCH_ERROR_MAJOR + 12u)
214 #define ICSS_EMAC_ERR_DEV_ALREADY_CREATED (ICSS_EMAC_SWITCH_ERROR_MAJOR + 13u)
216 #define ICSS_EMAC_ERR_DEV_NOT_OPEN (ICSS_EMAC_SWITCH_ERROR_MAJOR + 14u)
218 #define ICSS_EMAC_ERR_DEV_ALREADY_CLOSED (ICSS_EMAC_SWITCH_ERROR_MAJOR + 15u)
220 #define ICSS_EMAC_ERR_DEV_ALREADY_OPEN (ICSS_EMAC_SWITCH_ERROR_MAJOR + 16u)
222 #define ICSS_EMAC_ERR_RX_BUFFER_ALLOC_FAIL (ICSS_EMAC_SWITCH_ERROR_CRITICAL +17u)
224 #define ICSS_EMAC_SWITCH_INTERNAL_FAILURE (ICSS_EMAC_SWITCH_ERROR_MAJOR + 18u)
226 #define ICSS_EMAC_SWITCH_VLAN_UNAWARE_MODE (ICSS_EMAC_SWITCH_ERROR_MAJOR + 19u)
228 #define ICSS_EMAC_SWITCH_ALE_TABLE_FULL (ICSS_EMAC_SWITCH_ERROR_MAJOR + 20u)
230 #define ICSS_EMAC_SWITCH_ADDR_NOTFOUND (ICSS_EMAC_SWITCH_ERROR_MAJOR + 21u)
232 #define ICSS_EMAC_SWITCH_INVALID_VLANID (ICSS_EMAC_SWITCH_ERROR_MAJOR + 22u)
234 #define ICSS_EMAC_SWITCH_INVALID_PORT (ICSS_EMAC_SWITCH_ERROR_MAJOR + 23u)
236 #define ICSS_EMAC_SWITCH_BD_ALLOC_FAIL (ICSS_EMAC_SWITCH_ERROR_MAJOR + 24u)
238 #define ICSS_EMAC_ERR_BADPACKET (ICSS_EMAC_SWITCH_ERROR_MAJOR + 25u)
240 #define ICSS_EMAC_ERR_COLLISION_FAIL (ICSS_EMAC_SWITCH_ERROR_MAJOR + 26u)
242 #define ICSS_EMAC_ERR_MACFATAL (ICSS_EMAC_SWITCH_ERROR_CRITICAL + 26u)
248 #define ICSS_EMAC_MAXMTU (1518U)
250 #define ICSS_EMAC_MINMTU (14U)
256 #define ICSS_EMAC_PORT_0 (0)
262 #define ICSS_EMAC_PORT_1 (1U)
268 #define ICSS_EMAC_PORT_2 (2U)
273 #define ICSS_EMAC_IOCTL_PORT_CTRL_DISABLE (0u)
276 #define ICSS_EMAC_IOCTL_PORT_CTRL_ENABLE (1u)
285 #define ICSS_EMAC_STORM_PREV_CTRL_ENABLE (0u)
287 #define ICSS_EMAC_STORM_PREV_CTRL_DISABLE (1u)
289 #define ICSS_EMAC_STORM_PREV_CTRL_SET_CREDITS (2u)
291 #define ICSS_EMAC_STORM_PREV_CTRL_INIT (3u)
293 #define ICSS_EMAC_STORM_PREV_CTRL_RESET (4u)
295 #define ICSS_EMAC_STORM_PREV_CTRL_ENABLE_BC (5u)
297 #define ICSS_EMAC_STORM_PREV_CTRL_DISABLE_BC (6u)
299 #define ICSS_EMAC_STORM_PREV_CTRL_SET_CREDITS_BC (7u)
301 #define ICSS_EMAC_STORM_PREV_CTRL_INIT_BC (8u)
303 #define ICSS_EMAC_STORM_PREV_CTRL_RESET_BC (9u)
305 #define ICSS_EMAC_STORM_PREV_CTRL_ENABLE_MC (10u)
307 #define ICSS_EMAC_STORM_PREV_CTRL_DISABLE_MC (11u)
309 #define ICSS_EMAC_STORM_PREV_CTRL_SET_CREDITS_MC (12u)
311 #define ICSS_EMAC_STORM_PREV_CTRL_INIT_MC (13u)
313 #define ICSS_EMAC_STORM_PREV_CTRL_RESET_MC (14u)
315 #define ICSS_EMAC_STORM_PREV_CTRL_ENABLE_UC (15u)
317 #define ICSS_EMAC_STORM_PREV_CTRL_DISABLE_UC (16u)
319 #define ICSS_EMAC_STORM_PREV_CTRL_SET_CREDITS_UC (17u)
321 #define ICSS_EMAC_STORM_PREV_CTRL_INIT_UC (18u)
323 #define ICSS_EMAC_STORM_PREV_CTRL_RESET_UC (19u)
333 #define ICSS_EMAC_LEARN_CTRL_UPDATE_TABLE (0u)
335 #define ICSS_EMAC_LEARN_CTRL_CLR_TABLE (1u)
337 #define ICSS_EMAC_LEARN_CTRL_AGEING (2u)
339 #define ICSS_EMAC_LEARN_CTRL_FIND_MAC (3u)
341 #define ICSS_EMAC_LEARN_CTRL_REMOVE_MAC (4u)
343 #define ICSS_EMAC_LEARN_CTRL_INC_COUNTER (5u)
345 #define ICSS_EMAC_LEARN_CTRL_INIT_TABLE (6u)
347 #define ICSS_EMAC_LEARN_CTRL_SET_PORTSTATE (7u)
357 #define ICSS_EMAC_IOCTL_STAT_CTRL_GET (0u)
359 #define ICSS_EMAC_IOCTL_STAT_CTRL_CLEAR (1u)
369 #define ICSS_EMAC_IOCTL_PORT_CTRL (0u)
371 #define ICSS_EMAC_IOCTL_LEARNING_CTRL (1u)
373 #define ICSS_EMAC_IOCTL_STORM_PREV_CTRL (2u)
375 #define ICSS_EMAC_IOCTL_STATS_CTRL (3u)
377 #define ICSS_EMAC_IOCTL_PROMISCUOUS_CTRL (4u)
379 #define ICSS_EMAC_IOCTL_MULTICAST_FILTER_CTRL (5u)
381 #define ICSS_EMAC_IOCTL_VLAN_FILTER_CTRL (6u)
391 #define ICSS_EMAC_IOCTL_MULTICAST_FILTER_CTRL_ENABLE (0u)
393 #define ICSS_EMAC_IOCTL_MULTICAST_FILTER_CTRL_DISABLE (1u)
395 #define ICSS_EMAC_IOCTL_MULTICAST_FILTER_CTRL_OVERRIDE_HASHMASK (2u)
397 #define ICSS_EMAC_IOCTL_MULTICAST_FILTER_CTRL_ADD_MACID (3u)
399 #define ICSS_EMAC_IOCTL_MULTICAST_FILTER_CTRL_REMOVE_MACID (4u)
401 #define ICSS_EMAC_IOCTL_MULTICAST_FILTER_CTRL_GET_DROPPED (5u)
411 #define ICSS_EMAC_IOCTL_VLAN_FILTER_CTRL_ENABLE_CMD (0u)
413 #define ICSS_EMAC_IOCTL_VLAN_FILTER_CTRL_DISABLE_CMD (1u)
415 #define ICSS_EMAC_IOCTL_VLAN_FILTER_CTRL_UNTAG_HOST_RCV_ALL_CMD (2u)
417 #define ICSS_EMAC_IOCTL_VLAN_FILTER_CTRL_UNTAG_HOST_RCV_NAL_CMD (3u)
419 #define ICSS_EMAC_IOCTL_VLAN_FILTER_CTRL_PRIOTAG_HOST_RCV_ALL_CMD (4u)
421 #define ICSS_EMAC_IOCTL_VLAN_FILTER_CTRL_PRIOTAG_HOST_RCV_NAL_CMD (5u)
423 #define ICSS_EMAC_IOCTL_VLAN_FILTER_CTRL_ADD_VID_CMD (6u)
425 #define ICSS_EMAC_IOCTL_VLAN_FILTER_CTRL_REMOVE_VID_CMD (7u)
432 #define ICSS_EMAC_LEARNING_PORT_STATE_LEARNING (0U)
433 #define ICSS_EMAC_LEARNING_PORT_STATE_NOT_LEARNING (1U)
434 #define ICSS_EMAC_LEARNING_PORT_STATE_LOCKED (2U)
437 #define ICSS_EMAC_OBJECT_SIZE_IN_BYTES (45200)
457 typedef struct ICSS_EMAC_FwStaticMmap_s
460 uint32_t versionOffset;
461 uint32_t version2Offset;
462 uint32_t featureOffset;
463 uint32_t futureFeatureOffset;
464 uint32_t statisticsOffset;
465 uint32_t statisticsSize;
466 uint32_t stormPreventionOffsetBC;
467 uint32_t phySpeedOffset;
468 uint32_t portStatusOffset;
469 uint32_t portControlAddr;
470 uint32_t portMacAddr;
471 uint32_t rxInterruptStatusOffset;
472 uint32_t stormPreventionOffsetMC;
473 uint32_t stormPreventionOffsetUC;
474 uint32_t p0QueueDescOffset;
475 uint32_t p0ColQueueDescOffset;
476 uint32_t emacTtsConfigBaseOffset;
477 uint32_t interfaceMacAddrOffset;
478 uint32_t colStatusAddr;
479 uint32_t promiscuousModeOffset;
485 typedef struct ICSS_EMAC_FwDynamicMmap_s
487 uint32_t queueSizeOffset;
488 uint32_t queueOffset;
489 uint32_t queueDescriptorOffset;
492 uint32_t collisionQueueSize;
494 uint32_t p0Q1BufferDescOffset;
495 uint32_t p0ColBufferDescOffset;
497 uint32_t p0Q1BufferOffset;
498 uint32_t transmitQueuesBufferOffset;
499 uint32_t p0ColBufferOffset;
500 uint32_t hostQ1RxContextOffset;
501 uint32_t p1Q1SwitchTxContextOffset;
502 uint32_t portQueueDescOffset;
503 uint32_t q1EmacTxContextOffset;
510 typedef struct ICSS_EMAC_FwVlanFilterParams_s
512 uint32_t ctrlBitmapOffset;
513 uint32_t ctrlEnableBit;
514 uint32_t ctrlUntagHostRcvAllowBit;
515 uint32_t ctrlPriotagHostRcvAllowBit;
516 uint32_t filterTableBaseAddress;
517 uint32_t vidMaxValue;
523 typedef struct ICSS_EMAC_FwMulticastFilterParams_s
526 uint32_t maskSizeBytes;
527 uint32_t maskInitVal;
529 uint32_t overrideStatusOffset;
530 uint32_t tableOffset;
531 uint32_t ctrlEnabledValue;
532 uint32_t ctrlDisabledValue;
533 uint32_t maskOverrideSetValue;
534 uint32_t maskOverrideNotSetValue;
535 uint32_t hostRcvAllowedValue;
536 uint32_t hostRcvNotAllowedValue;
542 typedef struct ICSS_EMAC_Attrs_s
550 uint8_t halfDuplexEnable;
554 uint8_t enableIntrPacing;
558 uint8_t intrPacingMode;
562 uint16_t pacingThreshold;
564 uint8_t ethPrioQueue;
569 uint8_t learningEnable;
586 uint32_t l3OcmcBaseAddr;
590 uint32_t linkTaskPriority;
592 uint32_t rxTaskPriority;
594 uint32_t txTaskPriority;
601 typedef struct ICSS_EMAC_InternalObject_t
611 typedef struct ICSS_EMAC_Config_s
622 typedef struct ICSS_EMAC_CallBackConfig_s
628 typedef struct ICSS_EMAC_CallBackObject_s
648 typedef struct ICSS_EMAC_Params_s
665 typedef struct ICSS_EMAC_RxArgument_s
669 uint32_t destAddress;
683 typedef struct ICSS_EMAC_TxArgument_s
687 const uint8_t *srcAddress;
691 uint8_t queuePriority;
693 uint16_t lengthOfPacket;
700 typedef struct ICSS_EMAC_IoctlCmd_s
710 typedef struct ICSS_EMAC_PruStatistics_s
717 volatile uint32_t txBcast;
718 volatile uint32_t txMcast;
719 volatile uint32_t txUcast;
720 volatile uint32_t txOctets;
722 volatile uint32_t rxBcast;
723 volatile uint32_t rxMcast;
724 volatile uint32_t rxUcast;
725 volatile uint32_t rxOctets;
727 volatile uint32_t tx64byte;
728 volatile uint32_t tx65_127byte;
729 volatile uint32_t tx128_255byte;
730 volatile uint32_t tx256_511byte;
731 volatile uint32_t tx512_1023byte;
732 volatile uint32_t tx1024byte;
734 volatile uint32_t rx64byte;
735 volatile uint32_t rx65_127byte;
736 volatile uint32_t rx128_255byte;
737 volatile uint32_t rx256_511byte;
738 volatile uint32_t rx512_1023byte;
739 volatile uint32_t rx1024byte;
741 volatile uint32_t lateColl;
742 volatile uint32_t singleColl;
743 volatile uint32_t multiColl;
744 volatile uint32_t excessColl;
746 volatile uint32_t rxMisAlignmentFrames;
747 volatile uint32_t stormPrevCounter;
748 volatile uint32_t stormPrevCounterMC;
749 volatile uint32_t stormPrevCounterUC;
750 volatile uint32_t macRxError;
752 volatile uint32_t SFDError;
753 volatile uint32_t defTx;
754 volatile uint32_t macTxError;
755 volatile uint32_t rxOverSizedFrames;
756 volatile uint32_t rxUnderSizedFrames;
757 volatile uint32_t rxCRCFrames;
759 volatile uint32_t droppedPackets;
762 volatile uint32_t txOverFlow;
763 volatile uint32_t txUnderFlow;
764 volatile uint32_t sqeTestError;
765 volatile uint32_t TXqueueLevel;
766 volatile uint32_t CSError;
832 uint32_t ioctlCommand,
865 int32_t *queueNumber);
Tx packet processing information block that needs to passed into call to ICSS_EMAC_TxPacket.
Definition: icss_emac.h:685
struct ICSS_EMAC_Config_s * ICSS_EMAC_Handle
Alias for ICSS EMAC Handle containing base addresses and modules.
Definition: icss_emac.h:443
Rx packet processing information block that needs to passed into call to ICSS_EMAC_RxPktGet.
Definition: icss_emac.h:667
int32_t ICSS_EMAC_txPacket(const ICSS_EMAC_TxArgument *txArg, void *userArg)
API to queue a frame which has to be transmitted on the specified port queue.
#define ICSS_EMAC_NUMQUEUES
Definition: icss_emac.h:160
int32_t ICSS_EMAC_ioctl(ICSS_EMAC_Handle icssEmacHandle, uint32_t ioctlCommand, uint8_t portNo, void *ioctlParams)
IOCTL Function for ICSS EMAC.
#define ICSS_EMAC_OBJECT_SIZE_IN_BYTES
Definition: icss_emac.h:438
void ICSS_EMAC_params_init(ICSS_EMAC_Params *params)
Initialize the parmeters data structure with defaults.
void ICSS_EMAC_init(void)
This function initializes the ICSS_EMAC module.
ICSS EMAC Dynamic Firmware Memory Map offsets.
Definition: icss_emac.h:487
int32_t(* ICSS_EMAC_CallBack)(void *arg0, void *arg1, void *arg2)
definition for a generic protocol callback function
Definition: icss_emac.h:449
int32_t ICSS_EMAC_rxPktGet(ICSS_EMAC_RxArgument *rxArg, void *userArg)
Retrieves a frame from a host queue and copies it in the allocated stack buffer.
ICSS EMAC VLAN Filtering Parameters.
Definition: icss_emac.h:512
ICSS_EMAC_Handle ICSS_EMAC_open(uint32_t idx, const ICSS_EMAC_Params *params)
API to initialize and configure ICSS in MAC/Switch Mode.
Statistics structure for capturing statistics on PRU.
Definition: icss_emac.h:712
uint16_t reserved
Definition: tisci_boardcfg_rm.h:2
void ICSS_EMAC_close(ICSS_EMAC_Handle icssEmacHandle)
API to stop MAC/Switch Mode.
PRUICSS Interrupt controller initialisation data structure.
Definition: pruicss/v0/pruicss.h:273
int32_t ICSS_EMAC_rxPktInfo(ICSS_EMAC_Handle icssEmacHandle, int32_t *portNumber, int32_t *queueNumber)
API to retrieve the information about the received frame which is then used to dequeue the frame from...
void ICSS_EMAC_deinit(void)
This function de-initializes the ICSS_EMAC module.
Definition: icss_emac.h:630
ICSS EMAC Static Firmware Memory Map offsets.
Definition: icss_emac.h:459
Opaque ICSS EMAC driver object.
Definition: icss_emac.h:603
Definition: icss_emac.h:544
ICSS EMAC Multicast Filtering Parameters.
Definition: icss_emac.h:525
ICSS_EMAC Parameters.
Definition: icss_emac.h:650
Generic callback configuration for protocol specific callbacks.
Definition: icss_emac.h:624
IOCTL command members for configuring switch/EMAC.
Definition: icss_emac.h:702
struct PRUICSS_Config_s * PRUICSS_Handle
A handle that is returned from a PRUICSS_open() call. This handle is required for calling other APIs.
Definition: pruicss/v0/pruicss.h:234
#define ICSS_EMAC_MAX_PORTS_PER_INSTANCE
Definition: icss_emac.h:65
Base EMAC handle containing pointers to all modules required for driver to work.
Definition: icss_emac.h:613