AM64x MCU+ SDK  07.03.00
ICSS_EMAC_Attrs Struct Reference

Data Fields

uint8_t emacMode
 
uint32_t phyAddr [ICSS_EMAC_MAX_PORTS_PER_INSTANCE]
 
uint8_t halfDuplexEnable
 
uint8_t enableIntrPacing
 
uint8_t intrPacingMode
 
uint16_t pacingThreshold
 
uint8_t ethPrioQueue
 
uint8_t learningEnable
 
uint8_t portMask
 
uint32_t linkIntNum
 
uint32_t rxIntNum
 
uint32_t txIntNum
 
uint8_t macId [6]
 
uint32_t l3OcmcBaseAddr
 
uint32_t l3OcmcSize
 
uint32_t linkTaskPriority
 
uint32_t rxTaskPriority
 
uint32_t txTaskPriority
 

Field Documentation

◆ emacMode

uint8_t ICSS_EMAC_Attrs::emacMode

Mode from ICSS_EMAC_Modes

◆ phyAddr

uint32_t ICSS_EMAC_Attrs::phyAddr[ICSS_EMAC_MAX_PORTS_PER_INSTANCE]

Phy address of the ports. For mac, each handle will have single port only and two for Switch handle

◆ halfDuplexEnable

uint8_t ICSS_EMAC_Attrs::halfDuplexEnable

Flag to enable Half duplex capability. Firmware support also is required to enable the functionality

◆ enableIntrPacing

uint8_t ICSS_EMAC_Attrs::enableIntrPacing

Flag to enable Interrupt pacing. Valid values : ICSS_EMAC_InterruptPacingConfig

◆ intrPacingMode

uint8_t ICSS_EMAC_Attrs::intrPacingMode

Pacing mode to be used. Valid values : ICSS_EMAC_InterruptPacingModes

◆ pacingThreshold

uint16_t ICSS_EMAC_Attrs::pacingThreshold

Number of packets threshold for Pacing Mode1

◆ ethPrioQueue

uint8_t ICSS_EMAC_Attrs::ethPrioQueue

Queue Priority separation for RT and NRT packets. If packets are in Queue <= ethPrioQueue, they will be forwarded to NRT callback and others to RT callback

◆ learningEnable

uint8_t ICSS_EMAC_Attrs::learningEnable

Flag to enable learning. Not applicable for Mac mode. Valid values : ICSS_EMAC_LearningModes

◆ portMask

uint8_t ICSS_EMAC_Attrs::portMask

Port Mask. Indication to LLD which ports to be used Valid values: ICSS_EMAC_MODE_SWITCH, ICSS_EMAC_MODE_MAC1, ICSS_EMAC_MODE_MAC2

◆ linkIntNum

uint32_t ICSS_EMAC_Attrs::linkIntNum

◆ rxIntNum

uint32_t ICSS_EMAC_Attrs::rxIntNum

◆ txIntNum

uint32_t ICSS_EMAC_Attrs::txIntNum

◆ macId

uint8_t ICSS_EMAC_Attrs::macId[6]

MacId to be used for the interface

◆ l3OcmcBaseAddr

uint32_t ICSS_EMAC_Attrs::l3OcmcBaseAddr

L3 OCMC Base Address

◆ l3OcmcSize

uint32_t ICSS_EMAC_Attrs::l3OcmcSize

L3 OCMCSize

◆ linkTaskPriority

uint32_t ICSS_EMAC_Attrs::linkTaskPriority

◆ rxTaskPriority

uint32_t ICSS_EMAC_Attrs::rxTaskPriority

◆ txTaskPriority

uint32_t ICSS_EMAC_Attrs::txTaskPriority