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AM64x MCU+ SDK
07.03.00
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Go to the documentation of this file.
59 #include <drivers/hw_include/cslr.h>
60 #include <drivers/hw_include/cslr_uart.h>
61 #include <drivers/hw_include/hw_types.h>
83 #define UART_TRANSFER_STATUS_SUCCESS (0U)
85 #define UART_TRANSFER_STATUS_TIMEOUT (1U)
87 #define UART_TRANSFER_STATUS_ERROR_BI (2U)
89 #define UART_TRANSFER_STATUS_ERROR_FE (3U)
91 #define UART_TRANSFER_STATUS_ERROR_PE (4U)
93 #define UART_TRANSFER_STATUS_ERROR_OE (5U)
95 #define UART_TRANSFER_STATUS_CANCELLED (6U)
97 #define UART_TRANSFER_STATUS_STARTED (7U)
99 #define UART_TRANSFER_STATUS_READ_TIMEOUT (8U)
101 #define UART_TRANSFER_STATUS_ERROR_INUSE (9U)
103 #define UART_TRANSFER_STATUS_ERROR_OTH (10U)
125 #define UART_TRANSFER_MODE_BLOCKING (0U)
130 #define UART_TRANSFER_MODE_CALLBACK (1U)
153 #define UART_READ_RETURN_MODE_FULL (0U)
157 #define UART_READ_RETURN_MODE_PARTIAL (1U)
168 #define UART_LEN_5 (0U)
169 #define UART_LEN_6 (1U)
170 #define UART_LEN_7 (2U)
171 #define UART_LEN_8 (3U)
182 #define UART_STOPBITS_1 (0U)
183 #define UART_STOPBITS_2 (1U)
194 #define UART_PARITY_NONE (0x00U)
195 #define UART_PARITY_ODD (0x01U)
196 #define UART_PARITY_EVEN (0x03U)
197 #define UART_PARITY_FORCED0 (0x07U)
198 #define UART_PARITY_FORCED1 (0x05U)
209 #define UART_FCTYPE_NONE (0x00U)
210 #define UART_FCTYPE_HW (0x02U)
221 #define UART_FCPARAM_RXNONE (0x00U)
222 #define UART_FCPARAM_RXXONXOFF_2 (0x01U)
223 #define UART_FCPARAM_RXXONXOFF_1 (0x02U)
224 #define UART_FCPARAM_RXXONXOFF_12 (0x03U)
225 #define UART_FCPARAM_AUTO_RTS (0x40U)
236 #define UART_FCPARAM_TXNONE (0x00U)
237 #define UART_FCPARAM_TXXONXOFF_2 (0x04U)
238 #define UART_FCPARAM_TXXONXOFF_1 (0x08U)
239 #define UART_FCPARAM_TXXONXOFF_12 (0x0CU)
240 #define UART_FCPARAM_AUTO_CTS (0x80U)
251 #define UART_RXTRIGLVL_1 (1U)
252 #define UART_RXTRIGLVL_8 (8U)
253 #define UART_RXTRIGLVL_16 (16U)
254 #define UART_RXTRIGLVL_56 (56U)
255 #define UART_RXTRIGLVL_60 (60U)
266 #define UART_TXTRIGLVL_1 (1U)
267 #define UART_TXTRIGLVL_8 (8U)
268 #define UART_TXTRIGLVL_16 (16U)
269 #define UART_TXTRIGLVL_32 (32U)
270 #define UART_TXTRIGLVL_56 (56U)
281 #define UART_OPER_MODE_16X (0U)
282 #define UART_OPER_MODE_SIR (1U)
283 #define UART_OPER_MODE_16X_AUTO_BAUD (2U)
284 #define UART_OPER_MODE_13X (3U)
285 #define UART_OPER_MODE_MIR (4U)
286 #define UART_OPER_MODE_FIR (5U)
287 #define UART_OPER_MODE_CIR (6U)
288 #define UART_OPER_MODE_DISABLED (7U)
300 #define UART_TX_FIFO_NOT_FULL ( \
301 UART_SSR_TX_FIFO_FULL_TX_FIFO_FULL_VALUE_0)
302 #define UART_TX_FIFO_FULL ( \
303 UART_SSR_TX_FIFO_FULL_TX_FIFO_FULL_VALUE_1)
314 #define UART_INTID_MODEM_STAT (UART_IIR_IT_TYPE_IT_TYPE_VALUE_0 \
316 UART_IIR_IT_TYPE_SHIFT)
317 #define UART_INTID_TX_THRES_REACH (UART_IIR_IT_TYPE_IT_TYPE_VALUE_1 \
319 UART_IIR_IT_TYPE_SHIFT)
320 #define UART_INTID_RX_THRES_REACH (UART_IIR_IT_TYPE_IT_TYPE_VALUE_2 \
322 UART_IIR_IT_TYPE_SHIFT)
323 #define UART_INTID_RX_LINE_STAT_ERROR (UART_IIR_IT_TYPE_IT_TYPE_VALUE_3 \
325 UART_IIR_IT_TYPE_SHIFT)
326 #define UART_INTID_CHAR_TIMEOUT (UART_IIR_IT_TYPE_IT_TYPE_VALUE_6 \
328 UART_IIR_IT_TYPE_SHIFT)
329 #define UART_INTID_XOFF_SPEC_CHAR_DETECT (UART_IIR_IT_TYPE_IT_TYPE_VALUE_8 \
331 UART_IIR_IT_TYPE_SHIFT)
332 #define UART_INTID_MODEM_SIG_STATE_CHANGE (UART_IIR_IT_TYPE_IT_TYPE_VALUE_10 \
334 UART_IIR_IT_TYPE_SHIFT)
337 #define UART_INTR_PENDING (0U)
338 #define UART_N0_INTR_PENDING (1U)
348 #define UART_INTR_CTS (UART_IER_CTS_IT_MASK)
349 #define UART_INTR_RTS (UART_IER_RTS_IT_MASK)
350 #define UART_INTR_XOFF (UART_IER_XOFF_IT_MASK)
351 #define UART_INTR_SLEEPMODE (UART_IER_SLEEP_MODE_MASK)
352 #define UART_INTR_MODEM_STAT (UART_IER_MODEM_STS_IT_MASK)
353 #define UART_INTR_LINE_STAT (UART_IER_LINE_STS_IT_MASK)
354 #define UART_INTR_THR (UART_IER_THR_IT_MASK)
355 #define UART_INTR_RHR_CTI (UART_IER_RHR_IT_MASK)
357 #define UART_INTR2_RX_EMPTY (UART_IER2_EN_RXFIFO_EMPTY_MASK)
358 #define UART_INTR2_TX_EMPTY (UART_IER2_EN_TXFIFO_EMPTY_MASK)
368 #define UART_FIFO_PE_FE_BI_DETECTED (UART_LSR_RX_FIFO_STS_MASK)
369 #define UART_BREAK_DETECTED_ERROR (UART_LSR_RX_BI_MASK)
370 #define UART_FRAMING_ERROR (UART_LSR_RX_FE_MASK)
371 #define UART_PARITY_ERROR (UART_LSR_RX_PE_MASK)
372 #define UART_OVERRUN_ERROR (UART_LSR_RX_OE_MASK)
382 #define UART_REG_CONFIG_MODE_A ((uint32_t) 0x0080)
383 #define UART_REG_CONFIG_MODE_B ((uint32_t) 0x00BF)
384 #define UART_REG_OPERATIONAL_MODE ((uint32_t) 0x007F)
857 static inline void UART_putChar(uint32_t baseAddr, uint8_t byteTx);
873 static inline uint32_t
UART_getChar(uint32_t baseAddr, uint8_t *pChar);
903 static inline void UART_intrEnable(uint32_t baseAddr, uint32_t intrFlag);
1017 HW_WR_REG32(baseAddr + UART_THR, (uint32_t) byteTx);
1022 uint32_t lcrRegValue = 0U;
1023 uint32_t retVal = FALSE;
1026 lcrRegValue = HW_RD_REG32(baseAddr + UART_LCR);
1029 HW_WR_REG32(baseAddr + UART_LCR, HW_RD_REG32(baseAddr + UART_LCR)
1033 if ((uint32_t) UART_LSR_RX_FIFO_E_RX_FIFO_E_VALUE_0 !=
1034 (HW_RD_REG32(baseAddr + UART_LSR) &
1035 UART_LSR_RX_FIFO_E_MASK))
1037 uint32_t tempRetVal = HW_RD_REG32(baseAddr + UART_RHR);
1038 *pChar = (uint8_t)tempRetVal;
1043 HW_WR_REG32(baseAddr + UART_LCR, lcrRegValue);
1050 uint32_t enhanFnBitVal = 0U;
1051 uint32_t lcrRegValue = 0U;
1054 if ((intrFlag & 0xF0U) > 0U)
1057 lcrRegValue = HW_RD_REG32(baseAddr + UART_LCR);
1062 enhanFnBitVal = HW_RD_FIELD32(baseAddr + UART_EFR, UART_EFR_ENHANCED_EN);
1064 HW_WR_FIELD32(baseAddr + UART_EFR, UART_EFR_ENHANCED_EN,
1065 UART_EFR_ENHANCED_EN_ENHANCED_EN_U_VALUE_1);
1068 HW_WR_REG32(baseAddr + UART_LCR, lcrRegValue);
1071 lcrRegValue = HW_RD_REG32(baseAddr + UART_LCR);
1074 HW_WR_REG32(baseAddr + UART_LCR, HW_RD_REG32(baseAddr + UART_LCR)
1099 HW_WR_REG32(baseAddr + UART_IER, intrFlag & 0xF0U);
1102 HW_WR_REG32(baseAddr + UART_LCR, lcrRegValue);
1105 lcrRegValue = HW_RD_REG32(baseAddr + UART_LCR);
1110 HW_WR_FIELD32(baseAddr + UART_EFR, UART_EFR_ENHANCED_EN, enhanFnBitVal);
1113 HW_WR_REG32(baseAddr + UART_LCR, lcrRegValue);
1119 HW_WR_REG32(baseAddr + UART_IER, HW_RD_REG32(baseAddr + UART_IER) |
1120 (intrFlag & 0x0FU));
1125 uint32_t enhanFnBitVal;
1126 uint32_t lcrRegValue;
1129 if((intrFlag & 0xF0U) > 0U)
1132 lcrRegValue = HW_RD_REG32(baseAddr + UART_LCR);
1137 enhanFnBitVal = HW_RD_FIELD32(baseAddr + UART_EFR, UART_EFR_ENHANCED_EN);
1139 HW_WR_FIELD32(baseAddr + UART_EFR, UART_EFR_ENHANCED_EN,
1140 UART_EFR_ENHANCED_EN_ENHANCED_EN_U_VALUE_1);
1143 HW_WR_REG32(baseAddr + UART_LCR, lcrRegValue);
1147 lcrRegValue = HW_RD_REG32(baseAddr + UART_LCR);
1150 HW_WR_REG32(baseAddr + UART_LCR, HW_RD_REG32(baseAddr + UART_LCR)
1153 HW_WR_REG32(baseAddr + UART_IER, HW_RD_REG32(baseAddr + UART_IER) &
1154 ~(intrFlag & 0xFFU));
1157 HW_WR_REG32(baseAddr + UART_LCR, lcrRegValue);
1160 if((intrFlag & 0xF0U) > 0U)
1163 lcrRegValue = HW_RD_REG32(baseAddr + UART_LCR);
1168 HW_WR_FIELD32(baseAddr + UART_EFR, UART_EFR_ENHANCED_EN, enhanFnBitVal);
1171 HW_WR_REG32(baseAddr + UART_LCR, lcrRegValue);
1178 HW_WR_REG32(baseAddr + UART_IER2, HW_RD_REG32(baseAddr + UART_IER2) |
1179 (intrFlag & 0x03U));
1184 HW_WR_REG32(baseAddr + UART_IER2, HW_RD_REG32(baseAddr + UART_IER2) &
1185 ~(intrFlag & 0x3U));
1190 uint32_t lcrRegValue = 0U;
1191 uint32_t retVal = 0U;
1194 lcrRegValue = HW_RD_REG32(baseAddr + UART_LCR);
1197 HW_WR_REG32(baseAddr + UART_LCR, HW_RD_REG32(baseAddr + UART_LCR)
1200 retVal = HW_RD_REG32(baseAddr + UART_IIR) & UART_IIR_IT_TYPE_MASK;
1203 HW_WR_REG32(baseAddr + UART_LCR, lcrRegValue);
1210 uint32_t retVal = 0U;
1212 retVal = HW_RD_REG32(baseAddr + UART_ISR2) &
1213 (UART_IER2_EN_RXFIFO_EMPTY_MASK | UART_IER2_EN_TXFIFO_EMPTY_MASK);
void UART_deinit(void)
This function de-initializes the UART module.
void * readTransferSem
Definition: uart/v0/uart.h:545
#define UART_TRANSFER_MODE_BLOCKING
UART read/write APIs blocks execution. This mode can only be used when called within a Task context.
Definition: uart/v0/uart.h:125
SemaphoreP_Object lockObj
Definition: uart/v0/uart.h:543
static void UART_Transaction_init(UART_Transaction *trans)
Function to initialize the UART_Transaction struct to its defaults.
Definition: uart/v0/uart.h:824
SemaphoreP_Object readTransferSemObj
Definition: uart/v0/uart.h:548
#define UART_REG_CONFIG_MODE_B
Definition: uart/v0/uart.h:383
#define UART_STOPBITS_1
Definition: uart/v0/uart.h:182
#define UART_TRANSFER_STATUS_SUCCESS
Transaction success.
Definition: uart/v0/uart.h:83
UART_Handle handle
Definition: uart/v0/uart.h:503
static void UART_intr2Enable(uint32_t baseAddr, uint32_t intrFlag)
This API enables the specified interrupts in the UART mode of operation for IER2.
Definition: uart/v0/uart.h:1175
void * hwiHandle
Definition: uart/v0/uart.h:555
uint16_t index
Definition: tisci_rm_proxy.h:3
const void * writeBuf
Definition: uart/v0/uart.h:510
uint32_t timeout
Definition: uart/v0/uart.h:403
void * UART_Handle
A handle that is returned from a UART_open() call.
Definition: uart/v0/uart.h:72
UART_Transaction * writeTrans
Definition: uart/v0/uart.h:534
UART_Handle UART_getHandle(uint32_t index)
Function to return a open'ed UART handle given a UART instance index.
int32_t UART_writeCancel(UART_Handle handle, UART_Transaction *trans)
Function to perform UART canceling of current write transaction.
UART global configuration array.
Definition: uart/v0/uart.h:571
uint32_t writeMode
Definition: uart/v0/uart.h:445
static uint32_t UART_getIntr2Status(uint32_t baseAddr)
This API determines the UART Interrupt Status 2.
Definition: uart/v0/uart.h:1208
uint32_t writeSizeRemaining
Definition: uart/v0/uart.h:514
void(* UART_CallbackFxn)(UART_Handle handle, UART_Transaction *transaction)
The definition of a callback function used by the UART driver when used in UART_TRANSFER_MODE_CALLBAC...
Definition: uart/v0/uart.h:418
uint32_t dataLength
Definition: uart/v0/uart.h:435
#define SystemP_WAIT_FOREVER
Value to use when needing a timeout of infinity or wait forver until resource is available.
Definition: SystemP.h:83
uint8_t intrPriority
Definition: uart/v0/uart.h:463
int32_t UART_write(UART_Handle handle, UART_Transaction *trans)
Function to perform UART write operation.
uint32_t readMode
Definition: uart/v0/uart.h:441
#define UART_RXTRIGLVL_8
Definition: uart/v0/uart.h:252
uint32_t intrEnable
Definition: uart/v0/uart.h:459
static void UART_intrDisable(uint32_t baseAddr, uint32_t intrFlag)
This API disables the specified interrupts in the UART mode of operation.
Definition: uart/v0/uart.h:1123
#define UART_PARITY_NONE
Definition: uart/v0/uart.h:194
uint32_t rxTrigLvl
Definition: uart/v0/uart.h:473
static uint32_t UART_getChar(uint32_t baseAddr, uint8_t *pChar)
This API reads a byte from the Receiver Buffer Register (RBR). It checks once if any character is rea...
Definition: uart/v0/uart.h:1020
void UART_close(UART_Handle handle)
Function to close a UART peripheral specified by the UART handle.
UART_Config gUartConfig[]
Externally defined driver configuration array.
static uint32_t UART_getIntrIdentityStatus(uint32_t baseAddr)
This API determines the UART Interrupt Status.
Definition: uart/v0/uart.h:1188
void * args
Definition: uart/v0/uart.h:407
#define UART_READ_RETURN_MODE_FULL
Unblock/callback when buffer is full.
Definition: uart/v0/uart.h:153
uint32_t isOpen
Definition: uart/v0/uart.h:539
uint32_t skipIntrReg
Definition: uart/v0/uart.h:465
UART_Attrs * attrs
Definition: uart/v0/uart.h:572
uint32_t dmaEnable
Definition: uart/v0/uart.h:467
SemaphoreP_Object writeTransferSemObj
Definition: uart/v0/uart.h:553
void * lock
Definition: uart/v0/uart.h:541
uint32_t readCount
Definition: uart/v0/uart.h:521
uint32_t parityType
Definition: uart/v0/uart.h:439
uint32_t rxTimeoutCnt
Definition: uart/v0/uart.h:525
static void UART_putChar(uint32_t baseAddr, uint8_t byteTx)
This API writes a byte to the Transmitter FIFO without checking for the emptiness of the Transmitter ...
Definition: uart/v0/uart.h:1014
uint32_t writeCount
Definition: uart/v0/uart.h:512
uint32_t hwFlowControl
Definition: uart/v0/uart.h:451
uint32_t readSizeRemaining
Definition: uart/v0/uart.h:523
uint32_t readReturnMode
Definition: uart/v0/uart.h:443
void UART_init(void)
This function initializes the UART module.
UART Parameters.
Definition: uart/v0/uart.h:432
int32_t UART_readCancel(UART_Handle handle, UART_Transaction *trans)
Function to perform UART canceling of current read transaction.
uint32_t baudRate
Definition: uart/v0/uart.h:433
UART_CallbackFxn readCallbackFxn
Definition: uart/v0/uart.h:447
uint32_t readErrorCnt
Definition: uart/v0/uart.h:527
void * writeTransferSem
Definition: uart/v0/uart.h:550
uint32_t status
Definition: uart/v0/uart.h:405
UART_Object * object
Definition: uart/v0/uart.h:574
Data structure used with UART_read() and UART_write()
Definition: uart/v0/uart.h:395
uint32_t UART_getBaseAddr(UART_Handle handle)
#define UART_LEN_8
Definition: uart/v0/uart.h:171
uint32_t intrNum
Definition: uart/v0/uart.h:461
uint32_t inputClkFreq
Definition: uart/v0/uart.h:487
UART_Handle UART_open(uint32_t index, const UART_Params *prms)
This function opens a given UART peripheral.
UART_CallbackFxn writeCallbackFxn
Definition: uart/v0/uart.h:449
Opaque Hwi object used with the Hwi APIs.
Definition: HwiP.h:91
UART driver object.
Definition: uart/v0/uart.h:499
uint32_t hwFlowControlThr
Definition: uart/v0/uart.h:453
UART_Transaction * readTrans
Definition: uart/v0/uart.h:532
uint32_t stopBits
Definition: uart/v0/uart.h:437
static void UART_intr2Disable(uint32_t baseAddr, uint32_t intrFlag)
This API disables the specified interrupts in the UART mode of operation for IER2.
Definition: uart/v0/uart.h:1182
void * readBuf
Definition: uart/v0/uart.h:519
static void UART_Params_init(UART_Params *prms)
Function to initialize the UART_Params struct to its defaults.
Definition: uart/v0/uart.h:799
uint32_t gUartConfigNum
Externally defined driver configuration array size.
Opaque semaphore object used with the semaphore APIs.
Definition: SemaphoreP.h:59
int32_t UART_read(UART_Handle handle, UART_Transaction *trans)
Function to perform UART read operation.
#define UART_TXTRIGLVL_32
Definition: uart/v0/uart.h:269
UART instance attributes - used during init time.
Definition: uart/v0/uart.h:481
#define UART_RXTRIGLVL_16
Definition: uart/v0/uart.h:253
uint32_t baseAddr
Definition: uart/v0/uart.h:485
void * buf
Definition: uart/v0/uart.h:396
static void UART_intrEnable(uint32_t baseAddr, uint32_t intrFlag)
This API enables the specified interrupts in the UART mode of operation.
Definition: uart/v0/uart.h:1048
HwiP_Object hwiObj
Definition: uart/v0/uart.h:557
UART_Params prms
Definition: uart/v0/uart.h:505
uint32_t count
Definition: uart/v0/uart.h:399
uint32_t txTrigLvl
Definition: uart/v0/uart.h:475