AM263Px MCU+ SDK: sdl_dcc.h File Reference

| AM263Px MCU+ SDK 26.00.00 |

Data Structures | Macros | Functions
dcc/v1/sdl_dcc.h File Reference
APIs for SDL Module » APIs for SDL Dual Clock Comparator(DCC) » SDL Dual Clock Comparator(DCC)

## Introduction

This file contains the prototypes of the APIs present in the device abstraction layer file of DCC. This also contains some related macros.

Go to the source code of this file.

## DCC Operation Mode
#define | SDL_DCC_MODE_SINGLE_SHOT (DCC_DCCGCTRL_SINGLESHOT_MODE)
#define | SDL_DCC_MODE_CONTINUOUS (DCC_DCCGCTRL_SINGLESHOT_DISABLE)
typedef uint32_t | SDL_DCC_mode
| Enum to select the DCC Operation Mode. More...

## DCC Clock source of COUNT0
#define | SDL_DCC_CLK0_SRC_CLOCK0_0 (DCC_DCCCLKSRC0_CLKSRC0_0)
#define | SDL_DCC_CLK0_SRC_CLOCK0_1 (DCC_DCCCLKSRC0_CLKSRC0_1)
#define | SDL_DCC_CLK0_SRC_CLOCK0_2 (DCC_DCCCLKSRC0_CLKSRC0_2)
typedef uint32_t | SDL_DCC_clkSrc0
| Enum to select the COUNT0 clock source. More...

## DCC Clock source of COUNT1
#define | SDL_DCC_CLK1_SRC_CLOCKSRC0 (DCC_DCCCLKSRC1_CLKSRC_0)
#define | SDL_DCC_CLK1_SRC_CLOCKSRC1 (DCC_DCCCLKSRC1_CLKSRC_1)
#define | SDL_DCC_CLK1_SRC_CLOCKSRC2 (DCC_DCCCLKSRC1_CLKSRC_2)
#define | SDL_DCC_CLK1_SRC_CLOCKSRC3 (DCC_DCCCLKSRC1_CLKSRC_3)
#define | SDL_DCC_CLK1_SRC_CLOCKSRC4 (DCC_DCCCLKSRC1_CLKSRC_4)
#define | SDL_DCC_CLK1_SRC_CLOCKSRC5 (DCC_DCCCLKSRC1_CLKSRC_5)
#define | SDL_DCC_CLK1_SRC_CLOCKSRC6 (DCC_DCCCLKSRC1_CLKSRC_6)
#define | SDL_DCC_CLK1_SRC_CLOCKSRC7 (DCC_DCCCLKSRC1_CLKSRC_7)
#define | SDL_DCC_CLK1_SRC_FICLK (SDL_DCC2_DCCCLKSRC1_CLKSRC_OTHER)
typedef uint32_t | SDL_DCC_clkSrc1
| Enum to select the COUNT1 clock source. More...

## DCC Interrupt type
#define | SDL_DCC_INTERRUPT_ERR (0x0U)
#define | SDL_DCC_INTERRUPT_DONE (0x1U)
typedef uint32_t | SDL_DCC_intrType
| Enum for DCC interrupts. More...

## Data Structures
struct | SDL_DCC_config
| Structure containing parameters for DCC module configuration. More...
struct | SDL_DCC_Status
struct | SDL_DCC_staticRegs

## Macros
#define | DCC_SRC0_COUNT_MAX (0xFFFFFU)
| Macro defines maximum value of count for clock source 0. More...
#define | DCC_SRC0_VALID_MAX (0x0FFFFU)
| Macro defines maximum value of valid count for clock source 0. More...
#define | DCC_SRC1_COUNT_MAX (0xFFFFFU)
| Macro defines maximum value of count for clock source 1. More...
#define | MIN_CLK0_VLD_SEED (4u)
#define | DCC_DCCGCTRL (0x0U)
#define | DCC_DCCREV (0x4U)
#define | DCC_DCCCNTSEED0 (0x8U)
#define | DCC_DCCVALIDSEED0 (0xcU)
#define | DCC_DCCCNTSEED1 (0x10U)
#define | DCC_DCCSTAT (0x14U)
#define | DCC_DCCCNT0 (0x18U)
#define | DCC_DCCVALID0 (0x1cU)
#define | DCC_DCCCNT1 (0x20U)
#define | DCC_DCCCLKSRC1 (0x24U)
#define | DCC_DCCCLKSRC0 (0x28U)
#define | DCC_DCCGCTRL_DCCENA_SHIFT (0U)
#define | DCC_DCCGCTRL_DCCENA_MASK (0x0000000fU)
#define | DCC_DCCGCTRL_DCCENA_ENABLE (0xAU)
#define | DCC_DCCGCTRL_DCCENA_DISABLE (0x5U)
#define | DCC_DCCGCTRL_ERRENA_SHIFT (4U)
#define | DCC_DCCGCTRL_ERRENA_MASK (0x000000f0U)
#define | DCC_DCCGCTRL_ERRENA_ENABLE (0xAU)
#define | DCC_DCCGCTRL_ERRENA_DISABLE (0x5U)
#define | DCC_DCCGCTRL_SINGLESHOT_SHIFT (8U)
#define | DCC_DCCGCTRL_SINGLESHOT_MASK (0x00000f00U)
#define | DCC_DCCGCTRL_SINGLESHOT_MODE (0xAU)
#define | DCC_DCCGCTRL_SINGLESHOT_DISABLE (0x5U)
#define | DCC_DCCGCTRL_DONEENA_SHIFT (12U)
#define | DCC_DCCGCTRL_DONEENA_MASK (0x0000f000U)
#define | DCC_DCCGCTRL_DONEENA_ENABLE (0xAU)
#define | DCC_DCCGCTRL_DONEENA_DISABLE (0x5U)
#define | DCC_DCCGCTRL_RES_SHIFT (16U)
#define | DCC_DCCGCTRL_RES_MASK (0xffff0000U)
#define | DCC_DCCREV_MINOR_SHIFT (0U)
#define | DCC_DCCREV_MINOR_MASK (0x0000003fU)
#define | DCC_DCCREV_CUSTOM_SHIFT (6U)
#define | DCC_DCCREV_CUSTOM_MASK (0x000000c0U)
#define | DCC_DCCREV_MAJOR_SHIFT (8U)
#define | DCC_DCCREV_MAJOR_MASK (0x00000700U)
#define | DCC_DCCREV_RTL_SHIFT (11U)
#define | DCC_DCCREV_RTL_MASK (0x0000f800U)
#define | DCC_DCCREV_FUNC_SHIFT (16U)
#define | DCC_DCCREV_FUNC_MASK (0x0fff0000U)
#define | DCC_DCCREV_RES_SHIFT (28U)
#define | DCC_DCCREV_RES_MASK (0x30000000U)
#define | DCC_DCCREV_SCHEME_SHIFT (30U)
#define | DCC_DCCREV_SCHEME_MASK (0xc0000000U)
#define | DCC_DCCCNTSEED0_COUNTSEED0_SHIFT (0U)
#define | DCC_DCCCNTSEED0_COUNTSEED0_MASK (0x000fffffU)
#define | DCC_DCCCNTSEED0_RES_SHIFT (20U)
#define | DCC_DCCCNTSEED0_RES_MASK (0xfff00000U)
#define | DCC_DCCVALIDSEED0_VALIDSEED0_SHIFT (0U)
#define | DCC_DCCVALIDSEED0_VALIDSEED0_MASK (0x0000ffffU)
#define | DCC_DCCVALIDSEED0_RES_SHIFT (16U)
#define | DCC_DCCVALIDSEED0_RES_MASK (0xffff0000U)
#define | DCC_DCCCNTSEED1_COUNTSEED1_SHIFT (0U)
#define | DCC_DCCCNTSEED1_COUNTSEED1_MASK (0x000fffffU)
#define | DCC_DCCCNTSEED1_RES_SHIFT (20U)
#define | DCC_DCCCNTSEED1_RES_MASK (0xfff00000U)
#define | DCC_DCCSTAT_ERRFLG_SHIFT (0U)
#define | DCC_DCCSTAT_ERRFLG_MASK (0x00000001U)
#define | DCC_DCCSTAT_ERRFLG_DISABLE (1U)
#define | DCC_DCCSTAT_DONEFLG_SHIFT (1U)
#define | DCC_DCCSTAT_DONEFLG_MASK (0x00000002U)
#define | DCC_DCCSTAT_DONEFLG_DISABLE (1U)
#define | DCC_DCCSTAT_RES_SHIFT (2U)
#define | DCC_DCCSTAT_RES_MASK (0xfffffffcU)
#define | DCC_DCCCNT0_COUNT0_SHIFT (0U)
#define | DCC_DCCCNT0_COUNT0_MASK (0x000fffffU)
#define | DCC_DCCCNT0_RES_SHIFT (20U)
#define | DCC_DCCCNT0_RES_MASK (0xfff00000U)
#define | DCC_DCCVALID0_VALID0_SHIFT (0U)
#define | DCC_DCCVALID0_VALID0_MASK (0x0000ffffU)
#define | DCC_DCCVALID0_RES_SHIFT (16U)
#define | DCC_DCCVALID0_RES_MASK (0xffff0000U)
#define | DCC_DCCCNT1_COUNT1_SHIFT (0U)
#define | DCC_DCCCNT1_COUNT1_MASK (0x000fffffU)
#define | DCC_DCCCNT1_RES_SHIFT (20U)
#define | DCC_DCCCNT1_RES_MASK (0xfff00000U)
#define | DCC_DCCCLKSRC1_CLKSRC_SHIFT (0U)
#define | DCC_DCCCLKSRC1_CLKSRC_MASK (0x0000000fU)
#define | DCC_DCCCLKSRC1_CLKSRC_0 (0x0U)
#define | DCC_DCCCLKSRC1_CLKSRC_1 (0x1U)
#define | DCC_DCCCLKSRC1_CLKSRC_2 (0x2U)
#define | DCC_DCCCLKSRC1_CLKSRC_3 (0x3U)
#define | DCC_DCCCLKSRC1_CLKSRC_4 (0x4U)
#define | DCC_DCCCLKSRC1_CLKSRC_5 (0x5U)
#define | DCC_DCCCLKSRC1_CLKSRC_6 (0x6U)
#define | DCC_DCCCLKSRC1_CLKSRC_7 (0x7U)
#define | SDL_DCC2_DCCCLKSRC1_CLKSRC_OTHER (0xFU)
#define | DCC_DCCCLKSRC1_RES1_SHIFT (4U)
#define | DCC_DCCCLKSRC1_RES1_MASK (0x00000ff0U)
#define | DCC_DCCCLKSRC1_KEY_SHIFT (12U)
#define | DCC_DCCCLKSRC1_KEY_MASK (0x0000f000U)
#define | DCC_DCCCLKSRC1_KEY_ENABLE (0xAU)
#define | DCC_DCCCLKSRC1_KEY_DISABLE (0x0U)
#define | DCC_DCCCLKSRC1_RES0_SHIFT (16U)
#define | DCC_DCCCLKSRC1_RES0_MASK (0xffff0000U)
#define | DCC_DCCCLKSRC0_CLKSRC0_SHIFT (0U)
#define | DCC_DCCCLKSRC0_CLKSRC0_MASK (0x0000000fU)
#define | DCC_DCCCLKSRC0_CLKSRC0_0 (0x0U)
#define | DCC_DCCCLKSRC0_CLKSRC0_1 (0x1U)
#define | DCC_DCCCLKSRC0_CLKSRC0_2 (0x2U)
#define | DCC_DCCCLKSRC0_RES1_SHIFT (4U)
#define | DCC_DCCCLKSRC0_RES1_MASK (0xfffffff0)
#define | DCC_DCCCLKSRC0_KEY_SHIFT (12U)
#define | DCC_DCCCLKSRC0_KEY_MASK (0x0000f000U)
#define | DCC_DCCCLKSRC0_KEY_ENABLE (0xAU)
#define | DCC_DCCCLKSRC0_KEY_DISABLE (0x0U)
#define | DCC_DCCCLKSRC0_RES0_SHIFT (16U)
#define | DCC_DCCCLKSRC0_RES0_MASK (0xffff0000U)

## Functions
int32_t | SDL_DCC_configure (SDL_DCC_Inst instance, const SDL_DCC_config *pConfig)
| This API is used to configure DCC module. More...
int32_t | SDL_DCC_verifyConfig (SDL_DCC_Inst instance, const SDL_DCC_config *pConfig)
| This API is used to verify the configuration for DCC module. More...
int32_t | SDL_DCC_enable (SDL_DCC_Inst instance)
| This API is used to enable the DCC module. More...
int32_t | SDL_DCC_disable (SDL_DCC_Inst instance)
| This API is used to disable the DCC module. More...
int32_t | SDL_DCC_getStatus (SDL_DCC_Inst instance, SDL_DCC_Status *pStatus)
| This API is used to get the stauts of DCC module. More...
int32_t | SDL_DCC_enableIntr (SDL_DCC_Inst instance, SDL_DCC_intrType intr)
| This API is used to Enable the interrupts. More...
int32_t | SDL_DCC_clearIntr (SDL_DCC_Inst instance, SDL_DCC_intrType intr)
| This API is used to clear the interrupts. More...
int32_t | SDL_DCC_getStaticRegs (SDL_DCC_Inst instance, SDL_DCC_staticRegs *pStaticRegs)
| This API is used to get the value of static registers for DCC module. More...

## Macro Definition Documentation

## ◆ DCC_DCCGCTRL

#define DCC_DCCGCTRL (0x0U)

## ◆ DCC_DCCREV

#define DCC_DCCREV (0x4U)

## ◆ DCC_DCCCNTSEED0

#define DCC_DCCCNTSEED0 (0x8U)

## ◆ DCC_DCCVALIDSEED0

#define DCC_DCCVALIDSEED0 (0xcU)

## ◆ DCC_DCCCNTSEED1

#define DCC_DCCCNTSEED1 (0x10U)

## ◆ DCC_DCCSTAT

#define DCC_DCCSTAT (0x14U)

## ◆ DCC_DCCCNT0

#define DCC_DCCCNT0 (0x18U)

## ◆ DCC_DCCVALID0

#define DCC_DCCVALID0 (0x1cU)

## ◆ DCC_DCCCNT1

#define DCC_DCCCNT1 (0x20U)

## ◆ DCC_DCCCLKSRC1

#define DCC_DCCCLKSRC1 (0x24U)

## ◆ DCC_DCCCLKSRC0

#define DCC_DCCCLKSRC0 (0x28U)

## ◆ DCC_DCCGCTRL_DCCENA_SHIFT

#define DCC_DCCGCTRL_DCCENA_SHIFT (0U)

## ◆ DCC_DCCGCTRL_DCCENA_MASK

#define DCC_DCCGCTRL_DCCENA_MASK (0x0000000fU)

## ◆ DCC_DCCGCTRL_DCCENA_ENABLE

#define DCC_DCCGCTRL_DCCENA_ENABLE (0xAU)

## ◆ DCC_DCCGCTRL_DCCENA_DISABLE

#define DCC_DCCGCTRL_DCCENA_DISABLE (0x5U)

## ◆ DCC_DCCGCTRL_ERRENA_SHIFT

#define DCC_DCCGCTRL_ERRENA_SHIFT (4U)

## ◆ DCC_DCCGCTRL_ERRENA_MASK

#define DCC_DCCGCTRL_ERRENA_MASK (0x000000f0U)

## ◆ DCC_DCCGCTRL_ERRENA_ENABLE

#define DCC_DCCGCTRL_ERRENA_ENABLE (0xAU)

## ◆ DCC_DCCGCTRL_ERRENA_DISABLE

#define DCC_DCCGCTRL_ERRENA_DISABLE (0x5U)

## ◆ DCC_DCCGCTRL_SINGLESHOT_SHIFT

#define DCC_DCCGCTRL_SINGLESHOT_SHIFT (8U)

## ◆ DCC_DCCGCTRL_SINGLESHOT_MASK

#define DCC_DCCGCTRL_SINGLESHOT_MASK (0x00000f00U)

## ◆ DCC_DCCGCTRL_SINGLESHOT_MODE

#define DCC_DCCGCTRL_SINGLESHOT_MODE (0xAU)

## ◆ DCC_DCCGCTRL_SINGLESHOT_DISABLE

#define DCC_DCCGCTRL_SINGLESHOT_DISABLE (0x5U)

## ◆ DCC_DCCGCTRL_DONEENA_SHIFT

#define DCC_DCCGCTRL_DONEENA_SHIFT (12U)

## ◆ DCC_DCCGCTRL_DONEENA_MASK

#define DCC_DCCGCTRL_DONEENA_MASK (0x0000f000U)

## ◆ DCC_DCCGCTRL_DONEENA_ENABLE

#define DCC_DCCGCTRL_DONEENA_ENABLE (0xAU)

## ◆ DCC_DCCGCTRL_DONEENA_DISABLE

#define DCC_DCCGCTRL_DONEENA_DISABLE (0x5U)

## ◆ DCC_DCCGCTRL_RES_SHIFT

#define DCC_DCCGCTRL_RES_SHIFT (16U)

## ◆ DCC_DCCGCTRL_RES_MASK

#define DCC_DCCGCTRL_RES_MASK (0xffff0000U)

## ◆ DCC_DCCREV_MINOR_SHIFT

#define DCC_DCCREV_MINOR_SHIFT (0U)

## ◆ DCC_DCCREV_MINOR_MASK

#define DCC_DCCREV_MINOR_MASK (0x0000003fU)

## ◆ DCC_DCCREV_CUSTOM_SHIFT

#define DCC_DCCREV_CUSTOM_SHIFT (6U)

## ◆ DCC_DCCREV_CUSTOM_MASK

#define DCC_DCCREV_CUSTOM_MASK (0x000000c0U)

## ◆ DCC_DCCREV_MAJOR_SHIFT

#define DCC_DCCREV_MAJOR_SHIFT (8U)

## ◆ DCC_DCCREV_MAJOR_MASK

#define DCC_DCCREV_MAJOR_MASK (0x00000700U)

## ◆ DCC_DCCREV_RTL_SHIFT

#define DCC_DCCREV_RTL_SHIFT (11U)

## ◆ DCC_DCCREV_RTL_MASK

#define DCC_DCCREV_RTL_MASK (0x0000f800U)

## ◆ DCC_DCCREV_FUNC_SHIFT

#define DCC_DCCREV_FUNC_SHIFT (16U)

## ◆ DCC_DCCREV_FUNC_MASK

#define DCC_DCCREV_FUNC_MASK (0x0fff0000U)

## ◆ DCC_DCCREV_RES_SHIFT

#define DCC_DCCREV_RES_SHIFT (28U)

## ◆ DCC_DCCREV_RES_MASK

#define DCC_DCCREV_RES_MASK (0x30000000U)

## ◆ DCC_DCCREV_SCHEME_SHIFT

#define DCC_DCCREV_SCHEME_SHIFT (30U)

## ◆ DCC_DCCREV_SCHEME_MASK

#define DCC_DCCREV_SCHEME_MASK (0xc0000000U)

## ◆ DCC_DCCCNTSEED0_COUNTSEED0_SHIFT

#define DCC_DCCCNTSEED0_COUNTSEED0_SHIFT (0U)

## ◆ DCC_DCCCNTSEED0_COUNTSEED0_MASK

#define DCC_DCCCNTSEED0_COUNTSEED0_MASK (0x000fffffU)

## ◆ DCC_DCCCNTSEED0_RES_SHIFT

#define DCC_DCCCNTSEED0_RES_SHIFT (20U)

## ◆ DCC_DCCCNTSEED0_RES_MASK

#define DCC_DCCCNTSEED0_RES_MASK (0xfff00000U)

## ◆ DCC_DCCVALIDSEED0_VALIDSEED0_SHIFT

#define DCC_DCCVALIDSEED0_VALIDSEED0_SHIFT (0U)

## ◆ DCC_DCCVALIDSEED0_VALIDSEED0_MASK

#define DCC_DCCVALIDSEED0_VALIDSEED0_MASK (0x0000ffffU)

## ◆ DCC_DCCVALIDSEED0_RES_SHIFT

#define DCC_DCCVALIDSEED0_RES_SHIFT (16U)

## ◆ DCC_DCCVALIDSEED0_RES_MASK

#define DCC_DCCVALIDSEED0_RES_MASK (0xffff0000U)

## ◆ DCC_DCCCNTSEED1_COUNTSEED1_SHIFT

#define DCC_DCCCNTSEED1_COUNTSEED1_SHIFT (0U)

## ◆ DCC_DCCCNTSEED1_COUNTSEED1_MASK

#define DCC_DCCCNTSEED1_COUNTSEED1_MASK (0x000fffffU)

## ◆ DCC_DCCCNTSEED1_RES_SHIFT

#define DCC_DCCCNTSEED1_RES_SHIFT (20U)

## ◆ DCC_DCCCNTSEED1_RES_MASK

#define DCC_DCCCNTSEED1_RES_MASK (0xfff00000U)

## ◆ DCC_DCCSTAT_ERRFLG_SHIFT

#define DCC_DCCSTAT_ERRFLG_SHIFT (0U)

## ◆ DCC_DCCSTAT_ERRFLG_MASK

#define DCC_DCCSTAT_ERRFLG_MASK (0x00000001U)

## ◆ DCC_DCCSTAT_ERRFLG_DISABLE

#define DCC_DCCSTAT_ERRFLG_DISABLE (1U)

## ◆ DCC_DCCSTAT_DONEFLG_SHIFT

#define DCC_DCCSTAT_DONEFLG_SHIFT (1U)

## ◆ DCC_DCCSTAT_DONEFLG_MASK

#define DCC_DCCSTAT_DONEFLG_MASK (0x00000002U)

## ◆ DCC_DCCSTAT_DONEFLG_DISABLE

#define DCC_DCCSTAT_DONEFLG_DISABLE (1U)

## ◆ DCC_DCCSTAT_RES_SHIFT

#define DCC_DCCSTAT_RES_SHIFT (2U)

## ◆ DCC_DCCSTAT_RES_MASK

#define DCC_DCCSTAT_RES_MASK (0xfffffffcU)

## ◆ DCC_DCCCNT0_COUNT0_SHIFT

#define DCC_DCCCNT0_COUNT0_SHIFT (0U)

## ◆ DCC_DCCCNT0_COUNT0_MASK

#define DCC_DCCCNT0_COUNT0_MASK (0x000fffffU)

## ◆ DCC_DCCCNT0_RES_SHIFT

#define DCC_DCCCNT0_RES_SHIFT (20U)

## ◆ DCC_DCCCNT0_RES_MASK

#define DCC_DCCCNT0_RES_MASK (0xfff00000U)

## ◆ DCC_DCCVALID0_VALID0_SHIFT

#define DCC_DCCVALID0_VALID0_SHIFT (0U)

## ◆ DCC_DCCVALID0_VALID0_MASK

#define DCC_DCCVALID0_VALID0_MASK (0x0000ffffU)

## ◆ DCC_DCCVALID0_RES_SHIFT

#define DCC_DCCVALID0_RES_SHIFT (16U)

## ◆ DCC_DCCVALID0_RES_MASK

#define DCC_DCCVALID0_RES_MASK (0xffff0000U)

## ◆ DCC_DCCCNT1_COUNT1_SHIFT

#define DCC_DCCCNT1_COUNT1_SHIFT (0U)

## ◆ DCC_DCCCNT1_COUNT1_MASK

#define DCC_DCCCNT1_COUNT1_MASK (0x000fffffU)

## ◆ DCC_DCCCNT1_RES_SHIFT

#define DCC_DCCCNT1_RES_SHIFT (20U)

## ◆ DCC_DCCCNT1_RES_MASK

#define DCC_DCCCNT1_RES_MASK (0xfff00000U)

## ◆ DCC_DCCCLKSRC1_CLKSRC_SHIFT

#define DCC_DCCCLKSRC1_CLKSRC_SHIFT (0U)

## ◆ DCC_DCCCLKSRC1_CLKSRC_MASK

#define DCC_DCCCLKSRC1_CLKSRC_MASK (0x0000000fU)

## ◆ DCC_DCCCLKSRC1_CLKSRC_0

#define DCC_DCCCLKSRC1_CLKSRC_0 (0x0U)

## ◆ DCC_DCCCLKSRC1_CLKSRC_1

#define DCC_DCCCLKSRC1_CLKSRC_1 (0x1U)

## ◆ DCC_DCCCLKSRC1_CLKSRC_2

#define DCC_DCCCLKSRC1_CLKSRC_2 (0x2U)

## ◆ DCC_DCCCLKSRC1_CLKSRC_3

#define DCC_DCCCLKSRC1_CLKSRC_3 (0x3U)

## ◆ DCC_DCCCLKSRC1_CLKSRC_4

#define DCC_DCCCLKSRC1_CLKSRC_4 (0x4U)

## ◆ DCC_DCCCLKSRC1_CLKSRC_5

#define DCC_DCCCLKSRC1_CLKSRC_5 (0x5U)

## ◆ DCC_DCCCLKSRC1_CLKSRC_6

#define DCC_DCCCLKSRC1_CLKSRC_6 (0x6U)

## ◆ DCC_DCCCLKSRC1_CLKSRC_7

#define DCC_DCCCLKSRC1_CLKSRC_7 (0x7U)

## ◆ SDL_DCC2_DCCCLKSRC1_CLKSRC_OTHER

#define SDL_DCC2_DCCCLKSRC1_CLKSRC_OTHER (0xFU)

## ◆ DCC_DCCCLKSRC1_RES1_SHIFT

#define DCC_DCCCLKSRC1_RES1_SHIFT (4U)

## ◆ DCC_DCCCLKSRC1_RES1_MASK

#define DCC_DCCCLKSRC1_RES1_MASK (0x00000ff0U)

## ◆ DCC_DCCCLKSRC1_KEY_SHIFT

#define DCC_DCCCLKSRC1_KEY_SHIFT (12U)

## ◆ DCC_DCCCLKSRC1_KEY_MASK

#define DCC_DCCCLKSRC1_KEY_MASK (0x0000f000U)

## ◆ DCC_DCCCLKSRC1_KEY_ENABLE

#define DCC_DCCCLKSRC1_KEY_ENABLE (0xAU)

## ◆ DCC_DCCCLKSRC1_KEY_DISABLE

#define DCC_DCCCLKSRC1_KEY_DISABLE (0x0U)

## ◆ DCC_DCCCLKSRC1_RES0_SHIFT

#define DCC_DCCCLKSRC1_RES0_SHIFT (16U)

## ◆ DCC_DCCCLKSRC1_RES0_MASK

#define DCC_DCCCLKSRC1_RES0_MASK (0xffff0000U)

## ◆ DCC_DCCCLKSRC0_CLKSRC0_SHIFT

#define DCC_DCCCLKSRC0_CLKSRC0_SHIFT (0U)

## ◆ DCC_DCCCLKSRC0_CLKSRC0_MASK

#define DCC_DCCCLKSRC0_CLKSRC0_MASK (0x0000000fU)

## ◆ DCC_DCCCLKSRC0_CLKSRC0_0

#define DCC_DCCCLKSRC0_CLKSRC0_0 (0x0U)

## ◆ DCC_DCCCLKSRC0_CLKSRC0_1

#define DCC_DCCCLKSRC0_CLKSRC0_1 (0x1U)

## ◆ DCC_DCCCLKSRC0_CLKSRC0_2

#define DCC_DCCCLKSRC0_CLKSRC0_2 (0x2U)

## ◆ DCC_DCCCLKSRC0_RES1_SHIFT

#define DCC_DCCCLKSRC0_RES1_SHIFT (4U)

## ◆ DCC_DCCCLKSRC0_RES1_MASK

#define DCC_DCCCLKSRC0_RES1_MASK (0xfffffff0)

## ◆ DCC_DCCCLKSRC0_KEY_SHIFT

#define DCC_DCCCLKSRC0_KEY_SHIFT (12U)

## ◆ DCC_DCCCLKSRC0_KEY_MASK

#define DCC_DCCCLKSRC0_KEY_MASK (0x0000f000U)

## ◆ DCC_DCCCLKSRC0_KEY_ENABLE

#define DCC_DCCCLKSRC0_KEY_ENABLE (0xAU)

## ◆ DCC_DCCCLKSRC0_KEY_DISABLE

#define DCC_DCCCLKSRC0_KEY_DISABLE (0x0U)

## ◆ DCC_DCCCLKSRC0_RES0_SHIFT

#define DCC_DCCCLKSRC0_RES0_SHIFT (16U)

## ◆ DCC_DCCCLKSRC0_RES0_MASK

#define DCC_DCCCLKSRC0_RES0_MASK (0xffff0000U)