AM263Px MCU+ SDK: sdl_mcu_armss_ccmr5.h Source File

| AM263Px MCU+ SDK 26.00.00 |

sdl_mcu_armss_ccmr5.h
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1 /*
2 * Copyright (c) Texas Instruments Incorporated 2022-2024
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
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9 * notice, this list of conditions and the following disclaimer.
10 *
11 * Redistributions in binary form must reproduce the above copyright
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13 * documentation and/or other materials provided with the
14 * distribution.
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17 * its contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 */
33
34 #ifndef SDL_MCU_ARMSS_CCMR5_H
35 #define SDL_MCU_ARMSS_CCMR5_H
36
37 /* ========================================================================== */
38 /* Include Files */
39 /* ========================================================================== */
40
41 #include "sdlr_mcu_armss_ccmr5.h"
42
43 #ifdef __cplusplus
44 extern "C"
45 {
46 #endif
47
65 /* ========================================================================== */
66 /* Enums & Typedefs */
67 /* ========================================================================== */
68
80 typedef enum SDL_McuArmssCcmR5RegId_e
81 {
82 SDL_MCU_ARMSS_CCMR5_CCMSR1_REGID = (0u),
84 SDL_MCU_ARMSS_CCMR5_CCMKEYR1_REGID = (1u),
86 SDL_MCU_ARMSS_CCMR5_CCMSR2_REGID = (2u),
88 SDL_MCU_ARMSS_CCMR5_CCMKEYR2_REGID = (3u),
90 SDL_MCU_ARMSS_CCMR5_CCMSR3_REGID = (4u),
92 SDL_MCU_ARMSS_CCMR5_CCMKEYR3_REGID = (5u),
94 SDL_MCU_ARMSS_CCMR5_POLCNTRL_REGID = (6u),
96 #if defined (SOC_AM263PX) || (SOC_AM261X)
97 SDL_MCU_ARMSS_CCMR5_CCMKEYR5_REGID = (7u),
99 SDL_MCU_ARMSS_CCMR5_CCMSR5_REGID = (8u),
101 SDL_MCU_ARMSS_CCMR5_CCMKEYR6_REGID = (9u),
103 SDL_MCU_ARMSS_CCMR5_CCMSR6_REGID = (10u),
105 #endif
106 SDL_MCU_ARMSS_CCMR5_INVALID_REGID = (11u)
108 } SDL_McuArmssCcmR5RegId;
120 typedef enum SDL_McuArmssCcmR5ModuleId_e
121 {
122 SDL_MCU_ARMSS_CCMR5_CPU_MODULE_ID = (0u),
124 SDL_MCU_ARMSS_CCMR5_VIM_MODULE_ID = (1u),
126 SDL_MCU_ARMSS_CCMR5_INACTIVITY_MONITOR_MODULE_ID = (2u),
128 #if defined (SOC_AM263PX) || (SOC_AM261X)
129 SDL_MCU_ARMSS_CCMR5_TMU_MODULE_ID = (3u),
131 SDL_MCU_ARMSS_CCMR5_RL2_MODULE_ID = (4u),
133 #endif
134 SDL_MCU_ARMSS_CCMR5_INVALID_MODULE_ID = (255u)
136 } SDL_McuArmssCcmR5ModuleId;
149 typedef enum SDL_McuArmssCcmR5OpModeKey_e
150 {
151 SDL_MCU_ARMSS_CCMR5_MKEY_CMP_MODE_ACTIVE = (0u),
153 SDL_MCU_ARMSS_CCMR5_MKEY_SELF_TEST_MODE = (6u),
155 SDL_MCU_ARMSS_CCMR5_MKEY_ERR_FORCE_MODE = (9u),
157 SDL_MCU_ARMSS_CCMR5_MKEY_SELF_TEST_ERR_FORCE_MODE = (15u)
159 } SDL_McuArmssCcmR5OpModeKey;
160
163 /* ========================================================================== */
164 /* Function Declarations */
165 /* ========================================================================== */
166
186 int32_t SDL_armR5ReadCCMRegister (
187 uintptr_t baseAddress,
188 SDL_McuArmssCcmR5RegId regId,
189 uint32_t *pValToBeRead,
190 int32_t *pMetaInfo
191 );
192
210 int32_t SDL_armR5ConfigureCCMRegister (
211 uintptr_t baseAddress,
212 SDL_McuArmssCcmR5RegId regId,
213 uint32_t valToBeWritten,
214 int32_t *pMetaInfo
215 );
216
235 int32_t SDL_armR5CCMSetOperationModeKey (
236 uintptr_t baseAddress,
237 SDL_McuArmssCcmR5ModuleId moduleId,
238 SDL_McuArmssCcmR5OpModeKey opModeKey,
239 int32_t *pMetaInfo
240 );
241
260 int32_t SDL_armR5CCMGetCompareError (
261 uintptr_t baseAddress,
262 SDL_McuArmssCcmR5ModuleId moduleId,
263 uint32_t *pCmpError,
264 int32_t *pMetaInfo
265 );
266
298 int32_t SDL_armR5CCMGetOperationModeKey (
299 uintptr_t baseAddress,
300 SDL_McuArmssCcmR5ModuleId moduleId,
301 SDL_McuArmssCcmR5OpModeKey *pOpModeKey,
302 int32_t *pMetaInfo
303 );
304
322 int32_t SDL_armR5CCMClearCompareError (
323 uintptr_t baseAddress,
324 SDL_McuArmssCcmR5ModuleId moduleId,
325 int32_t *pMetaInfo
326 );
327
328 #ifdef __cplusplus
329 }
330 #endif
331 #endif /* SDL_MCU_ARMSS_CCMR5_H */
332
SDL_MCU_ARMSS_CCMR5_CCMSR3_REGID
@ SDL_MCU_ARMSS_CCMR5_CCMSR3_REGID
Definition: sdl_mcu_armss_ccmr5.h:90
SDL_MCU_ARMSS_CCMR5_INVALID_MODULE_ID
@ SDL_MCU_ARMSS_CCMR5_INVALID_MODULE_ID
Definition: sdl_mcu_armss_ccmr5.h:134
SDL_MCU_ARMSS_CCMR5_CCMKEYR2_REGID
@ SDL_MCU_ARMSS_CCMR5_CCMKEYR2_REGID
Definition: sdl_mcu_armss_ccmr5.h:88
SDL_MCU_ARMSS_CCMR5_VIM_MODULE_ID
@ SDL_MCU_ARMSS_CCMR5_VIM_MODULE_ID
Definition: sdl_mcu_armss_ccmr5.h:124
SDL_MCU_ARMSS_CCMR5_MKEY_SELF_TEST_MODE
@ SDL_MCU_ARMSS_CCMR5_MKEY_SELF_TEST_MODE
Definition: sdl_mcu_armss_ccmr5.h:153
SDL_MCU_ARMSS_CCMR5_CCMSR1_REGID
@ SDL_MCU_ARMSS_CCMR5_CCMSR1_REGID
Definition: sdl_mcu_armss_ccmr5.h:82
SDL_MCU_ARMSS_CCMR5_INACTIVITY_MONITOR_MODULE_ID
@ SDL_MCU_ARMSS_CCMR5_INACTIVITY_MONITOR_MODULE_ID
Definition: sdl_mcu_armss_ccmr5.h:126
SDL_McuArmssCcmR5ModuleId
SDL_McuArmssCcmR5ModuleId
This enum defines the MCU ARMSS CCM R5 module ID type used under the context of SDL CCMR5 APIs.
Definition: sdl_mcu_armss_ccmr5.h:121
SDL_MCU_ARMSS_CCMR5_CPU_MODULE_ID
@ SDL_MCU_ARMSS_CCMR5_CPU_MODULE_ID
Definition: sdl_mcu_armss_ccmr5.h:122
SDL_MCU_ARMSS_CCMR5_MKEY_CMP_MODE_ACTIVE
@ SDL_MCU_ARMSS_CCMR5_MKEY_CMP_MODE_ACTIVE
Definition: sdl_mcu_armss_ccmr5.h:151
SDL_MCU_ARMSS_CCMR5_MKEY_ERR_FORCE_MODE
@ SDL_MCU_ARMSS_CCMR5_MKEY_ERR_FORCE_MODE
Definition: sdl_mcu_armss_ccmr5.h:155
SDL_McuArmssCcmR5RegId
SDL_McuArmssCcmR5RegId
This typedef defines the MCU ARMSS CCM R5 register ID type used under the context of SDL CCMR5 APIs.
Definition: sdl_mcu_armss_ccmr5.h:81
SDL_MCU_ARMSS_CCMR5_CCMKEYR3_REGID
@ SDL_MCU_ARMSS_CCMR5_CCMKEYR3_REGID
Definition: sdl_mcu_armss_ccmr5.h:92
SDL_armR5CCMClearCompareError
int32_t SDL_armR5CCMClearCompareError(uintptr_t baseAddress, SDL_McuArmssCcmR5ModuleId moduleId, int32_t *pMetaInfo)
Clear Compare Error value for CPU, VIM, CCM Inactivity monitor.
SDL_McuArmssCcmR5OpModeKey
SDL_McuArmssCcmR5OpModeKey
This enum defines the MCU ARMSS CCM R5 Operation Mode Key values used under the context of SDL CCMR5 ...
Definition: sdl_mcu_armss_ccmr5.h:150
SDL_MCU_ARMSS_CCMR5_CCMSR2_REGID
@ SDL_MCU_ARMSS_CCMR5_CCMSR2_REGID
Definition: sdl_mcu_armss_ccmr5.h:86
SDL_armR5CCMGetOperationModeKey
int32_t SDL_armR5CCMGetOperationModeKey(uintptr_t baseAddress, SDL_McuArmssCcmR5ModuleId moduleId, SDL_McuArmssCcmR5OpModeKey *pOpModeKey, int32_t *pMetaInfo)
Get Operation mode key value for CPU, VIM, CCM Inactivity monitor.
SDL_armR5ConfigureCCMRegister
int32_t SDL_armR5ConfigureCCMRegister(uintptr_t baseAddress, SDL_McuArmssCcmR5RegId regId, uint32_t valToBeWritten, int32_t *pMetaInfo)
Configure CCM Regiser.
SDL_MCU_ARMSS_CCMR5_POLCNTRL_REGID
@ SDL_MCU_ARMSS_CCMR5_POLCNTRL_REGID
Definition: sdl_mcu_armss_ccmr5.h:94
SDL_armR5CCMSetOperationModeKey
int32_t SDL_armR5CCMSetOperationModeKey(uintptr_t baseAddress, SDL_McuArmssCcmR5ModuleId moduleId, SDL_McuArmssCcmR5OpModeKey opModeKey, int32_t *pMetaInfo)
Configure Operating mode for CPU, VIM, CCM Inactivity monitor.
SDL_MCU_ARMSS_CCMR5_INVALID_REGID
@ SDL_MCU_ARMSS_CCMR5_INVALID_REGID
Definition: sdl_mcu_armss_ccmr5.h:106
SDL_armR5ReadCCMRegister
int32_t SDL_armR5ReadCCMRegister(uintptr_t baseAddress, SDL_McuArmssCcmR5RegId regId, uint32_t *pValToBeRead, int32_t *pMetaInfo)
Read CCM Regiser.
SDL_MCU_ARMSS_CCMR5_CCMKEYR1_REGID
@ SDL_MCU_ARMSS_CCMR5_CCMKEYR1_REGID
Definition: sdl_mcu_armss_ccmr5.h:84
SDL_armR5CCMGetCompareError
int32_t SDL_armR5CCMGetCompareError(uintptr_t baseAddress, SDL_McuArmssCcmR5ModuleId moduleId, uint32_t *pCmpError, int32_t *pMetaInfo)
Read Compare Error status for CPU, VIM, CCM Inactivity monitor.
SDL_MCU_ARMSS_CCMR5_MKEY_SELF_TEST_ERR_FORCE_MODE
@ SDL_MCU_ARMSS_CCMR5_MKEY_SELF_TEST_ERR_FORCE_MODE
Definition: sdl_mcu_armss_ccmr5.h:157