AM263Px MCU+ SDK: phy_common.h Source File

| AM263Px MCU+ SDK 26.00.00 |

phy_common.h
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1 /*
2 * Copyright (c) Texas Instruments Incorporated 2024-2025
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 *
8 * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 *
11 * Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the
14 * distribution.
15 *
16 * Neither the name of Texas Instruments Incorporated nor the names of
17 * its contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
41 #ifndef PHY_COMMON_H_
42 #define PHY_COMMON_H_
43
44 /* ========================================================================== */
45 /* Include Files */
46 /* ========================================================================== */
47
48 #include <stdint.h>
49 #include <stdbool.h>
50
51 #ifdef __cplusplus
52 extern "C" {
53 #endif
54
55 /* ========================================================================== */
56 /* Macros */
57 /* ========================================================================== */
58
59 #define ETHPHYDRV_MAX_OBJ_SIZE (64) /* to meet the size of Phy_Obj_t */
60
62 #define PHY_DIV_ROUNDUP(val, div) (((val) + (div) - 1) / (div))
63
65 #define PHY_BIT(n) (1U << (n))
66
68 #define PHY_ON (1U)
69
70 #define PHY_OFF (0U)
71
72 #define PHY_CFG_IS_ON(name) ((PHY_CFG_ ## name) == PHY_ON)
73
74 #define PHY_CFG_IS_OFF(name) ((PHY_CFG_ ## name) == PHY_OFF)
75
86 #define PHY_SOK ( (int32_t) (0))
87
88 #define PHY_EFAIL (-(int32_t) (1))
89
90 #define PHY_EBADARGS (-(int32_t) (2)) (-(int32_t) (2))
91
92 #define PHY_EINVALIDPARAMS (-(int32_t) (3))
93
94 #define PHY_ETIMEOUT (-(int32_t) (4))
95
96 #define PHY_EALLOC (-(int32_t) (8))
97
98 #define PHY_EPERM (PHY_EALLOC - 4)
99
100 #define PHY_ENOTSUPPORTED (PHY_EALLOC - 5)
101
104 /* PHY Register Definitions */
105
107 #define PHY_BMCR (0x00U)
108
109 #define PHY_BMSR (0x01U)
110
111 #define PHY_PHYIDR1 (0x02U)
112
113 #define PHY_PHYIDR2 (0x03U)
114
115 #define PHY_ANAR (0x04U)
116
117 #define PHY_ANLPAR (0x05U)
118
119 #define PHY_ANER (0x06U)
120
121 #define PHY_ANNPTR (0x07U)
122
123 #define PHY_ANNPRR (0x08U)
124
125 #define PHY_GIGCR (0x09U)
126
127 #define PHY_GIGSR (0x0AU)
128
129 #define PHY_MMD_CR (0x0DU)
130
131 #define PHY_MMD_DR (0x0EU)
132
133 #define PHY_GIGESR (0x0FU)
134
135 /* MMD_CR register definitions */
136 #define MMD_CR_ADDR (0x0000U)
137 #define MMD_CR_DATA_NOPOSTINC (0x4000U)
138 #define MMD_CR_DATA_POSTINC_RW (0x8000U)
139 #define MMD_CR_DATA_POSTINC_W (0xC000U)
140 #define MMD_CR_DEVADDR (0x001FU)
141
142 /* BMCR register definitions */
143 #define PHY_BMCR_RESET PHY_BIT(15)
144 #define PHY_BMCR_LOOPBACK PHY_BIT(14)
145 #define PHY_BMCR_SPEED100 PHY_BIT(13)
146 #define PHY_BMCR_ANEN PHY_BIT(12)
147 #define PHY_BMCR_PWRDOWN PHY_BIT(11)
148 #define PHY_BMCR_ISOLATE PHY_BIT(10)
149 #define PHY_BMCR_ANRESTART PHY_BIT(9)
150 #define PHY_BMCR_FD PHY_BIT(8)
151 #define PHY_BMCR_SPEED1000 PHY_BIT(6)
152
154 #define PHY_EXTENDED_CFG_SIZE_MAX (128U)
155
156
158 #define PHY_LINK_CAP_HD10 PHY_BIT(1)
159
160 #define PHY_LINK_CAP_FD10 PHY_BIT(2)
161
162 #define PHY_LINK_CAP_HD100 PHY_BIT(3)
163
164 #define PHY_LINK_CAP_FD100 PHY_BIT(4)
165
166 #define PHY_LINK_CAP_HD1000 PHY_BIT(5)
167
168 #define PHY_LINK_CAP_FD1000 PHY_BIT(6)
169
170 #define PHY_LINK_CAP_10 (PHY_LINK_CAP_HD10 | PHY_LINK_CAP_FD10)
171
172 #define PHY_LINK_CAP_100 (PHY_LINK_CAP_HD100 | PHY_LINK_CAP_FD100)
173
174 #define PHY_LINK_CAP_1000 (PHY_LINK_CAP_HD1000 | PHY_LINK_CAP_FD1000)
175
176 #define PHY_LINK_CAP_ALL (PHY_LINK_CAP_HD10 | PHY_LINK_CAP_FD10 | \
177 PHY_LINK_CAP_HD100 | PHY_LINK_CAP_FD100 | \
178 PHY_LINK_CAP_HD1000 | PHY_LINK_CAP_FD1000)
179
181 #define PHY_LINK_ADV_HD10 PHY_BIT(1)
182
183 #define PHY_LINK_ADV_FD10 PHY_BIT(2)
184
185 #define PHY_LINK_ADV_HD100 PHY_BIT(3)
186
187 #define PHY_LINK_ADV_FD100 PHY_BIT(4)
188
189 #define PHY_LINK_ADV_HD1000 PHY_BIT(5)
190
191 #define PHY_LINK_ADV_FD1000 PHY_BIT(6)
192
194 #define PHY_FAST_LINK_DOWN_ENERGY_LOST PHY_BIT(0)
195
196 #define PHY_FAST_LINK_DOWN_MSE PHY_BIT(1)
197
198 #define PHY_FAST_LINK_DOWN_MLT3_ERRORS PHY_BIT(2)
199
200 #define PHY_FAST_LINK_DOWN_RX_ERR PHY_BIT(3)
201
202 #define PHY_FAST_LINK_DOWN_DESCRAMBLER_SYNC_LOSS PHY_BIT(4)
203
204 /* ========================================================================== */
205 /* Structures and Enums */
206 /* ========================================================================== */
207
208
209 typedef struct Phy_Version_s
210 {
212 uint32_t oui;
214 uint32_t model;
216 uint32_t revision;
217 } Phy_Version;
218
219 typedef enum Phy_Mii_e
220 {
222 PHY_MAC_MII_MII = 0U,
223
225 PHY_MAC_MII_RMII,
226
228 PHY_MAC_MII_GMII,
229
231 PHY_MAC_MII_RGMII,
232
234 PHY_MAC_MII_SGMII,
235
237 PHY_MAC_MII_QSGMII,
238 } Phy_Mii;
239
240 typedef enum Phy_Link_SpeedDuplex_e
241 {
243 PHY_LINK_AUTONEG = 0U,
244
246 PHY_LINK_FD10,
247
249 PHY_LINK_FD100,
250
252 PHY_LINK_FD1000,
253
255 PHY_LINK_HD10,
256
258 PHY_LINK_HD100,
259
261 PHY_LINK_HD1000,
262
264 PHY_LINK_INVALID,
265 } Phy_Link_SpeedDuplex;
266
267 typedef enum Phy_AutoNegCtrl_e
268 {
270 PHY_AUTO_NEGOTIATION_CTRL_DISABLE = 0U,
271
273 PHY_AUTO_NEGOTIATION_CTRL_ENABLE,
274
276 PHY_AUTO_NEGOTIATION_CTRL_RESTART,
277
279 PHY_AUTO_NEGOTIATION_CTRL_ENABLE_AND_RESTART,
280 }Phy_AutoNegCtrl;
281
282 typedef struct
283 {
284 int32_t (*EnetPhy_readReg)(void* pArgs, uint32_t reg, uint16_t *val);
285
286 int32_t (*EnetPhy_writeReg)(void* pArgs, uint32_t reg, uint16_t val);
287
288 int32_t (*EnetPhy_rmwReg)(void* pArgs, uint32_t reg, uint16_t mask,
289 uint16_t val);
290
291 int32_t (*EnetPhy_readExtReg)(void* pArgs, uint32_t reg,
292 uint16_t *val);
293
294 int32_t (*EnetPhy_writeExtReg)(void* pArgs, uint32_t reg,
295 uint16_t val);
296
298 void* pArgs;
299
300 } Phy_RegAccessCb_t;
301
302 typedef uint8_t EthPhyDrv_Handle[ETHPHYDRV_MAX_OBJ_SIZE];
303
304 typedef struct
305 {
306
307 struct
308 {
309
315 const char *name;
316
332 bool (*isPhyDevSupported)(EthPhyDrv_Handle hPhy,
333 const void *pVersion);
334
346 bool (*isMacModeSupported)(EthPhyDrv_Handle hPhy,
347 Phy_Mii mii);
348
360 void (*bind)(EthPhyDrv_Handle* hPhy,
361 uint8_t phyAddr,
362 Phy_RegAccessCb_t* pRegAccessCb);
363
377 int32_t (*config)(EthPhyDrv_Handle hPhy,
378 const void *pExtCfg,
379 const uint32_t extCfgSize,
380 Phy_Mii mii,
381 bool loopbackEn);
382
391 void (*reset)(EthPhyDrv_Handle hPhy);
392
403 bool (*isResetComplete)(EthPhyDrv_Handle hPhy);
404
416 int32_t (*readReg) (EthPhyDrv_Handle hPhy,
417 uint32_t reg,
418 uint16_t *val);
419
432 int32_t (*writeReg) (EthPhyDrv_Handle hPhy,
433 uint32_t reg,
434 uint16_t val);
435
448 int32_t (*readExtReg)(EthPhyDrv_Handle hPhy,
449 uint32_t reg,
450 uint16_t* val);
451
464 int32_t (*writeExtReg)(EthPhyDrv_Handle hPhy,
465 uint32_t reg,
466 uint16_t val);
467
479 int32_t (*rmwExtReg)(EthPhyDrv_Handle hPhy,
480 uint32_t reg,
481 uint16_t mask,
482 uint16_t* val);
483
485 void (*printRegs)(EthPhyDrv_Handle hPhy);
486
498 int32_t (*adjPtpFreq)(EthPhyDrv_Handle hPhy,
499 int64_t ppb);
500
512 int32_t (*adjPtpPhase)(EthPhyDrv_Handle hPhy,
513 int64_t offset);
514
526 int32_t (*getPtpTime)(EthPhyDrv_Handle hPhy,
527 uint64_t *ts64);
528
540 int32_t (*setPtpTime)(EthPhyDrv_Handle hPhy,
541 uint64_t ts64);
542
557 int32_t (*getPtpTxTime)(EthPhyDrv_Handle hPhy,
558 uint32_t domain,
559 uint32_t msgType,
560 uint32_t seqId,
561 uint64_t *ts64);
562
577 int32_t (*getPtpRxTime)(EthPhyDrv_Handle hPhy,
578 uint32_t domain,
579 uint32_t msgType,
580 uint32_t seqId,
581 uint64_t *ts64);
582
596 int32_t (*waitPtpTxTime)(EthPhyDrv_Handle hPhy,
597 uint32_t domain,
598 uint32_t msgType,
599 uint32_t seqId);
600
614 int32_t (*procStatusFrame)(EthPhyDrv_Handle hPhy,
615 uint8_t *frame,
616 uint32_t size,
617 uint32_t *types);
618
631 int32_t (*getStatusFrameEthHeader)(EthPhyDrv_Handle hPhy,
632 uint8_t *ethhdr,
633 uint32_t size);
634
647 int32_t (*enablePtp)(EthPhyDrv_Handle hPhy,
648 bool on,
649 uint32_t srcMacStatusFrameType);
650
660 int32_t (*tickDriver)(EthPhyDrv_Handle hPhy);
661
676 int32_t (*enableEventCapture)(EthPhyDrv_Handle hPhy, uint32_t eventIdx,
677 bool falling, bool on);
678
695 int32_t (*enableTriggerOutput)(EthPhyDrv_Handle hPhy, uint32_t triggerIdx,
696 uint64_t start, uint64_t period, bool repeat);
697
710 int32_t (*getEventTs)(EthPhyDrv_Handle hPhy, uint32_t *eventIdx,
711 uint32_t *seqId, uint64_t *ts64);
724 int32_t (*configMediaClock)(EthPhyDrv_Handle hPhy, bool isMaster,
725 uint8_t *streamIDMatchValue, bool enTrigOut);
736 int32_t (*nudgeCodecClock)(EthPhyDrv_Handle hPhy, int8_t nudgeValue);
737
747 void (*restart)(EthPhyDrv_Handle hPhy);
748
762 int32_t (*isRestartComplete)(EthPhyDrv_Handle hPhy, bool* pCompleted);
763
776 int32_t (*getId)(EthPhyDrv_Handle hPhy, uint32_t *pId);
777
790 int32_t (*ctrlPowerDown)(EthPhyDrv_Handle hPhy, bool control);
791
805 int32_t (*isPowerDownActive)(EthPhyDrv_Handle hPhy, bool *pActive);
806
826 int32_t (*enableAdvertisement)(EthPhyDrv_Handle hPhy, uint32_t advertisement);
827
847 int32_t (*disableAdvertisement)(EthPhyDrv_Handle hPhy, uint32_t advertisement);
848
864 int32_t (*ctrlAutoNegotiation)(EthPhyDrv_Handle hPhy, uint32_t control);
865
879 int32_t (*isLinkPartnerAutoNegotiationAble)(EthPhyDrv_Handle hPhy, bool *pAble);
880
893 int32_t (*isAutoNegotiationEnabled)(EthPhyDrv_Handle hPhy, bool *pEnabled);
894
907 int32_t (*isAutoNegotiationComplete)(EthPhyDrv_Handle hPhy, bool *pCompleted);
908
921 int32_t (*isAutoNegotiationRestartComplete)(EthPhyDrv_Handle hPhy, bool *pCompleted);
922
935 int32_t (*isLinkUp)(EthPhyDrv_Handle hPhy, bool *pLinkUp);
936
951 int32_t (*setSpeedDuplex)(EthPhyDrv_Handle hPhy, uint32_t settings);
952
965 int32_t (*getSpeedDuplex)(EthPhyDrv_Handle hPhy, Phy_Link_SpeedDuplex* pConfig);
966
977 void (*setMiiMode)(EthPhyDrv_Handle hPhy, Phy_Mii mii);
978
991 int32_t (*ctrlExtFD)(EthPhyDrv_Handle hPhy, bool control);
992
1006 int32_t (*ctrlOddNibbleDetection)(EthPhyDrv_Handle hPhy, bool control);
1007
1021 int32_t (*ctrlRxErrIdle)(EthPhyDrv_Handle hPhy, bool control);
1022
1036 int32_t (*ctrlFastLinkDownOption)(EthPhyDrv_Handle hPhy, uint32_t control);
1037 } fxn;
1038
1039 EthPhyDrv_Handle hDrv;
1040 } Phy_DrvObj_t;
1041
1042 typedef Phy_DrvObj_t* EthPhyDrv_If;
1043
1044
1045 /* TODO: Move this to private files */
1046 typedef struct
1047 {
1048 uint8_t phyAddr;
1049 Phy_RegAccessCb_t regAccessApi;
1050 } Phy_Obj_t;
1051
1052 /* ========================================================================== */
1053 /* Global Variables Declarations */
1054 /* ========================================================================== */
1055
1056 /* ========================================================================== */
1057 /* Function Declarations */
1058 /* ========================================================================== */
1059
1060 int32_t GenericPhy_readReg(EthPhyDrv_Handle hPhy,
1061 uint32_t reg,
1062 uint16_t *val);
1063
1064 int32_t GenericPhy_writeReg(EthPhyDrv_Handle hPhy,
1065 uint32_t reg,
1066 uint16_t val);
1067
1068 int32_t GenericPhy_readExtReg(EthPhyDrv_Handle hPhy,
1069 uint32_t reg,
1070 uint16_t* val);
1071
1072 int32_t GenericPhy_writeExtReg(EthPhyDrv_Handle hPhy,
1073 uint32_t reg,
1074 uint16_t val);
1075
1076 void GenericPhy_reset(EthPhyDrv_Handle hPhy);
1077
1078 bool GenericPhy_isResetComplete(EthPhyDrv_Handle hPhy);
1079
1080 int32_t GenericPhy_ctrlPowerDown(EthPhyDrv_Handle hPhy,
1081 bool control);
1082
1083 int32_t GenericPhy_isPowerDownActive(EthPhyDrv_Handle hPhy,
1084 bool *active);
1085
1086 int32_t GenericPhy_enableAdvertisement(EthPhyDrv_Handle hPhy,
1087 uint32_t advertisement);
1088
1089 int32_t GenericPhy_disableAdvertisement(EthPhyDrv_Handle hPhy,
1090 uint32_t advertisement);
1091
1092 int32_t GenericPhy_ctrlAutoNegotiation(EthPhyDrv_Handle hPhy,
1093 uint32_t control);
1094
1095 int32_t GenericPhy_isLinkPartnerAutoNegotiationAble (EthPhyDrv_Handle hPhy,
1096 bool *pAble);
1097
1098 int32_t GenericPhy_isAutoNegotiationEnabled(EthPhyDrv_Handle hPhy,
1099 bool *enabled);
1100
1101 int32_t GenericPhy_isAutoNegotiationComplete (EthPhyDrv_Handle hPhy,
1102 bool *completed);
1103
1104 int32_t GenericPhy_isAutoNegotiationRestartComplete (EthPhyDrv_Handle hPhy,
1105 bool *completed);
1106
1107 int32_t GenericPhy_setSpeedDuplex (EthPhyDrv_Handle hPhy,
1108 uint32_t settings);
1109
1110 int32_t GenericPhy_isLinkUp (EthPhyDrv_Handle hPhy,
1111 bool *linkUp);
1112
1113 int32_t GenericPhy_getId(EthPhyDrv_Handle hPhy,
1114 uint32_t *id);
1115
1116 /* ========================================================================== */
1117 /* Deprecated Function Declarations */
1118 /* ========================================================================== */
1119
1120 /* None */
1121
1122 /* ========================================================================== */
1123 /* Static Function Definitions */
1124 /* ========================================================================== */
1125
1126 /* None */
1127
1128 #ifdef __cplusplus
1129 }
1130 #endif
1131
1132 #endif /* PHY_COMMON_H_ */
1133
EthPhyDrv_If
Phy_DrvObj_t * EthPhyDrv_If
Definition: phy_common.h:1042
PHY_MAC_MII_RGMII
@ PHY_MAC_MII_RGMII
RGMII interface.
Definition: phy_common.h:231
GenericPhy_readReg
int32_t GenericPhy_readReg(EthPhyDrv_Handle hPhy, uint32_t reg, uint16_t *val)
EnetPhy_writeExtReg
int32_t EnetPhy_writeExtReg(void *pArgs, uint32_t reg, uint16_t val)
Write PHY extended register.
Phy_Obj_t::regAccessApi
Phy_RegAccessCb_t regAccessApi
Definition: phy_common.h:1049
EnetPhy_readExtReg
int32_t EnetPhy_readExtReg(void *pArgs, uint32_t reg, uint16_t *val)
Read PHY extended register.
GenericPhy_disableAdvertisement
int32_t GenericPhy_disableAdvertisement(EthPhyDrv_Handle hPhy, uint32_t advertisement)
PHY_LINK_FD100
@ PHY_LINK_FD100
full-duplex, 100Mbps
Definition: phy_common.h:249
Phy_RegAccessCb_t
Definition: phy_common.h:283
GenericPhy_isAutoNegotiationComplete
int32_t GenericPhy_isAutoNegotiationComplete(EthPhyDrv_Handle hPhy, bool *completed)
PHY_AUTO_NEGOTIATION_CTRL_ENABLE
@ PHY_AUTO_NEGOTIATION_CTRL_ENABLE
Enable Auto Negotiation.
Definition: phy_common.h:273
EnetPhy_writeReg
int32_t EnetPhy_writeReg(void *pArgs, uint32_t reg, uint16_t val)
Write PHY register.
EthPhyDrv_Handle
uint8_t EthPhyDrv_Handle[ETHPHYDRV_MAX_OBJ_SIZE]
Definition: phy_common.h:302
Phy_DrvObj_t
Definition: phy_common.h:305
Phy_Mii
Phy_Mii
Definition: phy_common.h:220
Phy_Version
Definition: phy_common.h:210
PHY_LINK_HD100
@ PHY_LINK_HD100
half-duplex, 100Mbps
Definition: phy_common.h:258
PHY_LINK_AUTONEG
@ PHY_LINK_AUTONEG
Auto-Negotiation.
Definition: phy_common.h:243
PHY_MAC_MII_GMII
@ PHY_MAC_MII_GMII
GMII interface.
Definition: phy_common.h:228
PHY_MAC_MII_QSGMII
@ PHY_MAC_MII_QSGMII
QSGMII interface.
Definition: phy_common.h:237
PHY_LINK_FD1000
@ PHY_LINK_FD1000
full-duplex, 1000Mbps
Definition: phy_common.h:252
GenericPhy_enableAdvertisement
int32_t GenericPhy_enableAdvertisement(EthPhyDrv_Handle hPhy, uint32_t advertisement)
GenericPhy_isAutoNegotiationRestartComplete
int32_t GenericPhy_isAutoNegotiationRestartComplete(EthPhyDrv_Handle hPhy, bool *completed)
GenericPhy_readExtReg
int32_t GenericPhy_readExtReg(EthPhyDrv_Handle hPhy, uint32_t reg, uint16_t *val)
GenericPhy_setSpeedDuplex
int32_t GenericPhy_setSpeedDuplex(EthPhyDrv_Handle hPhy, uint32_t settings)
PHY_MAC_MII_SGMII
@ PHY_MAC_MII_SGMII
SGMII interface.
Definition: phy_common.h:234
Phy_Obj_t::phyAddr
uint8_t phyAddr
Definition: phy_common.h:1048
GenericPhy_writeReg
int32_t GenericPhy_writeReg(EthPhyDrv_Handle hPhy, uint32_t reg, uint16_t val)
GenericPhy_reset
void GenericPhy_reset(EthPhyDrv_Handle hPhy)
PHY_LINK_HD10
@ PHY_LINK_HD10
half-duplex, 10Mbps
Definition: phy_common.h:255
PHY_AUTO_NEGOTIATION_CTRL_RESTART
@ PHY_AUTO_NEGOTIATION_CTRL_RESTART
Restart Auto Negotiation.
Definition: phy_common.h:276
Phy_Version::model
uint32_t model
Definition: phy_common.h:214
Phy_Version::revision
uint32_t revision
Definition: phy_common.h:216
GenericPhy_ctrlPowerDown
int32_t GenericPhy_ctrlPowerDown(EthPhyDrv_Handle hPhy, bool control)
GenericPhy_isPowerDownActive
int32_t GenericPhy_isPowerDownActive(EthPhyDrv_Handle hPhy, bool *active)
PHY_AUTO_NEGOTIATION_CTRL_ENABLE_AND_RESTART
@ PHY_AUTO_NEGOTIATION_CTRL_ENABLE_AND_RESTART
Enable and Restart Auto Negotiation.
Definition: phy_common.h:279
PHY_LINK_FD10
@ PHY_LINK_FD10
full-duplex, 10Mbps
Definition: phy_common.h:246
GenericPhy_isAutoNegotiationEnabled
int32_t GenericPhy_isAutoNegotiationEnabled(EthPhyDrv_Handle hPhy, bool *enabled)
EnetPhy_rmwReg
int32_t EnetPhy_rmwReg(void *pArgs, uint32_t reg, uint16_t mask, uint16_t val)
Read-modify-write PHY register.
GenericPhy_ctrlAutoNegotiation
int32_t GenericPhy_ctrlAutoNegotiation(EthPhyDrv_Handle hPhy, uint32_t control)
EnetPhy_readReg
int32_t EnetPhy_readReg(void *pArgs, uint32_t reg, uint16_t *val)
Read PHY register.
ETHPHYDRV_MAX_OBJ_SIZE
#define ETHPHYDRV_MAX_OBJ_SIZE
Definition: phy_common.h:59
Phy_AutoNegCtrl
Phy_AutoNegCtrl
Definition: phy_common.h:268
Phy_RegAccessCb_t::pArgs
void * pArgs
Definition: phy_common.h:298
GenericPhy_isResetComplete
bool GenericPhy_isResetComplete(EthPhyDrv_Handle hPhy)
GenericPhy_isLinkPartnerAutoNegotiationAble
int32_t GenericPhy_isLinkPartnerAutoNegotiationAble(EthPhyDrv_Handle hPhy, bool *pAble)
Phy_Version::oui
uint32_t oui
Definition: phy_common.h:212
Phy_Link_SpeedDuplex
Phy_Link_SpeedDuplex
Definition: phy_common.h:241
Phy_DrvObj_t::name
const char * name
Driver name.
Definition: phy_common.h:315
PHY_AUTO_NEGOTIATION_CTRL_DISABLE
@ PHY_AUTO_NEGOTIATION_CTRL_DISABLE
Disable Auto Negotiation.
Definition: phy_common.h:270
GenericPhy_writeExtReg
int32_t GenericPhy_writeExtReg(EthPhyDrv_Handle hPhy, uint32_t reg, uint16_t val)
PHY_LINK_INVALID
@ PHY_LINK_INVALID
Invalid Speed Duplex.
Definition: phy_common.h:264
Phy_Obj_t
Definition: phy_common.h:1047
PHY_MAC_MII_MII
@ PHY_MAC_MII_MII
MII interface.
Definition: phy_common.h:222
GenericPhy_getId
int32_t GenericPhy_getId(EthPhyDrv_Handle hPhy, uint32_t *id)
Phy_DrvObj_t::hDrv
EthPhyDrv_Handle hDrv
Definition: phy_common.h:1039
PHY_LINK_HD1000
@ PHY_LINK_HD1000
half-duplex, 1000Mbps
Definition: phy_common.h:261
GenericPhy_isLinkUp
int32_t GenericPhy_isLinkUp(EthPhyDrv_Handle hPhy, bool *linkUp)
PHY_MAC_MII_RMII
@ PHY_MAC_MII_RMII
RMII interface.
Definition: phy_common.h:225