AM263Px MCU+ SDK: ICSS_EMAC_Attrs Struct Reference

| AM263Px MCU+ SDK 26.00.00 |

Data Fields
ICSS_EMAC_Attrs Struct Reference
APIs for Networking modules » APIs for ICSS-EMAC

## Data Fields
uint8_t | emacMode
uint32_t | phyAddr [ICSS_EMAC_MAX_PORTS_PER_INSTANCE]
uint8_t | phyToMacInterfaceMode
uint8_t | halfDuplexEnable
uint8_t | enableIntrPacing
uint8_t | intrPacingMode
uint16_t | pacingThreshold
uint8_t | ethPrioQueue
uint8_t | learningEnable
uint8_t | portMask
uint8_t | txInterruptEnable
uint32_t | linkIntNum
uint32_t | rxIntNum
uint32_t | txIntNum
uint32_t | l3OcmcBaseAddr
uint32_t | l3OcmcSize
uint32_t | linkTaskPriority
uint32_t | rxTaskPriority
uint32_t | txTaskPriority
uint32_t | splitQueue
uint8_t | hostQueueIsolationMode
uint8_t | portPrioritySelection

## Field Documentation

## ◆ emacMode

uint8_t ICSS_EMAC_Attrs::emacMode

Mode from ICSS_EMAC_Modes

## ◆ phyAddr

uint32_t ICSS_EMAC_Attrs::phyAddr[ICSS_EMAC_MAX_PORTS_PER_INSTANCE]

Phy address of the ports. For mac mode, phyAddr[0] is used. For switch mode, phyAddr[0] and phyAddr[1] are used.

## ◆ phyToMacInterfaceMode

uint8_t ICSS_EMAC_Attrs::phyToMacInterfaceMode

PHY to MAC Interface Mode Valid values : ICSS_EMAC_PhyToMacInterfaceModes

## ◆ halfDuplexEnable

uint8_t ICSS_EMAC_Attrs::halfDuplexEnable

Flag to enable Half duplex capability. Firmware support also is required to enable the functionality. Valid values : 0 to disable, 1 to enable.

## ◆ enableIntrPacing

uint8_t ICSS_EMAC_Attrs::enableIntrPacing

Flag to enable Interrupt pacing. Valid values : ICSS_EMAC_InterruptPacingConfig

## ◆ intrPacingMode

uint8_t ICSS_EMAC_Attrs::intrPacingMode

Pacing mode to be used. Valid values : ICSS_EMAC_InterruptPacingModes

## ◆ pacingThreshold

uint16_t ICSS_EMAC_Attrs::pacingThreshold

Number of packets threshold for Pacing Mode1

## ◆ ethPrioQueue

uint8_t ICSS_EMAC_Attrs::ethPrioQueue

Queue Priority separation for RT and NRT packets. If packets are in Queue <= ethPrioQueue, they will be forwarded to RT callback and others to NRT callback

## ◆ learningEnable

uint8_t ICSS_EMAC_Attrs::learningEnable

Flag to enable learning. Not applicable for Mac mode. Valid values : ICSS_EMAC_LearningModes

## ◆ portMask

uint8_t ICSS_EMAC_Attrs::portMask

Port Mask. Indication to LLD which ports to be used Valid values: ICSS_EMAC_MODE_SWITCH, ICSS_EMAC_MODE_MAC1, ICSS_EMAC_MODE_MAC2

## ◆ txInterruptEnable

uint8_t ICSS_EMAC_Attrs::txInterruptEnable

Flag to enable TX Interrupt. Valid values : 0 to disable, 1 to enable. If this flag is enabled, ICSS_EMAC_txInterruptHandler() is registered as ISR for the txIntNum interrupt. This interrupt handler unblocks ICSS_EMAC_osTxTaskFnc() and calls the user-specified txCallback.

## ◆ linkIntNum

uint32_t ICSS_EMAC_Attrs::linkIntNum

## ◆ rxIntNum

uint32_t ICSS_EMAC_Attrs::rxIntNum

## ◆ txIntNum

uint32_t ICSS_EMAC_Attrs::txIntNum

## ◆ l3OcmcBaseAddr

uint32_t ICSS_EMAC_Attrs::l3OcmcBaseAddr

L3 OCMC Base Address

## ◆ l3OcmcSize

uint32_t ICSS_EMAC_Attrs::l3OcmcSize

L3 OCMC Size

## ◆ linkTaskPriority

uint32_t ICSS_EMAC_Attrs::linkTaskPriority

Link Task Priority

## ◆ rxTaskPriority

uint32_t ICSS_EMAC_Attrs::rxTaskPriority

RX Task Priority

## ◆ txTaskPriority

uint32_t ICSS_EMAC_Attrs::txTaskPriority

TX Task Priority. Valid only if txInterruptEnable is set to 1

## ◆ splitQueue

uint32_t ICSS_EMAC_Attrs::splitQueue

Flag to be set for using split Queue i.e. seperate queue for each of ports

## ◆ hostQueueIsolationMode

uint8_t ICSS_EMAC_Attrs::hostQueueIsolationMode

New buffer design enable flag uses seperate host queue per prot

## ◆ portPrioritySelection

uint8_t ICSS_EMAC_Attrs::portPrioritySelection

Flag to alter between port priority for host queue processing