AM263Px MCU+ SDK: enet_mod_mdio.h Source File

| AM263Px MCU+ SDK 26.00.00 |

enet_mod_mdio.h
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1 /*
2 * Copyright (c) Texas Instruments Incorporated 2020
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 *
8 * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 *
11 * Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the
14 * distribution.
15 *
16 * Neither the name of Texas Instruments Incorporated nor the names of
17 * its contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
47 #ifndef ENET_MOD_MDIO_H_
48 #define ENET_MOD_MDIO_H_
49
50 /* ========================================================================== */
51 /* Include Files */
52 /* ========================================================================== */
53
54 #include <stdint.h>
55 #include <include/core/enet_types.h>
56 #include <include/core/enet_ioctl.h>
57
58 #ifdef __cplusplus
59 extern "C" {
60 #endif
61
62 /* ========================================================================== */
63 /* Macros */
64 /* ========================================================================== */
65
67 #define ENET_MDIO_FEAT_CLAUSE45 (ENET_BIT(0U))
68
70 #define ENET_MDIO_FEAT_PHY_MONITOR (ENET_BIT(1U))
71
73 #define ENET_MDIO_PUBLIC_IOCTL(x) (ENET_IOCTL_TYPE_PUBLIC | \
74 ENET_IOCTL_MDIO_BASE | \
75 ENET_IOCTL_MIN(x))
76
78 #define ENET_MDIO_PRIVATE_IOCTL(x) (ENET_IOCTL_TYPE_PRIVATE | \
79 ENET_IOCTL_MDIO_BASE | \
80 ENET_IOCTL_MIN(x))
81
83 #define ENET_MDIO_PHY_ADDR_MASK(addr) (ENET_BIT(addr))
84
86 #define ENET_MDIO_IS_PHY_ADDR_SET(mask, addr) (((mask) & ENET_BIT(addr)) != 0U)
87
89 #define ENET_MDIO_PHY_ADDR_MASK_NONE (0x00000000U)
90
92 #define ENET_MDIO_PHY_ADDR_MASK_ALL (0xFFFFFFFFU)
93
95 #define ENET_MDIO_PHY_CNT_MAX (31U)
96
97 /* ========================================================================== */
98 /* Structures and Enums */
99 /* ========================================================================== */
100
104 typedef enum EnetMdio_Ioctl_e
105 {
113 ENET_MDIO_IOCTL_GET_VERSION = ENET_MDIO_PUBLIC_IOCTL(0U),
114
122 ENET_MDIO_IOCTL_PRINT_REGS = ENET_MDIO_PUBLIC_IOCTL(1U),
123
131 ENET_MDIO_IOCTL_IS_ALIVE = ENET_MDIO_PUBLIC_IOCTL(2U),
132
140 ENET_MDIO_IOCTL_IS_LINKED = ENET_MDIO_PUBLIC_IOCTL(3U),
141
152 ENET_MDIO_IOCTL_IS_POLL_ENABLED = ENET_MDIO_PUBLIC_IOCTL(4U),
153
161 ENET_MDIO_IOCTL_C22_READ = ENET_MDIO_PUBLIC_IOCTL(5U),
162
170 ENET_MDIO_IOCTL_C22_WRITE = ENET_MDIO_PUBLIC_IOCTL(6U),
171
179 ENET_MDIO_IOCTL_C45_READ = ENET_MDIO_PUBLIC_IOCTL(7U),
180
188 ENET_MDIO_IOCTL_C45_WRITE = ENET_MDIO_PUBLIC_IOCTL(8U),
189
197 ENET_MDIO_IOCTL_C22_ASYNC_READ_TRIGGER = ENET_MDIO_PUBLIC_IOCTL(9U),
198
206 ENET_MDIO_IOCTL_C22_ASYNC_READ_COMPLETE = ENET_MDIO_PUBLIC_IOCTL(10U),
207
215 ENET_MDIO_IOCTL_C22_ASYNC_WRITE_TRIGGER = ENET_MDIO_PUBLIC_IOCTL(11U),
216
224 ENET_MDIO_IOCTL_C22_ASYNC_WRITE_COMPLETE = ENET_MDIO_PUBLIC_IOCTL(12U),
225
233 ENET_MDIO_IOCTL_C45_ASYNC_READ_TRIGGER = ENET_MDIO_PUBLIC_IOCTL(13U),
234
242 ENET_MDIO_IOCTL_C45_ASYNC_READ_COMPLETE = ENET_MDIO_PUBLIC_IOCTL(14U),
243
251 ENET_MDIO_IOCTL_C45_ASYNC_WRITE_TRIGGER = ENET_MDIO_PUBLIC_IOCTL(15U),
252
260 ENET_MDIO_IOCTL_C45_ASYNC_WRITE_COMPLETE = ENET_MDIO_PUBLIC_IOCTL(16U),
261
275 ENET_MDIO_IOCTL_ENABLE_STATE_MACHINE = ENET_MDIO_PUBLIC_IOCTL(17U),
276
277 } EnetMdio_Ioctl;
278
282 typedef enum EnetMdio_Group_e
283 {
285 ENET_MDIO_GROUP_0 = 0U,
286
288 ENET_MDIO_GROUP_1,
289
291 ENET_MDIO_GROUP_NUM,
292 } EnetMdio_Group;
293
297 typedef enum EnetMdio_FrameFmt_s
298 {
300 ENET_MDIO_FRAME_FMT_C22 = 0U,
301
303 ENET_MDIO_FRAME_FMT_C45,
304 } EnetMdio_FrameFmt;
305
309 typedef enum EnetMdio_C45Mmd_e
310 {
312 ENET_MDIO_MMD_PMA_PMD = 1U,
313
315 ENET_MDIO_MMD_WIS = 2U,
316
318 ENET_MDIO_MMD_PCS = 3U,
319
321 ENET_MDIO_MMD_PHY_XS = 4U,
322
324 ENET_MDIO_MMD_DTE_XS = 5U,
325
327 ENET_MDIO_MMD_VENDOR_1 = 30U,
328
330 ENET_MDIO_MMD_VENDOR_2 = 31U,
331 } EnetMdio_C45Mmd;
332
338 typedef struct EnetMdio_C22ReadInArgs_s
339 {
344 EnetMdio_Group group;
345
347 uint32_t phyAddr;
348
350 uint16_t reg;
351 } EnetMdio_C22ReadInArgs;
352
358 typedef struct EnetMdio_C45ReadInArgs_s
359 {
364 EnetMdio_Group group;
365
367 uint32_t phyAddr;
368
370 EnetMdio_C45Mmd mmd;
371
373 uint16_t reg;
374 } EnetMdio_C45ReadInArgs;
375
381 typedef struct EnetMdio_C22WriteInArgs_s
382 {
387 EnetMdio_Group group;
388
390 uint32_t phyAddr;
391
393 uint16_t reg;
394
396 uint16_t val;
397 } EnetMdio_C22WriteInArgs;
398
404 typedef struct EnetMdio_C45WriteInArgs_s
405 {
410 EnetMdio_Group group;
411
413 uint32_t phyAddr;
414
416 EnetMdio_C45Mmd mmd;
417
419 uint16_t reg;
420
422 uint16_t val;
423 } EnetMdio_C45WriteInArgs;
424
425 /* ========================================================================== */
426 /* Global Variables Declarations */
427 /* ========================================================================== */
428
429 /* None */
430
431 /* ========================================================================== */
432 /* Function Declarations */
433 /* ========================================================================== */
434
435 /* None */
436
437 /* ========================================================================== */
438 /* Deprecated Function Declarations */
439 /* ========================================================================== */
440
441 /* None */
442
443 /* ========================================================================== */
444 /* Static Function Definitions */
445 /* ========================================================================== */
446
447 /* None */
448
449 #ifdef __cplusplus
450 }
451 #endif
452
453 #endif /* ENET_MOD_MDIO_H_ */
454
ENET_MDIO_GROUP_NUM
@ ENET_MDIO_GROUP_NUM
Definition: enet_mod_mdio.h:291
ENET_MDIO_IOCTL_IS_POLL_ENABLED
@ ENET_MDIO_IOCTL_IS_POLL_ENABLED
Get link state change poll enable status.
Definition: enet_mod_mdio.h:152
EnetMdio_C45WriteInArgs::phyAddr
uint32_t phyAddr
Definition: enet_mod_mdio.h:413
EnetMdio_C45WriteInArgs::mmd
EnetMdio_C45Mmd mmd
Definition: enet_mod_mdio.h:416
ENET_MDIO_IOCTL_PRINT_REGS
@ ENET_MDIO_IOCTL_PRINT_REGS
Print MDIO registers.
Definition: enet_mod_mdio.h:122
EnetMdio_C22WriteInArgs::val
uint16_t val
Definition: enet_mod_mdio.h:396
ENET_MDIO_IOCTL_C22_ASYNC_READ_TRIGGER
@ ENET_MDIO_IOCTL_C22_ASYNC_READ_TRIGGER
Trigger Asynchronous read to PHY register.
Definition: enet_mod_mdio.h:197
enet_types.h
This file contains the basic types using across the Enet driver.
ENET_MDIO_IOCTL_C45_ASYNC_WRITE_TRIGGER
@ ENET_MDIO_IOCTL_C45_ASYNC_WRITE_TRIGGER
Trigger Asynchronous Write to PHY register using clause-45 frame.
Definition: enet_mod_mdio.h:251
ENET_MDIO_IOCTL_C45_ASYNC_READ_COMPLETE
@ ENET_MDIO_IOCTL_C45_ASYNC_READ_COMPLETE
Checks for async Read completion to PHY register using clause-45 frame.
Definition: enet_mod_mdio.h:242
ENET_MDIO_IOCTL_C45_READ
@ ENET_MDIO_IOCTL_C45_READ
Read a PHY register using clause-45 frame.
Definition: enet_mod_mdio.h:179
EnetMdio_C22WriteInArgs::reg
uint16_t reg
Definition: enet_mod_mdio.h:393
enet_ioctl.h
This file contains the type definitions and helper macros for the Enet IOCTL interface.
ENET_MDIO_IOCTL_C22_ASYNC_WRITE_COMPLETE
@ ENET_MDIO_IOCTL_C22_ASYNC_WRITE_COMPLETE
Checks for async Write completion to PHY register.
Definition: enet_mod_mdio.h:224
EnetMdio_C45WriteInArgs::val
uint16_t val
Definition: enet_mod_mdio.h:422
ENET_MDIO_IOCTL_C45_ASYNC_WRITE_COMPLETE
@ ENET_MDIO_IOCTL_C45_ASYNC_WRITE_COMPLETE
Checks for async Write completion to PHY register using clause-45 frame.
Definition: enet_mod_mdio.h:260
ENET_MDIO_MMD_VENDOR_1
@ ENET_MDIO_MMD_VENDOR_1
Definition: enet_mod_mdio.h:327
ENET_MDIO_MMD_VENDOR_2
@ ENET_MDIO_MMD_VENDOR_2
Definition: enet_mod_mdio.h:330
EnetMdio_C45ReadInArgs::reg
uint16_t reg
Definition: enet_mod_mdio.h:373
ENET_MDIO_MMD_WIS
@ ENET_MDIO_MMD_WIS
Definition: enet_mod_mdio.h:315
EnetMdio_C22WriteInArgs
Input args for ENET_MDIO_IOCTL_C22_WRITE command.
Definition: enet_mod_mdio.h:382
ENET_MDIO_IOCTL_ENABLE_STATE_MACHINE
@ ENET_MDIO_IOCTL_ENABLE_STATE_MACHINE
Enable MDIO state machine. Use.
Definition: enet_mod_mdio.h:275
EnetMdio_C45ReadInArgs::mmd
EnetMdio_C45Mmd mmd
Definition: enet_mod_mdio.h:370
EnetMdio_Ioctl
EnetMdio_Ioctl
MDIO IOCTL commands.
Definition: enet_mod_mdio.h:105
ENET_MDIO_MMD_PHY_XS
@ ENET_MDIO_MMD_PHY_XS
Definition: enet_mod_mdio.h:321
ENET_MDIO_GROUP_1
@ ENET_MDIO_GROUP_1
Definition: enet_mod_mdio.h:288
EnetMdio_C22ReadInArgs
Input args for ENET_MDIO_IOCTL_C22_READ command.
Definition: enet_mod_mdio.h:339
ENET_MDIO_IOCTL_C45_ASYNC_READ_TRIGGER
@ ENET_MDIO_IOCTL_C45_ASYNC_READ_TRIGGER
Trigger Asynchronous Read to PHY register using clause-45 frame.
Definition: enet_mod_mdio.h:233
ENET_MDIO_IOCTL_IS_ALIVE
@ ENET_MDIO_IOCTL_IS_ALIVE
Get PHY alive status.
Definition: enet_mod_mdio.h:131
EnetMdio_C45ReadInArgs
Input args for ENET_MDIO_IOCTL_C45_READ command.
Definition: enet_mod_mdio.h:359
EnetMdio_C45WriteInArgs
Input args for ENET_MDIO_IOCTL_C45_WRITE command.
Definition: enet_mod_mdio.h:405
ENET_MDIO_MMD_DTE_XS
@ ENET_MDIO_MMD_DTE_XS
Definition: enet_mod_mdio.h:324
EnetMdio_C45WriteInArgs::group
EnetMdio_Group group
Definition: enet_mod_mdio.h:410
ENET_MDIO_FRAME_FMT_C45
@ ENET_MDIO_FRAME_FMT_C45
Definition: enet_mod_mdio.h:303
ENET_MDIO_MMD_PCS
@ ENET_MDIO_MMD_PCS
Definition: enet_mod_mdio.h:318
ENET_MDIO_MMD_PMA_PMD
@ ENET_MDIO_MMD_PMA_PMD
Definition: enet_mod_mdio.h:312
ENET_MDIO_IOCTL_C22_ASYNC_READ_COMPLETE
@ ENET_MDIO_IOCTL_C22_ASYNC_READ_COMPLETE
Checks for async read completion to PHY register.
Definition: enet_mod_mdio.h:206
ENET_MDIO_IOCTL_IS_LINKED
@ ENET_MDIO_IOCTL_IS_LINKED
Get PHY link status.
Definition: enet_mod_mdio.h:140
ENET_MDIO_IOCTL_GET_VERSION
@ ENET_MDIO_IOCTL_GET_VERSION
Get the hardware version of the MDIO module.
Definition: enet_mod_mdio.h:113
EnetMdio_C22ReadInArgs::group
EnetMdio_Group group
Definition: enet_mod_mdio.h:344
ENET_MDIO_PUBLIC_IOCTL
#define ENET_MDIO_PUBLIC_IOCTL(x)
Helper macro to create IOCTL commands for MDIO module.
Definition: enet_mod_mdio.h:73
ENET_MDIO_IOCTL_C22_READ
@ ENET_MDIO_IOCTL_C22_READ
Read a PHY register using clause-22 frame.
Definition: enet_mod_mdio.h:161
EnetMdio_FrameFmt
EnetMdio_FrameFmt
Frame format.
Definition: enet_mod_mdio.h:298
EnetMdio_C45WriteInArgs::reg
uint16_t reg
Definition: enet_mod_mdio.h:419
ENET_MDIO_IOCTL_C22_WRITE
@ ENET_MDIO_IOCTL_C22_WRITE
Write a PHY register using clause-22 frame.
Definition: enet_mod_mdio.h:170
EnetMdio_C45ReadInArgs::group
EnetMdio_Group group
Definition: enet_mod_mdio.h:364
EnetMdio_Group
EnetMdio_Group
MDIO user group.
Definition: enet_mod_mdio.h:283
ENET_MDIO_FRAME_FMT_C22
@ ENET_MDIO_FRAME_FMT_C22
Definition: enet_mod_mdio.h:300
EnetMdio_C45ReadInArgs::phyAddr
uint32_t phyAddr
Definition: enet_mod_mdio.h:367
EnetMdio_C22WriteInArgs::phyAddr
uint32_t phyAddr
Definition: enet_mod_mdio.h:390
ENET_MDIO_GROUP_0
@ ENET_MDIO_GROUP_0
Definition: enet_mod_mdio.h:285
ENET_MDIO_IOCTL_C45_WRITE
@ ENET_MDIO_IOCTL_C45_WRITE
Write a PHY register using clause-45 frame.
Definition: enet_mod_mdio.h:188
EnetMdio_C22ReadInArgs::reg
uint16_t reg
Definition: enet_mod_mdio.h:350
EnetMdio_C22ReadInArgs::phyAddr
uint32_t phyAddr
Definition: enet_mod_mdio.h:347
ENET_MDIO_IOCTL_C22_ASYNC_WRITE_TRIGGER
@ ENET_MDIO_IOCTL_C22_ASYNC_WRITE_TRIGGER
Trigger Asynchronous Write to PHY register.
Definition: enet_mod_mdio.h:215
EnetMdio_C22WriteInArgs::group
EnetMdio_Group group
Definition: enet_mod_mdio.h:387
EnetMdio_C45Mmd
EnetMdio_C45Mmd
Clause-45 MDIO Manageable Device (MMD) addresses.
Definition: enet_mod_mdio.h:310