AM263Px MCU+ SDK: ICSSG Peripheral

| AM263Px MCU+ SDK 26.00.00 |

Data Structures | Functions | Typedefs | Enumerations | Macros
ICSSG Peripheral
APIs for Networking modules » APIs for Enet LLD » Enet Peripherals

## Introduction

This peripheral driver supports ICSSG Ethernet peripheral found in Jacinto 7 processor family.

## Data Structures
struct | Icssg_TxTsEvtCbInfo
| Icssg TX timestamp event callback info structure. This is passed to application when TX timestamp is retrieved by ICSSG driver. More...
struct | IcssgMacPort_SetQueueCtPremptModeInArgs
| Input arguments for ICSSG_MACPORT_IOCTL_SET_QUEUE_CUT_THROUGH_PREEMPT_SELECT command. More...
struct | IcssgMacPort_ConfigSpecialFramePrioInArgs
| Input arguments for ICSSG_MACPORT_IOCTL_CONFIG_SPL_FRAME_PRIO command. More...
struct | IcssgMacPort_SetPortStateInArgs
| Input args for ICSSG_MACPORT_IOCTL_SET_PORT_STATE command. More...
struct | Icssg_SetAcceptFrameCheckInArgs
| Input args for ICSSG_MACPORT_IOCTL_SET_ACCEPT_FRAME_CHECK command. More...
struct | Icssg_MacAddr
| MAC address. More...
struct | IcssgMacPort_SetMacAddressInArgs
| Input args for ICSSG_MACPORT_IOCTL_SET_MACADDR command. More...
struct | Icssg_VlanFidParams
| VLAN FID entry parameters. More...
struct | Icssg_VlanFidEntry
| VLAN FID table entry. More...
struct | Icssg_FdbEntry
| FDB entry configuration. More...
struct | Icssg_HwFdbEntry
| HW FDB table entry. More...
struct | Icssg_FdbEntry_ReadSlotInArgs
| Input arguments for ICSSG_FDB_IOCTL_READ_SLOT_ENTRIES command. More...
struct | Icssg_FdbEntry_GetSlotOutArgs
| Output arguments for ICSSG_FDB_IOCTL_GET_SLOT_ENTRIES command. More...
struct | Icssg_DfltVlanCfg
| Default VLAN configuration. More...
struct | Icssg_MacPortDfltVlanCfgInArgs
| Input arguments for ICSSG_PER_IOCTL_VLAN_SET_MACPORT_DFLT_VID command. More...
struct | Icssg_IngressRateLim
| Input arguments for ICSSG_MACPORT_IOCTL_SET_INGRESS_RATE_LIM command. More...
struct | Icssg_custom_Fw
| ICSSG custom firmware. More...
struct | Icssg_FwPoolMem
| ICSSG buffer pool memories. More...
struct | Icssg_MdioLinkStateChangeInfo
| PHY link status change event information. More...
struct | Icssg_mdioLinkIntCfg
struct | Icssg_portLinkIntCfg
struct | Icssg_Cfg
| ICSSG peripheral configuration parameters. More...
struct | IcssgMacPort_Cfg
| ICSSG mac port configuration parameters. More...

## Functions
const Icssg_FwPoolMem * | EnetCb_GetFwPoolMem (Enet_Type enetType, uint32_t instId)
| ICSSG memory pool callback function. More...
void | IcssgMacPort_initCfg (IcssgMacPort_Cfg *macPortCfg)
| Initialises Mac Port COnfiguration. More...
uint32_t | Icssg_getSliceNum (Enet_Type enetType, uint32_t instId, Enet_MacPort macPort)
| ICSSG memory pool callback function. More...

## Typedefs
typedef void(* | Icssg_MdioLinkStateChangeCb) (Icssg_MdioLinkStateChangeInfo *info, void *appArg)
| Icssg PHY link state change callback function. More...
typedef void(* | Icssg_portLinkStateChangeCb) (Enet_MacPort macPort, bool isLinkUp, void *appArg)

## Enumerations
enum | Icssg_Instance_Num { ICSSG_INSTANCE_NUM_0, ICSSG_INSTANCE_NUM_1, ICSSG_INSTANCE_NUM_2 }
| ICSSG instance numbers. More...
enum | Icssg_Ioctl { ICSSG_MACPORT_IOCTL_ENABLE_PROMISC_MODE = ICSSG_PUBLIC_IOCTL(0U), ICSSG_MACPORT_IOCTL_DISABLE_PROMISC_MODE = ICSSG_PUBLIC_IOCTL(1U), ICSSG_PER_IOCTL_VLAN_RESET_TABLE = ICSSG_PUBLIC_IOCTL(2U), ICSSG_PER_IOCTL_VLAN_SET_ENTRY = ICSSG_PUBLIC_IOCTL(3U), ICSSG_PER_IOCTL_VLAN_GET_ENTRY = ICSSG_PUBLIC_IOCTL(4U), ICSSG_PER_IOCTL_SET_PORT_STATE = ICSSG_PUBLIC_IOCTL(5U), ICSSG_FDB_IOCTL_ADD_ENTRY = ICSSG_PUBLIC_IOCTL(6U), ICSSG_FDB_IOCTL_REMOVE_ENTRY = ICSSG_PUBLIC_IOCTL(7U), ICSSG_FDB_IOCTL_REMOVE_ALL_ENTRIES = ICSSG_PUBLIC_IOCTL(8U), ICSSG_FDB_IOCTL_REMOVE_AGEABLE_ENTRIES = ICSSG_PUBLIC_IOCTL(9U), ICSSG_FDB_IOCTL_READ_SLOT_ENTRIES = ICSSG_PUBLIC_IOCTL(10U), ICSSG_FDB_IOCTL_GET_SLOT_ENTRIES = ICSSG_PUBLIC_IOCTL(11U), ICSSG_MACPORT_IOCTL_SET_MACADDR = ICSSG_PUBLIC_IOCTL(12U), ICSSG_HOSTPORT_IOCTL_SET_MACADDR = ICSSG_PUBLIC_IOCTL(13U), ICSSG_PER_IOCTL_TAS_TRIGGER = ICSSG_PUBLIC_IOCTL(14U), ICSSG_PER_IOCTL_TAS_ENABLE = ICSSG_PUBLIC_IOCTL(15U), ICSSG_PER_IOCTL_TAS_DISABLE = ICSSG_PUBLIC_IOCTL(16U), ICSSG_PER_IOCTL_TAS_RESET = ICSSG_PUBLIC_IOCTL(17U), ICSSG_PER_IOCTL_VLAN_SET_HOSTPORT_DFLT_VID = ICSSG_PUBLIC_IOCTL(18U), ICSSG_PER_IOCTL_VLAN_SET_MACPORT_DFLT_VID = ICSSG_PUBLIC_IOCTL(19U), ICSSG_FDB_IOCTL_SET_AGING_PERIOD = ICSSG_PUBLIC_IOCTL(20U), ICSSG_MACPORT_IOCTL_ENABLE_UCAST_FLOOD = ICSSG_PUBLIC_IOCTL(21U), ICSSG_MACPORT_IOCTL_DISABLE_UCAST_FLOOD = ICSSG_PUBLIC_IOCTL(22U), ICSSG_MACPORT_IOCTL_ENABLE_MCAST_FLOOD = ICSSG_PUBLIC_IOCTL(23U), ICSSG_MACPORT_IOCTL_DISABLE_MCAST_FLOOD = ICSSG_PUBLIC_IOCTL(24U), ICSSG_MACPORT_IOCTL_SET_ACCEPT_FRAME_CHECK = ICSSG_PUBLIC_IOCTL(25U), ICSSG_MACPORT_IOCTL_SET_INGRESS_RATE_LIM = ICSSG_PUBLIC_IOCTL(26U), ICSSG_MACPORT_IOCTL_SET_QUEUE_CUT_THROUGH_PREEMPT_SELECT = ICSSG_PUBLIC_IOCTL(27U), ICSSG_MACPORT_IOCTL_CONFIG_SPL_FRAME_PRIO = ICSSG_PUBLIC_IOCTL(28U), ICSSG_ENABLE_PROTOCOL_SPECIFIC_TAG_IOCTL = ICSSG_PUBLIC_IOCTL(29U), ICSSG_DISABLE_PROTOCOL_SPECIFIC_TAG_IOCTL = ICSSG_PUBLIC_IOCTL(30U), ICSSG_INTERNAL_IOCTL_REGISTER_HANDLER = ICSSG_PUBLIC_IOCTL(31U) }
| ICSSG IOCTL commands. More...
enum | Icssg_QueuePreemptMode { ICSSG_QUEUE_PREEMPT_MODE_EXPRESS, ICSSG_QUEUE_PREEMPT_MODE_PREEMPT }
| Queue preemptive mode: express or preemptive. More...
enum | Icssg_QueueForwardMode { ICSSG_QUEUE_FORWARD_MODE_STOREANDFWD, ICSSG_QUEUE_FORWARD_MODE_CUTTHROUGH }
| Queue forward mode: cut-through or store-and-forward. More...
enum | Icssg_PortState { ICSSG_PORT_STATE_DISABLED, ICSSG_PORT_STATE_BLOCKING, ICSSG_PORT_STATE_FORWARD, ICSSG_PORT_STATE_FORWARD_WO_LEARNING, ICSSG_PORT_STATE_TAS_TRIGGER, ICSSG_PORT_STATE_TAS_ENABLE, ICSSG_PORT_STATE_TAS_RESET, ICSSG_PORT_STATE_TAS_DISABLE }
| Port states. More...
enum | Icssg_AcceptFrameCheck { ICSSG_ACCEPT_ONLY_VLAN_TAGGED, ICSSG_ACCEPT_ONLY_UNTAGGED_PRIO_TAGGED, ICSSG_ACCEPT_ALL }
| Acceptable frame check criteria. More...

## Macros
#define | ICSSG_CFG_DEFAULT_AGING_PERIOD_MS (0x6FC23AC00)
#define | ICSSG_IEP_DFLT_CYCLE_TIME_NSECS (1000000U)
#define | ICSSG_PUBLIC_IOCTL(x)
| Helper macro to create IOCTL commands for ICSSG per. More...
#define | ICSSG_PORT_NUM (3U)
| Number of supported ports (host port, physical ports 1 and 2). More...
#define | ICSSG_MAC_PORT_MAX (ICSSG_PORT_NUM - 1U)
| Maximum number of MAC ports per ICSSG instance. More...
#define | ICSSG_PER_DUALMAC_PORT_MAX (1U)
| Maximum number of MAC ports in a ICSSG peripheral in Dual-MAC mode. Note that each port in Dual-MAC is handled as a separate Enet peripheral. More...
#define | ICSSG_PER_SWITCH_PORT_MAX (ICSSG_MAC_PORT_MAX)
| Maximum number of MAC ports in a ICSSG peripheral in Switch mode. More...
#define | ICSSG_INSTANCE_NUM (2U)
| Number of supported icssg instances. More...
#define | ICSSG_MAX_NUM_BUFFER_POOLS (24U)
| Max number of buffer pools. More...
#define | ICSSG_DUALMAC_TX_CH_NUM (ENET_CFG_RM_TX_CH_MAX)
| Number of TX channels per slice in Dual-MAC mode. More...
#define | ICSSG_DUALMAC_RX_FLOW_NUM (ENET_CFG_RM_RX_CH_MAX / 2)
| Number of RX flows per slice in Dual-MAC mode. More...
#define | ICSSG_SWITCH_TX_CH_NUM (ENET_CFG_RM_TX_CH_MAX)
| Number of TX channels in Switch mode. More...
#define | ICSSG_SWITCH_RX_FLOW_NUM (ENET_CFG_RM_RX_CH_MAX)
| Number of RX flows in Switch mode. More...
#define | ICSSG_DUALMAC_PORT_BUFFER_POOL_NUM (0U)
| Number of port buffer pools required for Dual-MAC. More...
#define | ICSSG_DUALMAC_HOST_EGRESS_QUEUE_NUM (2U)
| Number of host egress queues required for Dual-MAC. More...
#define | ICSSG_SWITCH_PORT_BUFFER_POOL_NUM (8U)
| Number of port buffer pools required for Dual-MAC. This value can be modified if required from 1 to 8. More...
#define | ICSSG_SWITCH_PORT_BUFFER_POOL_NUM_MAX (8U)
| Maximum number of port buffer pools. This offset used for Host pool init config. More...
#define | ICSSG_SWITCH_HOST_OWN_BUFFER_POOL_MAX_OFFSET (16U)
| Maximum number of Host OWN buffer pools. This offset used for Host pool init config. More...
#define | ICSSG_SWITCH_HOST_EGRESS_QUEUE_NUM (2U)
| Number of host egress queues required for Dual-MAC. More...
#define | ICSSG_HOST_EGRESS_BUFFER_PADDING (2048U)
| Host egress queue padding size. More...
#define | ICSSG_SCRATCH_BUFFER_SIZE (ENET_UTILS_ALIGN((2048U), ICSSG_CACHELINE_ALIGNMENT))
| Size of the scratch buffer used for error frames and large frames. More...
#define | ICSSG_RATE_SRC_SEL_FT1_MATCH0 (0U)
#define | ICSSG_RATE_SRC_SEL_FT1_MATCH1 (1U)
#define | ICSSG_RATE_SRC_SEL_FT1_MATCH2 (2U)
#define | ICSSG_RATE_SRC_SEL_FT1_MATCH3 (3U)
#define | ICSSG_RATE_SRC_SEL_FT1_MATCH4 (4U)
#define | ICSSG_RATE_SRC_SEL_FT1_MATCH5 (5U)
#define | ICSSG_RATE_SRC_SEL_FT1_MATCH6 (6U)
#define | ICSSG_RATE_SRC_SEL_FT1_MATCH7 (7U)
#define | ICSSG_RATE_SRC_SEL_FT3_MATCH0 (8U)
#define | ICSSG_RATE_SRC_SEL_FT3_MATCH1 (9U)
#define | ICSSG_RATE_SRC_SEL_FT3_MATCH2 (10U)
#define | ICSSG_RATE_SRC_SEL_FT3_MATCH3 (11U)
#define | ICSSG_RATE_SRC_SEL_FT3_MATCH4 (12U)
#define | ICSSG_RATE_SRC_SEL_FT3_MATCH5 (13U)
#define | ICSSG_RATE_SRC_SEL_FT3_MATCH6 (14U)
#define | ICSSG_RATE_SRC_SEL_FT3_MATCH7 (15U)
#define | ICSSG_RATE_SRC_SEL_FT3_MATCH8 (16U)
#define | ICSSG_RATE_SRC_SEL_FT3_MATCH9 (17U)
#define | ICSSG_RATE_SRC_SEL_FT3_MATCH10 (18U)
#define | ICSSG_RATE_SRC_SEL_FT3_MATCH11 (19U)
#define | ICSSG_RATE_SRC_SEL_FT3_MATCH12 (20U)
#define | ICSSG_RATE_SRC_SEL_FT3_MATCH13 (21U)
#define | ICSSG_RATE_SRC_SEL_FT3_MATCH14 (22U)
#define | ICSSG_RATE_SRC_SEL_FT3_MATCH15 (23U)
#define | ICSSG_RATE_SRC_SEL_FT_RX_UC (24U)
#define | ICSSG_RATE_SRC_SEL_FT_RX_MC (25U)
#define | ICSSG_RATE_SRC_SEL_FT_RX_BC (26U)
#define | ICSSG_RATE_SRC_SEL_FT_RX_SAV (27U)
#define | ICSSG_RATE_SRC_SEL_FT_RX_FWD (28U)
#define | ICSSG_RATE_SRC_SEL_FT_RX_RCV (29U)
#define | ICSSG_RATE_SRC_SEL_FT_RX_VLAN (30U)
#define | ICSSG_RATE_SRC_SEL_FT_RX_DA_P (31U)
#define | ICSSG_RATE_SRC_SEL_FT_RX_DA_I (32U)
#define | ICSSG_RATE_SRC_SEL_RX_CLASS_RAW0 (33U)
#define | ICSSG_RATE_SRC_SEL_RX_CLASS_RAW1 (34U)
#define | ICSSG_RATE_SRC_SEL_RX_CLASS_RAW2 (35U)
#define | ICSSG_RATE_SRC_SEL_RX_CLASS_RAW3 (36U)
#define | ICSSG_RATE_SRC_SEL_RX_CLASS_RAW4 (37U)
#define | ICSSG_RATE_SRC_SEL_RX_CLASS_RAW5 (38U)
#define | ICSSG_RATE_SRC_SEL_RX_CLASS_RAW6 (39U)
#define | ICSSG_RATE_SRC_SEL_RX_CLASS_RAW7 (40U)
#define | ICSSG_RATE_SRC_SEL_RX_CLASS_RAW8 (41U)
#define | ICSSG_RATE_SRC_SEL_RX_CLASS_RAW9 (42U)
#define | ICSSG_RATE_SRC_SEL_RX_CLASS_RAW10 (43U)
#define | ICSSG_RATE_SRC_SEL_RX_CLASS_RAW11 (44U)
#define | ICSSG_RATE_SRC_SEL_RX_CLASS_RAW12 (45U)
#define | ICSSG_RATE_SRC_SEL_RX_CLASS_RAW13 (46U)
#define | ICSSG_RATE_SRC_SEL_RX_CLASS_RAW14 (47U)
#define | ICSSG_RATE_SRC_SEL_RX_CLASS_RAW15 (48U)
#define | ICCSG_RX_CLASS_DATA_FT3_MATCH0 (0U)
#define | ICCSG_RX_CLASS_DATA_FT3_MATCH1 (1U)
#define | ICCSG_RX_CLASS_DATA_FT3_MATCH2 (2U)
#define | ICCSG_RX_CLASS_DATA_FT3_MATCH3 (3U)
#define | ICCSG_RX_CLASS_DATA_FT3_MATCH4 (4U)
#define | ICCSG_RX_CLASS_DATA_FT3_MATCH5 (5U)
#define | ICCSG_RX_CLASS_DATA_FT3_MATCH6 (6U)
#define | ICCSG_RX_CLASS_DATA_FT3_MATCH7 (7U)
#define | ICCSG_RX_CLASS_DATA_FT3_MATCH8 (8U)
#define | ICCSG_RX_CLASS_DATA_FT3_MATCH9 (9U)
#define | ICCSG_RX_CLASS_DATA_FT3_MATCH10 (10U)
#define | ICCSG_RX_CLASS_DATA_FT3_MATCH11 (11U)
#define | ICCSG_RX_CLASS_DATA_FT3_MATCH12 (12U)
#define | ICCSG_RX_CLASS_DATA_FT3_MATCH13 (13U)
#define | ICCSG_RX_CLASS_DATA_FT3_MATCH14 (14U)
#define | ICCSG_RX_CLASS_DATA_FT3_MATCH15 (15U)
#define | ICCSG_RX_CLASS_DATA_FT1_MATCH0 (16U)
#define | ICCSG_RX_CLASS_DATA_FT1_MATCH1 (17U)
#define | ICCSG_RX_CLASS_DATA_FT1_MATCH2 (18U)
#define | ICCSG_RX_CLASS_DATA_FT1_MATCH3 (19U)
#define | ICCSG_RX_CLASS_DATA_FT1_MATCH4 (20U)
#define | ICCSG_RX_CLASS_DATA_FT1_MATCH5 (21U)
#define | ICCSG_RX_CLASS_DATA_FT1_MATCH6 (22U)
#define | ICCSG_RX_CLASS_DATA_FT1_MATCH7 (23U)
#define | ICCSG_RX_CLASS_DATA_FT_RX_DA_I (24U)
#define | ICCSG_RX_CLASS_DATA_FT_RX_DA_P (25U)
#define | ICCSG_RX_CLASS_DATA_FT_RX_VLAN (26U)
#define | ICCSG_RX_CLASS_DATA_FT_RX_RCV (27U)
#define | ICCSG_RX_CLASS_DATA_FT_RX_FWD (28U)
#define | ICCSG_RX_CLASS_DATA_FT_RX_BC (29U)
#define | ICCSG_RX_CLASS_DATA_FT_RX_MC (30U)
#define | ICCSG_RX_CLASS_DATA_FT_RX_SAV (31U)
#define | ICSSG_TAS_MIN_CYCLE_TIME_NS (1000000)
| Minimum cycle time supported by implementation (in ns). More...
#define | ICSSG_TAS_MIN_WINDOW_DURATION_NS (10000)
| Minimum TAS window duration supported by implementation (in ns). More...

## ICSSG FDB entry fields.
#define | ICSSG_FDB_ENTRY_P0_MEMBERSHIP (ENET_BIT(0U))
| Host port membership. More...
#define | ICSSG_FDB_ENTRY_P1_MEMBERSHIP (ENET_BIT(1U))
| Physical port 1 membership. More...
#define | ICSSG_FDB_ENTRY_P2_MEMBERSHIP (ENET_BIT(2U))
| Physical port 2 membership. More...
#define | ICSSG_FDB_ENTRY_AGEABLE (ENET_BIT(3U))
| Ageable bit. More...
#define | ICSSG_FDB_ENTRY_BLOCK (ENET_BIT(4U))
| Block bit. More...
#define | ICSSG_FDB_ENTRY_SECURE (ENET_BIT(5U))
| Secure bit. More...
#define | ICSSG_FDB_ENTRY_TOUCHED (ENET_BIT(6U))
| Touched bit. More...
#define | ICSSG_FDB_ENTRY_VALID (ENET_BIT(7U))
| Valid bit. More...

## Macro Definition Documentation

## ◆ ICSSG_CFG_DEFAULT_AGING_PERIOD_MS

#define ICSSG_CFG_DEFAULT_AGING_PERIOD_MS (0x6FC23AC00)

## ◆ ICSSG_IEP_DFLT_CYCLE_TIME_NSECS

#define ICSSG_IEP_DFLT_CYCLE_TIME_NSECS (1000000U)

IEP default cycle time of 1 ms.

## ◆ ICSSG_PUBLIC_IOCTL

#define ICSSG_PUBLIC_IOCTL | ( |  | x | ) |

Value:
(ENET_IOCTL_PER_BASE | \
ENET_IOCTL_PER_ICSSG | \
ENET_IOCTL_MIN(x))

Helper macro to create IOCTL commands for ICSSG per.

## ◆ ICSSG_PORT_NUM

#define ICSSG_PORT_NUM (3U)

Number of supported ports (host port, physical ports 1 and 2).

## ◆ ICSSG_MAC_PORT_MAX

#define ICSSG_MAC_PORT_MAX (ICSSG_PORT_NUM - 1U)

Maximum number of MAC ports per ICSSG instance.

## ◆ ICSSG_PER_DUALMAC_PORT_MAX

#define ICSSG_PER_DUALMAC_PORT_MAX (1U)

Maximum number of MAC ports in a ICSSG peripheral in Dual-MAC mode. Note that each port in Dual-MAC is handled as a separate Enet peripheral.

## ◆ ICSSG_PER_SWITCH_PORT_MAX

#define ICSSG_PER_SWITCH_PORT_MAX (ICSSG_MAC_PORT_MAX)

Maximum number of MAC ports in a ICSSG peripheral in Switch mode.

## ◆ ICSSG_INSTANCE_NUM

#define ICSSG_INSTANCE_NUM (2U)

Number of supported icssg instances.

## ◆ ICSSG_MAX_NUM_BUFFER_POOLS

#define ICSSG_MAX_NUM_BUFFER_POOLS (24U)

Max number of buffer pools.

## ◆ ICSSG_DUALMAC_TX_CH_NUM

#define ICSSG_DUALMAC_TX_CH_NUM (ENET_CFG_RM_TX_CH_MAX)

Number of TX channels per slice in Dual-MAC mode.

## ◆ ICSSG_DUALMAC_RX_FLOW_NUM

#define ICSSG_DUALMAC_RX_FLOW_NUM (ENET_CFG_RM_RX_CH_MAX / 2)

Number of RX flows per slice in Dual-MAC mode.

## ◆ ICSSG_SWITCH_TX_CH_NUM

#define ICSSG_SWITCH_TX_CH_NUM (ENET_CFG_RM_TX_CH_MAX)

Number of TX channels in Switch mode.

## ◆ ICSSG_SWITCH_RX_FLOW_NUM

#define ICSSG_SWITCH_RX_FLOW_NUM (ENET_CFG_RM_RX_CH_MAX)

Number of RX flows in Switch mode.

## ◆ ICSSG_DUALMAC_PORT_BUFFER_POOL_NUM

#define ICSSG_DUALMAC_PORT_BUFFER_POOL_NUM (0U)

Number of port buffer pools required for Dual-MAC.

## ◆ ICSSG_DUALMAC_HOST_EGRESS_QUEUE_NUM

#define ICSSG_DUALMAC_HOST_EGRESS_QUEUE_NUM (2U)

Number of host egress queues required for Dual-MAC.

## ◆ ICSSG_SWITCH_PORT_BUFFER_POOL_NUM

#define ICSSG_SWITCH_PORT_BUFFER_POOL_NUM (8U)

Number of port buffer pools required for Dual-MAC. This value can be modified if required from 1 to 8.

## ◆ ICSSG_SWITCH_PORT_BUFFER_POOL_NUM_MAX

#define ICSSG_SWITCH_PORT_BUFFER_POOL_NUM_MAX (8U)

Maximum number of port buffer pools. This offset used for Host pool init config.

## ◆ ICSSG_SWITCH_HOST_OWN_BUFFER_POOL_MAX_OFFSET

#define ICSSG_SWITCH_HOST_OWN_BUFFER_POOL_MAX_OFFSET (16U)

Maximum number of Host OWN buffer pools. This offset used for Host pool init config.

## ◆ ICSSG_SWITCH_HOST_EGRESS_QUEUE_NUM

#define ICSSG_SWITCH_HOST_EGRESS_QUEUE_NUM (2U)

Number of host egress queues required for Dual-MAC.

## ◆ ICSSG_HOST_EGRESS_BUFFER_PADDING

#define ICSSG_HOST_EGRESS_BUFFER_PADDING (2048U)

Host egress queue padding size.

## ◆ ICSSG_SCRATCH_BUFFER_SIZE

#define ICSSG_SCRATCH_BUFFER_SIZE (ENET_UTILS_ALIGN((2048U), ICSSG_CACHELINE_ALIGNMENT))

Size of the scratch buffer used for error frames and large frames.

## ◆ ICSSG_FDB_ENTRY_P0_MEMBERSHIP

#define ICSSG_FDB_ENTRY_P0_MEMBERSHIP (ENET_BIT(0U))

Host port membership.

Indicates host port membership.

## ◆ ICSSG_FDB_ENTRY_P1_MEMBERSHIP

#define ICSSG_FDB_ENTRY_P1_MEMBERSHIP (ENET_BIT(1U))

Physical port 1 membership.

Indicates that MAC ID is connected to physical port 1.

## ◆ ICSSG_FDB_ENTRY_P2_MEMBERSHIP

#define ICSSG_FDB_ENTRY_P2_MEMBERSHIP (ENET_BIT(2U))

Physical port 2 membership.

Indicates that MAC ID is connected to physical port 2.

## ◆ ICSSG_FDB_ENTRY_AGEABLE

#define ICSSG_FDB_ENTRY_AGEABLE (ENET_BIT(3U))

Ageable bit.

Ageable bit is set for learned entries and cleared for static entries.

## ◆ ICSSG_FDB_ENTRY_BLOCK

#define ICSSG_FDB_ENTRY_BLOCK (ENET_BIT(4U))

Block bit.

If set for SA then packet is dropped (can be used to implement a blacklist). If set for DA then packet is determined to be a special packet.

## ◆ ICSSG_FDB_ENTRY_SECURE

#define ICSSG_FDB_ENTRY_SECURE (ENET_BIT(5U))

Secure bit.

If set for DA then the SA from the packet is not learned.

## ◆ ICSSG_FDB_ENTRY_TOUCHED

#define ICSSG_FDB_ENTRY_TOUCHED (ENET_BIT(6U))

Touched bit.

If set, it means packet has been seen recently with source address + FID matching MAC address/FID of entry.

## ◆ ICSSG_FDB_ENTRY_VALID

#define ICSSG_FDB_ENTRY_VALID (ENET_BIT(7U))

Valid bit.

Set if entry is valid.

## ◆ ICSSG_RATE_SRC_SEL_FT1_MATCH0

#define ICSSG_RATE_SRC_SEL_FT1_MATCH0 (0U)

## ◆ ICSSG_RATE_SRC_SEL_FT1_MATCH1

#define ICSSG_RATE_SRC_SEL_FT1_MATCH1 (1U)

## ◆ ICSSG_RATE_SRC_SEL_FT1_MATCH2

#define ICSSG_RATE_SRC_SEL_FT1_MATCH2 (2U)

## ◆ ICSSG_RATE_SRC_SEL_FT1_MATCH3

#define ICSSG_RATE_SRC_SEL_FT1_MATCH3 (3U)

## ◆ ICSSG_RATE_SRC_SEL_FT1_MATCH4

#define ICSSG_RATE_SRC_SEL_FT1_MATCH4 (4U)

## ◆ ICSSG_RATE_SRC_SEL_FT1_MATCH5

#define ICSSG_RATE_SRC_SEL_FT1_MATCH5 (5U)

## ◆ ICSSG_RATE_SRC_SEL_FT1_MATCH6

#define ICSSG_RATE_SRC_SEL_FT1_MATCH6 (6U)

## ◆ ICSSG_RATE_SRC_SEL_FT1_MATCH7

#define ICSSG_RATE_SRC_SEL_FT1_MATCH7 (7U)

## ◆ ICSSG_RATE_SRC_SEL_FT3_MATCH0

#define ICSSG_RATE_SRC_SEL_FT3_MATCH0 (8U)

## ◆ ICSSG_RATE_SRC_SEL_FT3_MATCH1

#define ICSSG_RATE_SRC_SEL_FT3_MATCH1 (9U)

## ◆ ICSSG_RATE_SRC_SEL_FT3_MATCH2

#define ICSSG_RATE_SRC_SEL_FT3_MATCH2 (10U)

## ◆ ICSSG_RATE_SRC_SEL_FT3_MATCH3

#define ICSSG_RATE_SRC_SEL_FT3_MATCH3 (11U)

## ◆ ICSSG_RATE_SRC_SEL_FT3_MATCH4

#define ICSSG_RATE_SRC_SEL_FT3_MATCH4 (12U)

## ◆ ICSSG_RATE_SRC_SEL_FT3_MATCH5

#define ICSSG_RATE_SRC_SEL_FT3_MATCH5 (13U)

## ◆ ICSSG_RATE_SRC_SEL_FT3_MATCH6

#define ICSSG_RATE_SRC_SEL_FT3_MATCH6 (14U)

## ◆ ICSSG_RATE_SRC_SEL_FT3_MATCH7

#define ICSSG_RATE_SRC_SEL_FT3_MATCH7 (15U)

## ◆ ICSSG_RATE_SRC_SEL_FT3_MATCH8

#define ICSSG_RATE_SRC_SEL_FT3_MATCH8 (16U)

## ◆ ICSSG_RATE_SRC_SEL_FT3_MATCH9

#define ICSSG_RATE_SRC_SEL_FT3_MATCH9 (17U)

## ◆ ICSSG_RATE_SRC_SEL_FT3_MATCH10

#define ICSSG_RATE_SRC_SEL_FT3_MATCH10 (18U)

## ◆ ICSSG_RATE_SRC_SEL_FT3_MATCH11

#define ICSSG_RATE_SRC_SEL_FT3_MATCH11 (19U)

## ◆ ICSSG_RATE_SRC_SEL_FT3_MATCH12

#define ICSSG_RATE_SRC_SEL_FT3_MATCH12 (20U)

## ◆ ICSSG_RATE_SRC_SEL_FT3_MATCH13

#define ICSSG_RATE_SRC_SEL_FT3_MATCH13 (21U)

## ◆ ICSSG_RATE_SRC_SEL_FT3_MATCH14

#define ICSSG_RATE_SRC_SEL_FT3_MATCH14 (22U)

## ◆ ICSSG_RATE_SRC_SEL_FT3_MATCH15

#define ICSSG_RATE_SRC_SEL_FT3_MATCH15 (23U)

## ◆ ICSSG_RATE_SRC_SEL_FT_RX_UC

#define ICSSG_RATE_SRC_SEL_FT_RX_UC (24U)

## ◆ ICSSG_RATE_SRC_SEL_FT_RX_MC

#define ICSSG_RATE_SRC_SEL_FT_RX_MC (25U)

## ◆ ICSSG_RATE_SRC_SEL_FT_RX_BC

#define ICSSG_RATE_SRC_SEL_FT_RX_BC (26U)

## ◆ ICSSG_RATE_SRC_SEL_FT_RX_SAV

#define ICSSG_RATE_SRC_SEL_FT_RX_SAV (27U)

## ◆ ICSSG_RATE_SRC_SEL_FT_RX_FWD

#define ICSSG_RATE_SRC_SEL_FT_RX_FWD (28U)

## ◆ ICSSG_RATE_SRC_SEL_FT_RX_RCV

#define ICSSG_RATE_SRC_SEL_FT_RX_RCV (29U)

## ◆ ICSSG_RATE_SRC_SEL_FT_RX_VLAN

#define ICSSG_RATE_SRC_SEL_FT_RX_VLAN (30U)

## ◆ ICSSG_RATE_SRC_SEL_FT_RX_DA_P

#define ICSSG_RATE_SRC_SEL_FT_RX_DA_P (31U)

## ◆ ICSSG_RATE_SRC_SEL_FT_RX_DA_I

#define ICSSG_RATE_SRC_SEL_FT_RX_DA_I (32U)

## ◆ ICSSG_RATE_SRC_SEL_RX_CLASS_RAW0

#define ICSSG_RATE_SRC_SEL_RX_CLASS_RAW0 (33U)

## ◆ ICSSG_RATE_SRC_SEL_RX_CLASS_RAW1

#define ICSSG_RATE_SRC_SEL_RX_CLASS_RAW1 (34U)

## ◆ ICSSG_RATE_SRC_SEL_RX_CLASS_RAW2

#define ICSSG_RATE_SRC_SEL_RX_CLASS_RAW2 (35U)

## ◆ ICSSG_RATE_SRC_SEL_RX_CLASS_RAW3

#define ICSSG_RATE_SRC_SEL_RX_CLASS_RAW3 (36U)

## ◆ ICSSG_RATE_SRC_SEL_RX_CLASS_RAW4

#define ICSSG_RATE_SRC_SEL_RX_CLASS_RAW4 (37U)

## ◆ ICSSG_RATE_SRC_SEL_RX_CLASS_RAW5

#define ICSSG_RATE_SRC_SEL_RX_CLASS_RAW5 (38U)

## ◆ ICSSG_RATE_SRC_SEL_RX_CLASS_RAW6

#define ICSSG_RATE_SRC_SEL_RX_CLASS_RAW6 (39U)

## ◆ ICSSG_RATE_SRC_SEL_RX_CLASS_RAW7

#define ICSSG_RATE_SRC_SEL_RX_CLASS_RAW7 (40U)

## ◆ ICSSG_RATE_SRC_SEL_RX_CLASS_RAW8

#define ICSSG_RATE_SRC_SEL_RX_CLASS_RAW8 (41U)

## ◆ ICSSG_RATE_SRC_SEL_RX_CLASS_RAW9

#define ICSSG_RATE_SRC_SEL_RX_CLASS_RAW9 (42U)

## ◆ ICSSG_RATE_SRC_SEL_RX_CLASS_RAW10

#define ICSSG_RATE_SRC_SEL_RX_CLASS_RAW10 (43U)

## ◆ ICSSG_RATE_SRC_SEL_RX_CLASS_RAW11

#define ICSSG_RATE_SRC_SEL_RX_CLASS_RAW11 (44U)

## ◆ ICSSG_RATE_SRC_SEL_RX_CLASS_RAW12

#define ICSSG_RATE_SRC_SEL_RX_CLASS_RAW12 (45U)

## ◆ ICSSG_RATE_SRC_SEL_RX_CLASS_RAW13

#define ICSSG_RATE_SRC_SEL_RX_CLASS_RAW13 (46U)

## ◆ ICSSG_RATE_SRC_SEL_RX_CLASS_RAW14

#define ICSSG_RATE_SRC_SEL_RX_CLASS_RAW14 (47U)

## ◆ ICSSG_RATE_SRC_SEL_RX_CLASS_RAW15

#define ICSSG_RATE_SRC_SEL_RX_CLASS_RAW15 (48U)

## ◆ ICCSG_RX_CLASS_DATA_FT3_MATCH0

#define ICCSG_RX_CLASS_DATA_FT3_MATCH0 (0U)

## ◆ ICCSG_RX_CLASS_DATA_FT3_MATCH1

#define ICCSG_RX_CLASS_DATA_FT3_MATCH1 (1U)

## ◆ ICCSG_RX_CLASS_DATA_FT3_MATCH2

#define ICCSG_RX_CLASS_DATA_FT3_MATCH2 (2U)

## ◆ ICCSG_RX_CLASS_DATA_FT3_MATCH3

#define ICCSG_RX_CLASS_DATA_FT3_MATCH3 (3U)

## ◆ ICCSG_RX_CLASS_DATA_FT3_MATCH4

#define ICCSG_RX_CLASS_DATA_FT3_MATCH4 (4U)

## ◆ ICCSG_RX_CLASS_DATA_FT3_MATCH5

#define ICCSG_RX_CLASS_DATA_FT3_MATCH5 (5U)

## ◆ ICCSG_RX_CLASS_DATA_FT3_MATCH6

#define ICCSG_RX_CLASS_DATA_FT3_MATCH6 (6U)

## ◆ ICCSG_RX_CLASS_DATA_FT3_MATCH7

#define ICCSG_RX_CLASS_DATA_FT3_MATCH7 (7U)

## ◆ ICCSG_RX_CLASS_DATA_FT3_MATCH8

#define ICCSG_RX_CLASS_DATA_FT3_MATCH8 (8U)

## ◆ ICCSG_RX_CLASS_DATA_FT3_MATCH9

#define ICCSG_RX_CLASS_DATA_FT3_MATCH9 (9U)

## ◆ ICCSG_RX_CLASS_DATA_FT3_MATCH10

#define ICCSG_RX_CLASS_DATA_FT3_MATCH10 (10U)

## ◆ ICCSG_RX_CLASS_DATA_FT3_MATCH11

#define ICCSG_RX_CLASS_DATA_FT3_MATCH11 (11U)

## ◆ ICCSG_RX_CLASS_DATA_FT3_MATCH12

#define ICCSG_RX_CLASS_DATA_FT3_MATCH12 (12U)

## ◆ ICCSG_RX_CLASS_DATA_FT3_MATCH13

#define ICCSG_RX_CLASS_DATA_FT3_MATCH13 (13U)

## ◆ ICCSG_RX_CLASS_DATA_FT3_MATCH14

#define ICCSG_RX_CLASS_DATA_FT3_MATCH14 (14U)

## ◆ ICCSG_RX_CLASS_DATA_FT3_MATCH15

#define ICCSG_RX_CLASS_DATA_FT3_MATCH15 (15U)

## ◆ ICCSG_RX_CLASS_DATA_FT1_MATCH0

#define ICCSG_RX_CLASS_DATA_FT1_MATCH0 (16U)

## ◆ ICCSG_RX_CLASS_DATA_FT1_MATCH1

#define ICCSG_RX_CLASS_DATA_FT1_MATCH1 (17U)

## ◆ ICCSG_RX_CLASS_DATA_FT1_MATCH2

#define ICCSG_RX_CLASS_DATA_FT1_MATCH2 (18U)

## ◆ ICCSG_RX_CLASS_DATA_FT1_MATCH3

#define ICCSG_RX_CLASS_DATA_FT1_MATCH3 (19U)

## ◆ ICCSG_RX_CLASS_DATA_FT1_MATCH4

#define ICCSG_RX_CLASS_DATA_FT1_MATCH4 (20U)

## ◆ ICCSG_RX_CLASS_DATA_FT1_MATCH5

#define ICCSG_RX_CLASS_DATA_FT1_MATCH5 (21U)

## ◆ ICCSG_RX_CLASS_DATA_FT1_MATCH6

#define ICCSG_RX_CLASS_DATA_FT1_MATCH6 (22U)

## ◆ ICCSG_RX_CLASS_DATA_FT1_MATCH7

#define ICCSG_RX_CLASS_DATA_FT1_MATCH7 (23U)

## ◆ ICCSG_RX_CLASS_DATA_FT_RX_DA_I

#define ICCSG_RX_CLASS_DATA_FT_RX_DA_I (24U)

## ◆ ICCSG_RX_CLASS_DATA_FT_RX_DA_P

#define ICCSG_RX_CLASS_DATA_FT_RX_DA_P (25U)

## ◆ ICCSG_RX_CLASS_DATA_FT_RX_VLAN

#define ICCSG_RX_CLASS_DATA_FT_RX_VLAN (26U)

## ◆ ICCSG_RX_CLASS_DATA_FT_RX_RCV

#define ICCSG_RX_CLASS_DATA_FT_RX_RCV (27U)

## ◆ ICCSG_RX_CLASS_DATA_FT_RX_FWD

#define ICCSG_RX_CLASS_DATA_FT_RX_FWD (28U)

## ◆ ICCSG_RX_CLASS_DATA_FT_RX_BC

#define ICCSG_RX_CLASS_DATA_FT_RX_BC (29U)

## ◆ ICCSG_RX_CLASS_DATA_FT_RX_MC

#define ICCSG_RX_CLASS_DATA_FT_RX_MC (30U)

## ◆ ICCSG_RX_CLASS_DATA_FT_RX_SAV

#define ICCSG_RX_CLASS_DATA_FT_RX_SAV (31U)

## ◆ ICSSG_TAS_MIN_CYCLE_TIME_NS

#define ICSSG_TAS_MIN_CYCLE_TIME_NS (1000000)

Minimum cycle time supported by implementation (in ns).

## ◆ ICSSG_TAS_MIN_WINDOW_DURATION_NS

#define ICSSG_TAS_MIN_WINDOW_DURATION_NS (10000)

Minimum TAS window duration supported by implementation (in ns).

## Typedef Documentation

## ◆ Icssg_MdioLinkStateChangeCb

typedef void(* Icssg_MdioLinkStateChangeCb) (Icssg_MdioLinkStateChangeInfo *info, void *appArg)

Icssg PHY link state change callback function.

Callback for PHY link state change interrupt (MDIO_LINKINT). This callback is invoked from interrupt context.

## ◆ Icssg_portLinkStateChangeCb

typedef void(* Icssg_portLinkStateChangeCb) (Enet_MacPort macPort, bool isLinkUp, void *appArg)

## Enumeration Type Documentation

## ◆ Icssg_Instance_Num

enum Icssg_Instance_Num

ICSSG instance numbers.

Enumerator
ICSSG_INSTANCE_NUM_0 | Instance number 0
ICSSG_INSTANCE_NUM_1 | Instance number 1
ICSSG_INSTANCE_NUM_2 | Instance number 2

## ◆ Icssg_Ioctl

enum Icssg_Ioctl

ICSSG IOCTL commands.

Enumerator
ICSSG_MACPORT_IOCTL_ENABLE_PROMISC_MODE | Enable promiscuous mode. IOCTL params: inArgs: Enet_MacPort outArgs: None Type: Synchronous.
ICSSG_MACPORT_IOCTL_DISABLE_PROMISC_MODE | Disable promiscuous mode. IOCTL params: inArgs: Enet_MacPort outArgs: None Type: Synchronous.
ICSSG_PER_IOCTL_VLAN_RESET_TABLE | Populate VLAN table with default VLAN entry configuration. IOCTL params: inArgs: Icssg_VlanFidParams outArgs: None Type: Synchronous.
ICSSG_PER_IOCTL_VLAN_SET_ENTRY | Update a VLAN table entry. IOCTL params: inArgs: Icssg_VlanFidEntry outArgs: None Type: Synchronous.
ICSSG_PER_IOCTL_VLAN_GET_ENTRY | Get VLAN entry for VLAN table for requested VLAN id. IOCTL params: inArgs: None outArgs: Icssg_VlanFidEntry Type: Synchronous.
ICSSG_PER_IOCTL_SET_PORT_STATE | Set port state. Sets the port state in one of the following states (refer to Icssg_PortState): Disabled Blocking Forwarding Forwarding without learning TAS trigger TAS enable TAS reset TAS disable IOCTL params: inArgs: Icssg_PortState outArgs: None Type: Asynchronous.
ICSSG_FDB_IOCTL_ADD_ENTRY | Add FDB entry. IOCTL params: inArgs: Icssg_FdbEntry outArgs: None Type: Asynchronous.
ICSSG_FDB_IOCTL_REMOVE_ENTRY | Delete FDB entry. IOCTL params: inArgs: Icssg_FdbEntry outArgs: None Type: Asynchronous.
ICSSG_FDB_IOCTL_REMOVE_ALL_ENTRIES | Delete all FDB entries. IOCTL params: inArgs: None outArgs: None Type: Asynchronous
ICSSG_FDB_IOCTL_REMOVE_AGEABLE_ENTRIES | Remove all ageable entries. IOCTL params: inArgs: None outArgs: None Type: Asynchronous.
ICSSG_FDB_IOCTL_READ_SLOT_ENTRIES | Read the four entries of one FDB slot. IOCTL params: inArgs: Icssg_FdbEntry_ReadSlotInArgs outArgs: None Type: Asynchronous.
ICSSG_FDB_IOCTL_GET_SLOT_ENTRIES | Get the four entries of one FDB slot. IOCTL params: inArgs: None outArgs: Icssg_FdbEntry_GetSlotOutArgs Type: Asynchronous.
ICSSG_MACPORT_IOCTL_SET_MACADDR | Add MAC address of the interface. IOCTL params: inArgs: IcssgMacPort_SetMacAddressInArgs outArgs: None Type: Synchronous.
ICSSG_HOSTPORT_IOCTL_SET_MACADDR | Add MAC address of the host port interface. IOCTL params: inArgs: Icssg_MacAddr outArgs: None Type: Synchronous.
ICSSG_PER_IOCTL_TAS_TRIGGER |
ICSSG_PER_IOCTL_TAS_ENABLE |
ICSSG_PER_IOCTL_TAS_DISABLE |
ICSSG_PER_IOCTL_TAS_RESET |
ICSSG_PER_IOCTL_VLAN_SET_HOSTPORT_DFLT_VID | Set the default VLAN ID and PCP bits for host port. Sets the default VLAN ID and PCP bits for host port. Only the VID and PCP fields from the passed VLAN configuration are valid, the CFI bit is ignored. IOCTL params: inArgs: EnetPort_VlanCfg outArgs: None Type: Synchronous.
ICSSG_PER_IOCTL_VLAN_SET_MACPORT_DFLT_VID | Set the default VLAN ID and PCP bits for specified MAC port. IOCTL params: inArgs: Icssg_MacPortDfltVlanCfgInArgs outArgs: None Type: Synchronous.
ICSSG_FDB_IOCTL_SET_AGING_PERIOD | Set the aging period of the FDB. Sets the FDB aging period in nanoseconds. IOCTL params: inArgs: uint64_t outArgs: None Type: Synchronous.
ICSSG_MACPORT_IOCTL_ENABLE_UCAST_FLOOD | Enable flooding of unicast packets to host port. IOCTL params: inArgs: Enet_MacPort outArgs: None Type: Asynchronous.
ICSSG_MACPORT_IOCTL_DISABLE_UCAST_FLOOD | Disable flooding of unicast packets to host port. IOCTL params: inArgs: Enet_MacPort outArgs: None Type: Asynchronous.
ICSSG_MACPORT_IOCTL_ENABLE_MCAST_FLOOD | Enable flooding of multicast packets to host port. IOCTL params: inArgs: Enet_MacPort outArgs: None Type: Asynchronous.
ICSSG_MACPORT_IOCTL_DISABLE_MCAST_FLOOD | Disable flooding of multicast packets to host port. IOCTL params: inArgs: Enet_MacPort outArgs: None Type: Asynchronous.
ICSSG_MACPORT_IOCTL_SET_ACCEPT_FRAME_CHECK | Set the criteria for accepting VLAN tagged/untagged packets. Sets the accept criteria to: Accept only VLAN tagged frames Accept only untagged and priority tagged frames Accept all frames (default configuration) IOCTL params: inArgs: Icssg_SetAcceptFrameCheckInArgs outArgs: None Type: Synchronous.
ICSSG_MACPORT_IOCTL_SET_INGRESS_RATE_LIM | Configure ingress rate limiting. IOCTL params: inArgs: Icssg_IngressRateLim outArgs: None Type: Synchronous.
ICSSG_MACPORT_IOCTL_SET_QUEUE_CUT_THROUGH_PREEMPT_SELECT | cut through or prempt select configuration. IOCTL params: inArgs: IcssgMacPort_SetQueueCtPremptModeInArgs outArgs: None Type: Synchronous.
ICSSG_MACPORT_IOCTL_CONFIG_SPL_FRAME_PRIO | special frame priority configuration. IOCTL params: inArgs: IcssgMacPort_ConfigSpecialFramePrioInArgs outArgs: None Type: Synchronous.
ICSSG_ENABLE_PROTOCOL_SPECIFIC_TAG_IOCTL | Enable HSR Tag Removal Offload. IOCTL params: inArgs: None outArgs: None Type: Asynchronous.
ICSSG_DISABLE_PROTOCOL_SPECIFIC_TAG_IOCTL | Disable HSR Tag Removal Offload. IOCTL params: inArgs: None outArgs: None Type: Asynchronous.
ICSSG_INTERNAL_IOCTL_REGISTER_HANDLER | Register Handler for the IOCTL CMD. IOCTL params: inArgs: IcssgInternalIoctlHandlerTableEntry_t outArgs: None Type: Synchronous.

## ◆ Icssg_QueuePreemptMode

enum Icssg_QueuePreemptMode

Queue preemptive mode: express or preemptive.

Enumerator
ICSSG_QUEUE_PREEMPT_MODE_EXPRESS | Express queue
ICSSG_QUEUE_PREEMPT_MODE_PREEMPT | Preemptive queue

## ◆ Icssg_QueueForwardMode

enum Icssg_QueueForwardMode

Queue forward mode: cut-through or store-and-forward.

Enumerator
ICSSG_QUEUE_FORWARD_MODE_STOREANDFWD | Store-and-forward queue
ICSSG_QUEUE_FORWARD_MODE_CUTTHROUGH | Cut-through queue

## ◆ Icssg_PortState

enum Icssg_PortState

Port states.

Enumerator
ICSSG_PORT_STATE_DISABLED | Disabled state. No frames can be sent or received, but there can be a link.
ICSSG_PORT_STATE_BLOCKING | Blocking state. At the port, only sync/management frames are sent or received (e.g. gPTP, LLDP, MRP)
ICSSG_PORT_STATE_FORWARD | Forwarding state. Forward frames as per MC/Stream/Static Registration FDB. Learning is enabled for frames received locally.
ICSSG_PORT_STATE_FORWARD_WO_LEARNING | Forwarding without learning state.
ICSSG_PORT_STATE_TAS_TRIGGER | TAS trigger state
ICSSG_PORT_STATE_TAS_ENABLE | TAS enable state
ICSSG_PORT_STATE_TAS_RESET | TAS reset state
ICSSG_PORT_STATE_TAS_DISABLE | TAS disable state

## ◆ Icssg_AcceptFrameCheck

enum Icssg_AcceptFrameCheck

Acceptable frame check criteria.

Enumerator
ICSSG_ACCEPT_ONLY_VLAN_TAGGED | Accept only VLAN-tagged frames
ICSSG_ACCEPT_ONLY_UNTAGGED_PRIO_TAGGED | Accept only untagged or priority-tagged frames
ICSSG_ACCEPT_ALL | Accept all frames

## Function Documentation

## ◆ EnetCb_GetFwPoolMem()

const Icssg_FwPoolMem* EnetCb_GetFwPoolMem | ( | Enet_Type | enetType,
|  | uint32_t | instId
| ) |  |

ICSSG memory pool callback function.

Initializes the ICSSG memory pool callback function.

Parameters

  enetType | Enet Peripheral type
  instId | Instance Number

## ◆ IcssgMacPort_initCfg()

void IcssgMacPort_initCfg | ( | IcssgMacPort_Cfg * | macPortCfg | ) |

Initialises Mac Port COnfiguration.

Gets Application configuration related to ICSSG.

Parameters

  macPortCfg | Pointer to ICSSG mac port configuration structure

## ◆ Icssg_getSliceNum()

uint32_t Icssg_getSliceNum | ( | Enet_Type | enetType,
|  | uint32_t | instId,
|  | Enet_MacPort | macPort
| ) |  |

ICSSG memory pool callback function.

Initializes the ICSSG memory pool callback function.

Parameters

  enetType | Enet Peripheral type
  instId | Instance Number
  macPort | Enet Mac Port

ENET_IOCTL_PER_BASE
@ ENET_IOCTL_PER_BASE
Definition: enet_ioctl.h:246