edma/v0/edma.h

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/*
 * Copyright (C) 2022-24 Texas Instruments Incorporated
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 *   Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 *
 *   Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 *
 *   Neither the name of Texas Instruments Incorporated nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
#ifndef EDMA_V0_H_
#define EDMA_V0_H_
 
#ifdef __cplusplus
extern "C" {
#endif
 
/* ========================================================================== */
/*                             Include Files                                  */
/* ========================================================================== */
 
#include <drivers/hw_include/cslr_edma.h>
#include <drivers/hw_include/cslr_soc.h>
#include <drivers/hw_include/tistdtypes.h>
#include <kernel/dpl/SystemP.h>
#include <kernel/dpl/HwiP.h>
 
/* ========================================================================== */
/*                                 Macros                                     */
/* ========================================================================== */
#define EDMACC_DMAQNUM_CLR(chNum) \
    (~((uint32_t) 0x7U << (((chNum) % 8U) * 4U)))
 
#define EDMACC_DMAQNUM_SET(chNum, queNum) \
    (((uint32_t) 0x7U & (queNum)) << (((chNum) % 8U) * 4U))
 
#define EDMACC_QDMAQNUM_CLR(chNum) \
    (~((uint32_t) 0x7U << ((chNum) * 4U)))
 
#define EDMACC_QDMAQNUM_SET(chNum, queNum) \
    (((uint32_t) 0x7U & (queNum)) << ((chNum) * 4U))
 
#define EDMACC_QCHMAP_PAENTRY_CLR ((uint32_t) (~((uint32_t)EDMA_TPCC_QCHMAPN_PAENTRY_MASK)))
 
#define EDMACC_QCHMAP_PAENTRY_SET(paRAMId)                               \
    (((EDMA_TPCC_QCHMAPN_PAENTRY_MASK >> EDMA_TPCC_QCHMAPN_PAENTRY_SHIFT) \
      & (paRAMId)) << EDMA_TPCC_QCHMAPN_PAENTRY_SHIFT)                    \
 
#define EDMACC_QCHMAP_TRWORD_CLR  ((uint32_t) (~((uint32_t)EDMA_TPCC_QCHMAPN_TRWORD_MASK)))
 
#define EDMACC_QCHMAP_TRWORD_SET(paRAMId)                                \
    (((EDMA_TPCC_QCHMAPN_TRWORD_MASK >> EDMA_TPCC_QCHMAPN_TRWORD_SHIFT) & \
      (paRAMId)) << EDMA_TPCC_QCHMAPN_TRWORD_SHIFT)
 
#define EDMA_PARAM_BIDX(val)   (val & 0xFFFF)
 
#define EDMA_PARAM_BIDX_EXT(val)  ((val & 0xFF0000) >> 16)
 
#define EDMA_TRIG_MODE_MANUAL                ((uint32_t) 0U)
 
#define EDMA_TRIG_MODE_QDMA                  ((uint32_t) 1U)
 
#define EDMA_TRIG_MODE_EVENT                 ((uint32_t) 2U)
 
#define EDMA_CHANNEL_TYPE_DMA                ((uint32_t) 0U)
 
#define EDMA_CHANNEL_TYPE_QDMA               ((uint32_t) 1U)
 
#define EDMA_XFER_COMPLETE                   ((uint32_t) 0U)
 
#define EDMA_CC_DMA_EVT_MISS                 ((uint32_t) 1U)
 
#define EDMA_CC_QDMA_EVT_MISS                ((uint32_t) 2U)
 
#define EDMA_TPTC0                   ((uint32_t) 0U)
 
#define EDMA_TPTC1                   ((uint32_t) 1U)
 
#define EDMA_TPTC_ERROR_DISABLE       ((uint32_t) 0U)
 
#define EDMA_TPTC_ERROR_ENABLE        ((uint32_t) 1U)
 
#define EDMA_SYNC_A                          ((uint32_t) 0U)
 
#define EDMA_SYNC_AB                         ((uint32_t) 1U)
 
#define EDMA_ADDRESSING_MODE_LINEAR          ((uint32_t) 0U)
 
#define EDMA_ADDRESSING_MODE_FIFO_WRAP       ((uint32_t) 1U)
 
#define EDMA_FIFO_WIDTH_8BIT     ((uint32_t) EDMA_TPCC_OPT_FWID_FIFOWIDTH8BIT)
 
#define EDMA_FIFO_WIDTH_16BIT    ((uint32_t) EDMA_TPCC_OPT_FWID_FIFOWIDTH16BIT)
 
#define EDMA_FIFO_WIDTH_32BIT    ((uint32_t) EDMA_TPCC_OPT_FWID_FIFOWIDTH32BIT)
 
#define EDMA_FIFO_WIDTH_64BIT    ((uint32_t) EDMA_TPCC_OPT_FWID_FIFOWIDTH64BIT)
 
#define EDMA_FIFO_WIDTH_128BIT   ((uint32_t) EDMA_TPCC_OPT_FWID_FIFOWIDTH128BIT)
 
#define EDMA_FIFO_WIDTH_256BIT   ((uint32_t) DMA_TPCC_OPT_FWID_FIFOWIDTH256BIT)
 
#define EDMACC_CLR_TCCERR         ((uint32_t) EDMA_TPCC_CCERRCLR_TCERR_MASK)
 
#define EDMACC_CLR_QTHRQ0         ((uint32_t) EDMA_TPCC_CCERRCLR_QTHRXCD0_MASK)
 
#define EDMACC_CLR_QTHRQ1         ((uint32_t) EDMA_TPCC_CCERRCLR_QTHRXCD1_MASK)
 
#define EDMACC_TCCERR_STAT         ((uint32_t) EDMA_TPCC_CCERR_TCERR_MASK)
 
#define EDMACC_QTHRQ0_STAT         ((uint32_t) EDMA_TPCC_CCERR_QTHRXCD0_MASK)
 
#define EDMACC_QTHRQ1_STAT         ((uint32_t) EDMA_TPCC_CCERR_QTHRXCD1_MASK)
 
#define EDMA_OPT_TCCHEN_MASK      ((uint32_t) EDMA_TPCC_OPT_TCCHEN_MASK)
 
#define EDMA_OPT_ITCCHEN_MASK     ((uint32_t) EDMA_TPCC_OPT_ITCCHEN_MASK)
 
#define EDMA_OPT_TCINTEN_MASK     ((uint32_t) EDMA_TPCC_OPT_TCINTEN_MASK)
 
#define EDMA_OPT_ITCINTEN_MASK    ((uint32_t) EDMA_TPCC_OPT_ITCINTEN_MASK)
 
#define EDMA_OPT_TCC_MASK         ((uint32_t) EDMA_TPCC_OPT_TCC_MASK)
 
#define EDMA_OPT_TCC_SHIFT        ((uint32_t) EDMA_TPCC_OPT_TCC_SHIFT)
 
#define EDMA_OPT_SYNCDIM_MASK     ((uint32_t) EDMA_TPCC_OPT_SYNCDIM_MASK)
 
#define EDMA_OPT_SYNCDIM_SHIFT    ((uint32_t) EDMA_TPCC_OPT_SYNCDIM_SHIFT)
 
#define EDMA_OPT_STATIC_MASK      ((uint32_t) EDMA_TPCC_OPT_STATIC_MASK)
 
#define EDMA_OPT_STATIC_SHIFT     ((uint32_t) EDMA_TPCC_OPT_STATIC_SHIFT)
 
#define EDMACC_OPT_TCC_CLR        ((uint32_t) (~EDMA_TPCC_OPT_TCC_MASK))
 
#define EDMACC_OPT_TCC_SET(tcc)                                      \
    (((EDMA_TPCC_OPT_TCC_MASK >> EDMA_TPCC_OPT_TCC_SHIFT) & (tcc)) << \
     EDMA_TPCC_OPT_TCC_SHIFT)
 
#define EDMA_OPT_SAM_MASK         ((uint32_t) EDMA_TPCC_OPT_SAM_MASK)
 
#define EDMA_OPT_SAM_SHIFT        ((uint32_t) EDMA_TPCC_OPT_SAM_SHIFT)
 
#define EDMA_OPT_DAM_MASK         ((uint32_t) EDMA_TPCC_OPT_DAM_SHIFT)
 
#define EDMA_OPT_DAM_SHIFT        ((uint32_t) EDMA_TPCC_OPT_DAM_SHIFT)
 
#define    EDMACC_PARAM_ENTRY_OPT            ((uint32_t) 0x0U)
 
#define    EDMACC_PARAM_ENTRY_SRC            ((uint32_t) 0x1U)
 
#define    EDMACC_PARAM_ENTRY_ACNT_BCNT      ((uint32_t) 0x2U)
 
#define    EDMACC_PARAM_ENTRY_DST            ((uint32_t) 0x3U)
 
#define    EDMACC_PARAM_ENTRY_SRC_DST_BIDX   ((uint32_t) 0x4U)
 
#define    EDMACC_PARAM_ENTRY_LINK_BCNTRLD   ((uint32_t) 0x5U)
 
#define    EDMACC_PARAM_ENTRY_SRC_DST_CIDX   ((uint32_t) 0x6U)
 
#define    EDMACC_PARAM_ENTRY_CCNT           ((uint32_t) 0x7U)
 
#define    EDMACC_PARAM_FIELD_OFFSET         ((uint32_t) 0x4U)
 
#define    EDMACC_PARAM_ENTRY_FIELDS         ((uint32_t) 0x8U)
 
#define EDMA_NUM_TCC                        ((uint32_t) SOC_EDMA_NUM_DMACH)
 
#define EDMA_RESOURCE_TYPE_DMA                ((uint32_t) 0U)
 
#define EDMA_RESOURCE_TYPE_QDMA               ((uint32_t) 1U)
 
#define EDMA_RESOURCE_TYPE_TCC                ((uint32_t) 2U)
 
#define EDMA_RESOURCE_TYPE_PARAM              ((uint32_t) 3U)
 
#define EDMA_RESOURCE_ALLOC_ANY               ((uint32_t) 0xFFFFU)
 
#define EDMA_SET_ALL_BITS                    ((uint32_t) 0xFFFFFFFFU)
 
#define EDMA_CLR_ALL_BITS                    ((uint32_t) 0x00000000U)
 
#define EDMACC_COMPL_HANDLER_RETRY_COUNT     ((uint32_t) 10U)
 
#define EDMACC_ERR_HANDLER_RETRY_COUNT       ((uint32_t) 10U)
 
/* ========================================================================== */
/*                         Structures                                         */
/* ========================================================================== */
typedef struct {
    /* \brief OPT field of PaRAM Set */
    uint32_t opt;
    uint32_t srcAddr;
    /* \brief Number of bytes in each Array (ACNT) */
    uint16_t aCnt;
    /* \brief Number of Arrays in each Frame (BCNT) */
    uint16_t bCnt;
    uint32_t destAddr;
    int16_t  srcBIdx;
    int16_t  destBIdx;
    uint16_t linkAddr;
    uint16_t bCntReload;
    /* \brief Index between consecutive frames of a Source Block (SRCCIDX) */
    int16_t  srcCIdx;
    /* \brief Index between consecutive frames of a Dest Block (DSTCIDX) */
    int16_t  destCIdx;
    /* \brief Number of Frames in a block (CCNT) */
    uint16_t cCnt;
    /* \brief Stores higher 8 Bits of SRCBIDX */
    int8_t  srcBIdxExt;
    /* \brief Stores higher 8 Bits of DSTBIDX */
    int8_t  destBIdxExt;
 
} __attribute__((packed))
EDMACCPaRAMEntry;
 
typedef struct
{
    uint32_t    dmaCh[SOC_EDMA_NUM_DMACH/32U];
    /* \brief QDMA channels allocated. Each channel will be defined with 1 bit. */
    uint32_t    qdmaCh;
    uint32_t    tcc[EDMA_NUM_TCC/32U];
    uint32_t    paramSet[SOC_EDMA_NUM_PARAMSETS/32U];
} EDMA_ResourceObject;
 
typedef struct {
    /* \brief EDMA region to be used */
    uint32_t    regionId;
    /* \brief EDMA Event queue to be used for all channels */
    uint32_t    queNum;
    /* \brief Parameter to reset the PaRAM memory of the owned PaRAMs */
    uint32_t    initParamSet;
    /* \brief owned resource configuration */
    EDMA_ResourceObject ownResource;
    /* \brief Dma channels reserved for Event triggered transfers */
    uint32_t    reservedDmaCh[SOC_EDMA_NUM_DMACH/32U];
}EDMA_InitParams;
 
typedef struct {
    uint32_t    dmaEventMissStatusLow;
    /* \brief Each bit denotes Event miss status for DMA channels 0 - 31 */
    uint32_t    dmaEventMissStatusHigh;
    /* \brief Each bit denotes Event miss status for DMA channels 32 - 63 */
    uint32_t    qdmaEventMissStatus;
    /* \brief Each bit denotes Event miss status for QDMA Channels 0 to 7 */
    uint32_t    isEventQueueThresholdExceeded;
    /* \brief Each bit denotes if Threshold is exceeded for Queues */
    uint32_t    isTccLimitExceeded;
    /* \brief Set to TRUE if TCC limit exceeded for a transfer */
}EDMA_CcErrorInfo;
 
typedef struct {
    uint32_t    isTransferRequestError;
    /* \brief Set to TRUE if a TR is detected that violates transfer rules */
    uint32_t    isInvalidAccessError;
    /* \brief Set to TRUE if an Invalid address write or read access is requested */
    uint32_t    isBusError;
    /* \brief Set to TRUE if a bus error event occurs. Error information is stored in Error code */
    uint32_t    errorCode;
    /* \brief Contains error code for the transaction that caused the error */
    uint32_t    transferCompletionCode;
    /* \brief Contains TCC value for the transaction that caused the error */
    uint32_t    isChainingEnabled;
    /* \brief Set to TRUE if TCCHEN is High in the transaction  that caused the error */
    uint32_t    isTransferInterruptEnabled;
    /* \brief Set to TRUE if TCINTEN is High in the transaction  that caused the error */
}EDMA_TcErrorInfo;
 
typedef struct {
    uint32_t          errorStatus;
    /* \brief EDMA Aggregated Error status value */
    EDMA_CcErrorInfo  ccErrorInfo;
    /* \brief TPCC Error information */
    EDMA_TcErrorInfo  tcErrorInfo[SOC_EDMA_NUM_TPTC];
    /* \brief TPCC Error information */
}EDMA_ErrorInfo;
 
typedef struct
{
    uint32_t                intrEnable;
    uint32_t                errIntrEnable;
} EDMA_Params;
 
typedef struct Edma_IntrObject_t   *Edma_IntrHandle;
 
typedef void (*Edma_EventCallback)(Edma_IntrHandle intrHandle,
                                   void *appData);
 
typedef void (*Edma_ErrorCallback)(EDMA_ErrorInfo *errorInfo,
                                   void *appData);
 
typedef struct Edma_IntrObject_t
{
    /* \brief TCC number for which the callback to be reistered. */
    uint32_t                  tccNum;
    /* \brief Application data pointer passed to callback function. */
    void                     *appData;
    /* \brief Callback function pointer. */
    Edma_EventCallback        cbFxn;
    Edma_IntrHandle  nextIntr;
    Edma_IntrHandle  prevIntr;
} Edma_IntrObject;
 
typedef void *EDMA_Handle;
 
typedef struct
{
    /*
     * User parameters
     */
    EDMA_Handle             handle;
    EDMA_Params             openPrms;
    uint32_t                isOpen;
    EDMA_ResourceObject     allocResource;
    void                   *hwiHandle;
    HwiP_Object             hwiObj;
    void                   *errHwiHandle;
    HwiP_Object             errHwiObj;
    Edma_ErrorCallback      errCallback;
    void*                   errCallbackArgs;
    EDMA_ErrorInfo          errorInfo;
    Edma_IntrHandle  firstIntr;
} EDMA_Object;
 
typedef struct
{
    /*
     * SOC configuration
     */
    uint32_t                baseAddr;
    uint32_t                tcBaseAddr[SOC_EDMA_NUM_TPTC];
    EDMA_InitParams         initPrms;
    uint32_t                compIntrNumber;
    uint8_t                 intrPriority;
    uint32_t                errIntrNumber;
    uint8_t                 errIntrPriority;
    uint32_t                intrAggEnableAddr;
    uint32_t                intrAggEnableMask;
    uint32_t                intrAggStatusAddr;
    uint32_t                intrAggClearMask;
    uint32_t                errIntrAggEnableAddr;
    uint32_t                errIntrAggEnableMask;
    uint32_t                errIntrAggStatusAddr;
    uint32_t                errIntrAggRawStatusAddr;
    uint32_t                errIntrAggClearMask;
} EDMA_Attrs;
 
typedef struct
{
    EDMA_Attrs       *attrs;
    EDMA_Object      *object;
} EDMA_Config;
 
extern EDMA_Config gEdmaConfig[];
extern uint32_t    gEdmaConfigNum;
extern EDMA_InitParams gEdmaInitParams[];
 
/* ========================================================================== */
/*                          Function Declarations                             */
/* ========================================================================== */
 
void EDMA_initParamsInit(EDMA_InitParams *initParam);
 
void EDMA_ccPaRAMEntry_init(EDMACCPaRAMEntry *paramEntry);
 
void EDMA_enableChInShadowRegRegion(uint32_t baseAddr,
                                    uint32_t regionId,
                                    uint32_t chType,
                                    uint32_t chNum);
 
void EDMA_disableChInShadowRegRegion(uint32_t baseAddr,
                                     uint32_t regionId,
                                     uint32_t chType,
                                     uint32_t chNum);
 
void EDMA_channelToParamMap(uint32_t baseAddr,
                            uint32_t channel,
                            uint32_t paramSet);
 
void EDMA_mapChToEvtQ(uint32_t baseAddr,
                      uint32_t chType,
                      uint32_t chNum,
                      uint32_t evtQNum);
 
void EDMA_unmapChToEvtQ(uint32_t baseAddr,
                        uint32_t chType,
                        uint32_t chNum);
 
void EDMA_mapQdmaChToPaRAM(uint32_t        baseAddr,
                           uint32_t        chNum,
                           const uint32_t *paRAMId);
 
uint32_t EDMA_getMappedPaRAM(uint32_t baseAddr,
                             uint32_t chNum,
                             uint32_t chType,
                             uint32_t *paramId);
void EDMA_setQdmaTrigWord(uint32_t baseAddr,
                          uint32_t chNum,
                          uint32_t trigWord);
 
void EDMA_clrMissEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
 
void EDMA_qdmaClrMissEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
 
void EDMA_clrCCErr(uint32_t baseAddr, uint32_t flags);
 
void EDMA_setEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
 
void EDMA_clrEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
 
void EDMA_enableDmaEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
 
void EDMA_disableDmaEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
 
void EDMA_enableQdmaEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
 
void EDMA_disableQdmaEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
 
uint32_t EDMA_getIntrStatusRegion(uint32_t baseAddr, uint32_t regionId);
 
void EDMA_enableEvtIntrRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
 
void EDMA_disableEvtIntrRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
 
void EDMA_clrIntrRegion(uint32_t baseAddr, uint32_t regionId, uint32_t value);
 
uint32_t EDMA_getEnabledIntrRegion(uint32_t baseAddr, uint32_t regionId);
 
uint32_t EDMA_getEnabledIntrHighRegion(uint32_t baseAddr, uint32_t regionId);
 
void EDMA_getPaRAM(uint32_t           baseAddr,
                   uint32_t           paRAMId,
                   EDMACCPaRAMEntry *currPaRAM);
 
void EDMA_qdmaGetPaRAM(uint32_t           baseAddr,
                       uint32_t           paRAMId,
                       EDMACCPaRAMEntry *currPaRAM);
 
void EDMA_setPaRAM(uint32_t           baseAddr,
                   uint32_t           paRAMId,
                   const EDMACCPaRAMEntry *newPaRAM);
 
void EDMA_qdmaSetPaRAM(uint32_t           baseAddr,
                       uint32_t           paRAMId,
                       const EDMACCPaRAMEntry *newPaRAM);
 
void EDMA_qdmaSetPaRAMEntry(uint32_t baseAddr,
                            uint32_t paRAMId,
                            uint32_t paRAMEntry,
                            uint32_t newPaRAMEntryVal);
 
uint32_t EDMA_qdmaGetPaRAMEntry(uint32_t baseAddr,
                                uint32_t paRAMId,
                                uint32_t paRAMEntry);
 
void EDMA_dmaSetPaRAMEntry(uint32_t baseAddr,
                            uint32_t paRAMId,
                            uint32_t paRAMEntry,
                            uint32_t newPaRAMEntryVal);
 
uint32_t EDMA_dmaGetPaRAMEntry(uint32_t baseAddr,
                                uint32_t paRAMId,
                                uint32_t paRAMEntry);
 
uint32_t EDMA_configureChannelRegion(uint32_t baseAddr,
                                     uint32_t regionId,
                                     uint32_t chType,
                                     uint32_t chNum,
                                     uint32_t tccNum,
                                     uint32_t paramId,
                                     uint32_t evtQNum);
 
uint32_t EDMA_freeChannelRegion(uint32_t baseAddr,
                                uint32_t regionId,
                                uint32_t chType,
                                uint32_t chNum,
                                uint32_t trigMode,
                                uint32_t tccNum,
                                uint32_t evtQNum);
 
uint32_t EDMA_enableTransferRegion(uint32_t baseAddr,
                                   uint32_t regionId,
                                   uint32_t chNum,
                                   uint32_t trigMode);
 
uint32_t EDMA_disableTransferRegion(uint32_t baseAddr,
                                    uint32_t regionId,
                                    uint32_t chNum,
                                    uint32_t trigMode);
 
void EDMA_clearErrorBitsRegion(uint32_t baseAddr,
                               uint32_t regionId,
                               uint32_t chNum,
                               uint32_t evtQNum);
 
uint32_t EDMA_getCCErrStatus(uint32_t baseAddr);
 
uint32_t EDMA_getErrIntrStatus(uint32_t baseAddr);
 
uint32_t EDMA_qdmaGetErrIntrStatus(uint32_t baseAddr);
 
uint32_t EDMA_peripheralIdGet(uint32_t baseAddr);
 
uint32_t EDMA_intrStatusHighGetRegion(uint32_t baseAddr, uint32_t regionId);
 
uint32_t EDMA_readIntrStatusRegion(uint32_t baseAddr, uint32_t regionId, uint32_t tccNum);
 
uint32_t EDMA_getEventStatus(uint32_t baseAddr);
 
 
uint32_t EDMA_getEventStatusHigh(uint32_t baseAddr);
 
uint32_t EDMA_readEventStatusRegion(uint32_t baseAddr, uint32_t chNum);
 
uint32_t EDMA_errIntrHighStatusGet(uint32_t baseAddr);
 
void EDMA_chainChannel(uint32_t baseAddr,
                       uint32_t paRAMId1,
                       uint32_t chId2,
                       uint32_t chainOptions);
 
void EDMA_linkChannel(uint32_t baseAddr, uint32_t paRAMId1, uint32_t paRAMId2);
 
void EDMA_init(void);
 
void EDMA_deinit(void);
 
uint32_t EDMA_isInitialized(EDMA_Handle handle);
 
EDMA_Handle EDMA_open(uint32_t index, const EDMA_Params *prms);
 
EDMA_Handle EDMA_getHandle(uint32_t index);
 
void EDMA_close(EDMA_Handle handle);
 
uint32_t EDMA_isInterruptEnabled(EDMA_Handle handle);
 
int32_t EDMA_registerIntr(EDMA_Handle handle, Edma_IntrObject *intrObj);
 
int32_t EDMA_unregisterIntr(EDMA_Handle handle, Edma_IntrObject *intrObj);
 
uint32_t EDMA_getBaseAddr(EDMA_Handle handle);
 
uint32_t EDMA_getRegionId(EDMA_Handle handle);
 
int32_t EDMA_allocDmaChannel(EDMA_Handle handle, uint32_t *dmaCh);
 
int32_t EDMA_allocQdmaChannel(EDMA_Handle handle, uint32_t *qdmaCh);
 
int32_t EDMA_allocTcc(EDMA_Handle handle, uint32_t *tcc);
 
int32_t EDMA_allocParam(EDMA_Handle handle, uint32_t *param);
 
int32_t EDMA_freeDmaChannel(EDMA_Handle handle, uint32_t *dmaCh);
 
int32_t EDMA_freeQdmaChannel(EDMA_Handle handle, uint32_t *qdmaCh);
 
int32_t EDMA_freeTcc(EDMA_Handle handle, uint32_t *tcc);
 
int32_t EDMA_freeParam(EDMA_Handle handle, uint32_t *param);
 
int32_t EDMA_registerErrorCallback(EDMA_Handle handle, Edma_ErrorCallback errorCallback, void* args);
 
int32_t EDMA_unregisterErrorCallback(EDMA_Handle handle);
 
#ifdef __cplusplus
}
#endif
 
#endif  /* #ifndef EDMA_V0_H_ */