Introduction
The example shows how to setup and use the ECC Safety Diagnostic operation on d-tag cache momory of R5F core. Shows the generation of SEC error on R5F ECC Aggregator for DTAG cache moemories.
Use Cases
| Use Case | Description |
| UC-1 | Single bit error injection. |
| UC-2 | Double bit error injection. |
Supported Combinations
| Parameter | Value |
| CPU + OS | r5fss0-0 nortos |
| r5fss1-0 nortos |
| Toolchain | ti-arm-clang |
| Board | am263px-cc |
| Example folder | examples/sdl/ecc/sdl_ecc_r5_d-tag/ |
Steps to Run the Example
See Also
ECC : Error Correcting Code
Sample Output
Shown below is a sample output when the application is run,
ECC Example Application
ECC UC-1 and UC-2 Test
ECC_Test_init: Exception init complete
ESM_Test_init: Init MSS ESM complete
ECC_Test_init: R5FSS0 ECC initialization is completed
Starting Tests for Dtag cache - single error correction
Waiting for ESM Interrupt
Injected error and got ESM Interrupt for ram_Id = 8
Waiting for ESM Interrupt
Injected error and got ESM Interrupt for ram_Id = 9
Waiting for ESM Interrupt
Injected error and got ESM Interrupt for ram_Id = 10
Waiting for ESM Interrupt
Injected error and got ESM Interrupt for ram_Id = 11
Starting Tests for Dtag cache - double error detection
Waiting for ESM Interrupt
Injected error and got ESM Interrupt for ram_Id = 8
Waiting for ESM Interrupt
Injected error and got ESM Interrupt for ram_Id = 9
Waiting for ESM Interrupt
Injected error and got ESM Interrupt for ram_Id = 10
Waiting for ESM Interrupt
Injected error and got ESM Interrupt for ram_Id = 11
All tests have passed.