DTHE AES GCM

Table of Contents

• Introduction
  • Build the aes cbc 128 example
• Steps to Run through ROM Boot flow
  • Via SBL_uart bootloader
    • Build sbl_uart
    • Set board for UART boot
    • Run UART_bootloader
    • Sample output
  • Via SBL_qspi bootloader
    • Build sbl_qspi
    • Build sbl_uart_uniflash
    • Set UART boot mode
    • Edit default_sbl_qspi.cfg to include the correct images
    • Run UART_uniflash
    • Set QSPI boot mode
    • Sample output
• See Also

Introduction

This example demonstrates Galios Counter mode(GCM) of AES(Advanced Encryption Standard) using AES accelerator. The AES supports all the key sizes like 128-bit, 192-bit and 256-bit implementations. This example explains the steps to build and run for DTHE AES GCM with 128-bit, 192-bit and 256-bit keys.

Note

AES-GCM is a Authenticated-Encyption mechanism which encrypts while generating MAC (Message Authentication Code).

Parameter	Value
CPU + OS	r5fss0-0 nortos
Toolchain	ti-arm-clang
Boards	am263px-cc
Example folder	examples/security/crypto/dthe_aes/crypto_aes_gcm/
Supported Device Type	HS-FS

Build the aes cbc 128 example

$make -s -C examples/security/crypto/dthe_aes/crypto_aes_gcm/<soc>-<board>/r5fss0-0_nortos/ti-arm-clang all DEVICE=<soc>

Steps to Run through ROM Boot flow

Note

If the device type is HS-SE, an additional flag "DEVICE_TYPE=HS" is passed for building SBL. The flag results in generation of SBL image with suffix "hs.tiimage" which can only be used when device type is HS-SE.

Via SBL_uart bootloader

Build sbl_uart

make -s -C examples/drivers/boot/sbl_uart_multicore_elf/<soc>-<board>/r5fss0-0_nortos/ti-arm-clang/ all DEVICE=<soc>

Set board for UART boot

See EVM setup

Run UART_bootloader

python uart_bootloader.py -p <COMxx> --bootloader=sbl_prebuilt/<soc>-<board>/sbl_uart.release.hs.tiimage --file=../../examples/security/crypto/dthe_aes/crypto_aes_gcm/<soc>-<board>/r5fss0-0_nortos/ti-arm-clang/crypto_dthe_aes_gcm.release.mcelf

Sample output

On successful boot, R5 log at uart terminal, will have the following output. UART Console:

[CRYPTO] DTHE AES GCM example started ...
[CRYPTO] DTHE AES GCM example completed!!
All tests have passed!!

Via SBL_qspi bootloader

Build sbl_qspi

make -C examples/drivers/boot/sbl_qspi_multicore_elf/<soc>-<board>/r5fss0-0_nortos/ti-arm-clang/ all DEVICE=<soc>

Build sbl_uart_uniflash

make -s -C examples/drivers/boot/sbl_uart_uniflash/<soc>-<board>/r5fss0-0_nortos/ti-arm-clang/ all DEVICE=<soc>

Set UART boot mode

See EVM setup

Edit default_sbl_qspi.cfg to include the correct images

Run UART_uniflash

python uart_uniflash.py -p <COMxx> --cfg=sbl_prebuilt/<soc>-<board>/default_sbl_qspi.cfg

Set QSPI boot mode

See EVM setup

Sample output

On successful boot, R5 log at uart terminal, will have the following output.

UART Console:

[CRYPTO] DTHE AES GCM example started ...
[CRYPTO] DTHE AES GCM example completed!!
All tests have passed!!

See Also

DTHE