AM62x MCU+ SDK  10.01.00
am62x/dss_soc.h
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30  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  */
32 
47 #ifndef DSS_SOC_H_
48 #define DSS_SOC_H_
49 
50 /* ========================================================================== */
51 /* Include Files */
52 /* ========================================================================== */
53 
54 /* None */
55 
56 #ifdef __cplusplus
57 extern "C" {
58 #endif
59 
60 /* ========================================================================== */
61 /* Macros & Typedefs */
62 /* ========================================================================== */
63 
64 /*
65  * Macros for different driver instance numbers to be passed as instance ID
66  * at the time of driver create.
67  * Note: These are read only macros. Don't modify the value of these macros.
68  */
69 
77 #define DSS_DCTRL_INST_0 (0U)
78 
80 #define DSS_DCTRL_INST_MAX (1U)
81 
90 #define DSS_DISP_INST_VID1 (CSL_DSS_VID_PIPE_ID_VID1)
91 
93 #define DSS_DISP_INST_VIDL1 (CSL_DSS_VID_PIPE_ID_VIDL1)
94 
96 #define DSS_DISP_INST_MAX (CSL_DSS_VID_PIPE_ID_MAX)
97 
99 #define DSS_DISP_INST_INVALID (CSL_DSS_VID_PIPE_ID_INVALID)
100 
111 #define DSS_DCTRL_NODE_TYPE_INVALID ((uint32_t) 0x0U)
112 #define DSS_DCTRL_NODE_TYPE_PIPE ((uint32_t) 0x1U)
113 #define DSS_DCTRL_NODE_TYPE_OVERLAY ((uint32_t) 0x2U)
114 #define DSS_DCTRL_NODE_TYPE_VP ((uint32_t) 0x3U)
115 #define DSS_DCTRL_NODE_TYPE_OUTPUT ((uint32_t) 0x4U)
116 
127 #define DSS_DCTRL_NODE_INVALID ((uint32_t) 0x0U)
128 #define DSS_DCTRL_NODE_VID1 ((uint32_t) 0x1U)
129 #define DSS_DCTRL_NODE_VIDL1 ((uint32_t) 0x2U)
130 #define DSS_DCTRL_NODE_OVR1 ((uint32_t) 0x3U)
131 #define DSS_DCTRL_NODE_OVR2 ((uint32_t) 0x4U)
132 #define DSS_DCTRL_NODE_VP1 ((uint32_t) 0x5U)
133 #define DSS_DCTRL_NODE_VP2 ((uint32_t) 0x6U)
134 #define DSS_DCTRL_NODE_OLDI ((uint32_t) 0x7U)
135 #define DSS_DCTRL_NODE_DPI ((uint32_t) 0x8U)
136 
148 #define DSS_FWL_REGIONS_MAX (8U)
149 
151 #define DSS_FWL_COMMON0_ID CSL_STD_FW_DSS0_COMMON_ID
152 #define DSS_FWL_COMMON0_START CSL_STD_FW_DSS0_COMMON_COMMON_START
153 #define DSS_FWL_COMMON0_END CSL_STD_FW_DSS0_COMMON_COMMON_END
154 
156 #define DSS_FWL_COMMON1_ID CSL_STD_FW_DSS0_COMMON1_ID
157 #define DSS_FWL_COMMON1_START CSL_STD_FW_DSS0_COMMON1_COMMON1_START
158 #define DSS_FWL_COMMON1_END CSL_STD_FW_DSS0_COMMON1_COMMON1_END
159 
161 #define DSS_FWL_VIDL1_ID CSL_STD_FW_DSS0_VIDL1_ID
162 #define DSS_FWL_VIDL1_START CSL_STD_FW_DSS0_VIDL1_VIDL1_START
163 #define DSS_FWL_VIDL1_END CSL_STD_FW_DSS0_VIDL1_VIDL1_END
164 
166 #define DSS_FWL_VID1_ID CSL_STD_FW_DSS0_VID_ID
167 #define DSS_FWL_VID1_START CSL_STD_FW_DSS0_VID_VID_START
168 #define DSS_FWL_VID1_END CSL_STD_FW_DSS0_VID_VID_END
169 
171 #define DSS_FWL_OVR1_ID CSL_STD_FW_DSS0_OVR1_ID
172 #define DSS_FWL_OVR1_START CSL_STD_FW_DSS0_OVR1_OVR1_START
173 #define DSS_FWL_OVR1_END CSL_STD_FW_DSS0_OVR1_OVR1_END
174 
176 #define DSS_FWL_OVR2_ID CSL_STD_FW_DSS0_OVR2_ID
177 #define DSS_FWL_OVR2_START CSL_STD_FW_DSS0_OVR2_OVR2_START
178 #define DSS_FWL_OVR2_END CSL_STD_FW_DSS0_OVR2_OVR2_END
179 
181 #define DSS_FWL_VP1_ID CSL_STD_FW_DSS0_VP1_ID
182 #define DSS_FWL_VP1_START CSL_STD_FW_DSS0_VP1_VP1_START
183 #define DSS_FWL_VP1_END CSL_STD_FW_DSS0_VP1_VP1_END
184 
186 #define DSS_FWL_VP2_ID CSL_STD_FW_DSS0_VP2_ID
187 #define DSS_FWL_VP2_START CSL_STD_FW_DSS0_VP2_VP2_START
188 #define DSS_FWL_VP2_END CSL_STD_FW_DSS0_VP2_VP2_END
189 
193 #define DSS_DCTRL_MAX_NODES ((uint32_t) 9U)
194 
198 #define DSS_DCTRL_MAX_EDGES ((uint32_t) 8U)
199 
201 #define DSS_FUNC_IRQ_DEFAULT_NUM (CSLR_GICSS0_COMMON_0_SPI_DSS0_DISPC_INTR_REQ_0_0)
202 
210 #define DSS_EVT_MGR_INST_ID_FUNC ((uint32_t) 0x00U)
211 
212 #define DSS_EVT_MGR_INST_ID_MAX ((uint32_t) 0x01U)
213 
214 #define DSS_EVT_MGR_INST_ID_INVALID ((uint32_t) 0xFFU)
215 
217 /*
218  * SOC specific IOCTLs.
219  */
220 
237 #define IOCTL_DSS_DCTRL_SET_OLDI_PARAMS (DSS_DCTRL_SOC_IOCTL_BASE + 0x01U)
238 
240 /* ========================================================================== */
241 /* Structure Declarations */
242 /* ========================================================================== */
243 
248 typedef struct
249 {
257  uint32_t numValidIrq;
261  uint32_t irqNum[DSS_EVT_MGR_INST_ID_MAX];
270 } Dss_IrqParams;
271 
276 typedef struct
277 {
278  uint32_t isCommRegAvailable[CSL_DSS_COMM_REG_ID_MAX];
280  uint32_t isPipeAvailable[CSL_DSS_VID_PIPE_ID_MAX];
282  uint32_t isOverlayAvailable[CSL_DSS_OVERLAY_ID_MAX];
284  uint32_t isPortAvailable[CSL_DSS_VP_ID_MAX];
286 } Dss_RmInfo;
287 
291 typedef struct
292 {
297 } Dss_SocParams;
298 
303 typedef struct
304 {
305  uint32_t vpId;
310 
311 /* ========================================================================== */
312 /* Internal/Private Function Declarations */
313 /* ========================================================================== */
314 
322 static inline uint32_t Dss_dispIsVidInst(uint32_t instId);
323 
331 static inline uint32_t Dss_dispIsVidLInst(uint32_t instId);
332 
339 static inline void Dss_irqParamsInit(Dss_IrqParams *irqParams);
340 
347 static inline void Dss_rmInfoInit(Dss_RmInfo *rmInfo);
348 
355 static inline void Dss_socParamsInit(Dss_SocParams *socParams);
356 
363 static inline void Dss_dctrlOldiParamsInit(Dss_DctrlOldiParams *oldiParams);
364 
365 /* ========================================================================== */
366 /* Function Declarations */
367 /* ========================================================================== */
368 
374 
382 void Dss_setOLDITxPowerDown(uint32_t oldiLinkMode, bool powerState);
383 /* ========================================================================== */
384 /* Static Function Definitions */
385 /* ========================================================================== */
386 
387 static inline uint32_t Dss_dispIsVidInst(uint32_t instId)
388 {
389  uint32_t isVidInst = FALSE;
390 
391  if(DSS_DISP_INST_VID1 == instId)
392  {
393  isVidInst = TRUE;
394  }
395 
396  return (isVidInst);
397 }
398 
399 static inline uint32_t Dss_dispIsVidLInst(uint32_t instId)
400 {
401  uint32_t isVidLInst = FALSE;
402 
403  if(DSS_DISP_INST_VIDL1 == instId)
404  {
405  isVidLInst = TRUE;
406  }
407 
408  return (isVidLInst);
409 }
410 
411 static inline void Dss_irqParamsInit(Dss_IrqParams *irqParams)
412 {
413  if(NULL != irqParams)
414  {
418  }
419 }
420 
421 static inline void Dss_rmInfoInit(Dss_RmInfo *rmInfo)
422 {
423  uint32_t i = 0U;
424  if(NULL != rmInfo)
425  {
427  {
428  rmInfo->isCommRegAvailable[i] = TRUE;
429  }
431  {
432  rmInfo->isPipeAvailable[i] = TRUE;
433  }
435  {
436  rmInfo->isOverlayAvailable[i] = TRUE;
437  }
438  for(i=CSL_DSS_VP_ID_1; i<CSL_DSS_VP_ID_MAX; i++)
439  {
440  rmInfo->isPortAvailable[i] = TRUE;
441  }
442  }
443 }
444 
445 static inline void Dss_socParamsInit(Dss_SocParams *socParams)
446 {
447  if(NULL != socParams)
448  {
449  Dss_irqParamsInit(&(socParams->irqParams));
450  Dss_rmInfoInit(&(socParams->rmInfo));
451  }
452 }
453 
454 static inline void Dss_dctrlOldiParamsInit(Dss_DctrlOldiParams *oldiParams)
455 {
456  if(NULL != oldiParams)
457  {
458  oldiParams->vpId = CSL_DSS_VP_ID_1;
459  CSL_dssVpOldiCfgInit(&(oldiParams->oldiCfg));
460  }
461 }
462 
463 #ifdef __cplusplus
464 }
465 #endif
466 
467 #endif /* #ifndef DSS_SOC_VO_H_ */
468 
Dss_DctrlOldiParams
Structure containing OLDI configuration. This structure is used as an argument to IOCTL_DSS_DCTRL_SET...
Definition: am62x/dss_soc.h:304
Dss_SocParams::irqParams
Dss_IrqParams irqParams
Definition: am62x/dss_soc.h:293
CSL_DSS_OVERLAY_ID_1
#define CSL_DSS_OVERLAY_ID_1
Overlay 1.
Definition: csl_dssTop.h:123
CSL_DSS_COMM_REG_ID_0
#define CSL_DSS_COMM_REG_ID_0
Common Region 0.
Definition: csl_dssTop.h:91
DSS_EVT_MGR_INST_ID_MAX
#define DSS_EVT_MGR_INST_ID_MAX
Invalid Instance Id.
Definition: am62x/dss_soc.h:212
Dss_dispIsVidInst
static uint32_t Dss_dispIsVidInst(uint32_t instId)
Check if the display driver instance is of type Video pipeline.
Definition: am62x/dss_soc.h:387
Dss_RmInfo
Structure containing resources manager information. This enables display sharing between two differen...
Definition: am62x/dss_soc.h:277
CSL_DssVpOldiCfg
OLDI Configuration.
Definition: csl_dssVideoPort.h:569
Dss_IrqParams::irqNum
uint32_t irqNum[DSS_EVT_MGR_INST_ID_MAX]
Definition: am62x/dss_soc.h:261
NULL
#define NULL
Define NULL if not defined.
Definition: csl_types.h:100
CSL_dssVpOldiCfgInit
static void CSL_dssVpOldiCfgInit(CSL_DssVpOldiCfg *oldiCfg)
CSL_DssVpOldiCfg structure init function.
Definition: csl_dssVideoPort.h:976
DSS_EVT_MGR_INST_ID_FUNC
#define DSS_EVT_MGR_INST_ID_FUNC
Instance Id for functional interrupts.
Definition: am62x/dss_soc.h:210
DSS_DISP_INST_VIDL1
#define DSS_DISP_INST_VIDL1
Video Lite 1 Pipeline display driver instance number.
Definition: am62x/dss_soc.h:93
Dss_setOLDITxPowerDown
void Dss_setOLDITxPowerDown(uint32_t oldiLinkMode, bool powerState)
Set OLDI Power Domain Control to power on and off OLDI TX.
Dss_setDssSoftReset
void Dss_setDssSoftReset(void)
Perform DSS Soft Reset.
CSL_DSS_VP_ID_MAX
#define CSL_DSS_VP_ID_MAX
Video Port Max Id.
Definition: csl_dssTop.h:142
Dss_dctrlOldiParamsInit
static void Dss_dctrlOldiParamsInit(Dss_DctrlOldiParams *oldiParams)
Dss_DctrlOldiParams structure init function.
Definition: am62x/dss_soc.h:454
Dss_RmInfo::isPipeAvailable
uint32_t isPipeAvailable[CSL_DSS_VID_PIPE_ID_MAX]
Definition: am62x/dss_soc.h:280
Dss_SocParams::rmInfo
Dss_RmInfo rmInfo
Definition: am62x/dss_soc.h:295
CSL_DSS_VID_PIPE_ID_VID1
#define CSL_DSS_VID_PIPE_ID_VID1
Video Pipeline 1.
Definition: csl_dssTop.h:106
CSL_DSS_COMM_REG_ID_MAX
#define CSL_DSS_COMM_REG_ID_MAX
Common Region Max Id.
Definition: csl_dssTop.h:95
Dss_RmInfo::isOverlayAvailable
uint32_t isOverlayAvailable[CSL_DSS_OVERLAY_ID_MAX]
Definition: am62x/dss_soc.h:282
Dss_irqParamsInit
static void Dss_irqParamsInit(Dss_IrqParams *irqParams)
Dss_IrqParams structure init function.
Definition: am62x/dss_soc.h:411
CSL_DSS_VID_PIPE_ID_MAX
#define CSL_DSS_VID_PIPE_ID_MAX
Video Pipeline Max Id.
Definition: csl_dssTop.h:110
Dss_IrqParams::dssCommonRegionId
uint32_t dssCommonRegionId
Definition: am62x/dss_soc.h:250
CSL_DSS_VP_ID_1
#define CSL_DSS_VP_ID_1
Video Port 1.
Definition: csl_dssTop.h:138
Dss_IrqParams
Structure containing DSS interrupt information. Events should be enabled only for available Video Por...
Definition: am62x/dss_soc.h:249
Dss_DctrlOldiParams::vpId
uint32_t vpId
Definition: am62x/dss_soc.h:305
Dss_DctrlOldiParams::oldiCfg
CSL_DssVpOldiCfg oldiCfg
Definition: am62x/dss_soc.h:307
TRUE
#define TRUE
Definition: csl_types.h:61
Dss_SocParams
DSS SOC parameters.
Definition: am62x/dss_soc.h:292
Dss_RmInfo::isCommRegAvailable
uint32_t isCommRegAvailable[CSL_DSS_COMM_REG_ID_MAX]
Definition: am62x/dss_soc.h:278
Dss_dispIsVidLInst
static uint32_t Dss_dispIsVidLInst(uint32_t instId)
Check if the display driver instance is of type Video lite pipeline.
Definition: am62x/dss_soc.h:399
Dss_RmInfo::isPortAvailable
uint32_t isPortAvailable[CSL_DSS_VP_ID_MAX]
Definition: am62x/dss_soc.h:284
DSS_DISP_INST_VID1
#define DSS_DISP_INST_VID1
Video 1 Pipeline display driver instance number.
Definition: am62x/dss_soc.h:90
FALSE
#define FALSE
Definition: csl_types.h:62
CSL_DSS_OVERLAY_ID_MAX
#define CSL_DSS_OVERLAY_ID_MAX
Overlay Max Id.
Definition: csl_dssTop.h:127
Dss_socParamsInit
static void Dss_socParamsInit(Dss_SocParams *socParams)
Dss_SocParams structure init function.
Definition: am62x/dss_soc.h:445
Dss_IrqParams::numValidIrq
uint32_t numValidIrq
Definition: am62x/dss_soc.h:257
Dss_rmInfoInit
static void Dss_rmInfoInit(Dss_RmInfo *rmInfo)
Dss_RmInfo structure init function.
Definition: am62x/dss_soc.h:421
DSS_FUNC_IRQ_DEFAULT_NUM
#define DSS_FUNC_IRQ_DEFAULT_NUM
Definition: am62x/dss_soc.h:201